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CURRICULUM VITAE Raj Kumar Tripathi Email: Mobile:
CAREER OBJECTIVE:

To achieve high career growth through continuous learning process and keep myself dynamic, visionary and competitive with the changing scenario of technology.

AREAS OF INTEREST: Digital Integrated Circuit Design Low power Low voltage Design Physical Verification and Design

SKILL MATRIX HDL Simulators: Mentor Graphics ModelSim, ActiveHDL,Synopsys(design compiler) FPGA Prototyping: Xilinx ISE 9.2i Circuit Simulators: Tanner13.1,Mentor Tools(ICstation,Calibre,Eldo,Leonardo spectrum), Cadence (Virtueso). Programming Languages: VHDL, Verilog. Programming Language: C,C++ Operating Systems: Windows XP, Linux.

EDUCATIONAL QUALIFICATION:

M.Tech(VLSI Design) from CDAC Noida, Guru Gobind Singh university Delhi, with 75.5% till IInd Sem M.Tech(VLSI Design) from D.D.U Gorakhpur university Gorakhpur, U.P In 2008 with 70% marks. B.Sc. (Physics) from D. D. U. Gorakhpur University, Gorakhpur, U.P. Gorakhpur in year 2005 with 2nd div. 10+2 from U.P. Board in year 2001 with 2nd div.

10th U.P. Board in year 1999 with 2nd div.

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M.Tech Project IIIrd (semester) Title:FPGA based design and implementation of S-DES algorithm from CDAC Noida under the guidance of Ms. Sunita Prasad.

M.Sc. (Electronics) Project Title: Triple threshold static power optimization technique in high level synthesis using 0.35um technology from IT-BHU Varanasi under the guidance of Prof. S.K. Balasubramanian.

PROJECT & TRAINING: One month training program in Telecommunication from BSNL, Gorakhpur. Work shop on Advance Opto-electronics Materials & Devices at IT-BHU, Varanasi.

PERSONAL DETAILS: First Name: Raj Permanent Address: Present Address: Date of Birth: 28/March/1985 Marital Status: Single Last Name: Tripathi Middle Name: Kumar Email: Residence Phone:

DATE:

Raj Kumar Tripathi

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