CODE OF MULTIPLIER (4*4)

Library ieee;
Use ieee.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use ieee.std_logic_arith.all;
Entity mul4 is
Port ( a,b: in std_logic_vector(3 downto 0); t: out std_logic_vector(7 downto 0)
);
End mul4;
Architecture muld of mul4 is
Signal k0,k1,k2,k3(7 downto 0); std_logic;
Begin
K0<= 0000 & (a(3) and b(0)) & (a(2) and b(0)) & (a(1) and b(0)) & (a(0)and b(0));
K1<= 000 & (a(3) and b(1)) & (a(2) and b(1)) & (a(1) and b(1)) & (a(0) and b(1)) &
0;
K2<=00 & (a(3) and b(2)) & (a(2) and b(2)) & (a(1) and b(2)) & (a(0) and b(2)) & 00;
K3<=0 & (a(3) and b(3)) & (a(2) and b(3)) & (a(1) and b(3)) & (a(0) and b(3)) & 000;
t<= k0+k1+k2+k3;
End muld;