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CMOS Fabricationv2
CMOS Fabricationv2
CMOS Fabricationv2
Overview of CMOS CMOS Fabrication Process Overview CMOS Fabrication Process Problems with Current CMOS Fabrication Future Changes in CMOS Fabrication
Integrated Circuits Data converters Integrated transceivers Image sensors Logic circuits
NAND Circuit
http://lsmwww.epfl.ch/Education/former/20022003/VLSIDesign/ch02/ch02.html
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Create a pattern. Oxidize small layer, about 1m thick. Place photoresist on top of SiO2 Place mask(pattern) above photoresist and expose it to UV light.
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Etch away SiO2 using HF acid or plasma. Remove remaining photoresist with acids.
To create a n well:
Diffusion
Heat wafer in Arsenic gas chamber until diffusion occurs.
Ion Implantation
Arsenic or phosphorous are implanted in window.
SiO2 n well
A thin layer of oxide is deposited. A thin layer of polysilicon is deposited using Chemical Vapor Deposition (CVD) .
n well p substrate
http://en.wikipedia.org/wiki/Chemical_vapor_deposition
Remove oxide layer using acid. Dope open area using Ion implantation or diffusion.
n+ n+ p substrate p+ n well p+ n+
p+
Optical lithography is limited by the light frequency. Material limitations Yield limitations Space limitations
http://www.fujitsu.com/downloads/MAG/vol39-1/paper02.pdf
CMOS Digital Integrated Circuit Design - Analysis and Design by S.M. Kang and Y. Leblebici http://www.fujitsu.com/downloads/MAG/vol39-1/paper02.pdf Introduction to VLSI Circuits and Systems, John Wiley and Sons, 2002 http://lsmwww.epfl.ch/Education/former/20022003/VLSIDesign/ch02/ch02.html http://en.wikipedia.org/wiki/Chemical_vapor_deposition users.ece.utexas.edu/~adnan/vlsi-05/lec0Fab.ppt http://en.wikipedia.org/wiki/CMOS www.usna.edu/EE/ee452/LectureNotes/02_CMOS_Process_Steps/08_Simple_CMOS_Fab.ppt http://en.wikipedia.org/wiki/Silicon_on_insulator access.ee.ntu.edu.tw/course/VLSI_design_90second/data/Chapter%203%20Part 2%2003-20-2002.doc