1.

Explain the concept of 2s complement and 9s complement method of subtraction with an example. b. Explain the method of error control using a 7bit Hamming code method with good example
a. 2.

State and prove De Morgans theorem. b. What are universal logic gates? Derive all basic gates using only universal gates. c. State all properties of Ex-OR gate. Implement EX-OR gate using only NAND gates and only NOR gates.
a. 3. a.

For the truth table given below , find the minimal expression for the out put (Y) using K-map

b. 4. a.

Minimize the above function using Quine Mc Cluskey method. Design a combinational circuit for the following truth table

b.

Design a 4X1 data selector.

1.

Explain the concept of 2s complement and 9s complement method of subtraction with an example. b. Explain the method of error control using a 7bit Hamming code method with good example
a. 2.

List all logic gates, their symbol, algebraic function and truth tables. b. State all properties of Ex-OR gate. Implement EX-OR gate using only NAND gates and only NOR gates. c. Express the following function F=A+BC in standard SOP and POS forms
a. 3. a.

For the truth table given below , find the minimal expression for the out put (Y) using K-map

b. 4. a.

Minimize the above function using Quine Mc Cluskey method.

Construct a 5X32 decoder with four 3X8 decoders with enable and one 2X4 decoder b. Design a Half adder circuit.

1)
a.

Express the switching circuit shown in figure in binary logic notation

b. 2. a.

Explain the method of error control using a 7bit Hamming code method with good example State and prove De Morgans theorem.

What are universal logic gates? Derive all basic gates using only universal gates. c. State all properties of Ex-OR gate. Implement EX-OR gate using only NAND gates and only NOR gates.
b. 3. a.

Draw the AND-OR gate implementation of the following function after simplifying it in (i) SOP (ii) POS forms F=m(0, 2, 5, 6, 7, 8, 10) Minimize the above function using Quine Mc Cluskey method.

b.

4. a.

Design a combinational circuit for the following truth table

b.

Design a 4X1 data selector.