Professional Documents
Culture Documents
Bài giảng Vi xử lý - Vi điều khiển
Bài giảng Vi xử lý - Vi điều khiển
KHOA IN T
B MN K THUT MY TNH
Trng b mn
MC LC
CHNG 1. TNG QUAN V VI X L VI IU KHIN ...................... 9
1.1
GII THIU CHUNG V VI X L VI IU KHIN.....................................10
1.1.1
Tng quan ..............................................................................................................10
1.1.2
Lch s pht trin ca cc b x l........................................................................11
1.1.3
Vi x l v vi iu khin .......................................................................................12
1.1.4
ng dng ca Vi x l vi iu khin .................................................................13
1.2
Cu trc chung ca h vi x l...................................................................................15
1.2.1
Khi x l trung tm (CPU) ..................................................................................16
1.2.2
H thng bus..........................................................................................................17
1.3
nh dng d liu v biu din thng tin trong h vi x l vi iu khin ...........18
1.3.1
Cc h m ............................................................................................................18
1.3.2
M k t - Alphanumeric CODE (ASCII, EBCDIC)............................................20
1.3.3
Cc php ton s hc trn h m nh phn ..........................................................22
3.2.5
Cc thanh ghi chc nng c bit (SFRs - Special Function Registers) ............ 109
3.2.6
B m v b nh thi ....................................................................................... 113
3.2.7
Truyn thng khng ng b (UART)................................................................ 113
3.2.8
Ngt vi iu khin 8051 ...................................................................................... 114
3.3
Lp trnh hp ng cho 8051 ..................................................................................... 114
3.3.1
Cc ch a ch ............................................................................................... 114
3.3.2
Tp lnh trong 8051 ............................................................................................ 116
3.3.3
Cu trc chung chng trnh hp ng cho 8051................................................. 123
3.4
B m v b nh thi ............................................................................................. 126
3.5
Truyn thng ni tip................................................................................................ 133
3.6
X l ngt ................................................................................................................... 140
3.7
Cu hi v bi tp cui chng................................................................................ 147
I HC THI NGUYN
TRNG I HC
c lp - T do - Hnh phc
Tun
th
Ni dung
Chng I: Tng quan v vi x l vi iu khin
1.1. Gii thiu chung v vi x l vi iu khin
1.1.1.
Tng quan
1.1.2.
Lch s pht trin ca cc b x l
1.1.3.
Vi x l v vi iu khin
1.2. Cu trc chung ca h vi x l
1.2.1.
Khi x l trung tm (CPU)
1.2.2.
B nh (Memory)
1.2.3.
Khi phi ghp vo/ra (I/O)
1.2.4.
H thng bus
1.3. nh dng d liu v biu din thng tin trong
h vi x l vi iu khin
1.3.1.
Cc h m
1.3.2.
Biu din s v k t
1.3.3.
Cc php ton s hc trn h m nh phn
Chng II: H vi x l Intel 80x86
2.1. Cu trc phn cng ca b vi x l 8086
2.1.1.
Tng quan
2.1.2.
Cu trc bn trong v s hot ng
2.1.3.
Cc ch a ch
2.2. Tp lnh
2.2.1.
Gii thiu chung
2.2.2.
Cc nhm lnh
2.3. Biu thi gian ghi/c
2.4. Lp trnh hp ng (Assembly) cho vi x l
80x86
2.4.1.
Gii thiu chung v hp ng
2.4.2.
Cu trc ca chng trnh hp ng
Ti liu
hc tp,
tham
kho
Hnh
thc
hc
[1] - [4]
Ging
[1] - [4]
Ging
[1] - [4]
Ging
[1] - [4]
Ging
7
8
9
10
11
12
2.4.3.
Cc cu trc iu khin c bn
2.4.4.
Cc bc khi lp trnh
2.4.5.
Cc bi tp v d
Tho lun
Chng III: H vi iu khin onchip MCS 8051
3.1. Gii thiu chung v vi iu khin
3.1.1. Gii thiu chung
3.1.2. Khi nim vi iu khin
3.1.3. Cu trc chung ca vi iu khin
3.2. Kin trc vi iu khin 8051
Kin trc vi iu khin 8051 (tip)
Kim tra gia k
3.3. Tp lnh 8051 v lp trnh hp ng cho 8051
3.3.1. Tp lnh 8051
3.3.2. Thnh phn ngn ng assembly
3.4. Kin trc vi iu khin 8051
Tho lun
[1] - [4]
Ging
[1] - [4]
Ging
[1] - [4]
Ging
[1] - [4]
Ging
Tho
lun
Ging
Tho
lun
Ging
Tho
lun
[1] - [4]
[1] - [4]
14
15
Tho lun
[1] - [4]
13
[1] - [4]
[1] - [4]
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
CHNG 1.
TNG QUAN V VI X L VI IU KHIN
Mc tiu:
Gip sinh vin hiu v lch s ra i ca h vi x l vi iu khin; khi nim,
cu to v nguyn l ca h vi x l vi iu khin; n li kin thc v cc h
thng s m.
Tm tt chng:
Chng chia lm 3 phn:
Gii thiu chung v vi x l vi iu khin
Tng quan
Lch s pht trin ca cc b x l
Vi x l v vi iu khin
Cu trc chung ca h vi x l
Khi x l trung tm (CPU)
B nh (Memory)
Khi phi ghp vo/ra (I/O)
H thng bus
nh dng d liu v biu din thng tin trong h vi x l vi iu khin
Cc h m
Biu din s v k t
Cc php ton s hc trn h m nh phn
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
10
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
11
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
1.1.3 Vi x l v vi iu khin
Khi nim vi x l (microprocessor) v vi iu khin (microcontroller).
V c bn hai khi nim ny khng khc nhau nhiu, vi x l l thut ng
chung dng cp n k thut ng dng cc cng ngh vi in t, cng ngh
tch hp v kh nng x l theo chng trnh vo cc lnh vc khc nhau. Vo
nhng giai on u trong qu trnh pht trin ca cng ngh vi x l, cc chip (hay
cc vi x l) c ch to ch tch hp nhng phn cng thit yu nh CPU cng
cc mch giao tip gia CPU v cc phn cng khc. Trong giai on ny, cc phn
cng khc (k c b nh) thng khng c tch hp trn chip m phi ghp ni
thm bn ngoi. Cc phn cng ny c gi l cc ngoi vi (Peripherals). V sau,
nh s pht trin vt bc ca cng ngh tch hp, cc ngoi vi cng c tch hp
vo bn trong IC v ngi ta gi cc vi x l c tch hp thm cc ngoi vi l
cc vi iu khin.
Vi x l c cc khi chc nng cn thit ly d liu, x l d liu v xut
d liu ra ngoi sau khi x l. V chc nng chnh ca Vi x l chnh l x l d
liu, chng hn nh cng, tr, nhn, chia, so snh.v.v... Vi x l khng c kh nng
giao tip trc tip vi cc thit b ngoi vi, n ch c kh nng nhn v x l d liu
m thi.
vi x l hot ng cn c chng trnh km theo, cc chng trnh ny
iu khin cc mch logic v t vi x l x l cc d liu cn thit theo yu cu.
Chng trnh l tp hp cc lnh x l d liu thc hin tng lnh c lu tr
trong b nh, cng vic thc hnh lnh bao gm: nhn lnh t b nh, gii m lnh
v thc hin lnh sau khi gii m.
thc hin cc cng vic vi cc thit b cui cng, chng hn iu khin
ng c, hin th k t trn mn hnh .... i hi phi kt hp vi x l vi cc mch
in giao tip vi bn ngoi c gi l cc thit b I/O (nhp/xut) hay cn gi l
cc thit b ngoi vi. Bn thn cc vi x l khi ng mt mnh khng c nhiu hiu
qu s dng, nhng khi l mt phn ca mt my tnh, th hiu qu ng dng ca Vi
x l l rt ln. Vi x l kt hp vi cc thit b khc c s trong cc h thng
ln, phc tp i hi phi x l mt lng ln cc php tnh phc tp, c tc
nhanh. Chng hn nh cc h thng sn xut t ng trong cng nghip, cc tng
i in thoi, hoc cc robot c kh nng hot ng phc tp v.v...
B Vi x l c kh nng vt bc so vi cc h thng khc v kh nng tnh
ton, x l, v thay i chng trnh linh hot theo mc ch ngi dng, c bit
hiu qu i vi cc bi ton v h thng ln. Tuy nhin i vi cc ng dng nh,
tm tnh ton khng i hi kh nng tnh ton ln th vic ng dng vi x l cn
cn nhc. Bi v h thng d ln hay nh, nu dng vi x l th cng i hi cc
khi mch in giao tip phc tp nh nhau. Cc khi ny bao gm b nh cha
d liu v chng trnh thc hin, cc mch in giao tip ngoi vi xut nhp v
iu khin tr li, cc khi ny cng lin kt vi vi x l th mi thc hin c
12
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
cng vic. kt ni cc khi ny i hi ngi thit k phi hiu bit tinh tng
v cc thnh phn vi x l, b nh, cc thit b ngoi vi. H thng c to ra kh
phc tp, chim nhiu khng gian, mch in phc tp v vn chnh l trnh
ngi thit k. Kt qu l gi thnh sn phm cui cng rt cao, khng ph hp
p dng cho cc h thng nh.
V mt s nhc im trn nn cc nh ch to tch hp mt t b nh v mt
s mch giao tip ngoi vi cng vi vi x l vo mt IC duy nht c gi l
Microcontroller-Vi iu khin. Vi iu khin c kh nng tng t nh kh nng
ca vi x l, nhng cu trc phn cng dnh cho ngi dng n gin hn nhiu.
Vi iu khin ra i mang li s tin li i vi ngi dng, h khng cn nm
vng mt khi lng kin thc qu ln nh ngi dng vi x l, kt cu mch in
dnh cho ngi dng cng tr nn n gin hn nhiu v c kh nng giao tip trc
tip vi cc thit b bn ngoi. Vi iu khin tuy c xy dng vi phn cng dnh
cho ngi s dng n gin hn, nhng thay vo li im ny l kh nng x l b
gii hn (tc x l chm hn v kh nng tnh ton t hn, dung lng chng
trnh b gii hn). Thay vo , Vi iu khin c gi thnh r hn nhiu so vi vi x
l, vic s dng n gin, do n c ng dng rng ri vo nhiu ng dng c
chc nng n gin, khng i hi tnh ton phc tp.
Vi iu khin c ng dng trong cc dy chuyn t ng loi nh, cc robot
c chc nng n gin, trong my git, t v.v...
Nm 1976 Intel gii thiu b vi iu khin (microcontroller) 8748, mt chip
tng t nh cc b vi x l v l chip u tin trong h MCS-48. phc tp,
kch thc v kh nng ca Vi iu khin tng thm mt bc quan trng vo nm
1980 khi intel tung ra chip 8051, b Vi iu khin u tin ca h MCS-51 v l
chun cng ngh cho nhiu h Vi iu khin c sn xut sau ny. Sau rt
nhiu h Vi iu khin ca nhiu nh ch to khc nhau ln lt c a ra th
trng vi tnh nng c ci tin ngy cng mnh.
Trong ti liu ny, ranh gii gia hai khi nim vi x l v vi iu khin
thc s khng cn phi phn bit r rng. Chng ti s dng thut ng vi x l
khi cp n cc khi nim c bn ca k thut vi x l ni chung v s dng
thut ng vi iu khin khi i su nghin cu mt h chip c th.
1.1.4 ng dng ca Vi x l vi iu khin
Vi x l, chnh l chip ca cc loi my tnh ngy nay, nn hn cc bn bit
rt r n c nhng ng dng g. y, ti ch ni n ng dng ca vi iu khin.
Vi iu khin c th dng trong thit k cc loi my tnh nhng. My tnh nhng
c trong hu ht cc thit b t ng, thng minh ngy nay. Chng ta c th dng vi
iu khin thit k b iu khin cho cc sn phm nh:
13
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
14
iu khin ng c
iu khin s (PID, m,...)
o lng (o in p, o dng in, p sut, nhit ,...)
Cn bng ti, cn toa xe, cn t,...
My cn thp: iu khin ng c my cn, iu khin my qun thp,..
Lm b iu khin trung tm cho RoBot
n nh tc ng c
m sn phm ca 1 nh my, x nghip,
My vn hnh t ng (dng CNC)
...
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
- ALU (n v logic s hc): thc hin cc bi ton cho my tnh bao gm: +,
*, /,-, php ton logic,
- Control (iu khin): iu khin, kim sot cc ng d liu gia cc
thnh phn ca my tnh.
- Memory (b nh): lu tr chng trnh hay cc kt qu trung gian.
- Input (nhp), Output (Xut): xut nhp d liu (cn gi l thit b ngoi vi).
V c bn kin trc ca mt vi x l gm nhng phn cng sau:
- n v x l trung tm CPU (Central Processing Unit).
-
Cc b nh (Memories).
Cc cng vo/ra (song song (Parallel I/O Ports), ni tip (Serial I/O
Ports))
15
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
c th giao tip v iu khin cc c quan chp hnh (cc ngoi vi), CPU
s dng 03 loi tn hiu c bn l tn hiu a ch (Address), tn hiu d liu (Data)
v tn hiu iu khin (Control). V mt vt l th cc tn hiu ny l cc ng nh
dn in ni t CPU n cc ngoi vi hoc thm ch l gia cc ngoi vi vi nhau.
Tp hp cc ng tn hiu c cng chc nng gi l cc bus. Nh vy ta c cc
bus a ch, bus d liu v bus iu khin.
1.2.1 Khi x l trung tm (CPU)
CPU c cu to gm c n v x l s hc v lgic (ALU), cc thanh ghi, cc
khi lgic v cc mch giao tip. Chc nng ca CPU l tin hnh cc thao tc tnh
ton x l, a ra cc tn hiu a ch, d liu v iu khin nhm thc hin mt
nhim v no do ngi lp trnh a ra thng qua cc lnh (Instructions).
16
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
17
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
18
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
Cc m h m thng dng
H 10 H 2 H 8 H 16
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0
1
2
3
4
5
6
7
10
11
12
13
14
15
16
17
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Binary-Coded Decimal
8421 BCD EXCESS-3
0000 0011 0011
0001 0011 0100
0010 0011 0101
0011 0011 0110
0100 0011 0111
0101 0011 1000
0110 0011 1001
0111 0011 1010
1000 0011 1011
1001 0011 1100
0001 0000 0100 0011
0001 0001 0100 0100
0001 0010 0100 0101
0001 0011 0100 0110
0001 0100 0100 0111
0001 0101 0100 1000
Gray Code
0000
0001
0011
0010
0110
0111
0101
0100
1100
1101
1111
1110
1010
1011
1001
1000
7-Segment
abcdefg Display
111111
0
011000
1
110110
2
111100
3
011001
4
101101
5
101111
6
111000
7
111111
8
111001
9
111110
A
001111
B
000110
C
011110
D
110111
E
100011
F
19
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
20
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
21
Bi ging
Vi x l - Vi iu khin
Chng 1
Tng quan v vi x l vi iu khin
A
0
0
0
0
1
1
1
1
Php tr nh phn
Vo
Ra
B BIN
D
BOUT
0
0
0
0
0
1
1
1
1
0
1
1
1
1
0
1
0
0
1
0
0
1
0
0
1
0
0
0
1
1
1
1
Trng hp kt qu m:
22
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
CHNG 2.
H VI X L INTEL 80x86
Mc tiu:
Hiu c cu trc phn cng ca h vi x l; hiu v vn dng c cc ch
a ch; nm c tp lnh v lp trnh cho h vi x l 80x86
Tm tt chng:
23
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
25
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
n v x l lnh (EU)
Trong EU c khi iu khin (control unit, CU). Chnh ti bn trong khi
iu khin ny c mch gii m lnh. M lnh c vo t b nh c a n u
vo ca b gii m, cc thng tin thu c t u ra ca n s c a n mch
to xung iu khin, kt qu thu c l cc dy xung khc nhau tu theo m lnh,
iu khin hot ng ca cc b phn bn trong v bn ngoi CPU.
Trong EU c khi s hc v lgic (arithmatic and logic unit, ALU) chuyn
thc hin cc php tnh s hc v logic m ton t ca n nm trong cc thanh ghi
a nng. Kt qu thng c t v thanh ghi AX.
Ngoi ra trong EU cn c cc thanh ghi a nng (registers: AX, BX, CX,
DX, SP, BP, SI, DI), thanh ghi c FR (flag register).
Tm li, khi CPU hot ng EU s cung cp thng tin v a ch cho BIU
khi ny c lnh v d liu, cn bn thn n th gii m v thc hin lnh.
26
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Mc ch
MUL, IMUL (ton hng ngun kch thc word)
DIV, IDIV (ton hng ngun kch thc word)
IN (nhp word)
OUT (xut word)
CWD
Cc php ton x l chui (string)
AL
27
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Thanh ghi
Mc ch
Cc php ton x l chui (string)
AH
BX
XLAT
CX
CL
CX
Bao gm cc thanh ghi 16 bit SP, BP, SI v DI, thng cha cc gi tr offset
( lch) cho cc phn t nh a ch trong mt phn on (segment). Chng c th
c s dng trong cc php ton s hc v logic. Hai thanh ghi con tr (SP Stack
Pointer v BP Base Pointer) cho php truy xut d dng n cc phn t ang
trong ngn xp (stack) hin hnh. Cc thanh ghi ch s (SI Source Index v DI
Destination Index) c dng truy xut cc phn t trong cc on d liu v
on thm (extra segment). Thng thng, cc thanh ghi con tr lin h n on
stack hin hnh v cc thanh ghi ch s lin h n don d liu hin hnh. SI v DI
dng trong cc php ton chui.
Cc thanh ghi on
Bao gm cc thanh ghi 16 bit CS (Code segment), DS (Data segment), SS
(stack segment) v ES (extra segment), dng nh a ch vng nh 1 MB bng
cch chia thnh 16 on 64 KB.
Tt c cc lnh phi trong on m hin hnh, c nh a ch thng qua
thanh ghi CS. Offset ( lch) ca m c xc nh bng thanh ghi IP. D liu
chng trnh thng c t on d liu, nh v thng qua thanh ghi DS. Stack
nh v thng qua thanh ghi SS. Thanh ghi on thm c th s dng nh a ch
cc ton hng, d liu, b nh v cc phn t khc ngoi on d liu v stack hin
hnh.
Do Bus a ch ca vi x l 8086 c kch thc l 20 bit, nhng cc thanh
ghi con tr v thanh ghi ch s ch rng 16 bit nn khng th nh a ch cho ton
b nh vt l ca my tnh l (220B = 1.048.576B = 1Mbyte). V vy trong ch
thc (real mode) b nh c chia lm nhiu on mt thanh ghi con tr 16 bit
28
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Bit pos
Func
-
11
OF DF IF TF SF ZF x AF x
10
PF
CF
29
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
30
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
2.2 Ch a ch
2.2.1 Khi nim ch a ch
Trc khi i vo cc ch a ch ca Vi x l 8086 ta ni qua v cch m ho
lnh trong vi x l 8086.
Lnh ca b vi x l c ghi bng cc k t di dng gi nh ngi s
dng d nhn bit. i vi bn thn b vi x l th lnh cho n c m ho di
dng cc s 0 v 1 (cn gi l m my) v l dng biu din thng tin duy nht
m my c th hiu c. V lnh cho b vi x l c cho di dng m nn sau
khi nhn lnh, b vi x l phi thc hin gii m lnh ri sau mi thc hin lnh
31
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
0 0 0 1
Opcode
Byte 2
0
D W MOD
REG
R/M
Byte 3
Byte 4
DispL
DispH
Hoc
a ch trc tip
phn thp
a ch trc tip
phn cao
M
000
011
001
010
100
111
101
110
Thanh ghi on
CS
01
DS
11
ES
00
SS
10
00
01
10
11
W=0
W=1
000
[BX+SI]
[BX+SI]+d8
[BX+SI]+d16
AL
AX
001
[BX+DI]
[BX+DI]+d8
[BX+DI]+d16
CL
CX
010
[BP+SI]
[BP+SI]+d8
[BP+SI]+d16
DL
DX
011
[BP+DI]
[BP+DI]+d8
[BP+DI]+d16
BL
BX
32
Bi ging
Vi x l - Vi iu khin
MOD
R/M
Chng 2
H vi x l Intel 80x86
00
01
10
11
W=0
W=1
100
[SI]
[SI]+d8
[SI]+d16
AH
SP
101
[DI]
[DI]+d8
[DI]+d16
CH
BP
110
[BP]+d8
[BP]+d16
DH
SI
111
[BX]
[BX]+d8
[BX]+d16
BH
DI
V d 1: MOV
CL, [BX]
Byte 1
0 0 0 1
Byte 2
0 1
0 0 0 0 0 1 1 1 1
D W MOD
Opcode
REG
R/M
AH, 2Ah
Byte 1
1
0 0 0 1
Byte 2
0 1
0 0 0 1
D W MOD
Opcode
Byte 3
0 0 1 1
REG
0 0 0 1
R/M
0 1
0 1
2Ah
CX, [BX][SI]+DATA
0 0 0 1
Opcode
Byte 3
Byte 2
0 1 1 1
0 0 0 1
D W MOD
REG
0 0 0 1 1 1 1 1 1 1 1
R/M
FFh
Byte 4
0 0 0 0 1
0 1 1
0Bh
33
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Byte 2
10001000
88h
Byte 3
11111111
FFh
Byte 4
00001011
0Bh
2.2.2 Cc ch a ch
Ch a ch (addressing mode) l cch CPU tm thy ton hng cho cc
lnh ca n khi hot ng. Mt b vi x l c th c nhiu ch a ch. Cc ch
a ch ny c xc nh ngay t khi ch to v khng th thay i c. B vi
x l 8086/8088 c 9 ch a ch sau:
-
Ch a ch thanh ghi.
Ch a ch tc th.
Ch a ch trc tip.
Ch a ch gin tip qua thanh ghi.
Ch a ch tng i c s.
Ch a ch tng i ch s.
Ch a ch tng i c s ch s.
Ch a ch chui (String) mng.
Ch a ch cng (Port).
Ch a ch khc.
CH A CH THANH GHI
Trong ch a ch ny ngi ta s dng cc thanh ghi c sn trong CPU nh
l cc ton hng cha d liu cn thao tc, v vy khi thc hin c th t tc
truy nhp cao hn so vi cc lnh truy nhp n b nh.
V d:
MOV BX, DX
ADD AX, BX
CH A CH TC TH
Trong ch ny ton hng ch l mt thanh ghi hay mt nh, cn ton hng
ngun l mt hng s. Ta c th dng ch a ch ny np d liu cn thao tc
vo bt k thanh ghi no (tr thanh ghi on v thanh ghi c) v bt k nh no
trong on d liu DS.
34
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
V d:
MOV CL, 100
;chuyen 100 vao CL.
MOV AX, 0BC8h
;chuyen 0BC8h vao AX de roi
MOV DS, AX
;copy noi dung AX vao DS (vi
;khong duoc chuyen truc tiep vao thanh ghi doan).
MOV [BX], 20
;chuyen 20 vao o nho tai dia chi DS:BX.
CH A CH TRC TIP
Trong ch a ch ny mt ton hng cha a ch lch ca nh dng cha
d liu, cn ton hng kia c th l thanh ghi m khng c l nh.
V d:
MOV
MOV
CH A CH TNG I C S
Trong ch a ch ny cc thanh ghi c s nh BX v BP v cc hng
s biu din cc gi tr dch chuyn c dng tnh a ch hiu dng ca
ton hng trong cc vng nh DS v SS. V d:
MOV CX, [BX]+10
;copy noi dung hai o nho
;co dia chi DS:BX+10 va DS:BX+11
;vao CX
MOV CX, [BX+10]
;cach viet khac cua lenh
MOV CX, 10+[BX]
;cach viet khac cua lenh
MOV AL, [BP]+5 ;chuyen noi dung o nho co dia
;SS:BP+5 vao AL
lien tiep
tren
tren
chi
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
MOV
CX, [SI]+10
;copy noi dung hai o nho lien tiep
;co dia chi DS:SI+10 va DS:SI+11 vao CX
MOV CX, [SI +10]
;cach viet khac cua lenh tren
MOV CX, 10+[SI]
;cach viet khac cua lenh tren
MOV AL, [DI]+5 ;chuyen noi dung o nho co dia chi
;DS:DI+5 vao AL
CH A CH TNG I CH S C S
Kt hp hai ch a ch ch s v c s ta c ch a ch ch s c s.
Trong ch ny ta dng c hai thanh ghi c s ln thanh ghi ch s tnh a ch
ca ton hng. Nu ta dng thm c thnh phn biu din s dch chuyn ca a
ch th ta c ch a ch tng hp nht: Ch a ch tng i ch s c s.
V d:
MOV
BX, [BX]+[SI]+10 ;chuyen noi dung hai o nho
;lien tiep co dia chi DS:BX+SI+10 va DS:BX+SI+11 vao CX
MOV AL, [BP+DI+5]
;copy ni dung th: DS:BP+DI+5 vao AL
Ton hng
Thanh ghi
Reg
Tc th
Data
Trc tip
[offset]
DS
[BX]
[SI]
[DI]
DS
DS
DS
Tng i c s
[BX]+Disp
[BP]+Disp
DS
SS
Tng i ch s
[DI]+Disp
[SI]+Disp
DS
DS
Tng i ch s c s
[BX]+[DI]+Disp
[BX]+[SI]+Disp
[BP]+[DI]+Disp
[BP]+[SI]+Disp
DS
DS
SS
SS
Bng 2-3. Cc ch a ch
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
CH A CH CNG (PORT)
Trong h vi x l 80x86 ca Intel c khng gian a ch cho b nh v cng
vo/ra l tch bit nhau. Khng gian a ch cng c th ln n 65536 cng (64Kports).
a ch ca mt cng c th c xc nh bi mt hng gi tr kiu byte
(phm vi = 0..255)
V d:
IN
AL, 40h
;c cng sao chp ni dung ti
;cng c a ch 40h v thanh ghi AL
OUT 80h, AL
;Ghi cng gi d liu trong thanh
;ghi AL ti cng c a ch 80h
37
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
ch, Ngun
M t: chNgun
Trong ton hng ch v Ngun c th tm c theo cc ch a ch
khc nhau, nhng phi c cng di v khng c php ng thi l hai nh
hoc hai thanh ghi on.
Cc c b thay i: khng.
V d:
MOV
AL, AH
;ALAH
MOV
CX, 50
;CX50
MOV
DL, [SI]
;DL{DS:SI}
Port, Acc
M t: Acc{Port}
Trong {port} l d liu ca cng c a ch port. Port l a ch 8 bit ca
cng, n c th l cc gi tr trong khong 00...FFH. Nh vy c th c cc kh
nng sau y.
-
C mt cch khc cha a ch cng l thng qua thanh ghi DX. Khi dng
thanh ghi DX cha a ch cng ta c kh nng a ch ho cng mm do hn.
Lc ny a ch cng nm trong di 0000H FFFFH v vit lnh theo dng:
OUT DX, Acc
Cc c b thay i: khng.
V d:
OUT
MOV
MOV
OUT
45H, AL
DX, 0 ;xoa
DX, 00FFH
DX, AX
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
4. POP Pop word from top of Stack (ly li 1 t vo thanh ghi t nh ngn xp)
Dng lnh: POP
ch
M t:
ch{SP}
SPSP+2
Ton hng ch ch c th l cc thanh ghi a nng, thanh ghi on (nhng
khng c l thanh ghi on m CS) hoc nh.
Cc c b thay i: khng.
V d:
POP DX ;lay 2 byte tu dinh ngan xep dua vao DX
5. PUSH Push word on the Stack (ct 1 t vo ngn xp)
Dng lnh: PUSH
Ngun
M t:
SPSP-2
Ngun{SP}
Ton hng ch ch c th l cc thanh ghi a nng, thanh ghi on(k c
CS) hoc nh.
Cc c b thay i: khng.
V d:
PUSH
BX
;cat BX vao ngan xep tai vi tri do SP chi ra
M t:
ch ch + Ngun + CF
39
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
AL, 74H
;ALAL+74+CF
ADC
CL, BL
;CLCL+BL+CF
ADC
DL, [SI]
;DLDL+(DS:SI)+CF
M t:
ch ch + Ngun
DX, CX
;DXDX+CX
ADD
AX, 400
;AXAX+400
DEC ch
BX, 1200H
BX
Ngun
INC
ch
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
Bi ging
Vi x l - Vi iu khin
M t:
Chng 2
H vi x l Intel 80x86
ch ch + 1
AL
BX
Ngun
Thc hin php nhn khng du vi ton hng Ngun ( nh hoc thanh
ghi) vi thanh ghi tng.
-
CX
;AXxCX DXAX
MUL
BL
;ALxBL AX
NEG ch
M t:
ch0-ch
AL
;AL0-(AL)
M t:
chch - Ngun
41
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
AL, 78H
;ALAL-78H
SUB
BL, CL
;BLBL-CL
SUB
DL, [SI]
;DLDL-{DS:SI}
M t:
ch ch ^ Ngun
Thc hin php v logic hai ton hng v lu kt qu vo ton hng ch.
Ngi ta thng s dng che i/gi li mt vi bit no ca mt ton hng
bng cch nhn logic ton hng vi ton hng tc th c cc bit 0/1 cc v
tr cn che i/gi li tng ng.
Cc c b thay i: CF, OF, PF, SF, ZF.
V d:
AND
AND
DX, CX
AL, 0FH
AL, 02H
AL
;AL=(0000 0010)B
;AL=(1111 1101)B
OR
ch, Ngun
M t:
ch = ch Ngun
42
AX, BX
CL, 30H
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
RCL ch, CL
M t:
CF
MSB
LSB
Lnh ny quay ton hng sang tri thng qua c CF, CL phi c
cha sn s ln quay. Trong trng hp quay 1 ln c th vit RCL ch, 1
Nu s ln quay l 9 th ton hng khng i v cp CF v ton hng
quay ng mt vng (nu ton hng ch l 8 bit).
Sau lnh RCL c CF mang gi tr c ca MSB, cn c OF1 nu sau
khi quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng
c xc nh sau nhiu ln quay.
Cc c b thay i: CF, OF, SF, ZF, PF. V d:
MOV
RCL
AL = 01011110, CF = 0.
RCR ch, CL
M t:
CF
MSB
LSB
Lnh ny quay ton hng sang phi thng qua c CF, CL phi c
cha sn s ln quay. Trong trng hp quay 1 ln c th vit RCR ch, 1
Nu s ln quay l 9 th ton hng khng i v cp CF v ton hng
quay ng mt vng (nu ton hng ch l 8 bit).
Sau lnh RCR c CF mang gi tr c ca LSB, cn c OF1 nu sau khi
quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng c
xc nh sau nhiu ln quay.
Cc c b thay i: CF, OF, SF, ZF, PF.
V d:
MOV
RCR
43
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
AL = 11000010, CF = 1.
M t:
CF
LSB
MSB
Lnh ny dng quay vng ton hng sang tri, MSB c a sang c
CF v LSB. CL phi cha sn s ln quay mong mun. Trong trng hp quay
1 ln c th vit ROL ch, 1. Nu s ln quay l 8 (CL=8) th ton hng khng
i v ton hng quay ng mt vng (nu ton hng ch l 8 bit), cn nu
CL=4 th 4 bit cao i ch cho 4 bit thp.
Sau lnh ROL c CF mang gi tr c ca MSB, cn c OF1 nu sau
khi quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng
c xc nh sau nhiu ln quay. Lnh ny thng dng to c CF t gi tr
ca MSB lm iu kin cho lnh nhy c iu kin.
Cc c b thay i: CF, OF, SF, ZF, PF.
V d:
MOV
ROL
AL = 11001100, CF = 1
ROR ch, CL
M t:
MSB
LSB
CF
Lnh ny dng quay vng ton hng sang phi, LSB c a sang c
CF v MSB. CL phi cha sn s ln quay mong mun. Trong trng hp quay
1 ln c th vit ROR ch, 1. Nu s ln quay l 8 (CL=8) th ton hng khng
i v ton hng quay ng mt vng (nu ton hng ch l 8 bit), cn nu
CL=4 th 4 bit cao i ch cho 4 bit thp.
Sau lnh ROR c CF mang gi tr c ca LSB, cn c OF1 nu sau khi
quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s khng c
44
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
AL = 11001100, CF = 0
ch, CL
SHL
ch, CL
M t:
CF
LSB
MSB
Hai lnh ny c tc dng dch tri s hc ton hng (cn gi l dch tri
logic). Mi ln dch MSB c a vo CF cn 0 c a vo LSB. CL phi
cha sn s ln quay mong mun. Trong trng hp quay 1 ln c th vit SAL
ch, 1
Sau lnh SAL hoc SHL c CF mang gi tr c ca MSB, cn c OF1
nu sau khi quay 1 ln m bit MSB b thay i so vi trc khi quay, c OF s
khng c xc nh sau nhiu ln quay. Lnh ny thng dng to c CF t
gi tr ca MSB lm iu kin cho lnh nhy c iu kin.
Cc c b thay i: SF, ZF, CF, OF, PF.
V d:
MOV
SAL
AL = 00110000, CF = 1
SHR ch, CL
M t:
0
MSB
LSB
CF
45
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
AL = 00110011, CF = 0
M t:
chchNgun.
Lnh XOR thc hin logic XOR (hoc o) gia hai ton hng v kt qu
c lu vo trong ch, mt bit kt qu c t bng 1 nu nu cc bit tng ng
hai ton hng l i nhau. Nu ton hng ch trng ton hng Ngun th kt qu
bng 0, do lnh ny cn c dng xo thanh ghi v 0 km theo cc c CF v
OF cng b xo.
Cc c b thay i: CF, OF, PF, SF, ZF.
V d:
XOR
XOR
MOV
MOV
XOR
AX,
BX,
AX,
BX,
AX,
AX
BX
5857H
58A8H
BX
AX=5857H
AX=00FFH
BX=58A8H
BX=58A8H
CMP tr ton hng ch cho ton hng Ngun, chng c th l cc byte hoc
cc t, nhng khng lu tr kt qu. Cc ton hng khng b thay i. Kt qu ca
46
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
CF
ZF
ch = Ngun
ch > Ngun
ch < Ngun
NHAN
M t: IPIP+dch chuyn
Hai lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN
nu CF + ZF = 0. Quan h cao hn/thp l quan h dnh cho vic so snh (do
lnh CMP thc hin) ln hai s khng du. NHAN phi nm cch xa mt
khong -128+127 byte so vi lnh tip theo sau lnh JA/JNBE. Chng trnh
s cn c vo v tr NHAN xc nh gi tr dch chuyn.
Cc c b thay i: khng.
V d:
CMP
JA
AX, 12ABH
THOI
NHAN
JNB
NHAN
JNC
NHAN
M t: IPIP+dch chuyn
Ba lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN
nu CF = 0. Quan h cao hn/thp l quan h dnh cho vic so snh (do lnh
CMP thc hin) ln hai s khng du. NHAN phi nm cch xa mt khong
B mn K thut my tnh Khoa in t
47
Trng H K thut Cng nghip
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
-128+127 byte so vi lnh tip theo sau lnh JAE/JNB/JNC. Chng trnh s
cn c vo v tr NHAN xc nh gi tr dch chuyn.
Cc c b thay i: khng.
V d:
CMP
JAE
AL, 10H
THOI
NHAN
JC
NHAN
JNAE
NHAN
M t: IPIP+dch chuyn
Ba lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN nu
CF = 1. Quan h cao hn/thp l quan h dnh cho vic so snh (do lnh CMP thc
hin) ln hai s khng du. NHAN phi nm cch xa mt khong -128+127
byte so vi lnh tip theo sau lnh JB/JC/JNAE. Chng trnh s cn c vo v tr
NHAN xc nh gi tr dch chuyn.
Cc c b thay i: khng.
V d:
CMP
JB
AL, 10H
THOI
NHAN
JNA NHAN
M t: IPIP+dch chuyn
Hai lnh trn biu din cng mt thao tc nhy c iu kin ti NHAN nu
CF +ZF = 1. Quan h cao hn/thp l quan h dnh cho vic so snh (do
lnh CMP thc hin) ln hai s khng du. NHAN phi nm cch xa mt
khong -128+127 byte so vi lnh tip theo sau lnh JBE/JNA. Chng trnh s
cn c vo v tr NHAN xc nh gi tr dch chuyn.
Cc c b thay i: khng. V d:
CMP AL, 10H
JBE THOI
;bang 10H
48
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
AL, 10H
THOI
NHAN
SHORT NHAN
49
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
NEAR NHAN
BX
NEAR PTR BX
JMP
[BX]
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Cc c b thay i: khng.
V d:
CMP
JNE
AL, 10H
THOI
LOOP NHAN
AL, 0 ;xoa AL
CX, 10
;nap so lan lap vao CX
INC AL
;tang AL len 1
LAP
;lap lai 10 lan, AL=10
33. LOOPE/LOOPZ Loop while CX=0 or ZF=0 (lp li on chng trnh cho
n khi CX=0 hoc ZF=0).
Dng lnh:
LOOPE NHAN
LOOPZ NHAN
M t: Lnh ny dng lp li on chng trnh (gm cc lnh nm trong
khong t NHAN n ht lnh LOOPE NHAN hoc LOOPZ NHAN) cho n khi
s ln lp CX=0 hoc c ZF=0. iu ny c ngha l trc khi vo vng lp ta phi
a s ln lp mong mun vo CX, v sau mi ln lp th CX t ng gim i 1.
NHAN phi nm cch xa (dch i mt khong) ti a -128 byte so vi
lnh tip theo sau lnh LOOPE/LOOPZ.
Cc c b thay i: khng.
V d:
MOV
MOV
LAP:
COMP
AL, AH
CX, 50
INC AL
AL, 16
LOOPE LAP
;AL=AH
;nap so lan lap vao CX
;tang AL
;so sanh AL voi 16
51
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
;AL=AH
;nap so lan lap vao CX
;tang AL
;so sanh AL voi 16
;lap lai cho den khi AL=16 hoac CX=0
CALL Th_tc
Nu gi xa: Lu vo Stack gi tr IP v CS ca a ch tr v v cc
thao tc khi gi ctc din ra nh sau:
+ Ni dung thanh ghi SP gim i 2 byte, SPSP 2 v CS c
lu vo ngn xp.
52
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
INT
(N=0FFH)
INT
To a ch mi ca Stack, ct a ch on ca a ch tr v vo Stack:
SPSP-2, SPCS.
{SP}IP, SPSP+2
{SP}CS, SPSP+2
{SP}FR, SPSP+2
Cc c b thay i: tt c cc c (c phc hi nh trc khi din ra ngt).
53
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Lnh ny khng thc hin mt cng vic g ngoi vic lm tng ni dung ca
IP v tiu tn 3 chu k ng h. N thng c dng tnh thi gian tr trong
cc vng tr hoc chim ch cc lnh cn thm vo chng trnh sau ny m
khng lm nh hng dn di chng trnh.
Cc c b thay i: khng.
39. RET Return from Procedure to Calling Program (tr v chng trnh chnh t
chng trnh con).
Dng lnh: RET hoc RET N
(N l s nguyn dng)
STC
M t:
CF1
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
dng trong mt s lnh vc hp, ch yu giao tip trc tip vi phn cng hoc
x l cc vn lin quan n tc cao in hnh nh cc trnh iu khin thit b,
cc h thng nhng cp thp v cc ng dng thi gian thc..
2.4.2 Cc bc khi lp trnh
Lp trnh trn phn mm emu8086
- Bc 1: M chng trnh emu8086, chn file \ new Vi cc la chn:
New com template, new exe template, new bin template, new boot
template.
- Bc 2: Vit m ngun
- Bc 3: dch v g ri (bm F5)
- Bc 4: to file t chy: assembler \ Compile
Dch, lin kt, chy v chn li chng trnh t du nhc DOS:
Cn c cc file: tasm.exe (dch), tlink.exe (lin kt), td.exe (chn li). Cc bc nh
sau:
B1. Thit lp ng dn
path = %path%;<ng dn n th mc cha cc file k trn>
B2. Bin dch t file .ASM sang file .OBJ
Tasm <tn file chng trnh>.ASM
B3. Bin dch t file .OBJ sang file .EXE
Tlink <tn file>.OBJ
B4: chy chng trnh:
<tn file>.EXE
B5: chn li (nu cn thit)
Td <tn file>.EXE
t ng ha, ta c th to file .BAT cha cc lnh trn.
V d:
To file RunASM.bat trong cng th mc vi tp tin .ASM vi ni dung nh
sau :
tasm %1
tlink %1
%1
(%1 l ly tham s th nht trong command line)
Sau bin dch, lin kt v thc thi chng trnh hello.ASM ta ch cn
g :
RunASM hello
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
55
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
56
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
57
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
CALL Subname
; Gi chng trnh con
main ENDP
Subname PROC
; nh ngha chng trnh con
RET
Subname ENDP
END main
58
Gii thch vn tt
Vector ngt. B mo phng s load file ny:
c:\emu8086\INT_VECT ti a ch vt l 000000
Vng thng tin h thng.
Mt vng nh t do. Mi khi l 654,080 byte. Ti y c
th load chng trnh
Vng nh mn hnh cho VGA, monochrome, v cho cc b
iu hp khc
D tr
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Bn b nh ca my tnh
IBM PC
a ch vt l ca vng nh
(HEX)
Gii thch vn tt
32kb nh mn hnh cho ch ha mu (CGA). B m
phng s dng vng nh ny lu 8 trang vng nh mn
hnh. Mn hnh m phng c th thay i kch thc, nn
b nh ti thiu c yu cu cho mi trang, mc d b
m phng lun lun s dng 1000h (4096 byte) cho mi
trang (xem ngt 10h, AH=05h)
D tr
ROM BIOS v m rng. B m phng ti file BIOS_ROM
ti a ch vt l 0F4000h. a ch ca bng vector ngt ch
ti vng nh ny to hm ngt m phng.
B8000 - C0000
C0000 - F4000
F4000 - 10FFEF
a ch (HEX)
0040h:0010
59
Bi ging
Vi x l - Vi iu khin
Bn b nh ca my tnh
IBM PC
a ch vt l ca vng nh
(HEX)
0040h:0013
0040h:004A
0040h:004E
0040h:0050
0040h:0062
0040h:0084
Chng 2
H vi x l Intel 80x86
Gii thch vn tt
12 Cng game c ci
11-9 S thit b ni tip
8
D tr
7-6 S a mm (tr 1):
00 a mm n;
01 Hai da mm;
10 Ba a mm;
11 Bn a mm;
5-4 Khi to ch Video:
00 EGA,VGA,PGA, hoc on-board video BIOS
khc;
01 40x25 CGA mu.
10 80x25 CGA mu (M phng mc nh).
11 80x25 en trng.
3
D tr.
2 Chut PS/2.
1
B x l ton hc;
0 c ci khi khi ng t a mm.
kilobytes bt u vng nh lin tip ti a ch 00000h
t ny cng c tr v AX bi INT 12h
WORD
gi tr ny c t l 0280h (640KB)
S ct trn mn hnh.
WORD
Mc nh l 0032h (50 ct)
a ch bt u trang mn hnh hin hnh trong b nh mn
WORD
hnh (sau 0B800:0000)
Gi tr mc nh: 0000h
Bao gm v tr hng v ct cho con tr trong mi ca tm
8 WORD
trang nh mn hnh.
Gi tr mc nh: 00h (cho tt c 8 t (words)
S trang mn hnh hin hnh
BYTE
Mc nh: 00h (trang u tin)
Hng trn mn hnh tr 1
BYTE
Gi tr mc nh: 13h (19+1=20 ct)
Bng 2-4. Bn b nh, a ch ngt ca 8086
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Khai bo on d liu:
on d liu dng cha cc bin v hng s dng trong chng trnh.
Khai bo on m:
on m dng cha cc m lnh ca chng trnh. on m bt u bng mt
chng trnh chnh v c th c cc lnh gi chng trnh con (CALL).
Mt chng trnh chnh hay chng trnh con bt u bng lnh PROC v kt
thc bng lnh ENDP (y l cc lnh gi ca chng trnh dch). Trong chng
trnh con, ta s dng thm lnh RET tr v a ch lnh trc khi gi chng
trnh con.
Chng trnh c kt thc bng lnh END trong tn chng trnh pha sau
lnh END s xc nh l chng trnh chnh. Nu sau lnh END khng ch ra
chng trnh no c th s ly chng trnh con u on m lm chng trnh
chnh.
V d: Chng trnh sau in ra mn hnh dng ch Hello !
.model
.stack
.data
s
.code
small
100h
DB
Hello !$ ; khai bo xu k t cn in
mov AX,@data
; ly a ch data segment ghi vo DS
mov DS,AX
; V model small, y cng l a ch
; segment ca xu s. ; xut chui:
mov DX, OFFSET s
; ly a ch offset ghi vo DX
mov AH , 9
int 21h
; gi hm 9, ngt 21h in
mov AH, 4Ch
; Thot khi chng trnh
int 21h
end
Lu :
- Mi chng trnh u phi c on CODE thot khi chng trnh, nu
khng chng trnh s khng dng khi ht chng trnh ca mnh.
2.4.3.2 Khung chng trnh dch ra .exe
Cc tp tin .EXE v .COM
DOS ch c th thi hnh c cc tp tin dng .COM v .EXE. Tp tin .COM
thng dng xy dng cho cc chng trnh nh cn .EXE dng cho cc chng
trnh ln.
Tp tin .EXE
- Nm trong nhiu on khc nhau, kch thc thng thng ln hn 64 KB.
- C th gi c cc chng trnh con dng near hay far.
- Tp tin .EXE cha mt header u tp tin cha cc thng tin iu khin cho
tp tin.
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
61
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
data segment
; add your data here!
pkey db "press any key to exit ...$"
ends
stack segment
dw
128 dup(0)
ends
CODE segment
start:
; set segment registers:
MOV ax, data
MOV ds, ax
MOV es, ax
; add your CODE here
lea dx, pkey
MOV ah, 9
int 21h
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Khai bo d liu
Khi khai bo d liu trong chng trnh, nu s dng s nh phn, ta phi dng
thm ch B cui, nu s dng s thp lc phn th phi dng ch H cui. Ch
rng i vi s thp lc phn, nu bt u bng ch A..F th phi thm vo s 0
pha trc.
V d:
1011b ; S nh phn
1011 ; S thp phn
1011d ; S thp phn
1011h ; S thp lc phn
C php:
<tn bin> D<Kiu DL>
<gi tr khi to>
hoc
<tn bin> D<Kiu DL> <s phn t> dup(<gi tr khi to>)
Cc kiu d liu: B (1 byte), W (2 bytes), D (4 bytes)
Nu khng khi to, dng du hi ?
V d:
Khai bo trong C
Khai bo bin trong hp ng
char ch;
ch DB ?
char ch = a;
ch DB a
char ch = 5;
ch DB 5
Char s[]=\nhello world!
s DB 10,13,hello world!$
int i=100;
i DW 100
long L;
L DD ?
char a[] = {1,2,3};
a DB 1,2,3
char a[100];
a DB 100 dup(?)
char a[100][50];
a DB 100 dup(50 dup(?))
63
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Hng s:
Khai bo hng s trong chng trnh hp ng bng lnh EQU.
V d:
A1
A2
EQU
EQU
02, 11
19, 81
Ton t trong hp ng
Ton t s hc
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
A DW 100 DUP(?)
B DD ?
65
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
TN PROC
; y l m lnh ca chng trnh con
RET
TN ENDP
V d trn gi chng trnh con ta, thc hin lnh MOV BX, 5 , v tr v sau
lnh gi n MOV AX, 2
C vi cch truyn tham s cho chng trnh con, cch n gin nht l s dng
cc thanh ghi, di y l mt v d khc v cch gi chng trnh con v cch
truyn tham s cho n qua thanh ghi AL v BL, nhn hai tham s vi nhau v tr
kt qu v trong thanh ghi AX:
ORG
MOV
MOV
RET
m2
m2
END
66
100h
AL, 1
BL, 2
CALL
m2
CALL
m2
CALL
m2
CALL
m2
; Tr v HH
PROC
MUL
BL
RET
ENDP
; AX = AL * BL.
; Tr v sau im gi n.
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Lnh b (Macro)
Macro tng t nh chng trnh con nhng khng thc s l chng trnh con.
Macro nhn c v nh chng trnh con, nhng chng ch tn ti cho n khi
chng trnh c dch, sau khi chng trnh c dch tt c cc macro c thay
th bng lnh thc s. Nu bn khai bo mt macro v khng bao gi s dng
chng trong m ngun, chng trnh dch s b qua n.
Khai bo:
name
MACRO
[tham s,...]
<Lnh>
ENDM
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
67
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
p1, p2, p3
ORG 100h
MyMacro 1, 2, 3
MyMacro 4, 5, DX
RET
AX,
BX,
CX,
AX,
BX,
CX,
0001h
0002h
0003h
0004h
0005h
DX
TA_Proc
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Lnh n
69
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
VD: Gn CL gi tr bit du ca AX
CMP AX,0 ; AX > 0?
JNS AM ; AX m
MOV CL,1 ; CL = 1 (AX dng)
JMP NEXT
AM: MOV CL,0 ; CL = 0 (AX m)
NEXT:
Gi tr n: Cng vic n
END
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
V d:
org
mov
mov
k1:
100h
bx, 0 ; total step counter.
cx, 5
add bx, 1
mov al, '1'
mov ah, 0eh
int 10h
push cx
mov cx, 5
k2: add bx, 1
mov al, '2'
mov ah, 0eh
int 10h
push cx
mov cx, 5
k3: add bx, 1
mov al, '3'
mov ah, 0eh
int 10h
loop k3
; internal in internal loop.
pop cx
loop k2
; internal loop.
pop cx
loop k1
; external loop.
Ret
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
71
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
72
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
Ngt 21h:
ngha
AH
ret
msg db "hello world $"
73
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
2.4.6 Cc v d
V d 1. Hello word n gin (COM file)
; Vit ra mn hnh dng ch "hello, world!"
; Su dung .com
name "hi"
org 100h
JMP start
; jump over string declaration
msg
db
"hello, world!", 0Dh,0Ah, 24h
start: lea
dx, msg ; load effective address of
;msg into dx.
MOV
ah, 09h ; print function is 9.
int
21h
; do it!
MOV
ah, 0
int
16h
; wait for any key any....
RET ; return to operating system.
74
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
V d 4. In mt s nh phn ra mn hnh:
name "add-sub"
org 100h
MOV al, 5
; bin=00000101b
MOV bl, 10
; hex=0ah or bin=00001010b
; 5 + 10 = 15 (decimal) or hex=0fh or bin=00001111b
add bl, al
; 15 - 1 = 14 (decimal) or hex=0eh or bin=00001110b
sub bl, 1
; print result in binary:
MOV cx, 8
print: MOV ah, 2
; print function.
MOV dl, '0'
test bl, 10000000b ; test first bit.
jz zero
MOV dl, '1'
zero: int 21h
shl bl, 1
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
75
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
loop print
; print binary suffix:
MOV dl, 'b'
int 21h
; wait for any key press:
MOV ah, 0
int 16h
ret
V d 5. In mt s h 10 ra mn hnh:
name "Print Decimal function, tuananhvxl@gmail.com"
Enter Macro
mov ah,2
mov dl, 0ah ; new line.
int 21h
mov dl, 0dh ; carrige return.
int 21h
endm
org 100h ; directive make tiny com file.
; print result in decimal:
mov al, 123
call Print_dec8AL
Enter
mov al, 45
call Print_dec8AL
; wait for any key press:
mov ah, 0
int 16h
ret
Print_dec8AL proc
cmp al, 0
jne Print_dec8AL_r
push ax
mov dl, '0'
mov ah, 2
int 21h
pop ax
ret
Print_dec8AL_r:
pusha
mov ah, 0
cmp ax, 0
je pn_done
mov dl, 10
div dl
call Print_dec8AL_r
mov dl, ah
76
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
V d 6. In xu ra mn hnh:
name "Print_String"
Print_String macro str
mov dx, offset str
mov ah, 9
int 21h
endm
org 100h
Print_String Thongbao1
Print_String Thongbao2
ret
Thongbao1 db "Xin chao", 0Dh,0Ah, "$"
Thongbao2 db "Cac ban", 0Dh,0Ah, "$"
Number [tuananhktmt@gmail.com]"
ah,2
dl, 0ah ; new line.
21h
dl, 0dh ; carrige return.
21h
100h
; Nhap - start:
mov dx, offset msg
mov ah, 9
int 21h
;-----------------------------------xor cl,cl
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
77
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
ah, 0
16h
ret
;----------------------Print_dec8AL proc
cmp al, 0
jne Print_dec8AL_r
push ax
mov al, '0'
mov ah, 0eh
int 10h
pop ax
ret
Print_dec8AL_r:
pusha
mov ah, 0
cmp ax, 0
je pn_done
mov dl, 10
div dl
call Print_dec8AL_r
mov al, ah
78
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
?
81 DUP(?)
'Chuoi da doi:$'
79
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
LEA DX,m1
MOV AH,0Ah ; Nhap chuoi
INT 21h
LEA SI,m1
ADD SI,2
MOV DI,SI
Next: LODSB ; Lay ky tu
CMP AL,0Dh ; Neu la ky tu Enter thi ket thuc
JE quit
CMP AL,'a' ; Neu ky tu nhap khong phai la ky tu thuong tu a
toi z thi bo qua
JB cont
CMP AL,'z'
JA cont
SUB AL,20h ; Chuyen ky tu thuong thanh ky tu hoa
STOSB
; Luu ky tu
DEC DI
; Neu la ky tu thuong thi dung lenh STOSB nen DI tang
len 1 ta phai giam DI
cont: INC DI ;
JMP next
quit: MOV AL,'$'
STOSB
MOV AX,02h ; Xoa man hinh
INT 10h
LEA DX,m2
MOV AH,09h
INT 21h
LEA DX,m1+2
MOV AH,09h
INT 21h
MOV AH,4Ch
INT 21h
main ENDP
END main
80
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
2.5.2
Gii m a ch
81
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
2.5.2.2 nh thi b nh
Thi gian truy xut (access time):
- Vi chu k c: thi gian truy xut l thi gian tnh t lc a ch mi xut
hin b nh cho n khi c d liu ng ng ra ca b nh.
- Vi chu k ghi: thi gian truy xut l thi gian tnh t lc a ch mi xut
hin b nh cho n khi d liu a vo b nh.
Thi gian chu k (cycle time): l thi gian t lc bt u chu k b nh
n khi bt u chu k k tip. Ngoi ra, P c th s dng thm mt s trng
thi ch khi c b nh.
82
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
nh thi c b nh:
Thi gian truy xut tng cng ca h thng b nh chnh l tng thi gian
tr trong cc b m v thi gian truy xut (access time) b nh.
Hiu gia thi gian truy xut cn thit bi P vi thi gian truy xut tht s
ca b nh gi l bin nh thi (timing margin).
tDS (Data Setup): thi gian thit lp d liu cung cp bi h thng b nh
tDH (Data Hold): thi gian gi d liu cung cp bi h thng b nh
83
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
84
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
85
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
2.6 Cu hi v bi tp
Bi 1. Vit CT nhp vo 1 k t, xut ra k t
V d:
Moi ban nhap 1 ky tu: b
Ky tu va nhp: b
Bi 2. Vit chng trnh xut ra mn hnh mt s dng.
V d:
De chay duoc 1 CT hop ngu ban can thuc hien cac buoc sau:
Dich file ASM thanh file OBJ
Lien ket file OBJ thanh file EXE
Chay file EXE
Bi 3. Vit CT nhp vo 1 k t, xut ra k t lin trc v lin sau.
V d:
Moi ban nhap 1 ky tu: b
Ky tu lien truoc: a
Ky tu lien sau: c
Bi 4. Vit CT nhp vo 1 k t thng. In ra k t Hoa
V d:
Moi ban nhap 1 ky tu: b
Ky tu Hoa: B
Bi 5. Vit CT nhp vo 1 k t hoa. In ra k t thng
V d:
Moi ban nhap 1 ky tu: B
Ky tu thng: b
Bi 6. Vit chng trnh nhp vo 2 s nguyn dng x1, x2 (1 x2 < x1 < 9).
Xut ra kt qu cc php tnh: x1-1, x1 +2, x1+x2, x1-x2
V d:
x1 = 5
x2 = 3
x1 1 = 4
x1 + 1 = 6
x1 + x2 = 8
x1 x2 = 7
86
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
M rng
1. T tm hiu xem hm no trong ngt 21h dng nhp mt xu k t ?
Ngoi ngt 21h, cn ngt no c th dng nhp xut t bn phm ? (dng
NortonGuide hoc TechHelp).
2. Vit chng trnh nhp tn v in ra mn hnh cu Hello + tn nhp.
3. Tm hiu xem ti sao khng c lnh MOV x1, x2 (x1,x2 l hai bin trong
b nh)
4. Hai lnh INC AX v ADD AX, 1 khc nhau ch no ?
Hng dn
Bi 1. nhp 1 mt k t s dng hm 1 ca ngt 21h, xut, s dng hm 2.
V d:
MOV AH,1
int 21h
; kt qu trong AL
MOV DL,AL
; k t cn xut trong DL
MOV AH,2
int 21h
Bi 2. Cp k t xung dng l 10,13. C th khai bo nhiu xu k t hoc chung
mt xu.
V d:
Msg3 DB 10,13,9,1. Dich file ASM thanh file OBJ.$
Msg4 DB 10,13,9,2. Lien ket file OBJ thanh file EXE.$
Hoc
Msg34
87
Bi ging
Vi x l - Vi iu khin
Chng 2
H vi x l Intel 80x86
(Trang ny nn b trng)
88
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
CHNG 3.
H VI IU KHIN 8051
Mc tiu:
Gip sinh vin hiu c cu trc phn cng, s chn v cc mch ph tr
ca h vi iu khin 8051; nm c v bit cch vn dng cc ch a ch trong
lp trnh; nm c tp lnh v phng php lp trnh cho h vi iu khin 8051.
Tm tt hc phn:
Cu trc phn cng v t chc b nh
Gii thiu chung
S cu trc
M t chc nng cc chn
Hot ng Reset
T chc b nh
Cc ch nh a ch
Tp lnh
Lp trnh hp ng (Assembly) cho vi iu khin 8051
Trnh dch hp ng
Cng vo/ra v lp trnh
B m/nh thi v lp trnh
Lp trnh ngt
89
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
90
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
91
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
93
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
94
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
95
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Chng trnh
Khng ging nh cc mch tch hp, ch cn kt ni cc thnh phn vi nhau v
bt ngun, vi iu khin cn phi lp trnh trc. vit mt chng trnh cho vi
iu khin, c mt vi ngn ng lp trnh bc thp c th s dng nh Assembly, C
hay Basic. Vit mt chng trnh bao gm vic vit cc cu lnh n gin theo mt
th t chng c th thc thi. C rt nhiu phn mm chy trn mi trng
Windows cho php xy dng cc chng trnh hon chnh cho cc h vi iu khin
97
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
98
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
99
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
CC CHN NGUN:
AT89C51 hot ng ngun n +5V. Vcc c ni vo chn 40, v Vss (GND)
c ni vo chn 20.
3.2.3 Cng vo/ra
Tt c cc vi iu khin 8051 u c 4 cng vo/ra 8 bit c th thit lp nh cng
vo hoc ra. Nh vy c tt c 32 chn I/O cho php vi iu khin c th kt ni vi
cc thit b ngoi vi.
100
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Chn ra
Mt mc logic 0 t vo bit ca thanh ghi P lm cho transistor m, ni chn
tng ng vi t.
Chn vo
Mt bit 1 t vo mt bit ca thanh ghi cng, transistor ng v chn tng ng
c ni vi ngun Vcc qua tr ko ln.
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
101
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Port 0
Port 0 l port c 2 chc nng cc chn 32 39 ca AT89C51:
-
Chc nng I/O (xut/nhp): dng cho cc thit k nh. Tuy nhin, khi
dng chc nng ny th Port 0 phi dng thm cc in tr ko ln
(pull-up), gi tr ca in tr ph thuc vo thnh phn kt ni vi Port.
- Khi dng lm ng vo, Port 0 phi c set mc logic 1 trc .
- Chc nng a ch / d liu a hp: khi dng cc thit k ln, i hi
phi s dng b nh ngoi th Port 0 va l bus d liu (8 bit) va l
bus a ch (8 bit thp).
Ngoi ra khi lp trnh cho AT89C51, Port 0 cn dng nhn m khi lp trnh
v xut m khi kim tra (qu trnh kim tra i hi phi c in tr ko ln).
Port 1:
Port1 (chn 1 8) ch c mt chc nng l I/O, khng dng cho mc ch khc (ch
trong 8032/8052/8952 th dng thm P1.0 v P1.1 cho b nh thi th 3). Ti
Port 1 c in tr ko ln nn khng cn thm in tr ngoi.
Port 1 c kh nng ko c 4 ng TTL v cn dng lm 8 bit a ch thp
trong qu trnh lp trnh hay kim tra.
Khi dng lm ng vo, Port 1 phi c set mc logic 1 trc .
Port 2:
Port 2 (chn 21 28) l port c 2 chc nng:
-
Port 3:
Port 3 (chn 10 17) l port c 2 chc nng:
-
102
Chc nng I/O. Khi dng lm ng vo, Port 3 phi c set mc logic 1
trc .
Chc nng khc: m t nh sau:
Bi ging
Chng 3
Vi x l - Vi iu khin
Bit
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Tn
RxD
TxD
INT0
INT1
T0
T1
WR
RD
H Vi iu khin 8051
Chc nng
Ng vo port ni tip
Ng ra port ni tip
Ngt ngoi 0
Ngt ngoi 1
Ng vo ca b nh thi 0
Ng vo ca b nh thi 1
Tn hiu iu khin ghi d liu ln b nh ngoi.
Tn hiu iu khin c t b nh d liu ngoi.
Bng 3-1. Chc nng cc chn ca Port 3
Cc chn ngun:
Chn 40: VCC = 5V 20%
Chn 20: GND
/PSEN (Program Store Enable):
/PSEN (chn 29) cho php c b nh chng trnh m rng i vi cc ng
dng s dng ROM ngoi, thng c ni n chn /OC (Output Control)
ca ROM c cc byte m lnh. /PSEN s mc logic 0 trong thi gian
AT89C51 ly lnh.Trong qu trnh ny, / PSEN s tch cc 2 ln trong 1 chu k
my.
103
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
RST (Reset):
RST (chn 9) cho php reset AT89C51 khi ng vo tn hiu a ln mc 1
trong t nht l 2 chu k my.
X1, X2:
Ng vo v ng ra b dao ng, khi s dng c th ch cn kt ni thm
thch anh v cc t nh hnh v trong s . Tn s thch anh thng
s dng cho AT89C51 l 12Mhz.
Gi tr C1, C2 = 30 pF 10 pF
Hnh 3-13 S kt ni thch anh
B nh ngoi
B nh chng trnh 64 KB
0000h FFFFh
iu khin bng PSEN
B nh d liu 64 KB
0000h FFFFh
iu khin bng RD v WR
Hnh 3-14. Cc vng nh trong AT89C51
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
C th
nh a
ch bit
Khng nh a
ch bit
E8h
E0h
ACC
D8h
D0h
PSW
C8h
(T2CON)
C0h
B8h
IP
B0h
P3
A8h
IE
A0h
P2
98h
SCON
90h
P1
88h
80h
SADEN
SADDR
SBUF
BRL
BDRCON
TCON
TMOD
TL0
TH0
P0
SP
DPL
DPH
TL1
TH1
AUXR CKCON
PCON
105
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
RAM ni:
chia thnh cc vng phn bit: vng RAM a dng (30h 7Fh), vng RAM
c th nh a ch bit (20h 2Fh) v cc bank thanh ghi (00h 1Fh).
a ch byte
a ch bit
Chc nng
7F
Vng RAM a dng
30
2F
2E
2D
2C
2B
2A
29
28
27
26
25
24
23
22
21
20
1F
18
7F
77
6F
67
5F
57
4F
47
3F
37
2F
27
1F
17
0F
07
7D
75
6D
65
5D
55
4D
45
3D
35
2D
25
1D
15
0D
05
7C
74
6C
64
5C
54
4C
44
3C
34
2C
24
1C
14
0C
04
7B
73
6B
63
5B
53
4B
43
3B
33
2B
23
1B
13
0B
03
7A
72
6A
62
5A
52
4A
42
3A
32
2A
22
1A
12
0A
02
79
71
69
61
59
51
49
41
39
31
29
21
19
11
09
01
78
70
68
60
58
50
48
40
38
30
28
20
18
10
08
00
Vng c th nh a ch bit
Bank 3
17
10
1F
08
07
00
7E
76
6E
66
5E
56
4E
46
3E
36
2E
26
1E
16
0E
06
Bank 2
Bank 1
Bank thanh ghi 0 ( mc nh cho R0-R7)
RAM a dng:
RAM a dng c 80 byte t a ch 30h 7Fh c th truy xut mi ln 8 bit
bng cch dng ch a ch trc tip hay gin tip.
Cc vng a ch thp t 00h 2Fh cng c th s dng cho mc ich nh trn
ngoi cc chc nng cp nh phn sau.
RAM c th nh a ch bit:
Vng a ch t 20h 2Fh gm 16 byte (= 128 bit) c th thc hin ging nh
vng RAM a dng (mi ln 8 bit) hay thc hin truy xut mi ln 1 bit bng cc
lnh x l bit. Vng RAM ny c cc a ch bit bt u ti gi tr 00h v kt thc
ti 7Fh.
106
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
107
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
108
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
B nh d liu ngoi:
B nh d liu ngoi c truy xut bng lnh MOVX thng qua cc thanh ghi
xc nh a ch DPTR (16 bit) hay R0, R1 (8 bit).
Qu trnh thc hin c hay ghi d liu c cho php bng tn hiu RD hay
WR (chn P3.7 v P3.6).
B nh chng trnh v d liu dng chung:
Trong cc ng dng pht trin phn mm xy dng da trn AT89C51, ROM s
c lp trnh nhiu ln nn d lm h hng ROM. Mt gii php t ra l s dng
RAM cha cc chng trnh tm thi. Khi , RAM va l b nh chng trnh
va l b nh d liu. Yu cu ny c th thc hin bng cch kt hp chn RD v
chn PSEN thng qua cng AND. Khi thc hin c m lnh, chn /PSEN tch
cc cho php c t RAM v khi c d liu, chn RD s tch cc.
Gii m a ch
Trong cc ng dng da trn AT89C51, ngoi giao tip b nh d liu, vi iu
khin cn thc hin giao tip vi cc thit b khc nh bn phm, led, ng c,
Cc thit b ny c th giao tip trc tip thng qua cc Port. Tuy nhin, khi s lng
cc thit b ln, cc Port s khng thc hin iu khin. Gii php a ra l
xem cc thit b ny ging nh b nh d liu. Khi , cn phi thc hin qu trnh
gii m a ch phn bit cc thit b ngoi vi khc nhau. Qu trnh gii m a ch
thng c thc hin thng qua cc IC gii m nh 74139 (2 -> 4), 74138 ( 3 -> 8),
74154 (4 -> 16). Ng ra ca cc IC gii m s c a ti chn chn chip ca RAM
hay b m khi iu khin ngoi vi.
3.2.5 Cc thanh ghi chc nng c bit (SFRs - Special Function Registers)
Thanh ghi tch lu (Accumulator)
Thanh ghi tch lu l thanh ghi s dng nhiu nht trong AT89C51, c
k hiu trong cu lnh l A. Ngoi ra, trong cc lnh x l bit, thanh ghi tch lu
c k hiu l ACC.
Thanh ghi tch lu c th truy xut trc tip thng qua a ch E0h (byte) hay
truy xut tng bit thng qua a ch bit t E0h n E7h.
VD: Cu lnh:
MOV
MOV
A,#1
0E0h,#1
cng tng t.
Thanh ghi B
Thanh ghi B dng cho cc php ton nhn, chia v c th dng nh mt
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
109
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
111
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
SMOD1 SMOD0
POF
GF1
GF0
PD
IDL
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
113
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
tip ch yu c 2 thanh ghi: SCON v SBUF. Ngoi ra, mt thanh ghi khc l thanh
ghi PCON (khng nh a ch bit) c bit 7 tn l SMOD quy nh tc truyn ca
cng ni tip c gp i ln (SMOD = 1) hay khng (SMOD = 0).
D liu c truyn nhn ni tip thng qua hai chn cng P3.0(RxD) v
P3.1(TxD).
3.2.8
A, # 25H
; Np gi tr 25H vo thanh ghi A
R4, #62
; Np gi tr 62 thp phn vo R4
DPTR, #4521H
; Np 4512H vo con tr d liu DPTR
114
A, R0
R2, A
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
c) a ch trc tip
B nh RAM c gn cc a ch t 00 n FFH v c phn chia nh sau:
1. Cc ngn nh t 00 n 1FH c gn cho cc bng thanh ghi v ngn xp.
2. Cc ngn nh t 20H n 2FH c dnh cho khng gian nh a ch theo bit
lu cc d liu 1 bit.
3. Cc ngn nh t 30H n 7FH l khng gian lu d liu c kch thc
1byte.
Ton hng l tn hoc a ch ca cc thanh ghi trong vng RAM thp (0-127)
v vng cha cc thanh ghi chc nng c bit SFR.
V d :
MOV
MOV
Cc ngn nh dnh cho bng ghi c truy cp bng thanh ghi theo cc tn
gi ca chng l R0 - R7. Nn cc thanh ghi c th c truy cp theo hai cch sau:
V d: Hai lnh sau u sao ni dung thanh ghi R4 vo A
MOV
MOV
A, 4
A, R4
d) a ch gin tip
Trong ch ny, mt thanh ghi c s dng nh mt con tr n d liu.
Ton hng c th nm trong c vng RAM thp v cao, hoc RAM ngoi, khng
dng cho vng SFR. a ch ca ton hng cha trong thanh ghi con tr (R0 hoc R1
vi RAM trong, DPTR i vi RAM ngoi). c im nhn ra ch ny l lun c
k t @ ng trc ton hng.
V d:
MOV
A, @ R0
e) a ch ch s
Ch nh a ch theo ch s c s dng rng ri trongvic truy cp cc
phn t d liu ca bng trong khng gian ROM/RAM chng trnh ca 8051 trong
di 64KB.
Lnh c dng cho mc ch ny l
MovC A, @ A + DPTR v
MovX A, @ A + DPTR.
115
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Cc lnh ton hc
Cc lnh logic
Trong :
-
VD:
-
RET (Kt thc chng trnh con) Lnh ny khng c ton hng
JZ TEMP
hng
M t
A:
B:
Thanh ghi B.
Ri:
Rn:
116
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
K hiu
M t
Dptr:
Direct:
#data:
mt hng s 8 bit bt k.
#data16:
mt hng s 16 bit bt k
<rel>:
<addr11>:
<addr16>:
<bit>:
Cc lnh ton hc
Cc k hiu dng trong vic m t tp lnh
Thc hin cc php tnh c bn nh +, -, *, /, Kt qu sau khi thc hin
lnh c lu vo ton hng u tin trong lnh
Cc lnh ton hc nh: ADD, ADDC, SUBB, INC, DEC, MUL, DA. V d1 :
MOV
MOV
A, # 0F5H
A, # 0BH
; A = F5H
; A = F5 + 0B = 00
A, #47H
B, #25H
A, B
A
;
;
;
;
Sau khi chng trnh c thc hin thanh ghi A s cha 72h (47 + 25 = 72).
V d 3:
thc hin php nhn
MOV
MOV
MUL
A, #25H
B, 65H
AB
; Np vo A gi tr 25H
; Np vo B gi tr 65H
; 25H*65H = E99 vi B = 0EH v A = 99H
117
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Cc lnh logic
Thc hin cc php ton logic, cc lnh bao gm:
ANL: php ton and logic
ORL: php ton or logic
XRL: php ton xor logic
CLR: php ton v logic
CPL: php ton b
RL: php quay bit sang tri
RR: php quay bit sang phi
RLC: : php quay tri c nh
RRC: php quay phi c nh
SWAP: lnh trao i thanh ghi
V d 1:
MOV
ANL
A, #35H
A, #0FH
; Gn A = 35H
; Thc hin php v A vi 0FH
Kt qu: A=05h
V d 2:
MOV
ORL
A, #04
A, #68H
; A = 04
; A = 6C
A, #54H
A, #78H
; A= 54H
; A=2CH
V d 3:
MOV
XRL
V d 4:
MOV
CPL
A, #55H
A
V d 5: cc lnh quay
RR:
MOV
RR
RR
RR
RR
RRC: MOV
RRC
RRC
RCC
A, #36H
A
A
A
A
A #26H
A
A
A
;
;
;
;
;
;
;
;
;
A
A
A
A
A
A
A
A
A
=
=
=
=
=
=
=
=
=
0011
0001
1000
1100
0110
0010
0001
0000
1000
0110
1011
1101
0110
0011
0110
0011
1001
0100
CY = 0
CY = 1
CY = 1
V d 6:
MOV
SWAP
118
A, #72H
A
; A = 72H
; A = 27H
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
M lnh
Ton hng
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
A,Rn
A,direct
A,@Ri
A,#data
Rn,A
Rn,direct
Rn,#data
Direct,A
Direct,Rn
Direct,direct
Direct,@Ri
Direct,#data
@Ri,A
@Ri,direct
@Ri,#data
16
MOV
Dptr,#data16
17
MOVC
A,@A+dptr
18
MOVC
A,@A+PC
19
MOVX
A,@Ri
20
MOVX
A,@dptr
21
MOVX
@dptr,A
M t
a gi tr 16bit vo thanh
ghi DPTR
c gi tr b nh chng trnh
ti a ch =
A + DPTR, ct kt qu
vo A
c gi tr b nh chng trnh
ti a ch =
A + PC, ct kt qu vo A
c vo A gi tr ca b nh
ngoi ti a ch = Ri
c vo A gi tr ca b nh
ngoi ti a ch = DPTR
Ghi gi tr ca A vo b nh
ngoi ti a ch = DPTR
1
2
1
2
1
2
2
2
2
3
2
3
1
2
2
S
chu
k
1
1
1
1
1
2
1
1
2
2
2
2
1
1
1
S
byte
119
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
C php
STT
M lnh
22
MOVX
@dptr,A
23
PUSH
Direct
24
POP
Direct
25
26
27
XCH
XCH
XCH
A,Rn
A,direct
A,@Ri
28
M t
Ton hng
Ghi gi tr ca A vo b nh
ngoi ti a ch =
DPTR
Ct ni dung ca bin trong
RAM vo nh ngn
xp
Ly byte nh ngn xp
cho vo bin trong RAM
Hon i gi tr ca A v gi tr
cn li
S
byte
S
chu
k
1
2
1
1
1
1
XCHD
Chc nng
SETB bit
CLR bit
CPL bit
JB bit, ch
Nhy v ch nu bit = 1
Lnh
chc nng
SETB C
CLR C
Xo bit nh CY = 0
CPL C
B bit nh
MOV b, C
MOV C, b
JNC ch
Nhy ti ch nu CY = 0
JC ch
Nhy ti ch nu CY = 1
ANL C. bit
ORL C. bit
120
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
06
;Xo a ch bit 06
07
; Xo a ch bit 07
P1.2, OVER ;Kim tra bit P1.2 nhy v OVER nu P1.2
06
; Nu P1.2 th thit lp v tr bit 06 =
P1.3, NEXT ;Kim tra bit P1.3 nhy v NEXT nu n =
07
;Nu P1.3 = 1th thit lp v tr bit 07
= 0
0
0
= 1
Lnh c cng
Trong vic c cng th mt s lnh c trng thi ca cc chn cng, cn mt
s lnh khc th c mt s trng thi ca cht cng trong. Do vy, khi c cc cng
th c hai kh nng:
1. c trng thi ca cng vo.
MOV
JNB
JB
MOV
Lnh
A, PX
PX.Y, ...
PX.Y,
C, PX.Y
MOV
JNB
JB
MOV
V d
A, P2
P2.1, ch
P1.3, ch
C, P2.4
M t
Chuyn d liuj chn P2 vo ACC
Nhy ti ch nu, chn P2.1 = 0
Nhy ch nu, chn P1.3 = 1
Sao trng thi chn P2.4 vo CY
Lnh
PX
PX
PX
PX.Y, ch
PX
PX
PX
PX.Y, ch
PX.Y, C
PX.Y
PX.Y
V d
ANL P1, A
ORL P2, A
XRL P0, A
JBC P1.1, ch
CPL P1.2
INC P1
DEC P2
DJN2 P1, ch
MOV P1.2, C
CLR P2.3
SETB P2.3
Hot ng
Nhy nu A = 0
Nhy nu A 0
121
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Lnh
DJNZ
CJNE A, byte
CJNE re, # data
JC
JNC
JB
JNB
JBC
Hot ng
Gim v nhy nu A = 0
Nhy nu A byte
Nhy nu Byte data
Nhy nu CY = 1
Nhy nu CY = 0
Nhy nu bit = 1
Nhy nu bit = 0
Nhy nu bit = 1 v xo n
A, #0
R5, A
A #79H
N-1
R5
;
;
;
;
;
Xo thanh ghi A = 0
Xo R5
Cng 79H vo A (A = 0 + 79H = 79H)
Nu khng c nh cng k tip
Nu CY = 1, tng R5
N-1: ADD
A, #0F5H
JNC
INC
N-2: ADD
N-2
R5
A, #0E2H
JNC
INC
OVER:MOV
OVER
R5
R0, A
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
tr nn c cu trc hn ngoi vic tit kim c thm khng gian b nh. Trong
8051 c 2 lnh gi l: Gi xa CALL v gi tuyt i ACALL
- Lnh gi xa LCALL: Trong lnh 3 byte ny th byte u tin l m lnh,
cn hai byte sau c dng cho a ch ca chng trnh con ch.
- Lnh gi tuyt i ACALL (Absolute call): Lnh ACALL l lnh 2 byte
khc vi lnh LCALL di 3 byte. Do ACALL ch c 2 byte nn a ch ch
ca chng trnh con phi nm trong khong 2k byte a ch v ch c 11bit
ca 2 byte c s dng cho a ch.
3.3.3 Cu trc chung chng trnh hp ng cho 8051
a) Cc thnh phn c bn ca ngn ng Assembly:
- Lables: Nhn nh du cho mt on lnh
- Orders: Lnh
- Directives: nh hng chng trnh dch
- Comments: Cc li ch thch
Mt dng lnh trong chng trnh hp ng gm c cc trng sau:
Tn
A:
Lnh
Mov
Ton hng
AH, 10h
Ch thch
; a gi tr 10h vo thanh ghi AH
Khai bo bin
Ten_bien
DB Gia_Tri_Khoi_Tao
DB l mt ch lnh d liu c s dng rng ri nht trong hp ng. N
c dng nh ngha d liu 8 bit. Khi DB c dng nh ngha byte
d liu th cc s c th dng thp phn, nh phn, Hex hoc dng thc
ASCII. i vi d liu thp phn th cn t ch D sau s thp phn, i
vi s nh phn th t ch B v i vi d liu dng Hex th cn t ch
H.
Khi d liu c kch thc l 2byte s dng: DW khai bo bin kiu nguyn
V d
DATA1:
DATA2:
DATA3:
DATA4 DB
DB
2D
DB
00110101B
DB
39H
Ky thuat may tinh
;
;
;
;
S thp phn
S nh phn (35 dng Hex)
S dng Hex
Cc k t ASCII
123
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Khai bo hng
Cc ton t
K hiu
+
*
/
MOD
SHR
SHL
NOT
AND
OR
XOR
LOW
HIGH
EQ, =
NE,<>
GT, >
GE, >=
LT, <
LE,<=
Thc hin
V d
Cng
Tr
Nhn
Chia nguyn
Chia ly d
Dch phi
Dch tri
o
And bit
Or bit
Xor
Ly byte thp
Ly byte cao
So snh bng
SS Khng bng
SS ln hn
SS nh hn hoc bng
SS nh hn
SS nh hn hoc bng
Kt qu
10+5
25-17
7*4
7/4
7 MOD 4
1000B SHR 2
1010B SHL 2
NOT 1
1101B AND 0101B
1101B OR 0101B
1101B XOR 0101B
LOW(0AADDH)
HIGH(0AADDH)
7 EQ 4 or 7=4
7 NE 4 or 7<>4
7 GT 4 or 7>4
7 GE 4 or 7>=4
7 LT 4 or 7<4
7 LE 4 or 7<=4
15
8
28
1
3
0010B
101000B
1111111111111110B
0101B
1101B
1000B
0DDH
0AAH
0 (false)
0FFFFH (true)
0FFFFH (true)
0FFFFH (true)
0 (false)
0 (false)
Tn
124
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Tn phi bt u bng k t.
A
ADDC
AR0
AR4
BIT
CJNE
CSEG
DBIT
DPTR
END
GT
ISEG
JMP
LOW
AB
AJMP
AR1
AR5
BSEG
CLR
DA
DEC
DS
EQ
HIGH
JB
JNB
LT
ACALL
AND
AR2
AR6
C
CODE
DATA
DIV
DSEG
EQU
IDATA
JBC
JNC
MOD
ADD
ANL
AR3
AR7
CALL
CPL
DB
DJNZ
DW
GE
INC
JC
JNZ
MOV
JZ
LOW
MOVC
NOP
ORL
R0
R4
RET
RR
SHL
SWAP
XDATA
JZ
LCALL
LT
MOVX
NOT
PC
R1
R5
RETI
RRC
SHR
USING
XOR
LCALL
LE
MOD
MUL
OR
POP
R2
R6
RL
SET
SJMP
XCH
XRL
LE
LJMP
MOV
NE
ORG
PUSH
R3
R7
RLC
SETB
SUBB
XCHD
XSEG
LJMP
V d:
ORG 00H ;(con tr chng trnh bt u t 00h)
LJMP MAIN ; nhy ti v tr c nhn l MAIN)
; (v tr bt u chng trnh chnh MAIN):
ORG 0030H
MAIN:
MOV R1,#10 ;(np cho R1 gi tr l 10).
LAP1:
DJNZ R1,LAP1
END
; (Kt thc chng trnh.)
; Bt u ti v tr 00h
; Bt u ti v tr 0030h
125
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
V d:
ORG 00H
LJMP MAIN
ORG 0030H
MAIN:
MOV R1,#10
LCALL LAP1
LAP1:
DJNZ R1,LAP1
RET
END
3.4 B m v b nh thi
8051 c hai b nh thi l Timer 0 v Timer1, phn ny chng ta bn v cc
thanh ghi ca chng v sau trnh by cch lp trnh chng nh th no to ra
cc tr thi gian.
126
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
M1
Timer1
M0
GATE
C/T
M1
Timer0
LSB
M0
Cc bt M1, M0:
M0
0
0
1
1
1
0
1
Ch
Ch hot ng
0
B nh thi 13 bt gm 8 bt l b nh thi/ b m 5 bt
t trc
1
B nh thi 16 bt (khng c t trc)
2
B nh thi 8 bt t np li
3
Ch b nh thi chia tch
Bng 3-11. Ch hot ng ca Timer/Counter
C/ T (ng h/ b nh thi).
127
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
B dao ng
thch anh
Tn s ng h ca b
nh thi
12
c) 11,0592MHz
Li gii:
1
1
= 1s
12MHz = 1MHz v T =
1 / 1MHz
12
1
1
16MHz = 1,111Mz v T =
= 0,75s
b)
12
1,333MHz
a)
c)
1
1
11,0592MHz = 921,6kHz v T =
= 1,085s
12
0,9216MHz
128
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
Bt cng GATE.
Mt bt khc ca thanh ghi TMOD l bt cng GATE. trn thanh ghi TMOD
ta thy c hai b nh thi Timer0 v Timer1 u c bt GATE. Vy bt GATE dng
lm g? Mi b nh thi thc hin im khi ng v dng. Mt s b nh thi
thc hin iu ny bng phn mm, mt s khc bng phn cng v mt s khc va
bng phn cng va bng phn mm. Cc b nh thi trn 8051 c c hai. Vic
khi ng v dng b nh thi c khi ng bng phn mm bi cc bt khi
ng b nh thi TR l TR0 v TR1. iu ny c c nh cc lnh SETB TR1
v CLR TR1 i vi b Timer1 v SETB TR0 v CLR TR0 i vi b
Timer0. Lnh SETB khi ng b nh thi v lnh CLR dng dng n. Cc lnh
ny khi ng v dng cc b nh thi khi bt GATE = 0 trong thanh ghi TMOD.
Khi ng v ngng b nh thi bng phn cng t ngun ngoi bng cch t bt
GATE = 1 trong thanh ghi TMOD. Tuy nhin, trnh s ln ln ngay t by gi ta
t GATE = 0 c ngha l khng cn khi ng v dng cc b nh thi bng phn
cng t bn ngoi. s dng phn mm khi ng v dng cc b nh thi
phn mm khi ng v dng cc b nh thi khi GATE = 0. Chng ta ch cn
cc lnh SETB TRx v CLR TRx.
V d:
Tm gi tr cho TMOD nu ta mun lp trnh b Timer0 ch 2 s dng
thch anh XTAL 8051 lm ngun ng h v s dng cc lnh khi ng v
dng b nh thi.
Li gii:
TMOD = 0000 0010: B nh thi Timer0, ch 2 C/T = 0 dng ngun
XTAL GATE = 0 dng phn mm trong khi ng v dng b nh thi.
129
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
130
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Ngt timer.
Cc ngt timer c a ch Vector ngt l 000BH (timer 0) v 001BH (timer 1). Ngt
timer xy ra khi cc thanh ghi timer (TLx ITHx) trn v set c bo trn (TFx) ln 1.
Cc c timer (TFx) khng b xa bng phn mm. Khi cho php cc ngt, TFx t
ng b xa bng phn cng khi CPU chuyn n ngt.
V d 1:
Trong chng trnh di y ta to ra mt sng vung vi y xung 50%
(cng t l gia phn cao v phn thp) trn chn P1.5. B nh thi Timer0 c
dng to tr thi gian. Hy phn tch chng trnh ny.
MOV
HERE:
;
DELAY:
SETB TR0
AGAIN:
TMOD, #01
; S dng Timer0 v ch 1(16 bt)
MOV TL0, #0F2H
; TL0 = F2H, byte thp
MOV TH0, #0FFH
; TH0 = FFH, byte cao
CPL P1.5
; S dng chn P1.5
ACALL DELAY
SJMP HERE
; Np li TH, TL
delay using timer0.
JNB
CLR
CLR
RET
Li gii:
Trong chng trnh trn y ch cc bc sau:
1. TMOD c np.
2. Gi tr FFF2H c np v TH0 - TL0
3. Chn P1.5 c chn dng cho phn cao thp ca xung.
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
131
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
FFF3
FFF4
FFFF
0000
TF = 0
TF = 0
TF = 0
TF = 0
TF = 1
V d 2.
Chng trnh di y to ra mt sng vung trn chn P2.5 lin tc bng vic s
dng b Timer1 to ra tr thi gian. Hy tm tn s ca sng vung nu tn s
XTAL = 11.0592MHz. Trong tnh ton khng a vo tng ph ca cc lnh vng
lp:
HERE:
AGAIN:
MOV
MOV
MOV
TMOD, #01H
TL1, #34H
TH0, #76H
SETB TR1
JNB
CLR
CPL
CLR
SJMP
TR1
P1.5
TF
AGAIN
TF1, BACK
Li gii:
Trong chng trnh trn y ta lu n ch ca SJMP. ch 1 chng
trnh phi np li thanh ghi. TH v TL mi ln nu ta mun c sng dng lin tc.
Di y l kt qu tnh ton:
V FFFFH - 7634H = 89CBH + 1 = 89CCH v 90CCH = 35276 l s ln
m xung ng h, tr l 35276 1.085s = 38274ms v tn s l Error!
Objects cannot be created from editing field codes.
Cng rng phn cao v phn thp ca xung sng vung l bng nhau.
Trong tnh ton trn y l cha k n tng ph cc lnh vng lp.
Bi tp:
Hy kim tra chng trnh sau v tm tr thi gian theo giy, khng tnh
n tng ph cc lnh trong vng lp.
AGAIN:
132
MOV
MOV
Bi ging
Chng 3
Vi x l - Vi iu khin
BACK:
MOV
MOV
SETB
JNB
H Vi iu khin 8051
TL1, #08
TH1, #08
TR1
TF1, BACK
CLR TR1
CLR TF1
DJNZ R3, AGAIN
133
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
134
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Trong :
Bit
M t
SM0
La chn mode lm vic
SM1
SM2
REN
TB8
RB8
135
Bi ging
Chng 3
Vi x l - Vi iu khin
TI
H Vi iu khin 8051
RI
C ngt nhn, Khi nhn thnh cng 1 byte vo SBUF th RI=1. Sau khi
c SUBF, RI cn phaic xa bng phn mm
SM1
Mode
Description
Baud Rate
1/12 tn s clock
8-bit UART
9-bit UART
9-bit UART
Mode 0
136
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Mode 1
Qu trnh truyn:
137
Bi ging
Chng 3
Vi x l - Vi iu khin
-
H Vi iu khin 8051
Qu trnh nhn
Mode 2
Qu trnh truyn
Qu trnh nhn:
Mode 3
Mode 3 tng t mode 2 v mi mt ngoi tr tc baud
Tc Baud
138
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Baud
Rate
Tn s thch anh
11.0592
12
14.7456
150
40 h
30 h
00 h
300
A0 h
98 h
80 h
75 h
52 h
600
D0 h
CC h
C0 h
BB h
A9 h
1200
E8 h
E6 h
E0 h
DE h
D5 h
2400
F4 h
F3 h
F0 h
EF h
EA h
F3 h
EF h
EF h
4800
4800
FA h
F8 h
9600
FD h
FC h
9600
19200
16
20
Bit
SMOD
0
1
F5 h
0
F5 h
FD h
FC h
38400
FE h
76800
FF h
Mt s v d v bi tp:
V d 1:
Gi s tn s XTAL = 11.0592MHz cho chng trnh di y, hy pht biu a)
chng trnh ny lm g? b) hy tnh ton tn s c Timer1 s dng t tc
baud? v c) hy tm tc baud truyn d liu.
MOV A, PCON
SETB ACC.7
MOV PCON, A
MOV
139
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
;(57600/3=19200) v SMOD = 1
MOV SCON, #50H ; ng khung d liu gm 8 bt
;d liu, 1 Stop v cho php RI.
SETB TR1
; Khi ng Timer1
MOV A, #B
; Truyn k t B
A_1: CLR TI
; Khng nh TI = 0
MOV SBUF, A
;Truyn n
H_1: JNB TI, H_1
; Ch y cho n khi bt cui c gi i
SJMP A_1
; Tip tc gi B
Li gii:
a) Chng trnh ny truyn lin tc m ASCII ca ch B ( dng nh phn l 0100
0010)
b) Vi tn s XTAL = 11.0592MHz v SMOD = 1 trong chng trnh trn ta c:
11.0592MHz/12 = 921.6kHz l tn s chu trnh my, 921.6kHz/16 = 57.6kHz
l tn s c Timer1 s dng t tc baud
c) 57.6kHz/3 = 19.200 l tc cn tm
V d 2:
Tm gi tr TH1 ( dng thp phn v hex) t tc baud cho cc trng
hp sau.
a) 9600
b) 4800 nu SMOD = 1 v tn s XTAL = 11.0592MHz
Li gii:
Vi tn s XTAL = 11.0592MHz v SMOD = 1 ta c tn s cp cho Timer1 l
57.6kHz.
a) 57.600/9600 = 6 do vy TH1 = - 6 hay TH1 = FAH
b) 57.600/4800 = 12 do vy TH1 = - 12 hay TH1 = F4H
SMOD=1
11.0592MHz
XTAL
oscillator
12
28800Hz
921.6kHz
16
32
57600Hz
28800Hz
To
timer1
to set
baud
SMOD=0
Bi tp:
Hy tm tc baud nu TH1 = -2, SMOD = 1 v tn s XTAL = 11.0592MHz. Tc
ny c c h tr bi cc my tnh IBM PC v tng thch khng?
3.6 X l ngt
Mt ngt l mt s kin bn trong hoc bn ngoi lm ngt b vi iu khin
bo cho n bit rng thit b cn dch v ca n. Trong chng ny ta tm hiu khi
nim ngt v lp trnh ngt.
Mt b vi iu khin c th phc v mt vi thit b, c hai cch thc hin
iu ny l s dng cc ngt v thm d (polling). Trong phng php s dng
cc ngt th mi khi c mt thit b bt k cn n dch v ca n th n bao cho b
140
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
141
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Trong :
Bit
EA
ES
ET1
EX1
ET0
EX0
142
M t
Cho php/cm ngt ton cc
= 0: Cm tt c cc ngt
= 1: Cho php cc ngt
= 0: Cm ngt truyn thng ni tip
= 1: Cho php ngt truyn thng ni tip
= 0: Cm ngt Timer 1
= 1: Cho php ngt Timer 1
= 0: Cm ngt ngoi vi INT0
= 1: Cho php ngt ngoi v INT0
= 0: Cm ngt Timer 0
= 1: Cho php ngt timer 0
= 0: Cm ngt ngoi vi INT1
= 1: Cho php
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Mt s v d v bi tp:
V d 1:
Hy ch ra nhng lnh a) cho php ngt ni tip ngt Timer0 v ngt phn cng
ngoi 1 (EX1) v b) cm (che) ngt Timer0 sau c) trnh by cch cm tt c mi
ngt ch bng mt lnh duy nht.
Li gii:
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
143
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
a) MOV
IE, #10010110B
cho php ngt phn cng ngoi.
SETB IE.4
SETB IE.1
SETB IE.2
(tt c nhng lnh ny tng ng vi lnh MOV IE, #10010110B trn y).
b) CLR
IE.1
c) CLR
IE.7
; Cm tt c mi ngt.
V d 2:
Hy vit chng trnh nhn lin tc d liu 8 bt cng P0 v gi n n cng P1
trong khi n cng lc to ra mt sng vung chu k 200us trn chn P2.1. Hy s
dng b Timer0 to ra sng vung, tn s ca 8051 l XTAL = 11.0592MHz.
Li gii:
Ta s dng b Timer0 ch 2 (t ng np li) gi tr np cho TH0 l
100/1.085us = 92.
; - - Khi khi to vo chng trnh main trnh dng khng gian.
; a ch dnh cho bng vc t ngt.
ORG 0000H
CPL P2.1
; Nhy n bng vc t ngt.
; - - Trnh ISR dnh cho Timer0 to ra sng vung.
ORG 0030H
; Ngay sau a ch bng vc-t ngt
MAIN:
TMOD, #02H ; Chn b Timer0, ch 2 t np li
MOV P0, #0FFH ; Ly P0 lm cng vo nhn d liu
MOV TH0, # - 92
; t TH0 = A4H cho 92
MOV IE, #82H
; IE = 1000 0010 cho php Timer0
SETB TR0
; Khi ng b Timer0
BACK:
MOV A, P0
; Nhn d liu vo t cng P0
MOV P1, A
; Chuyn d liu n cng P1
SJMP BACK
; Tip tc nhn v chuyn d liu
; Chng no b ngt bi TF0
END
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
V d 3:
Hy vit li chng trnh v d 2 to sng vung vi mc cao ko di
1085us v mc thp di 15us vi gi thit tn s XTAL = 11.0592MHz. Hy s
dng b nh thi Timer1.
Li gii:
V 1085us l 1000x1085us nn ta cn s dng ch 1 ca b nh thi
Timer1.
;Khi khi to trnh s dng khng gian dnh cho bng vc t ngt.
ORG 0000H
LJMP MAIN
; Chuyn n bng vc t ngt.
; - - Trnh ISR i vi Timer1 to ra xung vung
OR6 001BH
; a ch ngt ca Timer1
; trong bng vc t ngt
LJMP ISR_T1
; Nhy n ISR
; - - Bt u cc chng trnh chnh MAIN.
ORG 0030H
; Sau bng vc t ngt
MAIN:
MOV TMOD, #10H ; Chn Timer1 ch 1
MOV P0, #0FFH ; Chn cng P0 lm u vo nhn d liu
MOV TL1, #018H ; t TL1 = 18 byte thp ca - 1000
MOV TH1, #0FCH ; t TH1 = FC byte cao ca - 1000
MOV IE, #88H
; IE = 10001000 cho php ngt Timer1
SETB TR1
; Khi ng b Timer1
BACK:
MOV A, P0
; Nhn d liu u vo cng P0
MOV P1, A
; Chuyn d liu n P1
SJMP BACK
; Tip tc nhn v chuyn d liu
; - - Trnh ISR ca Timer1 phi c np li v ch 1
ISR_T1:
CLR TR1 ; Dng b Timer1
CLR P2.1
; P2.1 = 0 bt u xung mc thp
MOV R2, #4
; 2 chu k my MC (Machine Cycle)
HERE:
DJNZ R2, HERE
; 4 2 MC = 8 MC
MOV TL1, #18H
; Np li byte thp gi tr 2 MC
MOV TH1, #0FCH
; Np li byte cao gi tr 2 MC
SETB TR1
; Khi ng Timer1
1 MC
SETB P2.1
; P2.1 = 1 bt P2.1 tr li cao
RETI
; Tr v chng trnh chnh
END
145
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
Th t u tin ngt
Khi c hai hay nhiu ngt cng lc xy ra, hoc mt ngt ang thc hin th
m ngt khc yu cu th ngt no c u tin hn s c u tin x l.
C 3 cp u tin ngt trong 8051
-
Vic t chn mc u tin ngt l 1 hoc 0 thng qua thanh ghi IP. Vic x l u
tin ngt ca 8051 nh sau:
-
Thanh ghi IP
PS: UART
PT1: Timer 1
PX1: INTR 1
PT0: Timer 0
PX0: INTR 0
146
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
147
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
Cu 25. Vit chng trnh con ngt v khi to ngt Timer 0, mode 1, vi tn
s trn l 400KHz, bit tn s thch anh Fxtal=11.0592MHz
Cu 26. Vit chng trnh con ngt v khi to ngt Timer 0, mode 2, vi chu
k trn l T=200s, bit tn s thch anh Fxtal=11.0592MHz
Cu 27. Vit chng trnh con ngt v khi to ngt Timer 1, mode 1, vi tn
s trn l 200KHz, bit tn s thch anh Fxtal=8MHz
Cu 28. Vit chng trnh con ngt v khi to ngt Timer 1, mode 1, vi tn
s trn l 400KHz, bit tn s thch anh Fxtal=11.0592MHz
Cu 29. Vit chng trnh con ngt v khi to ngt Timer 1, mode 2, vi chu
k trn l T=255s, bit tn s thch anh Fxtal=8MHz
Cu 30. Vit chng trnh con ngt v khi to ngt Timer 1, mode 2, vi chu
k trn l T=200s, bit tn s thch anh Fxtal=11.0592MHz
Cu 31. Vit on lnh khi to truyn thng ni tip bit tn s thch anh l
8MHz, tc baud=9600bps.
Cu 32. Vit on lnh khi to truyn thng ni tip bit tn s thch anh l
16MHz, tc baud=19200bps.
Cu 33. Vit on lnh khi to truyn thng ni tip bit tn s thch anh l
20MHz, tc baud=19200bps.
Cu 34. Thit k v vit chng trnh con c ma trn 2x2 nt bm (nt bm
c nh s t 1 n n), kt qu tr v l s th t nt bm, nu khng c
nt no c bm, tr v 0. Bit nt bm c ghp hng vo P1, ct vo P2.
Cu 35. Thit k v lp trnh hin th s 1234 4 LED 7 thanh. Bit 4 LED l
chung m, mc chung BUS d liu (a..h).
Cu 36. Vit chng trnh truyn lin tc tn mnh ln my tnh qua ng
RS232, vi tc baud = 9600bps
Cu 37. Hy lp trnh cho 8051 nhn cc byte d liu ni tip v t chng
vo cng P1. t tc baud l 4800bps, 8 bit d liu v 1 bit Stop.
Cu 38. Hy lp trnh cho 8051 nhn cc byte d liu ni tip v t chng
vo cng P2. t tc baud l 9600bps, 8 bit d liu v 1 bit Stop.
Cu 39. Vit chng trnh truyn thng vi my tnh, nu my tnh gi k t
a th 8051 gi tr v k t b, nu my tnh gi k t b th 8051 gi tr v
k t c,
Cu 40. Vit chng trnh truyn thng vi my tnh nu my tnh gi xung
ch Ten th 8051 gi tr v tn mnh (th sinh).
Cu 41. Hy vit chng trnh nhn lin tc d liu 8 bit cng P0 v gi n
n cng P1 trong khi n cng lc to ra mt sng vung chu k 200s trn
chn P2.1. Hy s dng b Timer0 to ra sng vung, tn s ca 8051 l
FXTAL =11.0592MHz.
Cu 42. Hy vit chng trnh nhn lin tc d liu 8 bit cng P0 v gi n
n cng P1 trong khi n cng lc to ra mt sng vung vi mc cao ko di
148
Bi ging
Vi x l - Vi iu khin
Chng 3
H Vi iu khin 8051
149
Bi ging
Chng 3
Vi x l - Vi iu khin
H Vi iu khin 8051
(Trang ny nn b trng)
150
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
CHNG 4. NG DNG
Mc tiu
Gip sinh vin hc tp v thc hnh theo cc v d mu, nhm nng cao trnh
lp trnh ca sinh vin.
Tm tt:
ng dng cc vi iu khin lp trnh giao tip vi th gii thc thng qua
cc v d:
-
151
Bi ging
Chng 4
Vi x l - Vi iu khin
4.1
ng dng
U1
19
33p
FXTAL
XTAL1
18
RST
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
PSEN
ALE
EA
VCC
GND
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
XTAL2
C2
33p
9
C3
10u
R1
10k
29
30
31
40
20
C4
224
1
2
3
4
5
6
7
8
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
D8
D7
D6
D5
D4
D3
D2
D1
LED
LED
LED
LED
LED
LED
LED
LED
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
AT89C51
R2
220
XTAL1
18
XTAL2
RST
29
30
31
PSEN
ALE
EA
1
2
3
4
5
6
7
8
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
D8
D7
D6
D5
D4
D3
D2
D1
LED
LED
LED
LED
LED
LED
LED
LED
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
AT89C51
152
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
Mt s hm mu:
Trong tt c cc v d v LED, chng ta u s dng mt chng trnh con (CTC)
to tr, thng t tn l Delay. Chng trnh con Delay c vit bng cch to ra
nhiu vng lp lng nhau, nhm tiu tn thi gian. Khong thi gian bao nhiu c
tnh da theo tn s thch anh (Fxtal), s vng lp, s ln gi CTC.
Chng trnh con Delay c thi gian c nh:
Delay:mov R7, #10
DL:mov R6,#255
DL1:mov R5,#255
DL2:djnz r5,dl2
djnz R6,DL1
DJNZ R7, DL
ret
153
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
DelayX
P1=0xAA
DelayX
Tt LED
Tr nhn
trng thi LED
Bt LED
Tr nhn
trng thi LED
Trong v d trn, c thm phn o LED, xem k o LED Hnh 4-5. Thut ton:
Nhp nhy P1.0
Nhp nhy mt LED n:
n gin ch cn kch hot n LED nhp nhy nhn thy c s hot ng,
trong mi ln thay i trng thi ca LED, cn to mt khong thi gian tr c th
quan st thy trng thi. Trong v d ny, thi gian tr c cung cp bng cch thc
154
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
4.2 Timer
Chng trnh di y minh ha mt v d n gin nht v Timer, ly v d l Timer 0 (v
trong ch c bn, Timer 0 v Timer 1 l nh nhau).
S nguyn l, vn ly s trong Hnh 4-1. Mch nhp nhy LED n.
Thut ton lp trnh v m ngun c th thc hin nh cc v d di y.
Timer Bi ton 1:
Lin tc pht xung vung c chu k l 2ms ra chn P1.0
Timer-Xung vung
Nhn: Start
TMOD=1
TH0_TL0=65536-1000
TR0=1
Khi to
Timer0
Chy!
CSEG AT 0
JMP
Start ; Reset vector
ORG
100H
Start:
MOV
TMOD,#0x01
MOV
TH0, #HIGH(-1000);1ms
MOV
TL0, #LOW(-1000)
SETB
TR0 ; Cho TIMER chay
Nhn: waitTF0
TF0=1?
P1.0=~P1.0
Ch n khi
Timer0 Chy xong
o trng thi ca
chn (To xung)
P1.0
Start
155
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
Timer Bi ton 2:
S dng Timer0 v Timer1, Timer0 dng pht xung vung c chu k 4ms ti
chn P1.0, Timer 1 pht xung vung 8ms chn P1.7.
Hnh vn dng : Hnh 4-1. Mch nhp nhy LED n
Phn tch:
Vi yu cu bi nh trn, ta s dng ngt timer0 v ngt timer1. Chng
trnh chnh khi to timer, khi to ngt ri khng lm g na.
C hai CTC ngt c vai tr nh nhau. Trong mi ngt, thc hin nhim v l
lt trng thi chn ( to xung vung), v khi to li gi tr timer tng
ng.
Timer-Xung vung
Ngt
TMOD=11h
TH0_TL0=65536-2000
TH1_TL1=65536-4000
TR0=1
TR1=1
Khi to
Timer0
Chy!
Khng lm g
Ngt TM0
Cng vic
P1.0=~P1.0
Khi to
li Timer0
TH0_TL0=65536-2000
Thot ngt
CSEG
AT
0
JMP
Start ; Reset vector
ORG 0BH
JMP TM0_PWM ;Vector ngt TM0
ORG
01BH
JMP TM1_PWM ;Vector ngt TM1
ORG
100H
Start:
MOV
TMOD,#0x11
MOV
TH0,#HIGH(-2000)
MOV
TL0,#LOW(-2000)
MOV
TH1,#HIGH(-4000)
MOV
TL1,#LOW(-4000)
MOV IE,#08AH ; Interrupt enabled
SETB TR0 ; Cho TIMER0 chay
SETB TR1 ; Cho TIMER1 chay
JMP
$
TM0_PWM:
CPL P1.0
MOV TH0,#HIGH(-2000)
MOV TL0,#LOW(-2000)
RETI ; RETurn from Interrupt
TM1_PWM:
CPL P1.7
MOV TH1,#HIGH(-4000)
MOV TL1,#LOW(-4000)
RETI ; RETurn from Interrupt
END ; End of program
156
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
ORG
XRESET:
AT
XRESET
ORG
JMP
100H
MOV
MOV
MOV
MOV
CLR
SETB
SETB
MOV
CLR
0
02BH
TIM2_ISR
A,#0FFH
P3,#0FFH
RCAP2L,#0FH
RCAP2L,#01H
CAP2
EXEN2
TR2
IE,#0A0H
C
; Reset vector
; Vector ngt ca TM2
; TM2, 16-bit t np li
;
;
;
;
157
Bi ging
Chng 4
Vi x l - Vi iu khin
LOOP1:
SJMP
ng dng
LOOP1
; Chy ti ch
TIM2_ISR:
RRC A
; Quay A qua
MOV
P3,A ; Xut A
CLR
TF2
; Xa c
CLR
EXF2 ; Xa
RETI
; Kt thc ngt
END ; Kt thc chng trnh
c C
ra cng P3
ngt
c ngt
Mt logic s mc khng (0) trn P3.2 khi to s thc thi ngt Isr_Int0, v th s
tng dn trong R0 c sao chp ra cng P0. Logic s mc khng trn P3.3 khi to s
thc thi chng trnh con ngt Isr_Int1, s tng dn trong R1 c sao chp sang P1.
Trong ngn hn, mi ln bm vo cc nt nhn INT0 v INT1 s c tnh v ngay
lp tc c hin th nh dng nh phn trn cng thch hp
CSEG
JMP
ORG
JMP
ORG 013H
JMP
100H
AT
0
XRESET; Reset vector
003H
; Vector ngt INT0
Isr_Int0
; Vector ngt INT1
Isr_Int1
ORG
XRESET:
MOV TCON,#00000101B
158
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
XTAL1
XTAL2
RST
R1
220R
29
30
31
LS1
SPEAKER
Q1
BC547
R2
220R
R3
10k
1
2
3
4
5
6
7
8
PSEN
ALE
EA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
R4
10k
AT89C51
ORG
LJMP
159
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
160
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
;****************************************************************
;* PROGRAM NAME : 7Seg1.ASM
;* DESCRIPTION: Program displays number "3" on 7-segment LED
display
;****************************************************************
CSEG
AT
0
JMP
XRESET ; Reset vector
ORG
100H
XRESET:
MOV
P1,#0
; Tt LED
MOV
P3,#20h ; Chn LED D4 hin th
LOOP:
MOV
A,#03
; Hin th s 3
LCALL
Disp
; Thng qua mt n trong CTC Disp
MOV
P1,A
SJMP
LOOP
Disp:
;CTC hin th s
INC
A
MOVC
A,@A+PC
RET
DB
3FH
; Mt n s 0
DB
06H
; Mt n s 1
DB
5BH
; Mt n s 2
DB
4FH
; Mt n s 3
DB
66H ; Mt n s 4
DB
6DH ; Mt n s 5
DB
7DH ; Mt n s 6
DB
07H ; Mt n s 7
DB
7FH ; Mt n s 8
DB
6FH ; Mt n s 9
END
; Kt thc chng trnh
161
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
V d:
org 0h
start:
mov P0,#11111100b; Cp 0V cho thanh led a v b
clr P2.0 ; Cp 5V cho led 7 thanh
call delay ; Gi hm tr
mov P0,#11011011b; Cp 0V cho thanh led c,f
clr P2.0 ; Cp 5V cho led
call delay ; Gi hm tr
mov P0,#10110000b; Cp 0V to a,b,c,d,g
clr P2.0 ; Cp 5V cho led
call delay ; Gi hm tr
sjmp start ; Tr v u chng trnh
162
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
;=============================================
;subroutine delay created to rise delay time
;=============================================
delay: mov R1,#255
del1: mov R2,#255
del2: djnz R2,del2
djnz R1,del1
ret
end
org 0h
start:
mov dptr, #word
; con tr d liu vo u bng
mov R6, #8
; s led cn hin th, 8 led
mov R1, #01111111b; khi u led 8
Again:
clr A ; xa thanh ghi acc
movc A,
@A+dptr ; a s u tin bng vo acc
inc dptr
; tng v tr con tr
mov P0, A
; a m cn hin th ra P0
mov A,
R1
; th t led cn hin th
mov P2, A
; hin th led
rr
A
; dch vi tr led cn hin th
mov R1, A
; lu vo thanh ghi R1
call delay
; gi hm tr
mov P0, #11111111b; xa
djnz R6, Again
; lp li 8 ln
sjmp start
; tr v v tr ban u
delay: mov R1,#255
del1: mov R2,#255
del2: djnz R2,del2
djnz R1,del1
ret
word: DB 00111111b, 01000111b, 00001000b, 00000011b
DB 01000110b, 01000000b, 01001000b, 00111111b
end
163
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
LCD1
18
LM016L
D0
D1
D2
D3
D4
D5
D6
D7
7
8
9
10
11
12
13
14
RS
RW
E
4
5
6
1
2
3
VSS
VDD
VEE
29
30
31
1
2
3
4
5
6
7
8
XTAL1
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
XTAL2
RST
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
EA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
AT89C51
164
Bi ging
Vi x l - Vi iu khin
Chng 4
ng dng
;****************************************************************
;* PROGRAM NAME : Lcd.ASM
;* DESCRIPRTION : Program for testing LCD display. 4-bit
communication
;* is used. Program does not check BUSY flag but uses program delay
;* between 2 commands. PORT1 is used for connection
;* to the microcontroller.
;***************************************************************
Start_address
EQU
0000h
CSEG
AT
0
ORG
Start_address
JMP
Inic
LCD_Disp MACRO TS
MOV
A,#TS
; Display character ' '.
CALL
LCD_putc
ENDM
ORG
Start_address+100h
MOV
IE,#00
; All interrupts are disabled
Inic:
CALL
LCD_inic
; Initialize LCD
;*************************************************
;* MAIN PROGRAM
;*************************************************
START:
MOV
A,#80h ; Hin th ti dng 1 ct 1
CALL
LCD_status
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp 'L'
LCD_Disp 'C'
LCD_Disp 'D'
MOV
A,#0c0h
; Hin th ti dng 2 ct 1
CALL
LCD_status
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp ' '
LCD_Disp 'D'
LCD_Disp 'i'
LCD_Disp 's'
LCD_Disp 'p'
LCD_Disp 'l'
LCD_Disp 'a'
LCD_Disp 'y'
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
165
Bi ging
Chng 4
Vi x l - Vi iu khin
JMP
ng dng
MOV
R0,#20d ; Ch mt t(20x10ms)
CALL
Delay_10ms
MOV
DPTR,#LCD_DB ; Xa mn hnh
MOV
A,#6d
CALL
LCD_inic_status
MOV
R0,#10d
; Ch mt t 10x10ms)
CALL
Delay_10ms
START
;*********************************************
;* Chng trnh con to tr (T= r0 x 10ms)
;*********************************************
Delay_10ms: MOV
R5,00h
;T.gian tr ~ 1+(1+(1+2*r7+2)*r6+2)*r5
MOV
R6,#100d
; (nu r7>10)
MOV
R7,#100d
; 2*r5*r6*r7
DJNZ R7,$
DJNZ R6,$-4
DJNZ R5,$-6
RET
;****************************************************************
; Chng trnh con khi to:
;****************************************************************
LCD_enable
BIT
LCD_read_write BIT
LCD_reg_select BIT
LCD_port
SET
Busy
BIT
LCD_Start_I_red
character
EQU
LCD_Start_II_red EQU
character
P1.3
P1.1
P1.2
P1
P1.7
00h
LCD_DB:
format
DB
00111100b
DB
DB
00101100b
00011000b
DB
00001100b
DB
00000110b
DB
DB
00000010b
00000001b
; 5 -Display/cursor home
; 6 -Clear display
right/left
off
166
Bi ging
Chng 4
Vi x l - Vi iu khin
DB
ng dng
00001000b
;
LCD_inic:
MOV
MOV
CALL
MOV
CALL
MOV
lcall
MOV
CALL
MOV
CALL
MOV
CALL
MOV
CALL
MOV
CALL
DPTR,#LCD_DB
A,#00d
; Triple initialization in 8-bit
LCD_inic_status_8 ; mode is performed at the beginning
A,#00d
; (in case of slow increment of
LCD_inic_status_8; the power supply is on
A,#00d
LCD_inic_status_8
A,#1d
; Change from 8-bit into
LCD_inic_status_8 ; 4-bit mode
A,#1d
LCD_inic_status
A,#3d
; As from this point the program executes in
;4-bit mode
LCD_inic_status
A,#6d
LCD_inic_status
A,#4d
LCD_inic_status
RET
;******************************************
LCD_inic_status_8:
PUSH B
MOVC A,@A+DPTR
CLR
LCD_reg_select
; RS=0 - Write command
CLR
LCD_read_write
; R/W=0 - Write data on LCD
MOV
ORL
ORL
ANL
MOV
SETB
167
Bi ging
Chng 4
Vi x l - Vi iu khin
CALL
ng dng
LCD_status
RET
;***********************************************************
;* SUBROUTINE: LCD_status
;* DESCRIPTION: Subroutine for defining LCD status.
;*******************************************************
LCD_status:
PUSH B
MOV
B,#255d
DJNZ B,$
DJNZ B,$
DJNZ B,$
CLR
LCD_reg_select
; RS=O: Command is sent to LCD
CALL LCD_port_out
SWAP A
; Nibles are swapped in accumulator
DJNZ B,$
DJNZ B,$
DJNZ B,$
CLR
LCD_reg_select
; RS=0: Command is sent to LCD
CALL LCD_port_out
POP
B
RET
;************************************************************
;* SUBROUTINE: LCD_putc
;* DESCRIPTION: Sending character to be displayed on LCD.
;********************************************************
LCD_putc:
PUSH B
MOV
B,#255d
DJNZ B,$
SETB LCD_reg_select
; RS=1: Character is sent to LCD
CALL LCD_port_out
SWAP A
; Nibles are swapped in accumulator
DJNZ B,$
SETB LCD_reg_select
; RS=1: Character is sent to LCD
CALL LCD_port_out
POP
B
RET
;****************************************************
;* SUBROUTINE: LCD_port_out
;* DESCRIPTION: Sending commands or characters on LCD display
;***************************************************
LCD_port_out: PUSH ACC
PUSH B
MOV
B,LCD_port
ORL
B,#11110000b
ORL
A,#00001111b
ANL
A,B
MOV
LCD_port,A
; Data is copied from A to LCD port
SETB LCD_enable
; high-to-low transition signal
168
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
; is generated on the LCD's EN pin
CLR
POP
POP
RET
END
LCD_enable
B
ACC
; End of program
169
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
U1
19
18
29
30
31
1
2
3
4
5
6
7
8
XTAL1
XTAL2
RST
PSEN
ALE
EA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
RXD
TXD
RTS
CTS
AT89C51
CLOCK=11.0592MHz
100H
MOV
MOV
MOV
IE,#00
TMOD,#20H
TH1,#0FDH
LOOP:
MOV
MOV
CLR
CLR
SETB
SJMP
IR_SER:
JNB
RI,OUTPUT
A,SBUF
P1,A
RI
OUTPUT:
MOV
MOV
CLR
RETI
END
; End of program
170
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
U1
19
18
29
30
31
1
2
3
4
5
6
7
8
XTAL1
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
XTAL2
RST
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
EA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
RXD
TXD
RTS
CTS
AT89C51
CLOCK=11.0592MHz
SJMP
LOOP
; Remain here
; End of program
171
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
172
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
P3.1
P3.0
EQU
45;
(((11059200/9600)/12) - 5) / 2
173
Bi ging
Chng 4
Vi x l - Vi iu khin
DJNZ R0,$
MOV R1,#8
ng dng
;For START bit
;Send 8 bits
putc1:
RRC A
MOV txd_pin,C
MOV R0,#BITTIM
DJNZ R0,$
DJNZ R1,putc1
SETB txd_pin
RRC A
MOV R0,#BITTIM
DJNZ R0,$
POP PSW
pop ACC
RET
174
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
DJNZ R1,getc1
mov r7,a
POP PSW
pop ACC
RET
;read 8 bits
;go home
U3
1
2
3
4
5
8
10
9
19
6
7
CS
RD
WR
CLK IN
INTR
A GND
D GND
VREF/2
CLK R
VCC
DB0(LSB)
DB1
DB2
DB3
DB4
DB5
DB6
DB7(MSB)
20
18
17
16
15
14
13
12
11
VIN+
VINADC0804
175
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
U1
29
30
31
ADC_RD
ADC_WR
CS
intr
1
2
3
4
5
6
7
8
RST
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
EA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
C1
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
L0
L1
L2
L3
L4
L5
L6
L7
L0
L1
L2
L3
U2
1nF
ADC_RD
ADC_WR
R1+2V5
10k
RV1
5k
L4
XTAL2
39
38
37
36
35
34
33
32
L6
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
L7
18
XTAL1
21%
19
intr
1
2
3
4
5
8
10
9
19
6
7
CS
RD
WR
CLK IN
INTR
A GND
D GND
VREF/2
CLK R
VCC
DB0(LSB)
DB1
DB2
DB3
DB4
DB5
DB6
DB7(MSB)
20
18
17
16
15
14
13
12
11
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
VIN+
VINADC0804
AT89C51
CLOCK=12MHz
176
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
1
2
3
4
5
6
7
8
RST
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
EA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
21
22
23
24
25
26
27
28
DB0
DB1
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
10
11
12
13
14
15
16
17
DB2
DB3
DB7
29
30
31
XTAL2
39
38
37
36
35
34
33
32
DB6
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
DB5
18
XTAL1
DB4
19
AT89C51
CLOCK=12MHz
18
29
30
31
1
2
3
4
5
6
7
8
XTAL1
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
XTAL2
RST
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
EA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
AT89C51
CLOCK=12MHz
39
38
37
36
35
34
33
32
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
D
1
4
3
2
1
A
B
C
D
19
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
U1
177
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
ORG 0
JMP MAIN
KQ
EQU 0
COL1 EQU P2.3
COL2 EQU P2.2
COL3 EQU P2.1
COL4 EQU P2.0
ROW_A EQU P2.4
ROW_B EQU P2.5
ROW_C EQU P2.6
ROW_D EQU P2.7
MAIN:
MOV P2,#0FFh
CLR ROW_A
ADB0:JB COL1, ADB1
MOV KQ,#1
// Phim 1 bam
ADB1:JB COL2, ADB2
MOV KQ,#2
// Phim 2 bam
ADB2:JB COL3, ADB3
MOV KQ,#3
//Phim 3 bam
ADB3:JB COL4, AFINISH
MOV KQ,#'A'
//Phim A bam
AFINISH:
SETB ROW_A
CLR ROW_B
BDB0:JB COL1, BDB1
MOV KQ,#6
// Phim 6 bam
BDB1:JB COL2, BDB2
MOV KQ,#5
// Phim 5 bam
BDB2:JB COL3, BDB3
MOV KQ,#4
//Phim 4 bam
BDB3:JB COL4, BFINISH
MOV KQ,#'B'
//Phim 4 bam
BFINISH:
SETB ROW_B
CLR ROW_C
CDB0:JB COL1, CDB1
MOV KQ,#7
// Phim 7 bam
CDB1:JB COL2, CDB2
MOV KQ,#8
// Phim 8 bam
CDB2:JB COL3, CDB3
MOV KQ,#9
//Phim 9 bam
CDB3:JB COL4, CFINISH
MOV KQ,#'C'
//Phim C bam
CFINISH:
SETB ROW_C
178
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
CLR ROW_D
DDB0:JB COL1, DDB1
MOV KQ,#'*'
// Phim * bam
DDB1:JB COL2, DDB2
MOV KQ,#0
// Phim 0 bam
DDB2:JB COL3, DDB3
MOV KQ,#'#'
//Phim # bam
DDB3:JB COL4, DFINISH
MOV KQ,#'D'
//Phim D bam
DFINISH:
SETB ROW_D
MOV P3,KQ // x l kt qu
JMP MAIN
END
Hnh 4-23. Cu to ng c bc
179
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
180
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
V d m rng 1:
Chng trnh o nhit dng LM35DZ, ADC0804, v thit lp ; nhit cnh bo bng bn phm
my
tnh:
LCD_DATA
LCD_RS
LCD_RW
LCD_E
ADC_DATA
ADC_RD
ADC_WR
ADC_INTR
KB_CLK
KB_DATA
WARN
EQU
BIT
BIT
BIT
EQU
BIT
BIT
BIT
BIT
BIT
BIT
P2
P0.0
P0.1
P0.2
P1
P0.4
P0.5
P0.6
P3.2
P0.3
P0.7
ORG 0000H
LJMP MAIN
ORG 0003H
LJMP EX0_ISR
ORG 0030H
MAIN:
LCALL CONFIG
;Thiet lap cac thong so ban dau
MAIN1: LCALL READ_ADC ;Doc ADC
LCALL CONVERT ;Chuyen doi
LCALL COMPARE ;So sanh va hien thi
LCALL DELAY_500MS ;Cho 0,1s
LJMP MAIN1
;_______________________________________
CONFIG: ;CTC thiet lap cac thong so
MOV A,#38H ;K.D LCD
LCALL WRCMD
MOV A,#0CH ;Display ON, Cursor OFF
LCALL WRCMD
MOV A,#06H ;LCD tu dong dich phai
LCALL WRCMD
MOV A,#01H ;Ghi loi chao
LCALL WRCMD
MOV DPTR,#CHAO1
LCALL OUT_STRING_LINE1
MOV DPTR,#CHAO2
LCALL OUT_STRING_LINE2
LCALL DELAY_2S
MOV DPTR,#CHAO3
LCALL OUT_STRING_LINE1
MOV DPTR,#CHAO4
LCALL OUT_STRING_LINE2
LCALL DELAY_2S
SETB WARN ;Tat den canh bao
CLR F0 ;F0=0: chuc, =1: dvi
MOV 41H,#'4'
;Dat nhiet do canh bao ban dau
MOV 42H,#'0'
MOV IE,#81H ;Cho phep ngat ngoai 0
RET
;_______________________________________
;CTC doc ADC ;
;Du lieu doc duoc chua trong 30H ;
;---------------------------------------;
READ_ADC:
MOV ADC_DATA,#0FFH ;De doc ADC chinh xac
SETB ADC_INTR ;nhan t.hieu canh xuong
SUBB A,B
XCH A,R6
ORL A,#01H
XCH A,R6
GIAM: DJNZ R2,DIV1
MOV B,A ;So du chua trong B
181
Bi ging
Chng 4
Vi x l - Vi iu khin
RET
;_______________________________________
RLC_R7R6:
;CTC xoay trai so 16 bit R7_R6 qua co C
PUSH ACC
MOV A,R6
RLC A
MOV R6,A
MOV A,R7
RLC A
MOV R7,A
POP ACC
RET
;_______________________________________
;CTC so sanh nhiet do hien thi v ;
;nhiet do dat ;
;Neu lon hon hoac bang nhiet do dat ;
;thi canh bao ;
;---------------------------------------;
COMPARE:
MOV A,#01H
LCALL WRCMD
MOV A,31H
CJNE A,41H,KHAC
MOV A,32H
CJNE A,42H,KHAC
LJMP CANHBAO ;Neu bang nhau thi canh bao
KHAC:
JNC CANHBAO ;Neu lon hon thi canh bao
LJMP HIENTHI
CANHBAO:
CLR WARN ;Bat den canh bao
MOV DPTR,#ST3
LCALL OUT_STRING_LINE1
MOV A,#0C1H
LCALL WRCMD
LCALL DISPLAY_TEMP
MOV A,#' '
LCALL WRTXT
MOV A,#'>'
LCALL WRTXT
MOV A,#' '
LCALL WRTXT
LCALL DP_WARN_TEMP
LJMP THOAT
HIENTHI:
SETB WARN ;Tat den canh bao
MOV DPTR,#ST1
LCALL OUT_STRING_LINE1
MOV A,#08AH
LCALL WRCMD
LCALL DISPLAY_TEMP
MOV DPTR,#ST2
LCALL OUT_STRING_LINE2
MOV A,#0C8H
LCALL WRCMD
LCALL DP_WARN_TEMP
THOAT: RET
DISPLAY_TEMP: ;CTC hien thi nhiet do
MOV A,31H
LCALL WRTXT
MOV A,32H
LCALL WRTXT
MOV A,#','
182
ng dng
LCALL WRTXT
MOV A,33H
LCALL WRTXT
MOV A,#'o'
LCALL WRTXT
MOV A,#'C'
LCALL WRTXT
RET
DP_WARN_TEMP:
MOV A,41H
LCALL WRTXT
MOV A,42H
LCALL WRTXT
MOV A,#'o'
LCALL WRTXT
MOV A,#'C'
LCALL WRTXT
RET
;_______________________________________
;CTC xuat mot chuoi ra LCD ;
;Con tro DPTR chi toi chuoi can xuat ;
;---------------------------------------;
OUT_STRING:
MOV R4,#0
OUTST1: MOV A,R4
MOVC A,@A+DPTR
LCALL WRTXT
INC R4
CJNE R4,#16,OUTST1
RET
OUT_STRING_LINE1:
MOV A,#80H
LCALL WRCMD
LCALL OUT_STRING
RET
OUT_STRING_LINE2:
MOV A,#0C0H
LCALL WRCMD
LCALL OUT_STRING
RET
WRCMD: ;CTC ghi lenh ra LCD
CLR LCD_RW
SETB LCD_E
CLR LCD_RS
MOV LCD_DATA,A
NOP
CLR LCD_E
LCALL READY
RET
WRTXT: ;CTC ghi ki tu ra LCD
CLR LCD_RW
SETB LCD_E
SETB LCD_RS
MOV LCD_DATA,A
NOP
CLR LCD_E
LCALL READY
RET
READY: ;CTC cho LCD
PUSH ACC
OK: CLR LCD_E
CLR LCD_RS
SETB LCD_RW
MOV LCD_DATA,#0FFH
SETB LCD_E
MOV A,LCD_DATA
JB ACC.7,OK
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
DJNZ R6,DELAY4
DJNZ R7,DELAY3
CLR LCD_RW
POP ACC
RET
DELAY_500MS: ;CTC delay 0,5s
MOV R7,#250
DELAY1: MOV R6,#200
DELAY2: MOV R5,#5
DJNZ R5,$
DJNZ R6,DELAY2
DJNZ R7,DELAY1
RET
DELAY_2S: ;CTC delay 2s
MOV R7,#250
DELAY3: MOV R6,#200
DELAY4: MOV R5,#20
DJNZ R5,$
LOOP: JB KB_CLK,$ ;Lay 8 bit Data
MOV C,KB_DATA
RRC A
JNB KB_CLK,$
DJNZ R3,LOOP
MOV R3,#24
SKIP: JB KB_CLK,$
JNB KB_CLK,$
DJNZ R3,SKIP
MOV 40H,A
MOV R4,#0
LOOP1: MOV DPTR,#SCAN MOV A,R4
MOVC A,@A+DPTR
CJNE A,40H,LOOP2
MOV DPTR,#ASCII
MOV A,R4
MOVC A,@A+DPTR
JB F0,DVI ;Neu F0=1 ghi hang d.vi
RET
;_______________________________________
;CTC ngat ngoai 0 ;
;Doc tu ban phim P/S2 ;
;Va h.thi ra LCD ;
;---------------------------------------;
EX0_ISR:
CLR EX0
PUSH ACC
MOV A,#00H
MOV R3,#8
JNB KB_CLK,$ ;Bo qua bit Start
DVI: MOV 42H,A
CLR F0
LJMP EXIT
LOOP2: INC R4
CJNE R4,#20,LOOP1 ; 20 lan?
EXIT: CLR C
POP ACC
SETB EX0 ;Bat co ngat
RETI
CHAO1: DB ' Duc, Q.Toan '
CHAO2: DB 'H.Thuong, Nguyen'
CHAO3: DB 'CT do n.do so V1'
CHAO4: DB ' Xin chao! '
ST1: DB 'Nhiet do: '
ST2: DB 'C.bao: '
ST3: DB ' Canh bao! '
SCAN: DB
45H,16H,1EH,26H,25H,2EH,36H,3DH,3EH,46H,70
H,69H,72H,7AH,6BH,73H,74H,6CH,75H,7DH
ASCII: DB '01234567890123456789'
CHUC:
MOV 41H,A ;neu F0=0 nho hang chuc
SETB F0
LJMP EXIT
END
183
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
V d m rng 2:
Thit k h thng hin th v cnh bo p sut nc trong bnh nn, vi 03 mc
thp, trung bnh v cao (ngng do ngi dng t t)
Bit cm bin p sut c tn hiu ra trong khong 0..100mV tng ng vi p sut
t 0..3000 atmosphe.
Yu cu thit k theo cc bc sau:
Thit k s khi tng th ton h thng
c t mi khi:
o Chc nng, nhim v ca khi
o S lng v chun tn hiu in p vo/ra
Thit k s tng tc (thut ton nhng) ton h thng
Thit k s nguyn l
c t s nguyn l
o Chc nng, nhim v ca (nhm) linh kin
o Chun giao tip (chun truyn thng (nu c chun), lc bnh thng/lc
hot ng,)
Lp trnh
o S Call graph
o S khi (ca mi chc nng trong s call graph, nu cn)
o Vit m ngun
p n:
Khi
DKTT
Hin th
Ngun
Hnh 4-24. S khi tng th ton b h thng
c t mi khi:
o Chc nng, nhim v, s lng v chun tn hiu in p vo/ra ca khi:
a. Khi vo: Gm cm bin p sut v cc phm bm. Cm bin c chc nng thu
nhn gi tr p sut. Phm bm dng nhp gi tr tham s t bn phm.
Cm bin p sut c u vo l p sut thuc khong 0..3000 atmosphe, u
ra l 0..100mV. Tn hiu ny s c lc nhiu, khuch i t l ln 0..5v
trc khi a vo khi iu khin trung tm.
Phm bm: gm 3 phm c u ra chun in p TTL, bnh thng l mc 1,
khi c bm s v mc 0.
Vy, khi vo, a ra 1 tn hiu Analog (0..5v), v 3 tn hiu s cho 3 nt
bm.
b. Khi hin th: Hin th trng thi ca h thng ln LCD16x2 v 3 LED n. LCD
dng lin tc hin th trng thi ca h thng nh: Gi tr p sut, gi tr ngng
184
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
Ai(0..5V)
LCD 16x2
Cm bin
D
Bn phm
A, B
A
Hi=D>B
Hi
No=(ADB)
No
Lo=D<B
Lo
LED Trng
LED Xanh
LED
Thit k s nguyn l
c t s nguyn l
o Chc nng, nhim v ca (nhm) linh kin
o Chun giao tip (chun truyn thng (nu c chun), lc bnh thng/lc
hot ng/,)
185
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
Hnh 4-26.
Hnh 4-27.
Khi vo s bao gm: Khi cm bin, khi lc v khuch i, khi bn phm. Chi tit c
thit k nh sau:
Vcc
3x10k
R2
R1
R5
R3
R4
K1
KB1
K2
KB2
K3
KB3
C1
Hnh 4-28. Mch
cm bin
c t khi:
186
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
LCD16x2
Hi
No
Lo
LED n
Hnh 4-31.
Hnh 4-32.
Khi hin th c cho nh Hnh 4-31, ta trin khai su hn nh Hnh 4-33. Hin
th LCD.
Thit k chi tit cc khi nh sau:
LCD1
LM016L
D1
R1
Hi
5k
D0
D1
D2
D3
D4
D5
D6
D7
D2
10k
R2
No
Green LED
7
8
9
10
11
12
13
14
RS
RW
E
4
5
6
50%
RV2
1
2
3
VSS
VDD
VEE
W hite LED
D3
10k
R3
D4
D5
D6
D7
RS
RW
E
Lo
RED-LED
10k
Vcc
187
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
C1
22p
C2
8MHZ
CRYSTAL
22p
Ai
U1
13
14
2
3
4
5
6
7
8
9
10
R4
10k
OSC1/CLKIN
OSC2/CLKOUT
RB0/INT
RB1
RB2
RB3/PGM
RB4
RB5
RB6/PGC
RB7/PGD
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/SS/C2OUT
RC0/T1OSO/T1CKI
RE0/AN5/RD
RC1/T1OSI/CCP2
RE1/AN6/WR
RC2/CCP1
RE2/AN7/CS
RC3/SCK/SCL
RC4/SDI/SDA
MCLR/Vpp/THV
RC5/SDO
RC6/TX/CK
RC7/RX/DT
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
33
34
35
36
37
38
39
40
15
16
17
18
23
24
25
26
19
20
21
22
27
28
29
30
E
RS
RW
D4
D5
D6
D7
Hi
No
Lo
KB1
KB2
KB3
PIC16F877A
Lp trnh
o S Call graph
o S khi (ca mi chc nng trong s call graph, nu cn)
o Vit m ngun
Phn mm
nhng
ADC
LCD
KeyBoard
Cm bin
Hin th LCD
Bn phm
SoSanh
Hin th LED
188
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
void KeyBoard(){
if(KB1){Mode=(++Mode)%3;delay_ms(T);}
if(Mode==1){
if(KB2){A++;delay_ms(T);}
if(KB3){A--;delay_ms(T);}
}
if(Mode==2){
if(KB2){B++;delay_ms(T);}
if(KB3){B--;delay_ms(T);}
}
}
void main(){
init_main();
while(1){
D=read_adc();
lcd_gotoxy(1,1); printf(lcd_putc,"Ap
Suat=%4LU.Mode=%u\nA=%4u.B=%4u",D,Mode,A,B);
Hi_LED=No_LED=Lo_LED=0;
if(D<A)Lo_LED=1;
else if(D>B)Hi_LED=1;
else No_LED=1;
KeyBoard();
delay_ms(100);
}
}
void init_main(){
setup_adc_ports(AN0);
setup_adc(ADC_CLOCK_INTERNAL);
set_adc_channel(0);
lcd_init();
}
189
Bi ging
Chng 4
Vi x l - Vi iu khin
ng dng
(Trang ny nn b trng)
190
Bi ging
Chng 5
Vi x l - Vi iu khin
CHNG 5.
CC H VI IU KHIN TIN TIN
Mc tiu
Gip sinh vin bit v cc h vi iu khin hin i v ph bin trong thc t
sn xut; v ng dng c bn ca chng.
Tm tt:
Tm hiu v cc vi iu khin hin i h AVR, h PIC v ARM
191
Bi ging
Chng 5
Vi x l - Vi iu khin
Bi ging
Vi x l - Vi iu khin
Chng 5
193
Bi ging
Vi x l - Vi iu khin
Chng 5
Bi ging
Vi x l - Vi iu khin
Chng 5
195
Bi ging
Vi x l - Vi iu khin
196
Chng 5
Bi ging
Chng 5
Vi x l - Vi iu khin
PIC 1655A
Hnh 5-2 Cc dng PIC
197
Bi ging
Vi x l - Vi iu khin
Chng 5
Bi ging
Vi x l - Vi iu khin
Chng 5
199
Bi ging
Vi x l - Vi iu khin
Chng 5
5.3 ARM
Cu trc ARM
Cu trc ARM (vit tt t tn gc l Acorn RISC Machine) l mt loi cu trc
vi x l 32-bit kiu RISC c s dng rng ri trong cc thit k nhng. Do c c
im tit kim nng lng, cc b CPU ARM chim u th trong cc sn phm in
t di ng, m vi cc sn phm ny vic tiu tn cng sut thp l mt mc tiu
thit k quan trng hng u.
Ngy nay, hn 75% CPU nhng 32-bit l thuc h ARM, iu ny khin ARM
tr thnh cu trc 32-bit c sn xut nhiu nht trn th gii. CPU ARM c
tm thy khp ni trong cc sn phm thng mi in t, t thit b cm tay (PDA,
in thoi di ng, my a phng tin, my tr chi cm tay, v my tnh cm tay)
cho n cc thit b ngoi vi my tnh ( a cng, b nh tuyn bn.) Mt
nhnh ni ting ca h ARM l cc vi x l Xscale ca Intel.
Mt b vi x l Conexant c
dng ch yu trong cc b nh
tuyn
Bi ging
Vi x l - Vi iu khin
Chng 5
201
Bi ging
Chng 5
Vi x l - Vi iu khin
H
ARM7TDMI
Li
Cache
(I/D)/MMU
MIPS in
hnh @ MHz
ng dng
ARM7TDMI
3-tng pipeline khng
(-S)
Game
Boy
15 MIPS @
Advance, Nintendo
16.8 MHz
DS, iPod
ARM710T
36 MIPS @
Psion 5 series
40 MHz
MMU
ARM720T
8KB
MMU
ARM740T
MPU
ARM7EJ-S
Jazelle DBX
unified, 60 MIPS @
59.8 MHz
khng
ARM9E
ARM920T
ARM922T
8KB/8KB, MMU
ARM940T
4KB/4KB, MPU
ARM946E-S
thay i c,
tightly
coupled
memories, MPU
Nintendo
DS,
Nokia
N-Gage,
Conexant 802.11
chips
ARM966E-S
khng c cache,
TCMs
ST
Micro
STR91xF, includes
Ethernet [1]
ARM968E-S
khng c cache,
TCMs
in thoi di ng:
Sony Ericsson (K,
thay i c, 220 MIPS @
W series),Siemens
TCMs, MMU
200 MHz
and Benq (i x65
v i mi hn)
Clockless
processor
khng
caches,
TCMs, MPU
ARM10E ARM1020E
(VFP)
32KB/32KB,
MMU
ARM1022E
(VFP)
16KB/16KB,
MMU
ARM996HS
ARM1026EJJazelle DBX
S
ARM11
202
GP32,GP2X (li
200 MIPS @ u tin), Tapwave
180 MHz
Zodiac (Motorola i.
MX1)
16KB/16KB,
MMU
ARM1136J
(F)-S
variable, MMU or
MPU
SIMD, Jazelle
variable, MMU
DBX, (VFP)
c,
ARM1176JZ SIMD,
c,
Jazelle thay
Bi ging
Chng 5
Vi x l - Vi iu khin
H
Cortex
XScale
Li
Cache
(I/D)/MMU
MIPS in
hnh @ MHz
ng dng
(F)-S
DBX, (VFP)
MMU+TrustZone
ARM11
MPCore
Cortex-A8
ln n 2000
(2.0
Application
DMIPS/MHz
profile, NEON, variable (L1+L2),
Texas Instruments
in speed from
Jazelle
RCT, MMU+TrustZone
OMAP3
600 MHz to
Thumb-2
greater than 1
GHz)
Cortex-R4
Embedded
profile
Cortex-M3
Luminary Micro[2]
Microcontroller
120 DMIPS
no cache, (MPU)
microcontroller
profile
@ 100MHz
family
c,
variable
cache,
600 DMIPS
MMU optional
Broadcom l mt
hng s dng
80200/IOP310
I/O Processor
/IOP315
80219
IOP321
Iyonix
IOP33x
PXA210
/PXA250
Applications
processor
Zaurus SL-5600
32KB/32KB,
MMU
PXA255
400
BogoMips
@400 MHz
Gumstix
PXA26x
800 MIPS @ HTC
Universal,
624 MHz
Zaurus SL-C1000
PXA27x
PXA800(E)F
1000 MIPS @
1.25 GHz
Monahans
PXA900
IXC1100
Blackberry 8700
Control Plane
Processor
IXP2400
/IXP2800
IXP2850
IXP2325
/IXP2350
IXP42x
NSLU2
IXP460
203
Bi ging
Chng 5
Vi x l - Vi iu khin
H
Li
Cache
(I/D)/MMU
MIPS in
hnh @ MHz
ng dng
/IXP465
Cc lu v thit k
t c mt thit k gn, n gin v nhanh, cc nh thit k ARM xy
dng n theo kiu ni cng khng c vi chng trnh, ging vi b vi x l 8-bit
6502 tng c dng trong cc my vi tnh trc ca hng Acorn.
Cu trc ARM bao gm cc c tnh ca RISC nh sau:
-
204
http://wapedia.mobi/vi/Hp_ng
http://www.emu8086.com/
http://www.daniweb.com/code/
http://www.freewebs.com/maheshwankhede/adcdac.html
http://wapedia.mobi/vi
205
Bi ging
Vi x l - Vi iu khin
Ph lc
M lnh
Ton hng
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDC
SUBB
SUBB
SUBB
SUBB
INC
INC
INC
INC
DEC
DEC
DEC
DEC
INC
MUL
DIV
A, Rn
A,direct
A,@Ri
A,#data
A,Rn
A,direct
A,@Ri
A,#data
A,Rn
A,direct
A,@Ri
A,#data
A
Rn
Direct
@Ri
A
Rn
Direct
@Ri
Dptr
AB
AB
24
DA
M t
S
byte
A = A + Rn
1
A = A + direct
2
A = A + @Ri
1
A = A + #data
2
A = A + Rn + C
1
A = A + direct + C
2
A = A + @Ri + C
1
A = A + #data + C
2
A = A Rn C
1
A = A direct C
2
A = A @Ri C
1
A = A #data C
2
A=A+1
1
Rn = Rn + 1
1
direct = direct + 1
2
@Ri = @Ri + 1
1
A=A1
1
Rn = Rn 1
1
direct = direct 1
2
@Ri = @Ri 1
1
dptr = dptr + 1
1
B:A = A*B
1
A/B = A(thng) + B (d)
1
Hiu chnh thp phn s liu
1
trong thanh ghi A
S
chu
k
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
4
4
1
Lnh logic
STT
1
2
3
4
5
206
C php
M lnh
Ton hng
ANL
A,Rn
A,direct
A,@Ri
A,#data
direct,A
M t
A = (A)and(Rn)
A = (A)and(direct)
A = (A)and(@Ri )
A = (A)and(#data)
direct = (direct)and(A)
S
byte
S
chu
k
1
2
1
2
2
1
1
1
1
1
Bi ging
Vi x l - Vi iu khin
C php
STT
M lnh
Ton hng
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Direct,#data
A,Rn
A,direct
A,@Ri
A,#data
direct,A
Direct,#data
A,Rn
A,direct
A,@Ri
A,#data
direct,A
Direct,#data
A
A
A
A
A
A
A
ORL
XRL
CLR
CPL
RL
RLC
RR
RRC
SWAP
M t
direct = (direct)and(#data)
A = (A)or(Rn)
A = (A)or(direct)
A = (A)or(@Ri )
A = (A)or(#data)
direct = (direct)or(A)
direct = (direct)or(#data)
A = (A)xor(Rn)
A = (A)xor(direct)
A = (A)xor(@Ri )
A = (A)xor(#data)
direct = (direct)xor(A)
direct = (direct)xor(#data)
A=0
A = not(A)
Quay tri A
Quay tri A qua c C
Quay phi A
Quay phi A qua c C
Hon i 2 na ca A
Ph lc
S
S
chu
byte k
3
1
2
1
2
2
3
1
2
1
2
2
3
1
1
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
1
1
S
byte
S
chu
k
1
2
1
2
1
2
2
2
2
2
2
1
1
12
1
1
1
2
2
2
2
1
Cc lnh Bit
STT
1
2
3
4
5
6
7
8
9
10
11
C php
M lnh
CLR
CLR
SETB
SETB
CPL
CPL
ANL
ANL
ORL
ORL
MOV
Ton hng
C
Bit
C
Bit
C
Bit
C,bit
C,/bit
C,bit
C,/bit
C,bit
M t
Xa c C v 0
Xa bit v 0
t c C = 1
t bit = 1
o gi tr ca c C
o gi tr ca bit
C = (C)and(bit)
C = (C)and(o ca bit)
C = (C)or(bit)
C = (C)or(o ca bit)
C = bit
207
Bi ging
Vi x l - Vi iu khin
C php
STT
M lnh
Ton hng
12
MOV
Bit,C
13
JC
<rel>
14
JNC
Bit, <rel>
15
JB
Bit, <rel>
16
JNB
Bit, <rel>
17
JBC
Bit, <rel>
ACALL
<addr11>
LCALL
<addr16>
RET
RETI
AJMP
<addr11>
LJMP
<addr16>
SJMP
<rel>
JMP
@A+DPTR
9
10
JZ
JNZ
<rel>
<rel>
11
CJNE
A,direct,<rel>
12
CJNE
A,#data,<rel>
13
208
Rn,#data,<rel>
Ph lc
M t
Bit = C
nhy n nhn <rel> nu C =
1
nhy n nhn <rel> nu bit=
1
nhy n nhn <rel> nu bit=
1
nhy n nhn <rel> nu bit=
0
nhy n nhn <rel> nu bit =
1 v sau xa lun bit v 0
M t
gi chng trnh con (nm
trong phm vi 2k mem)
gi chng trnh con (trong
pham vi 64k mem)
tr v t chng trnh con
tr v t chng trnh
phc v ngt
nhy n nhn (trong phm
vi 2k mem)
nhy n nhn (trong phm
vi 64 mem)
nhy n nhn
nhy n a ch =
A+DPTR
nhy n nhn nu A = 0
nhy n nhn nu A #0
So snh v nhy n
nhn nu A # direct
So snh v nhy n nhn
nu A#data
So snh v nhy n
S
byte
S
chu
k
S
byte
S
chu
k
2
2
2
2
Bi ging
Vi x l - Vi iu khin
C php
STT
M lnh
Ton hng
14
@Ri,#data,<rel>
15
DJNZ
Rn,<rel>
16
DJNZ
direct,<rel>
17
NOP
M t
nhn nu Rn#data
So snh v nhy n nhn
nu byte c a ch = Ri c
ni dung khc vi data
Gim Rn i 1 v nhy
n nhn nu cha gim v
0
Gim direct i 1 v nhy
n nhn nu cha gim v
0
Khng lm g c
Ph lc
S
S
chu
byte k
209
Bi ging
Vi x l - Vi iu khin
Ph lc
--
ET2
ES
ET1
EX1
ET0
EX0
TR1
TF0
TR0
IE1
IT1
IE0
IT0
C/T1#
M11
M01
GATE0
C/T0#
M10
M00
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2#
CP/RL2#
T2OE
210
RB8
DCEN
TI
PD
RI
IDL
Bi ging
Vi x l - Vi iu khin
Din gii ngha cc thanh ghi:
1. Thanh ghi phc v lp trnh ngt:
Thanh ghi IE: Interrupt Enable: Cho php ngt:
EA
-ET2
ES
Ph lc
ET1
EX1
ET0
EX0
K
hiu
ngha
C trn Timer 1
TF1 c xa bi phn cng khi vi x l nhy n chng trnh con ngt
Lp bi phn cng khi Timer / Counter 1 trn
Bit iu khin chy Timer 1
6
TR1 Xa cm chy timer/counter 1.
Lp chy timer/counter 1.
C trn Timer 0
5
TF0 Xa bng phn cng khi chy chng trnh con ngt
Lp bng phn cng khi thanh ghi timer/counter trn
Bit iu khin chy Timer 0
4
TR0 Xa cm chy timer/counter 0.
Lp chy timer/counter 0.
C cnh ngt 1
3
IE1 Xa bng phn cng khi ngt vi x l, nu t ngt cnh (sn)
Lp bng phn cng khi ngt ngoi c pht hin ti chn INT1
Bit iu khin loi ngt ngoi 1
2
IT1 Xa: Ngt theo mc thp cho ngt ngoi 1 (INT1)
Lp : Ngt theo cnh xung (sn xung) cho ngt ngoi 1 (INT1)
C cnh ngt 0
1
IE0 Xa bng phn cng khi ngt vi x l, nu t ngt cnh (sn)
Lp bng phn cng khi ngt ngoi c pht hin ti chn INT0
Bit iu khin loi ngt ngoi 0
0
IT0 Xa: Ngt theo mc thp cho ngt ngoi 1 (INT0)
Lp : Ngt theo cnh xung (sn xung) cho ngt ngoi 1 (INT0)
Gi tr sau khi reset = 0000 0000b
Mode: ch
Timer : B nh thi, Counter: B m
3. Thanh ghi TMOD: TMOD Register - TMOD (S: 89h)
7
211
Bi ging
Vi x l - Vi iu khin
Ph lc
K hiu
GATE1
C/T1#
M11
M01
M01
GATE0
C/T0#
M10
M00
ngha
Bit iu khin cng Timer 1
Xa cho php timer 1 mi khi bit TR1 lp
Lp cho php timer 1 ch khi chn INT1# mc 1 v bit TR1 c lp
Bit la chn Counter/Timer 1
Xa: Timer 1 hot ng: B nh thi, m tng theo xung nhp h thng
Lp: Counter hot ng: B m, m tng theo sn xung ca chn T1.
Cc bit chn ch cho Timer 1
M11 M01 Ch hot ng
0
Mode 0
Mode 1
16-bit Timer/Counter
Mode 2
Mode 3
Timer 1 dng
212
Bi ging
Vi x l - Vi iu khin
Ph lc
K hiu
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2#
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2#
CP/RL2#
ngha
C trn Timer 2
TF2 khng c lp nu RCLK=1 hoc TCLK=1
Phi xa bng phn mm
Lp bng phn cng khi Timer 2 trn
C ngt ngoi Timer 2
Lp khi c cnh xung ti chn T2EX, nu EXEN2=1
Nu ngt Timer 2 hot ng, mc 1 ti bit ny, chng trnh s gi ngt
Phi xa bng phn mm
Bit clock nhn
Xa s dng c trn Timer 1 lm xung clock nhn cho truyn thng ni tip
trong Mode 1 hoc 3
Lp s dng c trn Timer 2 lm xung clock nhn cho truyn thng ni tip
trong Mode 1 hoc 3
Bit clock truyn
Xa s dng c trn Timer 1 lm xung clock pht cho truyn thng ni tip
trong Mode 1 hoc 3
Lp s dng c trn Timer 2 lm xung clock pht cho truyn thng ni tip
trong Mode 1 hoc 3
Bit cho php ngt ngoi Timer 2
Xa b qua s kin ti chn T2EX cho hot ng Timer 2
Lp s xy ra ngt ngoi ti chn T2EX khi c sn xung, nu Timer 2 khng s
dngcho truyn thng ni tip.
Bit iu khin chy Timer 2
Xa : cm Timer 2 chy
Lp: chy Timer 2
Bit la chn Timer/Counter 2
Xa: Timer (ngun xung h thng: Fosc)
Lp: Counter (u vo t chn T2)
213
Bi ging
Vi x l - Vi iu khin
Ph lc
K hiu
T2OE
DCEN
ngha
D tr
D tr
D tr
D tr
D tr
D tr
Bit cho php xut Timer 2
1
T2OE
Xa lp trnh P1.0/T2 nh u vo clock hoc cng I/O
Lp lp trnh P1.0/T2 nh u ra clock
Bit cho php m li
0
DCEN
Xa: cm Timer 2 m tng/gim
Lp: cho php Timer 2 m tng/gim
Gi tr sau khi reset = xxxx xx00b
K hiu
FE
SM0
SM1
SM2
REN
TB8
214
ngha
FE: Framing Error bit: bit bo truyn thng li. (SMOD0=1)
Xa reset trng thi li, khng c xa bi mt bit STOP ng
Lp bi phn cng khi pht hin li bit STOP khng ng
SMOD0 phi c lp cho php truy cp n bit FE
Ch truyn thng ni tip
SM0
SM1
Mode ngha
Tc Baud
0
0
0
Thanh ghi dch
FCPU PERIPH/6
0
1
1
8-bit UART
C th thay i
1
0
2
9-bit UART
FCPU PERIPH/32 hoc /16
1
1
3
39-bit UART
C th thay i
Bit Mode 2 cng ni tip / Bit cho php truyn thng a vi x l
Xa cm chc nng truyn thng a vi x l
Lp cho php ch truyn thng a vi x l trong Mode 2 v 3, v thm ch
Mode 1. Bit ny phi xa nu dng Mode 0
Bit cho php nhn ( Reception Enable bit)
Xa: cm nhn ni tip
Lp: cho php nhn ni tip
Pht bit 8 / bit th 9 truyn thng trong Mode 2 v 3
Xa: truyn bit logic 0 trong bit th 9
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
Bi ging
Vi x l - Vi iu khin
Ph lc
POF
GF1
GF0
PD
Bit
th
K hiu
ngha
SMOD1
IDL
215
Bi ging
Vi x l - Vi iu khin
Ph lc
PH LC C: Ngt
INT 21h / AH=1 - read character from standard input, with echo, result is stored
in AL.
if there is no character in the keyboard buffer, the function waits until any key is
pressed.
example:
mov ah, 1
int 21h
INT 21h / AH=2 - write character to standard output.
entry: DL = character to write, after execution AL = DL.
example:
mov ah, 2
mov dl, 'a'
int 21h
INT 21h / AH=5 - output character to printer.
entry: DL = character to print, after execution AL = DL.
example:
mov ah, 5
mov dl, 'a'
int 21h
INT 21h / AH=6 - direct console input or output.
parameters for output: DL = 0..254 (ascii code)
parameters for input: DL = 255
for output returns: AL = DL
for input returns: ZF set if no character available and AL = 00h, ZF clear if
character available.
AL = character read; buffer is cleared.
example:
mov ah, 6
mov dl, 'a'
; output character.
int 21h
mov ah, 6
mov dl, 255
int 21h
; get character from keyboard buffer (if any) or set ZF=1.
216
Bi ging
Vi x l - Vi iu khin
Ph lc
INT 21h / AH=7 - character input without echo to AL.
if there is no character in the keyboard buffer, the function waits until any key is
pressed.
example:
mov ah, 7
int 21h
INT 21h / AH=9 - output of a string at DS:DX. String must be terminated
by '$'.
example:
org 100h
mov dx, offset msg
mov ah, 9
int 21h
ret
msg db "hello world $"
INT 21h / AH=0Ah - input of a string to DS:DX.
fist byte is buffer size, second byte is number of chars actually read. this function
does not add '$' in the end of string. to print using INT 21h / AH=9 you must set
dollar character at the end of it and start printing from address DS:DX + 2.
example:
org 100h
mov dx, offset buffer
mov ah, 0ah
int 21h
jmp print
buffer db 10,?, 10 dup(' ')
print:
xor bx, bx
mov bl, buffer[1]
mov buffer[bx+2], '$'
mov dx, offset buffer + 2
mov ah, 9
int 21h
ret
the function does not allow to enter more characters than the specified buffer size.
see also int21.asm in c:\emu8086\examples
217
Danh mc hnh nh
Hnh 1-2. Lch s pht trin ca VXL................................................................................ 11
Hnh 1-3. S khi mt my tnh c in ...................................................................... 15
Hnh 1-4. S khi h vi x l........................................................................................ 16
Hnh 1-5. Khi x l trung tm.......................................................................................... 17
Hnh 1-6.LED 7 thanh v cch m ha .............................................................................. 18
Hnh 1-7. Bng m ASCII.................................................................................................. 20
Hnh 1-8. Bng m ASCII c c k t trong phn m rng .............................................. 21
Hnh 2-1.Tng quan v phn cng b x l....................................................................... 24
Hnh 2-2.S hot ng ca CPU........................................................................................ 25
Hnh 2-3.S khi bn trong 8086.................................................................................. 26
Hnh 2-4. S chn 8086/8088........................................................................................ 31
Hnh 2-5. Emu8086 - Mi trng son tho ...................................................................... 56
Hnh 2-6. Emu8086 - Gi tr cc c v mn hnh hin th ................................................. 56
Hnh 2-7. Emu8086 - Mn hnh Debug chng trnh........................................................ 57
Hnh 2-8. Giao tip bus c bn........................................................................................... 81
Hnh 2-9. Quan h gia gii m a ch v b nh ............................................................ 81
Hnh 2-10. Mc ni tng nhiu 74LS138.......................................................................... 82
Hnh 2-11. Ghp ni VXL vi b nh ............................................................................... 82
Hnh 2-12. nh thi ghi b nh ....................................................................................... 83
Hnh 2-13. nh thi c b nh ....................................................................................... 83
Hnh 2-14. Gii m cho cc cng....................................................................................... 84
Hnh 2-15. Vi mch 74LS245 ............................................................................................ 85
Hnh 2-16. Vi mch cht 74LS373 .................................................................................... 85
Hnh 3-1. Cu trc chung h VK .................................................................................... 92
Hnh 3-2 Giao tip b nh.................................................................................................. 93
Hnh 3-3. Vo ra vi thit b ngoi vi ................................................................................ 95
Hnh 3-4 ghp ni b dao ng.......................................................................................... 95
Hnh 3-5. B nh thi/m ............................................................................................... 96
Hnh 3-6. Truyn nhn ni tip .......................................................................................... 96
Hnh 3-7.Kin trc vi iu khin 8051............................................................................... 97
Hnh 3-8. S chn VK AT89C51 ............................................................................... 99
Hnh 3-9. Cng vo/ra...................................................................................................... 100
Hnh 3-10. Xut mc 0..................................................................................................... 101
Hnh 3-11. Tr treo ni ti chn....................................................................................... 101
Hnh 3-12. xut mc 1...................................................................................................... 101
Hnh 3-13 S kt ni thch anh ............................................................................... 104
Hnh 3-14. Cc vng nh trong AT89C51 ..................................................................... 104
Hnh 3-15. Thc thi b nh chng trnh ngoi ............................................................. 108
Hnh 3-16 - Ghp ni RS232 vi 8051 ............................................................................. 113
Hnh 3-17. Cc thanh ghi ca b Timer 0 ......................................................................... 126
Hnh 3-18. Cc thanh ghi ca b Timer 1 ......................................................................... 127
Hnh 3-19. Timer TMOD .................................................................................................. 127
Hnh 3-20. Timer 0 Mode 0 ........................................................................................... 130
Hnh 3-21. Timer 0 Mode 1 ........................................................................................... 130
Hnh 3-22. Timer 0 Mode 2 ........................................................................................... 130
Hnh 3-23. Timer 0 Mode 3 ........................................................................................... 131
Hnh 3-24. Truyn thng................................................................................................... 133
Hnh 3-25. Ghp ni RS232 vi 8051.............................................................................. 135
Hnh 3-26. Truyn thng ni tip Mode 0 ..................................................................... 136
Hnh 3-27. Gin thi gian truyn ni tip Mode 0................................................... 137
218
Hnh 3-28. Gin thi gian nhn ni tip Mode 0....................................................... 137
Hnh 3-29. Truyn nhn ni tip Mode 1 ...................................................................... 137
Hnh 3-30. Gin thi gian truyn ni tip Mode 1 .................................................... 137
Hnh 3-31. Gin thi gian nhn ni tip Mode 1....................................................... 138
Hnh 3-32. Gin thi gian truyn ni tip Mode 2 .................................................... 138
Hnh 3-33. Gin thi gian nhn ni tip Mode 2....................................................... 138
Hnh 3-34. Cc tn hiu iu khin ngt............................................................................ 142
Hnh 3-35. Bng vector ngt v v d............................................................................... 143
Hnh 4-1. Mch nhp nhy LED n ............................................................................... 152
Hnh 4-2. Mch nhp nhy LED n trong m phng..................................................... 152
Hnh 4-3. Thut ton: Nhp nhy P1................................................................................ 154
Hnh 4-4. Thut ton: Nhp nhy P1-Macro .................................................................... 154
Hnh 4-5. Thut ton: Nhp nhy P1.0.............................................................................. 155
Hnh 4-6. Thut ton: TIMER0 ......................................................................................... 155
Hnh 4-7. Thut ton: Ngt Timer 0 v Timer1 ................................................................ 156
Hnh 4-8. S dng Timer 2............................................................................................... 157
Hnh 4-9. Lp trnh 2 ngt ngoi ...................................................................................... 158
Hnh 4-10. Lp trnh ngt ngoi bt loa ........................................................................ 159
Hnh 4-11. Hin th LED 7 thanh ..................................................................................... 160
Hnh 4-12.S chn LED 7 thanh ................................................................................. 162
Hnh 4-13. S hin th LCD thc ................................................................................ 164
Hnh 4-14. S hin th LCD m phng ....................................................................... 164
Hnh 4-15. Ghp ni VK vi my tnh .......................................................................... 169
Hnh 4-16. Nhn d liu ni tip m phng.................................................................. 170
Hnh 4-17. Truyn d liu ni tip m phng............................................................... 171
Hnh 4-18. S chn ADC0804 .................................................................................... 175
Hnh 4-19. Gin thi gian c ADC............................................................................ 175
Hnh 4-20. Mch nguyn l m phng chuyn i ADC0804......................................... 176
Hnh 4-21.Cch ghp ni bn phm trong m phng- phm n ghp li........................ 177
Hnh 4-22.Cch ghp ni bn phm trong m phng dng module bn phm .............. 177
Hnh 4-23. Cu to ng c bc..................................................................................... 179
Hnh 4-24. S khi tng th ton b h thng............................................................. 184
Hnh 4-25. S tng tc h thng cnh bo p sut .................................................... 185
Hnh 4-26.......................................................................................................................... 186
Hnh 4-27.......................................................................................................................... 186
Hnh 4-28. Mch cm bin ............................................................................................... 186
Hnh 4-29. Khuch i v lc nhiu ................................................................................. 186
Hnh 4-30. Bn phm ........................................................................................................ 186
Hnh 4-31.......................................................................................................................... 187
Hnh 4-32.......................................................................................................................... 187
Hnh 4-33. Hin th LCD.................................................................................................. 187
Hnh 4-34. Bn phm ........................................................................................................ 187
Hnh 4-35. Khi iu khin trung tm.............................................................................. 188
Hnh 4-36. S Callgraph.............................................................................................. 188
Hnh 5-1 - Atmel AVR ATmega8 PDIP .......................................................................... 192
Hnh 5-2 Cc dng PIC ................................................................................................. 197
219
Danh mc m ngun
M ngun 4-1. Delay......................................................................................................... 153
M ngun 4-2. DelayX...................................................................................................... 153
M ngun 4-3. Nhp nhy cng P1................................................................................... 154
M ngun 4-4. Nhp nhy cng P1v o trng thi P2.0............................................... 154
M ngun 4-5. Nhp nhy P1.0........................................................................................ 155
M ngun 4-6. Timer0 to xung PWM ............................................................................ 155
M ngun 4-7. Timer0 v Timer1 to xung PWM dng ngt.......................................... 156
M ngun 4-8. S dng Timer 2 ...................................................................................... 158
M ngun 4-9. Lp trnh 2 ngt ngoi.............................................................................. 159
M ngun 4-10. Lp trnh ngt ngoi bt loa................................................................ 160
M ngun 4-11. Hin th LED 7 thanh -1 ........................................................................ 161
M ngun 4-12. Hin th LED 7 thanh - 2 ...................................................................... 163
M ngun 4-13. Hin th trn nhiu LED 7 thanh ........................................................... 163
M ngun 4-14. Hin th LCD ......................................................................................... 169
M ngun 4-15. Nhn d liu ni tip ............................................................................. 170
M ngun 4-16. Truyn d liu ni tip .......................................................................... 171
M ngun 4-17. Cc CTC Truyn-Nhn d liu ni tip ................................................ 172
M ngun 4-18. CTC truyn thng ni tip bng phn mm .......................................... 175
M ngun 4-19. Chuyn i ADC (VK-ADC0804) ..................................................... 176
M ngun 4-20. c ma trn phm .................................................................................. 179
M ngun 4-21. iu khin ng c bc....................................................................... 180
M ngun 4-22. Chng trnh o nhit ....................................................................... 183
M ngun 4-23. Lp trnh cho VK tin tin .................................................................. 189
Danh mc bng
Bng 1-1. Gi tr tng ng gia cc h s ........................................................................ 19
Bng 2-1. Cc thanh ghi...................................................................................................... 28
Bng 2-2.Phi hp MOD v R/M to ra cc ch a ch........................................... 33
Bng 2-3. Cc ch a ch............................................................................................... 36
Bng 2-4. Bn b nh, a ch ngt ca 8086 ................................................................ 60
Bng 3-1. Chc nng cc chn ca Port 3 ........................................................................ 103
Bng 3-2. Cc thanh ghi chc nng c bit..................................................................... 105
Bng 3-3. a ch RAM ni 8051 ..................................................................................... 106
Bng 3-4. k hiu s dng m t lnh............................................................................... 117
Bng 3-5. Cc lnh vn chuyn d liu ............................................................................ 120
Bng 3-6. Cc lnh thao tc bit v c cng.................................................................... 120
Bng 3-7. Lnh c cng .................................................................................................. 121
Bng 3-8. c cht trong ca cng ra.............................................................................. 121
Bng 3-9. Nhy v iu kin............................................................................................. 122
Bng 3-10. Cc ton t...................................................................................................... 124
Bng 3-11. Ch hot ng ca Timer/Counter ............................................................ 127
Bng 3-12. Mt s gi tr thng dng trong truyn thng ni tip ................................. 139
220
Ch mc
74LS245 ............................................... 85
74LS373 ............................................... 85
ACALL............................................... 123
Accumulator ....................................... 109
ADC...................................................... 39
ADD ..................................................... 40
ALU ...................................................... 24
AND ..................................................... 42
ASCII.................................................... 21
AT89C51 .............................................. 99
BCD ...................................................... 18
bin ....................................................... 63
BIU ....................................................... 25
B m................................................ 113
b nh thi......................................... 113
bus......................................................... 17
Bus a ch ............................................ 17
Bus iu khin ...................................... 17
Bus d liu............................................ 17
Cc bc khi lp trnh .......................... 55
Cc h m ........................................... 18
CALL............................................ 52, 122
Cu trc ................................................ 24
cu trc iu khin................................ 69
ch a ch.................................. 31, 34
CH A CH CHUI.................. 36
CH A CH CNG ................... 37
CH A CH GIN TIP ........... 35
CH A CH THANH GHI ........ 34
CH A CH TRC TIP .......... 35
CH A CH TC TH .............. 34
CH A CH TNG I ........ 35
Chng trnh con.................................. 65
CMP...................................................... 46
c .......................................................... 29
Cng vo/ra ........................................ 100
CPU ................................................ 16, 94
CU......................................................... 24
DB....................................................... 123
DEC ...................................................... 40
Delay................................................... 153
a ch ch s ...................................... 115
a ch gin tip.................................. 115
a ch theo thanh ghi......................... 114
a ch trc tip .................................. 115
a ch tc thi ................................... 114
a ch vt l ........................................ 29
DIV ....................................................... 40
DPTR .................................................. 111
EEPROM .............................................. 93
B mn K thut my tnh Khoa in t
Trng H K thut Cng nghip
EQU.................................................... 124
EU................................................... 25, 26
FOR ...................................................... 70
Gii m a ch ..................................... 84
Gray Code ............................................ 19
hng ...................................................... 63
Hp ng................................................ 54
I/O Ports ............................................... 94
IF THEN............................................ 69
IN .......................................................... 38
INC ....................................................... 40
INT ....................................................... 53
IRET ..................................................... 53
JA/JNBE............................................... 47
JAE/JNB/JNC....................................... 47
JB/JC/JNAE ......................................... 48
JBE/JNA............................................... 48
JE/JZ..................................................... 49
JMP....................................................... 49
JNE/JNZ ............................................... 50
Khi x l trung tm ...................... 16, 17
Khung chng trnh ............................. 62
kin trc ca mt vi x l..................... 15
Kin trc vi iu khin 8051 ................ 97
LCALL ............................................... 123
Lnh b................................................. 67
LJMP .................................................. 122
LOOP ................................................... 51
LOOPE/LOOPZ ................................... 51
Macro ................................................... 67
my mc dn dng ............................... 14
my tnh c in ................................... 15
MODEL................................................ 58
Mt s hm mu ................................. 153
MOV..................................................... 38
MUL ..................................................... 41
NEG...................................................... 41
Ngt ...................................................... 72
Ngt 8051 ........................................... 114
Nh thng minh .................................... 14
NOP ...................................................... 53
NOT...................................................... 42
OR ........................................................ 42
OUT...................................................... 38
PC:Program Counter ............................ 94
PCON ................................................. 112
phn cng b x l ............................... 24
POP....................................................... 39
PROC ................................................... 65
PSW.................................................... 110
221
PUSH.................................................... 39
qung co.............................................. 14
RAM..................................................... 93
RCL ...................................................... 43
RCR...................................................... 43
Registers ............................................... 24
REPEAT............................................... 71
RET ...................................................... 54
ROL...................................................... 44
ROM..................................................... 92
ROR...................................................... 44
rs232 ................................................... 113
SAL ...................................................... 45
sn phm cng nghip .......................... 14
sn phm gii tr ................................... 14
SBUF.................................................. 111
SFR............................................... 94, 109
SHL ...................................................... 45
SHR ...................................................... 45
SJMP .................................................. 122
S chn 8086/8088.......................... 31
S khi h vi x l .......................... 16
222
STACK................................................. 60
STC ...................................................... 54
SUB...................................................... 41
Tp lnh Assembly............................... 37
Tn ..................................................... 124
thanh ghi............................................... 27
thanh ghi ch s .................................... 28
thanh ghi on...................................... 28
thit b t ng ..................................... 13
thit b y t............................................ 14
Timer Mode........................................ 129
Timer Register.................................... 111
TMOD................................................ 127
T chc b nh 8051 ......................... 104
Ton t ................................................. 64
t kha................................................ 125
UART................................................. 113
ng dng ca vi iu khin .................. 13
ng dng ca vi iu khin ................. 91
WHILE................................................. 70
XOR ..................................................... 46