THE SPARC ARCHITECTURE

SESSION

2010-2014

Report Advisor Dr.Muhammad Nadeem

SUBMMITED BY Zeeshan Zaffar

THE SPARC ARCHITECTURE

Zeeshan Zaffar Electrical Engineering Department Comsats Instritute Of Engineering and Technology Lahore,Pakistan Zee_shi@yahoo.com

Abstract: SPARC (from Scalable Processor Architecture)

Is a RISC instruction set architecture (ISA) developed by Sun Microsystems and introduced in mid-1987. SPARC is a registered trademark of SPARC International, Inc., an organization established in 1989 to promote the SPARC architecture manage SPARC trademarks, and provide conformance testing. Implementations of the original 32-bit SPARC architecture were initiall designed and used in Sun's Sun-4 workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola of processors. Later, SPARC processors were used in SMP and CC-NUMA servers produced by Sun Microsystems, Solbourne and Fujitsu, among others, and designed for 64-bit operation.SPARC International was intended to open the SPARC architecture to make a larger ecosystem for the design, which has been licensed to several manufacturers, including Texas Instruments, Atmel, Cypress Semiconductor, and Fujitsu. As a result of SPARC International, the SPARC architecture is fully open and non-proprietary

(I)

Introduction:

SPARC is a CPU instruction set architecture (ISA), derived from a reduced instruction set computer (RISC) lineage. As an architecture, SPARC allows for a spectrum of chip and system implementations at a variety of price/performance points for a range of applications, including scientific/engineering, programming, real-time, and commercial.