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Assignment 5
Assignment 5
Assignment # 05
Due date: Mon 03 Dec 2012
Name:
Sec. 61
ID No.
W ork assignm ent on this paper and subm it at Q2 . Attach extra sheet if necessary. 1. Given the CMOS Transmission Gate circuit below, assume that Vth << 5V for both CMOS, fill up the table for the following three conditions. 1(a) what is the output voltage = 0V(Lo) or 5V(Hi) or High Impedance? if the control 1(b) 1(c) 1(d) terminal C is 5V(Hi) and Vin = 0V what is the output voltage = 0V(Lo) or 5V(Hi) or High Impedance? if the control terminal C is 5V(Hi), and Vin = 5V what is the output voltage = 0V(Lo) or 5V(Hi) or High Impedance? if the control terminal C is 0V(Lo), and Vin = X (5V or 0V) what is the type of the Transmission Gate (TG) active High or Active Low? Why?
C=G(Qn) C=G(Qp) 1(a) 1(b) 1(c) Hi (5V) Lo (0V) Lo (0V) Hi (5V) Input=S Lo (0V) Hi (5V) X VGS(Qn) Qn VGS(Qp) Qp
Output
Hi (5V)
Lo (0V)
2.
CMOS circuit below is using positive logic. In the following table, (a) fill voltages VGSp and VGSn, and fill Qp and Qn with ON/OFF and determine the output voltage Vo if (a) Vin = 0V (logic high) (b) Vin = -10V (logic low) and (c) what is the digital logic it perform according to the table?
GS p
Qp Vo Qn -10
VGSp
Qp
VGSn
Qn
Vo
Vin
VG
Sn