EEE 52 Pre-Lab 8: Multi-Stage Ampliers

Name:
Section: Student Number:
V
CC
V
BIAS1
v
IN
v
OUT
R
S
V
BIAS2
O
1
O
2
I
BIAS
Figure 1: Cascode amplier with V
CC
= 5V
1. The cascode amplier in Figure 1 is biased by an ideal current source. Let R
S
= 51, I
S
= 1 10
15
A, V
A
= 100V,
= 200, I
BIAS
= 1mA, T = 300K, v
OUT,DC
= 3.5V, and V
BIAS2
= 2V. Calculate V
BIAS1
to match these biasing
conditions.
V
BIAS1
=
1
2. What is the gain of this amplier?
A
v
=
3. Construct a SPICE netlist for the multi-stage amplier shown in Figure 2. Let R
C
= 10k, R
S
= 51k, and R
REF
=
200. Bias transistor Q
1
with V
BE1
= 560mV. What is the small signal gain (A
v1
) between v
IN
and v
OUT1
? What
is the small signal gain (A
v2
) between v
OUT1
and v
OUT2
? Using A
v1
and A
v2
, nd the overall gain (A
v,total
) between
v
IN
and v
OUT2
. Attach your SPICE netlist.
V
CC
V
BIAS
v
IN
v
OUT2
R
S
O
1
O
2
v
OUT1
O
3
O
4
R
C
R
REF
I
BIAS1
I
BIAS2
Figure 2: Cascode amplier with V
CC
= 5V
A
v1
= A
v2
=
A
v,total
=
2