Step 1: DC characteristics of NMOS transistors

Fig: Schematic Drawn on S-Edit V-14.1

Fig: Commands applied using T-Spice V-14.1

Fig: Waveform on W-Edit V-14.1

Step 2: DC characteristics of PMOS transistors

Fig: Schematic Drawn on S-Edit V-14.1

Fig: Commands applied using T-Spice V-14.1

Fig: Waveform on W-Edit V-14.1

Step 3: DC characteristics of Inverter by first creating an instance using NMOS and PMOS transistors

Fig: Schematic Drawn on S-Edit V-14.1

Fig: Schematic Drawn on S-Edit V-14.1

Fig: Commands applied using T-Spice V-14.1

Fig: Waveform on W-Edit V-14.1

Step 4: Static power Vs input voltage Characteristic for Forced stack Technique using two transistor in place of single transistor respectively.
Technology 500nm, M=2 for PMOS, and M=1 for NMOS

Step 4: Static power Vs input voltage Characteristic for Forced stack Technique using two transistor in place of single transistor respectively.
Technology 500nm, M=2 for PMOS, and M=1 for NMOS

********************************************************************************
* SPICE netlist generated by HiPer Verify's NetList Extractor
*
* Extract Date/Time:

Wed Mar 27 11:04:36 2013

* L-Edit Version:

L-Edit Win32 14.11.20090811.09:15:20

*
* Rule Set Name:
* TDB File Name:

D:\Tanner_files\minimumsizenmos.tdb

* Command File:
C:\Users\gHost\Documents\Tanner EDA\Tanner Tools v14.1\L-Edit and
LVS\Tech\Generic0_25um\Generic_025.ext
* Cell Name:

Cell0

* Write Flat:

NO

********************************************************************************

.INCLUDE SpecialDevices.md
****************************************

M1 1 2 3 4 NMOS l=2.4e-007 w=6e-007 ad=3.96e-013 as=3.96e-013 pd=2.52e-006 ps=2.52e-006 $ (29.76 25.02 30 25.62)

M1 1 2 gnd gnd NMOS l=2.4e-007 w=6e-007 ad=3.96e-013 as=3.96e-013 pd=2.52e-006 ps=2.52e-006 $ (29.76 25.02 30 25.62)
v1 1 GND 3.3
v2 2 GND 3.3
.lib "D:\Tanner_files\Generic_025.lib" tt
.dc source v1 lin 100 0 3.3 sweep source v2 lin 5 0 3.3
.print dc id(m1) p(v1) p(v2)

Results
Idn = 594 mA
For inverter where PMOS has M=1
****************************************
M2 1 2 vdd vdd PMOS l=2.4e-007 w=6e-007 ad=3.96e-013 as=3.96e-013 pd=2.52e-006 ps=2.52e-006 $ (29.76 25.02 30 25.62)
M1 1 2 gnd gnd NMOS l=2.4e-007 w=6e-007 ad=3.96e-013 as=3.96e-013 pd=2.52e-006 ps=2.52e-006 $ (29.76 25.02 30 25.62)
v1 vdd GND 3.3
v2 2 gnd PULSE (0 3.3 0 1n 1n 3n 8n)

.lib "D:\Tanner_files\Generic_025.lib" tt

.tran .01n 18n

.print tran v(1,gnd) v(2,gnd) p(v1)

Results Pdmax= 456.36uW