The Hashemite University Electrical Engineering Department Dr.

Anas Al Tarabsheh Digital Electronics Date: 17/11/2009 First Exam First Semester 2009/2010 Exam Duration: 1 hour Q1) The transistors shown in Figure 1 have the following parameters:
F,1= F,2 =49, VBE,1(F.A)=VBE,2(F.A)=0.7V, VBE,1(sat)=VBE,2(sat)= 0.8V,VCE,1(sat)=VCE,2(sat)= 0.2V.

A) On the same paper, fill up the following table with the possibility of occurrence of the states indicated in the table. (if the state can not occur then write 2, but if the state can occur then write 3 )
Q1 Off Off Off Sat. F.A. Sat. Sat. F.A. F.A. Q2 Possibility of occurrence Off F.A. Sat. Off Off F.A. Sat. Sat. F.A.

B) Plot the voltage transfer function ( Vo versus Vi) , showing the values of VOH , VOL VIH and VIL. C) What are the minimum values of VCE,1 and VCE,2? D) How many similar gates can this gate drive (fan-out)? Q2 ) The transistors, in the RTL circuit shown in Figure 2, have the following parameters:
F =25, VBE(F.A)=0.7V,VBE(sat)=0.8V,VCE (sat)=0.2V.

The driver gate drives N identical gates. A) Calculate the minimum values of R1 such that Qp operates in the saturation for: 1. N=0 2. N=1 B) If R1=500 , determine the average dissipated-power Pavg in the driver gate (assume Qp operate in the saturation) for : 1. N=10 2. N=40
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Q2 ) The transistors, in the TTL circuit shown in Figure 3, have the following parameters:
F =25, R =0.1, OL=0.85, VBE(F.A)=0.7V,VBE(sat)=0.8V,VCE (sat)=0.2V.

The driver gate drives N identical gates. A) Calculate the maximum fan-out of the driver gate given that the average dissipated-power Pavg in the driver gate is 30mW

Good Luck