ECE205L Week 10 Final Exam

Prof. Twiss Wed, 5/30/12, 6-9pm

Pattern Detection
Design a circuit that take in a serial stream.
Must be implement using a finite state machine and NOT the fast way I showed you before, using a state diagram. Detect 5b11001. Use a switch as the input for the serial stream Connect up the given 1 Hz Clock module shown on the following slide

Circuit Block
Switch SerIn PatDet Pushbutton
50 MHz Clock

Rst
1 Hz Clock

Detect 5b11001

LED

50 MHz Clock

One-second clock module

Module in Distribution Folder

C9 or your clock pin

You do not need a de-bouncer for the rest and data because they will be stable when the clocks positive edge comes every second using the 1 Hz module

RULES
No Other Project Open
I will give you the 1 second clock module NO INTERNET USAGE
ONLY ITEMS OPEN:
XILINX ISE PDF OF FPGA BOARD USER GUIDE

WORK ON YOUR OWN NO COPYING OTHERS IF I CATCH YOUAUTO-F

You can reference your FPGA board user guide for:

User Constraints syntax Pin assignments

WRITE CODE SIMULATE DEMO ON BOARD