Mch m thi gian

Xt mch m phng mch m c bn dng IC m 7490 nh sau:

S chn NE555:

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S mch to xung:

1. Phn to xung clock: C th dng Tranistor hoc IC nhng thng thng ta dng mch to xung s dng IC NE555.

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2. IC m: Dng IC 74LS90 S chn IC 7490:

S cng logic:

* Ch : + Chn CP0: Chn kch xung clock.

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+MR1, MR2: chn reset. + Cc chn Q0,Q1,Q2, Q3: Cc ng ra ca IC m a vo Input ca IC gii m. y l mch m c bn m t 0 n 9. Ta c th thit k m n 1 s N bt k bng cch ni ng ra Q3( bit cao) ca tng th n n chn CP0 ca tng th (n+1) 3. IC gii m: Dng IC 74LS48:

T s c bn ny ta thit k mch ng h s. S m phng ca mch ng h s :

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Cc u vo t A0 n A3 tng ng vi cc s BCD c chn. LED s hin th cc s ny theo bng sau:

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Mch ny khng m t 00:00:00 n 99:99:99 m s m n 23:59:59. V y l mch ng h nn xung clock a vo phi c chu k 1giy( tn s 1Hz). i vi IC iu khin vic m giy, ngay lc LED hin th chuyn t trng thi 59 giy sang 60 giy , ta dng IC 7408 (Cng AND u tin t trn xung) Reset IC 7490 th nht. Lc ny chn Reset s cng trng thi vi u ra ca

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cng AND th nht ( mc 1) , u ra ny cn c ni vi chn xung clock CP0 ca IC m pht. Mt xung clock c kch v IC m pht m ln 1 n v. Tng t nh th i vi IC m pht . Ring i vi IC m gi, trng thi n lm cho LED hin th 24 cng chnh l lc n Reset. S nh phn tng ng ca 2 l Q3Q2Q1Q0=0010 v ca 4 l Q3Q2Q1Q0=0100. V vy u ra ti Q1 ca IC m gi ( m hng chc) v Q2 ca IC m gi ( m hng n v) c a vo 7408( cng AND th 3 t trn xung) . u ra t cng AND ny s c a vo chn Reset ca 2 IC m gi. V vy trng thi tip theo s l 00:00:00. Read more: http://www.ant7.com/forum/forum_post.asp?TID=881#ixzz0vMPBo2qL

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