ECE 14:332:460 Spring 2013 Exam II 3/28/2013 Take Home Exam Due Date: 4/4/2013 at 5:00 PM

(Total points = 100)

Prof. Hanafi
This is a take home exam. You are welcome to use any notes and/or books. However, you are not permitted to have the assistance of any other person on the exam. If you have any questions regarding interpretation of the questions, you should email your question to hhanafi@rci.rutgers.edu Your exam papers are due back in class on Thursday 04/04/2013 at 5:00 PM. In completing these questions, feel free to make reasonable assumptions, but be sure to state them clearly and check them when possible. In the PSpice Simulations of problem 1 below: i. Set the minimum step size to 100ns so that you get at least 100 data points in one cycle. ii. Use the following PSPICE models for the MOSFET MbreakN (IRF540) and the diode Dbreak (FFPF15UP20S) respectively:
.model MbreakN NMOS (Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0.2 Vmax=0 Xj=0 + Tox=100n Uo=600 Phi=.6 Rs=21.34m Kp=20.71u W=.94 L=2u Vto=3.136 Rd=22.52m + Rds=444.4K Cbd=2.408n Pb=.8 Mj=.5 Fc=.5 Cgso=1.153n Cgdo=445.7p Rg=5.557 Is=2.859p + N=1 TT=142n) .model Dbreak D (IS=50n RS=81.3m BV=200 IBV=5.00u CJO=27.7p M=0.33 N=2.48 TT=45n)

iii. Always show your results in steady state (simulate as many cycles as needed to reach steadystate). Also show your results clearly

(60 points)

2. (40 points) A converter circuit is shown in the figure below. Both two MOSFETs (M1 and M2) are ON during D*T and OFF during (1-D)*T, where T is the period and D is the duty cycle. All components are considered ideal. You may assume L and C are large enough (except for part e) where you need to find out the critical inductance). a) Sketch the equivalent circuits during D*T and (1-D)*T respectively. (8 points) b) Sketch the waveform of the voltage across L for two cycles. (6 points) c) Derive Vout/Vin. (11 points) d) What is the efficiency of this circuit? (4 points) e) Derive the critical inductance Lcrit, in terms of D, R and T. (11 points)