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CIRCUITE ELECTRONICE DIGITALE

CURS

Editura UNIVERSITARIA 2002

Cuprins
Cap. 1. ElHPHQWH GH DOJHEU
ERROHHDQ

. 1

2 1.2. Axiomele algebrei Boole . 6 1.3. Regulile de calcul ale algebrei Boole .. 6 1.4. ([SULPDUHD DOJHEULF D IXQF LLORU ERROHene . 8 1.4.1 Forme canonice 8  )RUPD FDQRQLF GLVMXQFWLY 8  )RUPD FDQRQLF FRQMXQFWLY  9  )RUPD HOHPHQWDU 9 1.4.3. Forma neelementDU 10  5HSUH]HQWDUHD IXQF LLORU ERROHHQH FX DMXWRUXO GLDJUDPHORU 9.  11  0LQLPL]DUHD IXQF LLORU ORJLFH  14 1.6.1. Minimizarea cu ajutorul diagramelor VK ....................................................... 14  0LQLPL]DUHD SULQ PHWRGD DQDOLWLF  19  0LQLPL]DUHD IXQF LLORU LQFRPSOHW GHIinite ...................................................... 20 1.6.4. Concluzii ......................................................................................................... 20
&DS  5HJLPXO GH FRPXWD LH DO GLVSR]LWLYHORU VHPLFRQGXFWRDUH

 )XQF LL ORJLFH HOHPHQWDUH 

....................................... 22 22  5HJLPXO GH FRPXWD LH DO WUDQ]LVWRUXOXL ELSRODU . 23 2.3. 5HJLPXO GH FRPXWD LH DO WUDQ]LVWRUXOXL XQLSRODU  29  &RPSDUD LH vQWUH WUDQ]LVWRUXO XQLSRODU L FHO ELSRODU  32  5HSUH]HQWDUHD HOHFWULF a variabilelor booleene ....................................................... 33
 5HJLPXO GH FRPXWD LH DO GLRGHL VHPLFRQGXFWRDUH 

Cap. 3. Circuite logice elementare 34 3.1. Circuite logice elementare cu componente discrete ................................................. 34 3.1.1. Circuite logice elementare cu componente pasive .......................................... 34  &LUFXLWXO ORJLF , $1' SDVLY  34 3.1.1.2. Circuitul logic SAU (OR) pasiv . 35 3.1.2. Circuite logice elementare cu componente active ... 36 3.1.2.1. Circuitul logic NU (NOT) .. 37 3.1.2.2. &LUFXLWXO ORJLF ,-NU (NAND) ............................................................. 37 3.1.2.3. Circuitul logic SAU-NU (NOR) ............................................................ 38 3.2. Circuite logice elementare integrate ......................................................................... 38  &LUFXLWH ORJLFH LQWHJUDWH UHDOL]DWH vQ WHKQRORJLH ELSRODU  39 3.2.1.1. Circuite logice RTL ............................................................................... 39 3.2.1.2. Circuite logice DTL ............................................................................... 40 3.2.1.3. Familia TTL standard .............................................................................40 3.2.1.3.1. Poarta NAND TTL 40 3.2.1.3.2. Inversorul TTL . 42 3.2.1.3.3. Poarta NOR TTL ... 47 3.2.1.3.4. Caracteristicile statice ale familiei TTL standard .... 48 3.2.1.3.5. Parametrii familiei TTL standard . 51  6XEIDPLOLD 77/ UDSLG +77/  55
 &UHWHUHD YLWH]HL GH OXFUX SULQ FUHWHUHD SXWHULL GLVLSDWH SH SRDUW 

55

 &UHWHUHD YLWH]HL GH OXFUX

prin introducerea montajului Darlington ................................... 55

 &UHWHUHD YLWH]HL GH OXFUX SULQ LQWURGXFHUHD UH]LVWHQ HL QHOLQLDUH 57 3.2.1.5. Subfamilia TTL Schottky ...59 3.2.1.6. Circuite logice cu colectorul n gol 59  &LUFXLWH ORJLFH FX  VW UL 64  )DPLOLD ORJLF (&/ 66 3.2.1.9. Circuite logice I2L .. 71  &LUFXLWH ORJLFH LQWHJUDWH UHDOL]DWH vQ WHKQRORJLH XQLSRODU  73  )DPLOLD ORJLF 1026 VWDWLF  74 3.2.2.1.1. Inversorul NMOS static 74 3.2.2.1.2. NAND-ul NMOS static 76 3.2.2.1.3. NOR-ul NMOS static 77 3.2.2.2. Poarta de transfer NMOS ... 78  )DPLOLD ORJLF 1026 GLQDPLF 79 3.2.2.3.1. Inversorul NMOS dinamic ... 79 3.2.2.3.2. NAND-ul NMOS dinamic 80 3.2.2.3.3. NOR-ul NMOS dinamic ... 80  )DPLOLD ORJLF &026 81 3.2.2.4.1. Inversorul CMOS . 81 3.2.2.4.2. NAND-ul CMOS .. 84 3.2.2.4.3. NOR-ul CMOS . 85 3.2.2.4.4. Poarta de transfer CMOS . 86

&DS  &LUFXLWH ORJLFH FRPELQD LRQDOH

. 90 91  $QDOL]D FLUFXLWHORU ORJLFH FRPELQD LRQDOH  91  6LQWH]D FLUFXLWHORU ORJLFH FRPELQD LRQDOH  92 4.2. Detectorul de paritate ... 94  'HWHFWRUXO GH SDULWDWH LPSDU FX  YDULDELOH GH intrare ... 95 4.2.2. Detectorul de paritate comandat . 96 4.3. Multiplexoare ... 98  &LUFXLWXO GH PXOWLSOH[DUH FX  LQWU UL  99 4.4. Demultiplexoare ... 100  &LUFXLWXO GH GHPXOWLSOH[DUH FX  LHLUL  100 4.5. Comparatoare numerice 101 4.5.1. Comparatorul numeric de 1 bit 102  &RPSDUDWRUXO QXPHULF GH  EL L 103  &RPSDUDWRUXO QXPHULF GH  EL L 105 4.6. Sumatoare . 105 4.6.1. Semisumatorul . 106 4.6.2. Sumatorul complet de 1 bit . 106  6XPDWRUXO FRPSOHW GH  EL L 108 4.7. Convertoare de cod ... 109 4.7.1. Convertorul de cod binar natural Gray . 109 4.7.2. Convertorul de cod Gray binar natural . 111 4.8. Codificatoare .113  &RGLILFDWRUXO GH DGUHV VLPSOX 113 4.9. Decodificatoare . 115
 $QDOL]D L VLQWH]D FLUFXLWHORU ORJLFH FRPELQD LRQDOH

 115 4.9.2. Decodificatorul BCD zecimal .. 116 4.9.3. Decodificatorul BCD - 7 segmente . 117 4.9.3.1. Decodificatorul BCD - 7 segmente cu componente discrete . 118 4.9.3.2. Decodificatorul BCD -  VHJPHQWH vQ YDULDQW LQWHJUDW  122 4.10. Memorii ROM 123 4.10.1. Memorii ROM bipolare . 125  0HPRULL 520 ELSRODUH SURJUDPDELOH OD SURGXF WRU  125 4.10.1.2. Memorii ROM bipolare programabile la utilizator .. 126 4.10.2. Memorii ROM unipolare ... 127  0HPRULL 520 XQLSRODUH SURJUDPDELOH OD SURGXF WRU  127 4.10.2.2. Memorii ROM unipolare programabile la utilizator 127 4.10.2.2.1. Memorii EPROM 127 4.10.2.2.2. Memorii E2PROM .. 129 4.10.3. Organizarea unei memorii de 8 Kb ... 129  ([WLQGHUHD FDSDFLW LL PHPRULLORU 520  131  ([WLQGHUHD OD LQWUDUH D FDSDFLW LL PHPRULHL 520  131  ([WLQGHUHD OD LHLUH D FDSDFLW LL PHPRULHL 520 132  ([WLQGHUHD OD PL[W D FDSDFLW LL PHPRULHL 520 132 4.11. Arii logice programabile . 133

 'HFRGLILFDWRUXO GH DGUHV

Cap. 5. &LUFXLWH ORJLFH VHFYHQ LDOH 137 5.1. Circuite basculante bistabile SR ... 138 5.1.1. Circuitul basculant bistabil SR asincron . 138 5.1.1.1. Circuitul basculant bistabil SR asincron realizat cu NOR-uri ... 138 5.1.1.2. Circuitul basculant bistabil SR asincron realizat cu NAND-uri 140 5.1.2. Circuitul basculant bistabil SR sincron ... 141 5.1.3. Circuitul basculant bistabil SR Master-Slave .. 143 5.2. Circuite basculante bistabile de tip D ... 145 5.2.1. Circuitul basculant bistabil de tip D asincron . 145 5.2.2. Circuitul basculant bistabil de tip D sincron ... 146 5.2.2.1. Latch-ul adresabil ... 147 5.2.2.2. Memoria RAM ... 148 5.2.3. Circuitul basculant bistabil D Master-Slave 149 5.2.3.1. Registrul de deplasare serie 150 5.2.3.2. Registrul paralel . 150 5.2.3.3. Registrul combinat . 151 5.2.3.4. Registrul XQLYHUVDO ELGLUHF LRQDO GH  EL L  152 5.3. Circuite basculante bistabile de tip T 154 5.4. Circuite basculante bistabile de tip JK ..154 5.4.1. Circuitul basculant bistabil JK asincron .. 155 5.4.2. Circuitul basculant bistabil JK sincron 156 5.4.3. Circuitul basculant bistabil JK Master-Slave .. 157  1XP U WRUXO DVLQFURQ  157 5.5. Conversia circuitelor basculante bistabile 158 5.5.1. Conversia n T . 158 5.5.2. Conversia n SR ... 160
$QH[D  &LUFXLWH FX WUDQVIHU GH VDUFLQ

. 161

$QH[D  0LFURSURFHVRDUH L PLFURFDOFXODWRDUH

. 164 A2.1. Microprocesorul . 164 A2.2. Microcalculatorul ... 165 A2.3. Microcalculatorul pe un singur chip .. 166 $ $SOLFD LL  166

Bibliografie 169

3 5 ( ) $

Cursul Circuite electronice digitale

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VH DGUHVHD] VHF LLORU

VWXGHQ LORU GLQ DQLL ,,, DL )DFXOW LL GH $XWRPDWLF 

L (OHFWURPHFDQLF  GDU SRDWH IL XWLO L VWXGHQ LORU D

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-L

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omeniu, a condus la Electronicii digitale de la

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microprocesor

DFRUGkQG

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e circuite

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circuitele cu transfer de
I U XQ XULD YROXP GH

microprocesoarele UHSUH]LQW

GRPHQLL PRGHUQH FX DSOLFD LL QXPHURDVH L GH SUH]HQWXO FXUV

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DMXWRUXO QHSUHFXSH LW DO YDORURDVHORU FDGUH GLGDFWLFH GLQ DGUHVH] FHOH PDL F OGXURDVH PXO XPLUL GRPQXOXL SURI XQLY UHFWRUXO 8QLYHUVLW LL GLQ &UDLRYD FDUH vQ FDOLWDWH GH OHFWXUH]H

,Y QHVFX ULL L V

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omnului conf. univ. dr. ing. Mircea Mihaiu, pentru

D OXFU ULL O $SOLFDW  F UXLD

VXJHVWLLOH XWLOH L U EGDUHD FX FDUH DX UHFHQ]DW PDQXVFULVXO 8Q URO LPSRUWDQW vQ FHHDFH SULYHWH SDUWHD JUDILF 3DXO *ORJRJHDQX DQXO 9 VHF LD (OHFWURQLF

-a avut studentul i se cuvin cele mai

frumoase aprecieri.
Q ILQDO GDU QX vQ XOWLPXO UkQG GRUHVF V PRGXO vQ FDUH D WLXW V OXFU UL PXO XPHVF vQWUHJLL PHOH IDPLOLL SHQWUX HODERUDUHD XQHL DVWIHO GH DFFHSWH IUXVWU ULOH SH FDUH OH LPSOLF

Autorul

ANEXA 1

&LUFXLWH FX WUDQVIHU GH VDUFLQ

&LUFXLWHOH FX WUDQVIHU GH VDUFLQ FXSODM SULQ VDUFLQ VDUFLQ  VXQW LQWHJUDUH SH VFDU

 FXQRVFXWH L VXE GHQXPLULOH GH circuite cu sau CCD (Charge Coupled Devices = dispozitive cu cuplaj prin XWLOL]DWH vQ VSHFLDO vQ WHKQRORJLD /6, /DUJe Scale Integration = ODUJ  L QX DX QLFL XQ HFKLYDOHQW vQ YDULDQWH FX FRPSRQHQWH

discrete. CCD-XULOH VXQW FRQVWUXLWH VXE IRUPD XQHL PDWULFH GH FDSDFLW L 026 FX n LQWU UL GH-D OXQJXO F UHLD VXQW WUDQVIHUDWH VDUFLQL HOHFWULFH FX DMXWRUul cmpurilor JHQHUDWH GH WUHL WHQVLXQL QHJDWLYH DOH F URU PRGXOH VH DIO vQ UHOD LD 93>V2>V1.
3ULQFLSLXO WUDQVIHUXOXL GH VDUFLQL vQWUH GRX ORFD LL YHFLQH DOH PDWULFHL HVWH

ilustrat n fig. A1.1. |V3| > |V2|

-V2 Q +++ Si tip n -V2 -V3 Q +++ Si tip n

a) Fixarea sarcinilor

b) Transferul sarcinilor

Fig. A1.1. Ilustrarea principiului transferului de sarcini

$VWIHO SRWHQ LDOXO

FkPS HOHFWULF FDUH UHVSLQJH SXUW WRULL GH VDUFLQ

V2

JHQHUHD]

vQ VXEVWUDWXO VHPLFRQGXFWRU GH WLS

n un

PDMRULWDUL HOHFWURQLL GLQ ]RQD GH

SXUW WRULL GH VDUFLQ

sub stratul de oxid, fi[kQG SXUW WRULL GH VDUFLQ SR]LWLYL FDUH DX IRVW LQMHFWD L vQ substrat printr-XQ PLMORF RDUHFDUH MRQF LXQH SQ WUDQ]LVWRU LQWHJUDW vQ DFHODL substrat, prin iluminare), fig. A1.1 a. $SOLFkQG XQ SRWHQ LDO V3, cu |V3| > |V2|, electrodului nvecinat, fig. A1.1 b,
PRELOL VXQW WUDQVIHUD L vQ ORFD LD YHFLQ SH FDUH QX R PDL SRW S U VL DWkWD WLPS FkW SH HOHFWURGXO FRUHVSXQ] WRU H[LVW YDORDUH DEVROXW  GHFkW DO ORFD LLORU YHFLQH 5HYHQLQG OD PDWULFHD FX FDSDFLW L XQ SRWHQ LDO PDL PDUH vQ

MOS din care am prezentat n fig. A1.2

una din cele n F

L REVHUY P FRPSRUWDPHQWXO GH UHJLVWUX GH GHSODVDUH DO DFHVWHLD

$VWIHO DSOLFkQG VWUXFWXULL GLQ ILJ $ VHFYHQ HOH GH SRWHQ LDOH SUH]HQWDWH vQ WDE $ UHDOL] P WUDQVIHUXO VXFFHVLY DO VDUFLQLORU GH OD ORFD LLOH   OD ORFD LLOH   DPG

-V1 -V1 -V2

1 +++

7 +++

10

SiO2

Si tip n

D )L[DUHD VDUFLQLORU OD ORFD LD 

-V1 -V3 -V2

3

8 +++

10

SiO2

+ + + Si tip n

E 7UDQVIHUXO VDUFLQLORU OD ORFD LD 

-V1 -V2 -V1

2

2 +++

3 Si tip n

8 +++

10

SiO2

F )L[DUHD VDUFLQLORU OD ORFD LD 

)LJ $ (WDSHOH WUDQVIHUXOXL GH VDUFLQL GH OD R ORFD LH

la alta

7DE $ ([SOLFDWLY SHQWUX IXQF LRQDUHD VWUXFWXULL GLQ ILJ $

Fig. a b c 1 V2 V2 V1 V1 V1 V3 V2 2 V1 V3 V2 V2 V1 V1 V1 3 V1 V1 V1 V3 V2 V2 V1 4 V2 V2 V1 V1 V1 V3 V2

Zona 5 V1 V3 V2 V2 V1 V1 V1

6 V1 V1 V1 V3 V2 V2 V1

7 V2 V2 V1 V1 V1 V3 V2

8 V1 V3 V2 V2 V1 V1 V1

9 V1 V1 V1 V3 V2 V2 V1

2EVHUY P F XQXL SRWHQ LDO _93 VDUFLQD HVWH IL[DW

WUDQVIHUXO GH VDUFLQL F WUH R ORFD LH YHFLQ SULQWU XQ SRWHQ LDO

VH IDFH SULQ DSOLFDUHD FDUH

| > |V2_

SH HOHFWURGXO DFHVWHLD GLQ XUP  Y ILJ $ E GXS

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'LQ WDE $ VH UHPDUF SUHFXP L ]RQHOH vQ FDUH VH DIO FX XXULQ FLFOLFLWDWHD IXQF LRQ ULL UHJLVWUXOXL &&' VDUFLQLOH vQ ILHFDUH PRPHQW ]RQHOH KDXUDWH 9LWH]D GH WUDQVIHU D VDUFLQLORU SHUPLWH IXQF LRQDUHD SkQ OD cca. 20 MHz, la un consum de 5 W / bit. Registrele CCD sunt utilizate pentru transferul reliefului de sarcini de pe VXSUDIH HOH IRWRVHQVLELOH DOH FDPHUHORU GH OXDW YHGHUL PRGHUQH 7HKQRORJLD &&' HVWH XWLOL]DW L SHQWUX UHDOL]DUHD XQRU IXQF LL ORJLFH

OD ORFD LD UHVSHFWLY

elePHQWDUH FXP DU IL ,-NU, SAU-NU, SAU-EXCLUSIV, sau a unor circuite logice de tipul sumatoarelor, multiplicatoarelor,memoriilor RAM, etc.

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CCD.
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       2%&'3(!01  !

var. A

C=AB

    

C=A+B var. A var. B

D ,

var. B  ! 2%&'3(!01

CCD

b) SAU - CCD

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GH H[HPSOX R MRQF LXQH GLUHFW

capcana

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B, respectiv A SAU B SAU

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ANEXA 2

0LFURSURFHVRDUH L PLFURFDOFXODWRDUH

A 2.1. Microprocesorul
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cel
D

unui sistem universal de tratare a datelor, sau a unui sistem de calcul, sau a ambelor.
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ceas propriu.
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a sistemului.
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Registru de stare Acumulator RAM

PROM
1XP U WRU

de
LQVWUXF LXQL

Unitate aritmetic si
ORJLF

Registru de
LQVWUXF LXQL

Bus intern Registru tampon de date Bus date Registru tampon de adrese Bus adrese
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cele mai recente sunt realizate n tehnologiile MO6 FX SRU L

1026 L &026

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m,

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A 2.2. Microcalculatorul
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sistem.
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ROM Memorie de control

Microprocesor (UC)

RAM Memorie
LQWHUPHGLDU GH

date Echipament I/O

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D XQXL PLFURFDOFXODWRU

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care sunt construite pentru a

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L WDEHOHORU 'DF SURJUDPXO QX HVWH FRPSOHW IL[DW SRW IL XWLOL]DWe PROM-uri, EPROM-uri sau E2PROM-uri. Memoriile intermediare sunt rezidente pe chip n 5$0 3HQWUX PHPRULLOH PDUL VH XWLOL]HD] PDJQHWLFH GXUH +'' VDX

flexibile (dischete), sau ambele. Echipamentul de intrare-LHLUH FRQ LQH display-XUL L LPSULPDQWH 6LVWHPHOH GH WHOHFRPXQLFD LL GH FRQWURO L
ED]DWH SH PLFURSURFHVRDUH FRPSRUW DGHVHD WUDQVGXFWRDUH

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-urile de memorie. Coprocesoarele, cum ar fi Motorola MC 6881, constituite pentru a

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UC. Accesul direct la memorie, asigurat de modul de gestionare a acesteia,

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A 2.3. Microcalculatorul pe un singur chip

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pentru marele public

* Calculatoare; * Ceasuri numerice; * Jocuri video sau telejocuri; * Comanda aparatelor electrice; * Sisteme casnice recreative; * Sisteme de securitate casnice; * Stocarea energiei casnice;

afaceri
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industriale; * Dirijarea
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calculatoare; * Echipamente de automatizare a RSHUD LLORU EDQFDre; * Terminale n punctele de vnzare; * Gestionarea stocurilor; * Fotocopiatoare.

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* Sisteme antipoluare; * Transmisiuni de

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