The USB cable and Power must be connected before downloading the code 1- Click on the top module

on ise

If there is compiling errors the synthesis will stop.

2- Double click on synthesis

3- then double click on implement Design after finishing synthesis

4- After implementation, Double click on Generate Programming File

5- Double Click on Target PROM/ACE file

6- Click on ok on the pop-up menu

7- Press Next on the pop-up menu

8- Press Next on the pop-up menu

9- Press Next on the pop-up menu

10- this pop-up menu will appear

11- select xcfo4s [4 M] , then press Add

12- press next

13-press finish

14- press ok on the pop-up menu

15- Browse to open the correct Bit stream file

16- press no on the pop-up menu

17- press ok on the pop-up menu

18- double click on Generate File

19- A confirmation message will appear

20- Double Click on Boundary Scan

21-Press Right Click on the empty pane

22- press on initialize Chain

23- If Every thing is ok, this screen will appear

24- open the correct bit stream file

25-open the .mcs file

26- pess cancel

26-slect Device1, this is the FPGA RAM

27- press ok

28- Press Right Click on xc3S500e

29- Press program on the pop-up menu

30- this screen will appear

31- If ok, the Blue Message Program succeeded will appear