DIGITAL LOGIC DESIGN ASSIGNMENT 2 ( Solution)

Question 1 Implement the following Boolean function with a 4 x 1 MUX and external gates: G (A, B, C, D) = (1, 2, 4, 7, 8, 9, 10, 11, 13, 15) Use A and B as control variables. Show intermediate design steps using the K map and the truth table. Draw the final circuit using the given block diagram that represents the MUX.

Question 2 Design a combinational circuit that accept a three bit binary number and generates an output binary number equal to the square of the input number.

A
0 0 0 0 1 1 1 1

B
0 0 1 1 0 0 1 1

C
0 1 0 1 0 1 0 1

O1
0 0 0 0 0 0 1 1

O2
0 0 0 0 1 1 0 1

O3
0 0 0 1 0 1 0 0

O4
0 0 1 0 0 0 1 0

O5
0 0 0 0 0 0 1 0

O6
0 1 0 1 0 1 0 1

This is how truth table would be made and further by applying the combinational circuits you can design O1, O2, O3 and till O6

Question 3

Design the following circuitry but only one machine should be accessible at a time using (a) 2 x 4 Decoder (b) 4 x 1 multiplexer A B C D E Output 1 1 0 1 0 Machine 1 0 0 0 1 0 Machine2 0 1 1 0 0 Machine 3 0 0 0 1 1 Machine 4 1 0 1 0 0 Machine 5 1 1 1 0 0 Machine 6 1 1 0 0 1 Machine 7 After making this circuitry connect your circuitry to a seven segment decoder to show on display the number of machine enabled at that particular time

Question 5

Give the output expression for the 8-to-1 MUX shown below.

Question 6 To implement the Boolean function F = A (XOR) B (XOR) C we can use a 3-to-8 decoder and connect: a) 3 different lines from its output to an OR gate b) 4 different lines from its output to an OR gate c) 5 different lines from its output to an OR gate d) 6 different lines from its output to an OR gate e) 7 different lines from its output to an OR gate

A
0 0

B
0 0

C
0 1

F 0 1

0 0 1 1 1 1

1 1 0 0 1 1

0 1 0 1 0 1

1 0 1 0 0 1

Question 7 Implement the following Boolean function with a multiplexer: F(A, B, C, D) = (0, 1, 3, 4, 8, 9, 15)