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R.V.

COLLEGE OF ENGINEERING
Autonomous institution affiliated to VTU Department: Instrumentation Technology Subject: Microcontrollers and Application and Lab (07IT62) Quiz I Date: 15-2-11 Duration: 9:15-9:45am Marks: 15

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Branch instruction, which requires a single fetch cycle and a single execute cycle, introduces an extra cycle in the CPUs execution of instructions. State whether Yes or No. _____________________________________ The PIC16F877 device has _________ bit program counter and is capable of addressing ________________program memory space.

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3. Value of W register after executing addwf indf,0 ;Initial value of W=17h and FSR=C2h and content ; pointed to by FSR is 20h is____________________ 4. After the execution of instruction bcf PORTB,0 the result of the instruction is stored in ___________ 5. PIC abbreviation stands for _________________ 6. 7. 8. 9. Who has coined the PIC microcontroller?_____________________ How many bits microcontroller is PIC? _______________________ Which type of architecture ______________________________ does PIC belong to?

If each instruction requires both a fetch cycle and an execute cycle, then what is meant when it is said that the PIC CPU executes a new instruction every cycle?

10. When CPU starts up from its reset state, its Program counter is __________________________________.

11. If the condition is true, number of Q-cycles the instruction decfsz requires is____________ 12. If the condition is false, number of cycles the instruction goto requires is____________ 13. Program counter is formed by concatenating two registers. They are ________________________________________. 14. In direct addressing mode, selecting bank1 in data memory requires STATUS bits ____________________________ 15. I need to access location 7Fh of data memory. The STATUS bits <RP0:RP1> should be__________________________

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