Ex.

No:5

Date:.

MODELLING OF SHIFT REGISTER

Aim: To simulate a shift register circuit using VHDL language. Software used: Xilinx ISE 9.2 Theory: Shift register is used to store information arriving from a serial source. It is basically a register capable of shifting a binary word either left or to right. Logically a shift register consists of a group of flip flops with output of each flip flop is connected to the input of next .The shift register must be edge triggered type or master slave type which is sensitive to pulse duration. Shift registers are used in various digital systems for temporary storage information and transferring of data. The bits in binary numbers can be moved from one place to another in either of two types. The first method involves shifting the data one bit at a time referred as serial shifting. The second method involves shifting all the data bits simultaneously referred to as parallel shifting. Program: Library IEEE; Use IEEE std_logic_1164.all; Entity shift register is Port(c:in STD_LOGIC; si=IN STD_LOGIC;

so=out STD_LOGIC;); end shift register; architecture shift register of shift register is signal tmp:STD_LOGIC_VECTOR(7 down to 0); begin process(c,si) begin if(c event and c=1) then for i in 0 to 6 loop tmp(i+1)<=tmp(i); end loop; tmp(0)<=si; end if; end process; so<=tmp(7); end behavioural;

Procedure: 1. Go to start menu click programs, click Xilinx ISE, click project navigator 2. A new window will appear to create a new project. In the project field give the project name and select the project location 3. To create a new source click resource and click select source type used in VHDL module 4. A HDL editor window will appear in that window.Type the VHDL code 5. Save it and in the process tool click synthesis XST 6. In source window the hardware changed to behavioral simulation. Now in the process field click model sim simulator 8. In the model sim simulator force the input value and run.

Result: Thus the shift register circuit is simulated using VHDL.

Output: