Professional Documents
Culture Documents
Agenda X Day 2013
Agenda X Day 2013
Agenda X Day 2013
09:00
09:15
10:00
10:45
Coffee Break and exhibition tour Track 1: Hardware Track 2: SW & Solution
Will High Efficiency Video Codec (HEVC) kill SW Video Compression? Mr. Ori Modai CTO, Video Business Unit Radvision Is HDL language fading? Customer story of Orbotech using HLS Language Mr. Mati Nahshon FPGA Infrastructure, Orbotech
11:15
Advanced modem-PHY implementation based on state-of-the-art FPGA and AFE components Dr. Jaime Hasson Senior Director , Elbit Systems Does SSN means worst case scenario in Power Design? Mr. David Neter General manager, TMI
12:00
12:45
14:00
14:40
Novel AXI-based FPGA Design Flow for Mixed HW/SW Systems A Hardware and Software Integration workflow for ZYNQ, Dr. Reuven Dobkin using Model-Based Design with MATLAB and Simulink CTO, Vsync Mr. Igal Yaroslavski Application Team Leader, Systematics
15:20
15:40
16:20
17:00
* Agenda is subject to change
TABLET