EE 311 Analog Electronics

Take Home Exam Part IV Due: November 16, 2012 (Submit to D-112, by 17:00) Multi-Stage Amplifiers Q1. This problem deals with the amplifier design shown on the next figure.

1 k

500

Stage 1
+10 R1 200 k +10 RD 5 k vo vi RS 4 k MN R2 200 k

Stage 2
+10 +10

Stage 3
+10 +10

R1

RD vo

R1

vi

MN

vi

QN vo

CS

R2

RS1

R2

RE

-10 KN = 20 VTN = 1 V ro = mA/V2

-10 KN = 20 VTN = 1 V ro = mA/V2

-10

RS2

CS

-10

= 100 VBE(ON) = 0.7 V VTN = 25 mV ro =

-10

-10

Note that some of the resistor values are not provided so that you find proper values for them for your design. You can make assumptions and approximations as long as you indicate and justify them clearly. a) Design Stage 2 and Stage 3 to have, GV_TOTAL (overall gain, vo/vsignal) > 1000 V/V, GV3 (3rd stage gain when RL=500, vo/vi) > 0.8 V/V. b) Find the input and output resistances (RIN and ROUT) for the overall amplifier. c) Simulate this circuit in Spice and compare the results with previous parts. Q2. For the circuit given in the following figure, find RIN and the midband gain (Amid), assuming that =100, VA=100 V, RI=50 k (internal resistance of the current sources).
+5 +5

100 A
Q2

RS Q1 10 k vS RE 1 k RIN -5 -5 -5 100 A CL 1 pF vout