INTA INTR

RST6.5 RST 5.5

TRAP SID SOD

RST 7.5

Interrupt Control

Serial I/O Control

8 Bit Data Bus

Accumulator (8)

Temp Reg.(8)

Instruction Register(8) R E G Instruction Decoder And Machine Cycle Encoding S E L E C T

Multiplexer W (8) Temp Reg. B Reg. D Reg H Reg Stack Pointer (8) L Reg (16) (8) E Reg (8) Register Array (8) Z (8) Temp Reg. C Reg (8) (8)

Flag (5) Flip-Flops

Arithmetic Logic Unit (ALU) (8) +5V Power Suply GND Timing and Control CLK GEN Control Status DMA

Program Counter (16) Incrementer/Decrementer Address Latch (16) Reset Address Buffer (8) Data/Address Buffer (8)

CLK OUT

RD WR ALE

S0

S1 IO/M HOLD

HLDA

RESET OUT A15-A8 Address Bus AD7-Ad0 Address/Data Bus

READY

RESET IN

THE MICROPROCESSORS ALU

External Input and Output Control Lines

16 bit address bus Memory Address Register Hi Lo SP PC Accumulator A Reg B Reg D Reg H Status reg Reg C Reg E Reg L 8 bit Data Bus

C O N T R O L L O G I C

8 bit internal data bus

Instruction Register

Temp 1

Temp 2

InIn

Out Out

Instruction decoder

ALU ALU OUT Out