Scribd Logo
Upload

Welcome to Scribd!

  • 14 views

    Sir C R Reddy College of Engineering, Eluru Department of Electronics & Instrumentation Engineering

    Uploaded by

    Bhaskar Yelamolu
    This document contains the questions for an internal test on Microprocessor & Interfacing for class III/I EIE. The test covers topics like flags and their bit positions in the 8085 processor, interrupts, the A and E registers, the HLDA and HOLD signals, the DAA instruction, timing diagrams, machine cycles, functional block diagrams, addressing modes, memory device organization, and interfacing 8255 and 8279 devices to the 8085 processor. Students are required to answer any three questions out of the seven listed.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content

    You might also like

    Sir C R Reddy College of Engineering, Eluru Department of Electronics & Instrumentation Engineering

    Uploaded by

    Bhaskar Yelamolu
    14 views2 pages
    This document contains the questions for an internal test on Microprocessor & Interfacing for class III/I EIE. The test covers topics like flags and their bit positions in the 8085 processor, interrupts, the A and E registers, the HLDA and HOLD signals, the DAA instruction, timing diagrams, machine cycles, functional block diagrams, addressing modes, memory device organization, and interfacing 8255 and 8279 devices to the 8085 processor. Students are required to answer any three questions out of the seven listed.

    Original Description:

    Original Title

    MP - Mid I

    Copyright

    © Attribution Non-Commercial (BY-NC)

    Available Formats

    DOC, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    This document contains the questions for an internal test on Microprocessor & Interfacing for class III/I EIE. The test covers topics like flags and their bit positions in the 8085 processor, interrupts, the A and E registers, the HLDA and HOLD signals, the DAA instruction, timing diagrams, machine cycles, functional block diagrams, addressing modes, memory device organization, and interfacing 8255 and 8279 devices to the 8085 processor. Students are required to answer any three questions out of the seven listed.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    14 views2 pages

    Sir C R Reddy College of Engineering, Eluru Department of Electronics & Instrumentation Engineering

    Uploaded by

    Bhaskar Yelamolu
    This document contains the questions for an internal test on Microprocessor & Interfacing for class III/I EIE. The test covers topics like flags and their bit positions in the 8085 processor, interrupts, the A and E registers, the HLDA and HOLD signals, the DAA instruction, timing diagrams, machine cycles, functional block diagrams, addressing modes, memory device organization, and interfacing 8255 and 8279 devices to the 8085 processor. Students are required to answer any three questions out of the seven listed.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    of 2

    Sir C R Reddy College of Engineering, Eluru Department of Electronics & Instrumentation Engineering

    Internal Test - I Subject: Microprocessor & Interfacing Class: III/I EIE Code: EIE-316 DOE: 30/10/!013 Time: 09.00 - 10.40 AM Maximum Marks: !"

    #I$%& 'uestion is compulsor(. Ans)er an( t*ree from t*e remaining. 1. a+ ,ist t*e flags of -0-" an. gi/e t*eir 0it positions in flag register. 0+ 4*at are mas5a0le an. non-mas5a0le interrupts of -0-"6 c+ 4*at is t*e significance of A,E6 .+ 4*at is 78,D an. 7,DA6 E9plain t*eir significance. e+ E9plain a0out :;%7 instruction )it* an e9ample. f+ 4*at is t*e nee. for timing .iagram6 g+ ,ist /arious mac*ine c(cles of -0-". !. 3. 4. ". 4it* a neat s5etc* e9plain t*e functional 0loc5 .iagram of -0-" microprocessor. 4*at is a..ressing6 E9plain t*e a..ressing mo.es of -0-" )it* e9amples. E9plain t*e internal organi<ation of semicon.uctor memor( .e/ices. Interface t)o num0ers of 4 50 E:$8M an. one num0er of - 50 $AM )it* -0-" processor. E9plain t*e interface .iagram an. allocate 0inar( a..ress to memor( I=s. 6M 6M 6M 6M 12131M

    You might also like