______________________________________________________Chng 3 Cng

logic III - 1

 CHNG 3 CNG LOGIC

CC KHI NIM LIN QUAN
CNG LOGIC C BN
THNG S K THUT
H TTL
Cng c bn
Cc kiu ng ra

H MOS
NMOS
CMOS

GIAO TIP GIA CC H IC S

TTL thc CMOS
CMOS thc TTL

Cng logic l tn gi chung ca cc mch in t c chc nng thc hin cc hm

logic. Cng logic c th c ch to bng cc cng ngh khc nhau (Lng cc, MOS), c
th c t hp bng cc linh kin ri nhng thng c ch to bi cng ngh tch hp IC
(Integrated circuit).
Chng ny gii thiu cc loi cng c bn, cc h IC s, cc tnh nng k thut v s
giao tip gia chng.

3.1 CC KHI NIM LIN QUAN

3.1.1 Tn hiu tng t v tn hiu s
Tn hiu tng t l tn hiu c bin bin thin lin tc theo thi gian. N thng
do cc hin tng t nhin sinh ra. Th d, tn hiu c trng cho ting ni l tng hp ca
cc tn hiu hnh sin trong di tn s thp vi cc ha tn khc nhau.
Tn hiu s l tn hiu c dng xung, gin on v thi gian v bin ch c 2 mc
r rt: mc cao v mc thp. Tn hiu s ch c pht sinh bi nhng mch in thch hp.
c tn hiu s ngi ta phi s ha tn hiu tng t bng cc mch bin i tng t sang
s (ADC)

3.1.2 Mch tng t v mch s

Mch in t x l cc tn hiu tng t c gi l mch tng t v mch x l tn
hiu s c gi l mch s.
Mt cch tng qut, mch s c nhiu u im so vi mch tng t:
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logic III - 2
- D thit k v phn tch. Vn hnh ca cc cng logic da trn tnh cht dn in
(bo ha) hoc ngng dn ca transistor. Vic phn tch v thit k da trn chc nng v c
tnh k thut ca cc IC v cc khi mch ch khng da trn tng linh kin ri
- C th hot ng theo chng trnh lp sn nn rt thun tin trong iu khin t
ng, tnh ton, lu tr d liu v lin kt vi my tnh.
- t b nh hng ca nhiu tc c kh nng dung np tn hiu nhiu vi bin ln
hn rt nhiu so vi mch tng t.
- D ch to thnh mch tch hp v c kh nng tch hp vi mt cao.
Da vo s cng trong mt chip, ngi ta phn loi IC s nh sau:
- S cng < 10: SSI (Small Scale Integrated), mc tch hp nh.
- 10 < S cng < 100: MSI (Medium Scale Integrated), mc tch hp trung bnh.
- 100 < S cng < 1000: LSI (Large Scale Integrated), mc tch hp ln.
- 1000 < S cng < 10000: VLSI (Very Large Scale Integrated), mc tch hp rt
ln
- S cng > 10000: ULSI (Ultra Large Scale Integrated), mc tch hp siu ln.

3.1.3 Biu din cc trng thi Logic 1 v 0

Trong h thng mch logic, cc trng thi logic c biu din bi cc mc in th.
Vi qui c logic dng, in th cao biu din logic 1, in th thp biu din logic 0.
Ngc li ta c qui c logic m. Trong thc t, mc 1 v 0 tng ng vi mt khong in
th xc nh v c mt khong chuyn tip gia mc cao v thp, ta gi l khong khng xc
nh. Khi in p ca tn hiu ri vo khong ny, mch s khng nhn ra l mc 0 hay 1.
Khong ny ty thuc vo h IC s dng v c cho trong bng thng s k thut ca linh
kin. (H 3.1) l gin in th ca cc mc logic ca mt s cng logic thuc h TTL.

(H 3.1)

3.2 CNG LOGIC C BN

3.2.1 Cng NOT
- Cn gi l cng o (Inverter), dng thc hin hm o Y= A
- K hiu (H 3.2), mi tn ch chiu di chuyn ca tn hiu v vng trn l k hiu
o. Trong nhng trng hp khng th nhm ln v chiu ny, ngi ta c th b mi tn.

(H 3.2)
Bng s tht
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logic III - 3

3.2.2 Cng AND

- Dng thc hin hm AND 2 hay nhiu bin.
- Cng AND c s ng vo ty thuc s bin v mt ng ra. Ng ra ca cng l hm
AND ca cc bin ng vo.
- K hiu cng AND 2 ng vo cho 2 bin (H 3.3a)

(a)
A
0
0
1
1

B
0
1
0
1

Y=A.B
0
0
0
1

(H 3.3)

Hoc

(b)
A
x
x

B
0
1

Y=A.B
0
A

- Nhn xt:
- Ng ra cng AND ch mc cao khi tt c ng vo ln cao.
- Khi c mt ng vo = 0, ng ra = 0 bt chp cc ng vo cn li.
- Khi c mt ng vo =1, ng ra = AND ca cc ng vo cn li.
Vy vi cng AND 2 ng vo ta c th dng 1 ng vo lm ng kim sot (H 3.3b),
khi ng kim sot = 1, cng m cho php tn hiu logic ng vo cn li qua cng v khi ng
kim sot = 0, cng ng , ng ra lun bng 0, bt chp ng vo cn li.
Vi cng AND c nhiu ng vo hn, khi c mt ng vo c a ln mc cao th
ng ra bng AND ca cc bin cc ng vo cn li.
Hnh (H 3.4) l gin thi gian ca cng AND hai ng vo. Trn gin , ng ra Y
ch ln mc 1 khi c A v B u mc 1.

(H 3.4)

3.2.3 Cng OR
- Dng thc hin hm OR 2 hay nhiu bin.
- Cng OR c s ng vo ty thuc s bin v mt ng ra.
- K hiu cng OR 2 ng vo

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logic III - 4

(H 3.5)
- Bng s tht
A
0
0
1
1

B
0
1
0
1

Y=A+B
0
1
1
1

Hoc

A
x
x

B
1
0

Y=A+B
1
A

- Nhn xt: - Ng ra cng OR ch mc thp khi c 2 ng vo xung thp.

- Khi c mt ng vo =1, ng ra = 1 bt chp ng vo cn li.
- Khi c mt ng vo =0, ng ra = OR cc ng vo cn li.
Vy vi cng OR 2 ng vo ta c th dng 1 ng vo lm ng kim sot, khi ng kim
sot = 0, cng m, cho php tn hiu logic ng vo cn li qua cng v khi ng kim sot =
1, cng ng, ng ra lun bng 1.
Vi cng OR nhiu ng vo hn, khi c mt ng vo c a xung mc thp th
ng ra bng OR ca cc bin cc ng vo cn li.

3.2.4 Cng BUFFER

Cn gi l cng m. Tn hiu s qua cng BUFFER khng i trng thi logic. Cng
BUFFER c dng vi cc mc ch sau:
- Sa dng tn hiu.
- a in th ca tn hiu v ng chun ca cc mc logic.
- Nng kh nng cp dng cho mch.
- K hiu ca cng BUFFER.

(H 3.6)
Tuy cng m khng lm thay i trng thi logic ca tn hiu vo cng nhng n gi
vai tr rt quan trng trong cc mch s.

3.2.5 Cng NAND

- L kt hp ca cng AND v cng NOT, thc hin hm Y = A.B
( y ch xt cng NAND 2 ng vo, c gi t suy ra trng hp nhiu ng vo).
- K hiu ca cng NAND (Gm AND v NOT, cng NOT thu gn li mt vng trn)
- Tng t nh cng AND, cng NAND ta c th dng 1 ng vo lm ng kim
sot. Khi ng kim sot = 1, cng m cho php tn hiu logic ng vo cn li qua cng v b
o, khi ng kim sot = 0, cng ng, ng ra lun bng 1.
- Khi ni tt c ng vo ca cng NAND li vi nhau, n hot ng nh mt cng o

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logic III - 5

(H 3.7)

3.2.6 Cng NOR

- L kt hp ca cng OR v cng NOT, thc hin hm Y = A + B
K hiu ca cng NOR (Gm cng OR v NOT, nhng cng NOT thu gn li mt
vng trn)

(H 3.8)
Cc bng s tht v cc gin thi gian ca cc cng BUFFER, NAND, NOR, sinh
vin c th t thc hin ly

3.2.7 Cng EX-OR

- Dng thc hin hm EX-OR. Y = A B = AB + A B
- Cng EX-OR ch c 2 ng vo v 1 ng ra
- K hiu (H 3.9a)
- Mt tnh cht rt quan trng ca cng EX-OR:
+ Tng ng vi mt cng o khi c mt ng vo ni ln mc cao, (H
3.9b)
+ Tng ng vi mt cng m khi c mt ng vo ni xung mc thp, (H
3.9c)

(a)

(b)
(H 3.9)

(c)

3.2.8 Cng EX-NOR

- L kt hp ca cng EX-OR v cng NOT
- Cng EX-NOR c 2 ng vo v mt ng ra
- Hm logic ng vi cng EX-NOR l
Y = A B = A B + A.B
- K hiu (H 3.10)
- Cc tnh cht ca cng EX-NOR ging cng EX-OR nhng c ng ra o li.

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logic III - 6
(H 3.10)

3.2.9 Cng phc AOI (AND-OR-INVERTER)

ng dng cc kt qu ca i s BOOLE, ngi ta c th kt ni nhiu cng khc
nhau trn mt chip IC thc hin mt hm logic phc tp no . Cng AOI l mt kt hp
ca 3 loi cng AND (A), OR (O) v INVERTER (I). Th d thc hin hm logic
Y = A.B.C + D.E , ta c cng phc sau:

(H 3.11)

3.2.10 Bin i qua li gia cc cng logic

Trong chng Hm Logic chng ta thy tt c cc hm logic c th c thay th
bi 2 hm duy nht l hm AND (hoc OR) kt hp vi hm NOT. Cc cng logic c chc
nng thc hin hm logic, nh vy chng ta ch cn dng 2 cng AND (hoc OR) v NOT
thc hin tt c cc hm logic. Tuy nhin, v cng NOT cng c th to ra t cng NAND
(hoc NOR). Nh vy, tt c cc hm logic c th c thc hin bi mt cng duy nht,
l cng NAND (hoc NOR). Hm ny cho php chng ta bin i qua li gia cc cng vi
nhau.
Quan st nh l De Morgan chng ta rt ra qui tc bin i qua li gia cc cng
AND, NOT v OR , NOT nh sau:
Ch cn thm cc cng o ng vo v ng ra khi bin i t AND sang OR hoc
ngc li. D nhin nu cc ng c o ri th o ny s mt i.
Th d 1: Ba mch di y tng ng nhau:
(H 3.12b) c c bng cch i AND - OR thm cc o cc ng vo v ra. T (H
3.12b) i sang (H 3.12c) ta b 2 cng o ni t ng ra cng NOR n ng vo cng AND

(a)

(b)

(c)

(H 3.12)
Th d 2: V mch tng ng ca cng EX-OR dng ton cng NAND
Dng nh l De-Morgan, biu thc hm EX-OR vit li:

Y = AB + AB = AB.AB
V mch tng ng cho (H 3.13)
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logic III - 7

(H 3.13)

3.3 THNG S K THUT CA IC S

s dng IC s c hiu qu, ngoi s chn v bng s tht ca chng, ta nn bit
qua mt s thut ng ch cc thng s cho bit cc c tnh ca IC.

3.3.1 Cc i lng in c trng

- VCC: in th ngun (power supply): khong in th cho php cp cho IC hot
ng tt. Th d vi IC s h TTL, VCC=50,5 V , h CMOS VDD=3-15V (Ngi ta thng
dng k hiu VDD v VSS ch ngun v mass ca IC h MOS)
- VIH(min): in th ng vo mc cao (High level input voltage): y l in th ng
vo nh nht cn c xem l mc 1
- VIL(max): in th ng vo mc thp (Low level input voltage): in th ng vo
ln nht cn c xem l mc 0.
- VOH(min): in th ng ra mc cao (High level output voltage): in th nh nht
ca ng ra khi mc cao.
- VOL(max): in th ng ra mc thp (Low level output voltage): in th ln nht
ca ng ra khi mc thp.
- IIH: Dng in ng vo mc cao (High level input current): Dng in ln nht vo
ng vo IC khi ng vo ny mc cao.
- IIL: Dng in ng vo mc thp (Low level input current) : Dng in ra khi ng
vo IC khi ng vo ny mc thp
- IOH: Dng in ng ra mc cao (High level output current): Dng in ln nht ng
ra c th cp cho ti khi n mc cao.
- IOL: Dng in ng ra mc thp (Low level output current): Dng in ln nht ng
ra c th nhn khi mc thp.
- ICCH,ICCL: Dng in chy qua IC khi ng ra ln lt mc cao v thp.
Ngoi ra cn mt s thng s khc c nu ra di y

3.3.2 Cng sut tiu tn (Power requirement)

Mi IC khi hot ng s tiu th mt cng sut t ngun cung cp VCC (hay VDD).
Cng sut tiu tn ny xc nh bi in th ngun v dng in qua IC. Do khi hot ng
dng qua IC thng xuyn thay i gia hai trng thi cao v thp nn cng sut tiu tn s
c tnh t dng trung bnh qua IC v cng sut tnh c l cng sut tiu tn trung bnh
PD (avg) = I CC (avg).VCC

Trong
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logic III - 8
I CCH + I CCL
2
i vi cc cng logic h TTL, cng sut tiu tn hng mW v vi h MOS th ch
hng nW.
I CC (avg) =

3.3.3 Fan-Out:
Mt cch tng qut, ng ra ca mt mch logic i hi phi cp dng cho mt s ng
vo cc mch logic khc. Fan Out l s ng vo ln nht c th ni vi ng ra ca mt IC
cng loi m vn bo m mch hot ng bnh thng. Ni cch khc Fan Out ch kh nng
chu ti ca mt cng logic
Ta c hai loi Fan-Out ng vi 2 trng thi logic ca ng ra:
I
Fan Out H = OH
I IH

I OL
I IL
Thng hai gi tr Fan-Out ny khc nhau, khi s dng, an ton, ta nn dng tr nh
nht trong hai tr ny.
Fan-Out c tnh theo n v Unit Load UL (ti n v).
Fan Out L =

3.3.4 Thi tr truyn (Propagation delays)

Tn hiu logic khi truyn qua mt cng lun lun c mt thi gian tr.
C hai loi thi tr truyn: Thi tr truyn t thp ln cao tPLH v thi tr truyn t
cao xung thp tPHL. Hai gi tr ny thng khc nhau. S thay i trng thi c xc nh
tn hiu ra. Th d tn hiu qua mt cng o, thi tr truyn c xc nh nh (H 3.14)
Ty theo h IC, thi tr truyn thay i t vi ns n vi trm ns. Thi tr truyn cng
ln th tc lm vic ca IC cng nh.

(H 3.14)

3.3.5 Tch s cng sut-vn tc (speed- power product)

nh gi cht lng IC, ngi ta dng i lng tch s cng sut-vn tc l
tch s cng sut tiu tn v thi tr truyn. Th d h IC c thi tr truyn l 10 ns v cng
sut tiu tn trung bnh l 50 mW th tch s cng sut-vn tc l:
10 ns x 5 mW =10.10-9x5.10-3 = 50x10-12 watt-sec = 50 picojoules (pj)
Trong qu trnh pht trin ca cng ngh ch to IC ngi ta lun mun t c cc
IC c cng sut tiu tn v thi tr truyn cng nh cng tt. Nh vy mt IC c cht lng
cng tt khi tch s cng sut-vn tc cng nh. Tuy nhin trn thc t hai gi tr ny thay i
theo chiu ngc vi nhau, nn ta kh m t c cc gi tr theo mun, d sao trong qu
trnh pht trin ca cng ngh ch to linh kin in t tr s ny lun c ci thin .
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logic III - 9
3.3.6 Tnh min nhiu (noise immunity)
Cc tn hiu nhiu nh tia la in, cm ng t c th lm thay i trng thi logic
ca tn hiu do nh hng n kt qu hot ng ca mch.
Tnh min nhiu ca mt mch logic ty thuc kh nng dung np hiu th nhiu ca
mch v c xc nh bi l nhiu. L nhiu c c do s chnh lch ca cc in th gii
hn (cn c gi l ngng logic) ca mc cao v thp gia ng ra v ng vo ca cc cng
(H 3.15).

(H 3.15)
Tn hiu khi vo mch logic c xem l mc 1 khi c tr >VIH(min) v l mc 0 khi
<V IL(max). in th trong khong gia khng ng vi mt mc logic no nn gi l vng
bt nh. Do c s khc bit gia VOH(min) vi VIH(min) v VOL(max) vi VIL(max) nn ta c
2 gi tr l nhiu:
L nhiu mc cao: VNH = VOH(min) - VIH(min)
L nhiu mc thp: VNL = VIL(max) - VOL(max)
Khi tn hiu ra mc cao a vo ng vo, bt c tn hiu nhiu no c gi tr m v
bin >VNH u lm cho in th ng vo ri vo vng bt nh v mch khng nhn ra
c tn hiu thuc mc logic no. Tng t cho trng hp ng ra mc thp tn hiu nhiu
c tr dng bin >VNL s a mch vo trng thi bt nh.

3.3.7 Logic cp dng v logic nhn dng

Mt mch logic thng gm nhiu tng kt ni vi nhau. Tng cp tn hiu gi l tng
thc v tng nhn tn hiu gi l tng ti. S trao i dng in gia hai tng thc v ti th
hin bi logic cp dng v logic nhn dng.
(H 3.16a) cho thy hot ng gi l cp dng: Khi ng ra mch logic 1 mc cao, n
cp dng IIH cho ng vo ca mch logic 2, vai tr nh mt ti ni mass. Ng ra cng 1 nh l
mt ngun dng cp cho ng vo cng 2
(H 3.16b) cho thy hot ng gi l nhn dng: Khi ng ra mch logic 1 mc thp,
n nhn dng IIL t ng vo ca mch logic 2 xem nh ni vi ngun VCC.

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logic III - 10

(a)

(b)
(H 3.16)
Thng dng nhn ca tng thc khi mc thp c tr kh ln so vi dng cp ca n
khi mc cao, nn ngi ta hay dng trng thi ny khi cn gnh nhng ti tng i nh, v
d khi ch cn thc cho mt led, ngi ta c th dng mch (H 3.17a) m khng th dng
mch (H 3.17b).

(a)

(H 3.17)

(b)

3.3.8 Tnh Schmitt Trigger

Trong phn gii thiu l nhiu, ta thy cn mt khong in th nm gia cc ngng
logic, y chnh l khong in th ng vi transistor lm vic trong vng tc ng. Khong
cch ny xc nh l nhiu v c tc dng lm gim rng sn xung (tc lm cho ng
dc ln v dc xung ca tn hiu ra dc hn) khi qua mch. L nhiu cng ln khi vng
chuyn tip ca ng vo cng nh, tn hiu ra thay i trng thi trong mt khong thi gian
cng nh nn sn xung cng dc. Tuy nhin vn cn mt khong sn xung nm trong vng
chuyn tip nn tn hiu ra khng vung hon ton. (H 3.18a) v (H 3.18b) minh ha iu

(a)

(b)

(H 3.18)
ci thin hn na dng tn hiu ng ra, bo m tnh min nhiu cao, ngi ta ch
to cc cng c tnh tr in th (H 3.19a), c gi l cng Schmitt Trigger
(H 3.19b) m t mi quan h gia Vout v Vin ca mt cng o Schmitt Trigger.

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logic III - 11

(a)

(b)
(H 3.19)

(H 3.20a&b) l k hiu cc cng Schmitt Trigger.

(a)

(b)
(H 3.20)

3.4 H TTL
Trong qu trnh pht trin ca cng ngh ch to mch s ta c cc h: RTL (Resistortransistor logic), DCTL (Direct couple-transistor logic), RCTL (Resistor-Capacitor-transistor
logic), DTL (Diod-transistor logic), ECL (Emitter- couple logic) v.v.... n by gi tn ti hai
h c nhiu tnh nng k thut cao nh thi tr truyn nh, tiu hao cng sut t, l h TTL
(transistor-transistor logic) dng cng ngh ch to BJT v h MOS (Cng ngh ch to
MOS)
Di y, ln lt kho st cc cng logic ca hai h TTL v MOS

3.4.1 Cng c bn h TTL

Ly cng NAND 3 ng vo lm th d thy cu to v vn hnh ca mt cng c
bn

(H 3.21)
Khi mt trong cc ng vo A, B, C xung mc khng T1 dn a n T2 ngng, T3
ngng, ng ra Y ln cao; khi c 3 ng vo ln cao, T1 ngng, T2 dn, T3 dn, ng ra Y xung
thp. chnh l kt qu ca cng NAND.
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logic III - 12
T CL trong mch chnh l t k sinh to bi s kt hp gia ng ra ca mch (tng
thc) vi ng vo ca tng ti, khi mch hot ng t s np in qua R4 (lc T3 ngng) v
phng qua T3 khi transistor ny dn do thi tr truyn ca mch quyt nh bi R4 v CL,
khi R4 nh mch hot ng nhanh nhng cng sut tiu th lc ln, mun gim cng sut
phi tng R4 nhng nh vy thi tr truyn s ln hn (mch giao hon chm hn). gii
quyt khuyt im ny ng thi tha mn mt s yu cu khc , ngi ta ch to cc cng
logic vi cc kiu ng ra khc nhau.

3.4.2 Cc kiu ng ra
@ Ng ra totempole

(H 3.22)
R4 trong mch c bn c thay th bi cm T4, RC v Diod D, trong RC c tr rt
nh, khng ng k. T2 by gi gi vai tr mch o pha: khi T2 dn th T3 dn v T4 ngng,
Y xung thp, khi T2 ngng th T3 ngng v T4 dn, ng ra Y ln cao. T CL np in qua T4
khi T4 dn v phng qua T3 (dn), thi hng mch rt nh v kt qu l thi tr truyn nh.
Ngoi ra do T3 & T4 lun phin ngng tng ng vi 2 trng thi ca ng ra nn cng sut
tiu th gim ng k. Diod D c tc dng nng in th cc B ca T4 ln bo m khi T3
dn th T4 ngng.
Mch ny c khuyt im l khng th ni chung nhiu ng ra ca cc cng khc nhau
v c th gy h hng khi cc trng thi logic ca cc cng ny khc nhau.
@ Ng ra cc thu h

(H 3.23)
Ng ra cc thu h c mt s li im sau:
- Cho php kt ni cc ng ra ca nhiu cng khc nhau, nhng khi s dng phi mc
mt in tr t ng ra ln ngun Vcc, gi l in tr ko ln, tr s ca in tr ny c th
c chn ln hay nh ty theo yu cu c li v mt cng sut hay tc lm vic.

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logic III - 13
im ni chung ca cc ng ra c tc dng nh mt cng AND nn ta gi l im
AND (H 3.24)
- Ngi ta cng ch to cc IC ng ra c cc thu h cho php in tr ko ln mc
vo ngun in th cao, dng cho cc ti c bit hoc dng to s giao tip gia h TTL vi
CMOS dng ngun cao.
Th d IC 7406 l loi cng o c ng ra cc thu h c th mc ln ngun 24 V (H
3.25)

(H 3.24)

(H 3.25)

@ Ng ra ba trng thi

(H 3.26)

(H 3.27)

Mch (H 3.26) l mt cng o c ng ra 3 trng thi, trong T4 & T5 c mc

Darlington cp dng ra ln cho ti. Diod D ni vo ng vo C iu khin. Hot ng
ca mch gii thch nh sau:
- Khi C=1, Diod D ngng dn, mch hot ng nh mt cng o
- Khi C=0, Diod D dn, cc thu T2 b ghim p mc thp nn T3, T4 & T5 u ngng,
ng ra mch trng thi tng tr cao.
K hiu ca cng o ng ra 3 trng thi, c ng iu khin C tc ng mc cao v
bng s tht cho (H 3.27)
Cng c cc cng o v cng m 3 trng thi vi ng iu khin C tc ng mc
thp m SV c th t v k hiu v bng s tht.
(H 3.28) l mt ng dng ca cng m c ng ra 3 trng thi: Mch chn d liu

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logic III - 14
(H 3.28)
Vn chuyn: ng vi mt gi tr a ch AB , mt ng ra mch gii m a ch c
tc ng (ln cao) cho php mt cng m v d liu ng vo cng c truyn ra ng ra.
Th d khi AB = 00, Y0 = 1 (Y1=Y2=Y3=0) G1 m, D0 truyn qua G1 n ng ra, trong lc G2,
G3, G4 ng, c ng ra trng thi Z cao, khng nh hng n hot ng ca mch.

3.4.3 c tnh cc lot TTL

Cc IC s h TTL c sn xut ln u tin vo nm 1964 bi hng Texas
Instrument Corporation ca M, ly s hiu l 74XXXX & 54XXXX. S khc bit gia 2 h
74XXXX v 54 XXXX ch hai im:
74: VCC=5 0,5 V v khong nhit hot ng t 0o C n 70o C
54: VCC=5 0,25 V v khong nhit hot ng t -55o C n 125o C
Cc tnh cht khc hon ton ging nhau nu chng c cng s.
Trc s 74 thng c thm k hiu ch hng sn xut. Th d SN ca hng Texas,
DM ca National Semiconductor, S ca Signetics
Ngoi ra trong qu trnh pht trin, cc thng s k thut (nht l tch s cng sut
vn tc) lun c ci tin v ta c cc lot khc nhau: 74 chun, 74L (Low power), 74 H
(High speed), 74S (Schottky), 74LS (Low power Schottky), 74AS (Advance Schottky),
74ALS (Advance Low power Schottky), 74F (Fast, Fair Child).
Bng 3.1 cho thy mt s tnh cht ca cc lot k trn:
Thng s k thut

74

74L

74H

74S

Thi tr truyn (ns)

Cng sut tiu tn (mW)
Tch s cng sut vn tc (pJ)
Tn s xung CK max (MHz)
Fan Out (cng lot)
in th
VOH(min)
VOL (max)
VIH (min)
VIL (max)

9
10
90
35
10

33
1
33
3
20

6
23
138
50
10

3
20
60
125
20

2,4
0,4
2,0
0,8

2,4
0,4
2,0
0,7

74L
S
9,5
2
19
45
20

74AS

74ALS

74F

1,7
8
13,6
200
40

4
1,2
4,8
70
20

3
6
18
100
33

2,4
2,7
2,7
2,5
2,5
2,5
0,4
0,5
0,5
0,5
0,4
0,5
2,0
2,0
2,0
2,0
2,0
2,0
0,8
0,8
0,8
0,8
0,8
0,8
Bng 3.1
- Lot 74S: Cc transistor trong mch c mc thm mt Diod Schottky gia hai cc
CB vi mc ch gim thi gian chuyn trng thi ca transistor do lm gim thi tr
truyn.
- Lot 74AS v 74ALS l ci tin ca 74S lm gim hn na gi tr tch s Cng
sut - Vn tc.
- Lot 74F: Dng k thut c bit lm gim din dung k sinh do ci thin thi tr
truyn ca cng.

3.5 HO MOS
Gm cc IC s dng cng ngh ch to ca transistor MOSFET loi tng, knh N v
knh P . Vi transistor knh N ta c NMOS, transistor knh P ta c PMOS v nu dng c hai
loi transistor knh P & N ta c CMOS. Tnh nng k thut ca loi NMOS v PMOS c th
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logic III - 15
ni l ging nhau, tr ngun cp in c chiu ngc vi nhau do ta ch xt loi NMOS v
CMOS.
Cc transistor MOS dng trong IC s cng ch hot ng mt trong 2 trng thi: dn
hoc ngng.
- Khi dn, ty theo nng pha ca cht bn dn m transistor c ni tr rt nh (t
vi chc n hng trm K) tng ng vi mt kha ng.
- Khi ngng, transistor c ni tr rt ln (hng 1010), tng ng vi mt kha h.

3.5.1 Cng c bn NMOS

(a)

(b)

(c)
(H 3.29)

(H 3.29a), (H 3.29b) v (H3.29c) l cc cng NOT, NAND v NOR dng NMOS

Bng 3.2 cho thy quan h gia cc in th ca cc ng vo , ra cng NOT
Vin

T1

T2

Vout

0V (logic 0)

RON = 100K

ROFF=1010

+5V (logic 1)

+5V (logic1)

RON = 100K

RON = 1K

0,05V (logic 0)

Bng 3.2
Ngoi ra vn hnh ca cng NAND v NOR c gii thch nh sau:
Cng NAND:
- Khi 2 ng vo ni ln mc cao, T2 v T3 dn, ng ra xung thp.
- Khi c 1 ng vo ni xung mc thp, mt trong 2 transistor T2 hoc T3
ngng, ng ra ln cao.
chnh l kt qu ca cng NAND 2 ng vo.
Cng NOR:
- Khi 2 ng vo ni xung mc thp, T2 v T3 ngng, ng ra ln cao.
- Khi c 1 ng vo ni ln mc cao, mt trong 2 transistor T2 hoc T3 dn, ng
ra xung thp.
chnh l kt qu ca cng NOR 2 ng vo.

3.5.2 Cng c bn CMOS

H CMOS s dng hai loi transistor knh N v P vi mc ch ci thin tch s cng
sut vn tc, mc d kh nng tch hp thp hn loi N v P. (H 3.30a), (H 3.30b) v (H
3.30c) l cc cng NOT, NAND v NOR h CMOS
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logic III - 16

(a)

(b)
(H 3.30)

(c)

Bng 3.3 cho thy quan h in th ca cc ng vo , ra cng NOT

Vin

T1

T2

Vout

VDD (logic1)

ROFF=1010

RON = 1K

0V (logic 0)

0V (logic0)

RON = 1K

ROFF=1010

VDD (logic 1)

Bng 3.3
Ngoi ra vn hnh ca cng NAND v NOR c gii thch nh sau:
Cng NAND:
- Khi 2 ng vo ni ln mc cao, T1 v T2 ngng, T3 v T4 dn, ng ra xung
thp.
- Khi c 1 ng vo ni xung mc thp, mt trong 2 transistor T3 hoc T4
ngng, mt trong 2 transistor T1 hoc T2 dn, ng ra ln cao.
chnh l kt qu ca cng NAND 2 ng vo.
Cng NOR:
- Khi 2 ng vo ni xung mc thp, T1v T2 dn, T3 v T4 ngng, ng ra ln
cao.
- Khi c 1 ng vo ni ln mc cao, mt trong 2 transistor T3 hoc T4 dn, mt
trong 2 transistor T1 hoc T2 ngng, ng ra xung thp.
chnh l kt qu ca cng NOR 2 ng vo.

3.5.3 Cc cng CMOS khc

Ngi ta cng sn xut cc cng CMOS vi cc Drain h v ng ra 3 trng thi
s dng trong cc trng hp c bit nh h TTL

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logic III - 17

(a)

(H 3.31)

(b)

(H 3.31a) l mt cng NOT c cc D h, khi s dng phi c in tr ko ln

(H 3.31b) l mt cng NOT c ng ra 3 trng thi:
- Khi ng vo Enable =1, T1 v T4 dn, mch hot ng nh l cng o,
- Khi ng vo Enable =0, T1 v T4 u ngng a mch vo trng thi Z cao.
Ngoi ra li dng tnh cht ca transistor MOS c ni tr rt nh khi dn, ngi ta
cng ch to cc mch c kh nng truyn tn hiu theo 2 chiu, gi l kha 2 chiu. (H 3.32)
l mt kha 2 chiu vi A l ng vo iu khin. Khi A = 0 kha h, khi A = 1, kha ng
cho tn hiu truyn qua theo 2 chiu

A
0
1

X to Y
OFF
ON

Y to X
OFF
ON

(H 3.32)
Vn hnh: T3 v T4 vai tr l mt cng o
- Khi A = 0, cc G ca T2 mc thp nn T2 (knh N) ngng, cc G ca T1 (knh P)
mc cao nn T1 ngng, mch tng ng vi kha h.
- Khi A =1, cc G ca T2 mc cao nn T2 dn, cc G ca T1 mc thp nn T1 dn,
mch tng ng vi kha ng. Tn hiu truyn qua mt chiu nh T1 (loi P) v theo
chiu ngc li nh T2 (loi N)
Bin ca tn hiu Vi truyn qua kha phi tha iu kin 0 <Vi < VDD .
Nh vy nu ta s dng ngun VDD th kha cho tn hiu xoay chiu i qua.

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logic III - 18
3.5.3 c tnh ca h MOS
Mt s tnh cht chung ca cc cng logic h MOS (NMOS, PMOS v CMOS) c th
k ra nh sau:
- Ngun cp in : VDD t 3V n 15V
- Mc logic:
VOL (max) = 0V
VOH (min) = VDD
VIL (max) = 30% VDD
VIH (min) = 70%VDD
- L nhiu :
VNH = 30%VDD
VNL = 30%VDD
Vi ngun 5V, l nhiu khang 1,5V, rt ln so vi h TTL.
- Thi tr truyn tng i ln, khang vi chc ns, do in dung k sinh ng vo v
tng tr ra ca transistor kh ln.
- Cng sut tiu tn tng i nh, hng nW, do dng qua transistor MOS rt nh.
- S Fan Out:
50 UL
Do tng tr vo ca transistor MOS rt ln nn dng ti cho cc cng h MOS rt
nh, do s Fan Out ca h MOS rt ln, tuy nhin khi mc nhiu tng ti vo mt tng
thc th in dung k sinh tng ln (gm nhiu t mc song song) nh hng n thi gian
giao hon ca mch nn khi dng tn s cao ngi ta gii hn s Fan Out l 50, ngha l
mt cng MOS c th cp dng cho 50 cng ti cng lot.
- Nh ni trn, CMOS c ci thin thi tr truyn so vi loi NMOS v PMOS,
tuy nhin mt tch hp ca CMOS th nh hn hai loi ny. D sao so vi h TTL th mt
tch hp ca h MOS ni chung ln hn rt nhiu, do h MOS rt thch hp ch to
di dng LSI v VLSI.

3.5.4 Cc lot CMOS

CMOS c hai k hiu: 4XXX do hng RCA ch to v 14XXX ca hng
MOTOROLA, c hai lot 4XXXA (14XXXA) v 4XXXB (14XXXB), lot B ra i sau c
ci thin dng ra.
Ngoi ra cn c cc lot :
- 74C : CMOS c cng s chn v chc nng vi IC TTL nu c cng s. Th d
IC 74C74 l IC gm 2 FF D tc ng bi cnh xung ng h ging nh IC 7474 ca TTL.
Hu ht (nhng khng tt c) cc thng s ca lot 74C ging vi 74 TTL nn ta c th thay
th 2 loi ny cho nhau c.
- 74HC (High speed CMOS), 74HCT: y l lot ci tin ca 74C, tc giao hon
c th so snh vi 74LS, ring 74HCT th hon ton tng thch vi TTL k c cc mc
logic. y l lot IC CMOS c dng rng ri.
- 74AC v 74ACT (Advance CMOS) ci tin ca 74 HC v HCT v mt nhiu bng
cch sp xp li th t cc chn, do n khng tng thch vi TTL v s chn.

3.6 GIAO TIP GIA CC H IC S

Giao tip l thc hin vic kt ni ng ra ca mt mch hay h thng vi ng vo ca
mch hay h thng khc. Do tnh cht v in khc nhau gia hai h TTL v CMOS nn
vic giao tip gia chng trong nhiu trng hp khng th ni trc tip c m phi nh
mt mch trung gian ni gia tng thc v tng ti sao cho in th tn hiu ra tng thc ph
hp vi tn hiu vo ca tng ti v dng in tng thc phi cp cho tng ti.
TTL
CMOS (VDD=
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logic III - 19
Thng s
VIH(min)
VIL(max)
VOH(min)
VOL(max)
IIH(max)
IIL(max)
IOH(max)
IOL(max)

4000B
3,5V
1,5V
4,95V
0,05V
1A
1A
0,4 mA
0,4 mA

74HC
3,5V
1,0V
4,9V
0,1V
1A
1A
4 mA
4 mA

5V)
74HCT
2,0V
0,8V
4,9V
0,1V
1A
1A
4 mA
4 mA

74
2,0V
0,8V
2,4V
0,4V
40A
1,6 mA
0,4 mA
16 mA
Bng 3.4

74LS
2,0V
0,8V
2,7V
0,5V
20A
0,4 mA
0,4 mA
8 mA

74AS
2,0V
0,8V
2,7V
0,5V
200A
2 mA
2 mA
20 mA

74ALS
2,0V
0,8V
2,7V
0,4V
20A
100A
0,4 mA
8 mA

C th ni iu kin thc trc tip

- Khi dng in ra ca tng thc ln hn hoc bng dng in vo ca tng ti c hai
trng thi thp v cao.
- Khi hiu th ng ra ca tng thc hai trng thi thp v cao ph hp vi in th
vo ca tng ti.
Nh vy, trc khi xt cc trng hp c th ta xem qua bng k cc thng s ca hai
h IC

3.6.1 TTL thc CMOS

- TTL thc CMOS dng in th thp (VDD = 5V):
T bng 3.4 dng in vo ca CMOS c tr rt nh so vi dng ra ca cc lot TTL,
vy v dng in khng c vn
Tuy nhin khi so snh hiu th ra ca TTL vi hiu th vo ca CMOS ta thy
VOH(max) ca tt c cc lot TTL u kh thp so vi VIH(min) ca TTL, nh vy phi c
bin php nng hiu th ra ca TTL ln. iu ny thc hin c bng mt in tr ko ln
mc ng ra ca IC TTL (H 3.33)
- TTL thc 74 HCT:
Nh ni trc y, ring lot 74HCT l lot CMOS c thit k tng thch vi
TTL nn c th thc hin kt ni m khng cn in tr ko ln.
- TTL thc CMOS dng ngun cao (VDD = +10V)
Ngay c khi dng in tr ko ln, in th ng ra mc cao ca TTL vn khng cp
cho ng vo CMOS, ngi ta phi dng mt cng m c ng ra h c th dng ngun cao
(Th d IC 7407) thc hin s giao tip (H 3.34)

(H 3.33)

(H 3.34)

3.6.2 CMOS thc TTL

- CMOS thc TTL trng thi cao:
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logic III - 20
Bng 3.4 cho thy in th ra v dng in ra mc cao ca CMOS cp cho TTL
. Vy khng c vn trng thi cao
- CMOS thc TTL trng thi thp:
Dng in vo trng thi thp ca TTL thay i trong khong t 100 A n 2 mA.
Hai lot 74HC v 74HCT c th nhn dng 4 mA . Vy hai lot ny c th giao tip vi mt
IC TTL m khng c vn . Tuy nhin, vi lot 4000B, IOL rt nh khng giao tip vi
ngay c mt IC TTL, ngi ta phi dng mt cng m nng dng ti ca lot 4000B trc
khi thc vi IC 74LS (H 3.35)
- CMOS dng ngun cao thc TTL:
C mt s IC lot 74LS c ch to c bit c th nhn in th ng vo cao
khong 15V c th c thc trc tip bi CMOS dng ngun cao, tuy nhin a s IC TTL
khng c tnh cht ny, vy c th giao tip vi CMOS dng ngun cao, ngi ta phi
dng cng m h in th ra xung cho ph hp vi IC TTL (H 3.36)

(H 3.35)

(H 3.36)

Vi th d dng cng thit k mch

1. Dng cng NAND 2 ng vo thit k mch to hm Y = f(A,B,C) =1 khi tha cc iu kin
sau:
a. A=0, B=1 v C=1
b. A=1, B=1 bt chp C
Gii
D vo iu kin ca bi ton ta c bng s tht ca hm Y
A
0
0
0
0
1
1
1
1

B
0
0
1
1
0
0
1
1

C
0
1
0
1
0
1
0
1

Y
0
0
0
1
0
0
1
1

Rt gn hm:
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logic III - 21

Y =AB+BC

(H 3.37)

dng tan cng NAND to hm, ta dng nh l De Morgan, bin i hm Y:

Y = Y = AB + BC = AB .BC
V mch c dng (H 3.37)

2. Cho mch

(H P3.38)
a./ Vit biu thc hm Y theo cc bin A,B,C.
b./ Rt gn hm logic ny
c./ Thay th mch trn bng mt mch ch gm cng NAND 2 ng vo
Gii
a./ Ta c Y = A .B.C + A B.C + A .BD
b./ Rt gn
Y= A .B.C + A B.C + A .BD = B.C(A + A) + A .BD = B.C + A .BD = B( C + A D)
c./ V mch thay th dng cng NAND 2 ng vo
Trc nht ta v mch tng ng hm rt gn, sau dng bin i cng

(H P3.39)

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logic III - 22

BI TP
1. Thit k mch thc hin cc hm sau y dng ton cng NAND 2 ng vo:
a./ f(A,B,C) = 1 nu (ABC)2 l s chn.
b./ f(A,B,C) = 1 nu c t nht 2 bin = 1.
c./ f(A,B,C) = 1 nu s nh phn (ABC)2 > 5.
d./ f(A,B,C) = 1 nu s bin c gi tr 1 l s chn.
e./ f(A,B,C) = 1 nu c mt v ch mt bin = 1.
2. Thit k mch gm 2 ng vo D, E v 2 ng ra P, C tha cc iu kin sau y:
- Nu E = 1 D = 0
P = 1, C = 0
- Nu E = 1 D = 1
P = 0, C = 1
- Nu E = 0 D bt k
P = 1, C = 1
3. Hm logic F(A, B, C) tha tnh cht sau y :
F(A,B,C) = 1 nu c mt v ch mt bin bng 1
a- Lp bng s tht cho hm F.
b- V mch logic to hm F.
4. Thit K mch to hm Y = A .B.C + A B.C + A .BC bng cc cng NAND 2 ng vo
5. Hm F(A,B,C) xc inh bi bng s tht
A
0
0
0
0
1
1
1
1

B
0
0
1
1
0
0
1
1

C
0
1
0
1
0
1
0
1

F
1
0
0
1
1
0
1
1

a- Dng bn Karnaugh rt gn hm F.
b- V s mch logic thc hin hm F.
c- V li mch ch dng cng NOR hai ng vo.

6. Rt gn hm logic :
f(A,B,C,D) = (0,1, 2, 4, 5, 8), A = MSB. Hm khng xc nh vi cc t hp bin (3,
7,10).
Dng s cng NOR t nht thc hin mch to hm trn.
7. Hm f(A,B,C) =1 khi s bin = 1 l s chn
- Vit biu thc logic ca hm f(A,B,C) theo t hp bin A,B,C.
- Dng cc cng EX-OR thc hin mch to hm trn.
8. Mt mch t hp nhn vo mt s nh phn A=A3A2A1A0 (A0 l LSB) to ra ng ra Y
mc cao khi v ch khi 0010<A<1000. Hy thit k mch vi:
a) Cu trc NAND-NAND.
b) Ton cng NAND 2 ng vo.

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logic III - 23
9. Mt mch t hp nhn vo mt s BCD, c tn l X. Ng ra ca mch ln 1 khi tha iu
kin 110 X 510.
Hy thit k mch t hp trn, dng ton cng NAND 2 ng vo.
10. Hm f(A,B,C,D) =1 khi c t nht 3 bin = 1
- Vit biu thc logic ca hm f(A,B,C,D) theo t hp bin A,B,C,D.
- Dng cc cng NAND 2 ng vo (s cng t nht) thc hin mch to hm trn.

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