Source Gate

Drain

Gate Oxide Field Oxide

n+ p-Si

Bulk (Substrate)

x Importance for LSI/VLSI

x Low fabrication cost x Small size x Low power consumption

x Applications
x Microprocessors x Memories x Power Devices

x Basic Properties
Unipolar device Very high input impedance Capable of power gain 3/4 terminal device, G, S, D, B Two possible device types: enhancement mode; depletion mode x Two possible channel types: n-channel; p-channel x x x x x

D B

D B

S p Channel MOSFET

S n Channel MOSFET

IDS A

VDS

VG

+VDS

p-Si

n-Channel

Qn I DS !  XTR

Qn ! Channel Charge XTR ! Channel Transit Time L ! vd vd ! Drift Velocity

L XTR ! QnVDS

Qn ! CV !  CO (VGS  VT )WL

Qn CO (VGS  VT )WL I DS ! VDS 2 L

W I DS ! Qn CO (VGS  VT )VDS L

Source

Channel

Drain VT

VG

VG-channel

VDS VDS/2

VG

+VDS

p-Si

n-Channel

VDS Qn ! CO (VG   VT )WL 2

First Order Approximation Gate to Channel Voltage = VGS-VDS/2

VDS W I DS ! Qn CO VG  VT  VDS L 2
2 VDS W ! Qn CO (VG  VT )VDS  L 2

Extra term!

Source

Channel VG-channel

Drain VDS VT Pinch-off

VG

Pinch-off

VDS ( sat ) ! VG  VT

Substitute for VDS(sat) in equation for IDS to get IDS(sat)

2 W V DS I DS ! Qn CO (VGS  VT )VDS  L 2

(VGS  VDS ) 2 W 2 I DS ( sat ) ! Qn CO (VGS  VT )  L 2

2 Qn W VGS  VT CO  2 L ! constant

` `

For very large VDS, IDS increases rapidly due to drain junction avalanche. Can give rise to parasitic bipolar action. In short channel transistors, the drain depletion region may reach the source depletion region giving rise to Punch Through.