SYNCHRONOUS SEQUENTIAL CIRCUITS

Presented by K.Sathiya Bharathi

Mealy vs. Moore Machines

Moore: outputs depend on current state only Mealy: outputs depend on current state and inputs Ant brain is a Moore Machine Output does not react immediately to input change We could have specified a Mealy FSM Outputs have immediate reaction to inputs As inputs change, so does next state, doesnt commit until clocking event

Comparison of Mealy and Moore Machines

Mealy Machines tend to have less states Different outputs on arcs (n^2) rather than states (n) Moore Machines are safer to use Outputs change at clock edge (always one cycle later) In Mealy machines, input change can cause output change as soon as logic is done a big problem when two machines are interconnected asynchronous feedback Mealy Machines react faster to inputs React in same cycle don't need to wait for clock In Moore machines, more logic may be necessary to decode state into outputs more gate delays after

Comparison of Mealy and Moore Machines

Comparison of Mealy and Moore Machines

Unit-5 Problems

STEP 1:LOGICAL DIAGRAM

STEP 2:STATE TABLE

PROBLEM 2

STEP 1:LOGICAL DIAGRAM

Step 2:characteristic table

Step3:state table

STATE TABLE

SECOND FORM OF STATE TABLE

State diagram

PROBLEM 3

STEP 1

STEP 2

STEP 3

STEP 4

PROBLEM 4

STATE TABLE

STATE TABLE

SECOND FORM OF TRUTH TABLE

SECOND FORM OF TRUTH TABLE

STATE DIAGRAM

PROBLEM 5
Design the synchronous sequential circuits specified by the state diagram using JK flipflops

STATE TABLE

PRESENT & NEXT STATE

EXCITATION TABLE

K-MAP

LOGICAL DIAGRAM

PROBLEM 6

K-MAP

LOGICAL DIAGRAM

PROBLEM 7
Design the synchronous sequential circuits for the Moore state diagram of using T flipflops

Present & Next state table

Excitation table

K-map

LOGICAL DIAGRAM

ASYCHRONOUS SEQUENTIAL CIRCUITS

PROBLEM 1

STEP 1:GIVEN LOGICAL DIAGRAM