1

01

PB5/6 Block Diagram

VCC_CORE

CLOCK GENERATOR

+1.5V

+1.05V

Intel
PENRYN
uFCPGA

CRT

CK505
ICS9LPR363
Page 2
A

Page 20
Page 3,4

+1.25V

INT MIC
Page 19

Page 19

HDMI

VGA CONNECTOR

+1.8VSUS
+1.8V

CRT

FSB(667/800MHZ)

LCD PANEL

LCD/LED

CRT

+3VPCU
+3V_S5
+3VSUS
+3V
+5VPCU
+5V_S5
+5V
+SMDDR_VTERM
+SMDDR_VREF

LVDS

533/ 667 MHZ DDR II

SATA

SATA - HDD

Page 18

PCI-E 16X Lan

NB
CANTIGA

DDRII-SODIMM1
DDRII-SODIMM2

Page 5,7,8,9,10,11

Page 16, 17

Page 22

SATA

SATA - ODD

DMI(x2/x4)

MINI CARD-4
ROBSON

Page 22

(FTB)

Page 25

SATA

eSATA

PCI-Express

Page 22

USB-5

WLAN

SB
ICH9M

USB 2.0

Page 25

Camera

PCIE-4
PCIE-6

PCIE-3

PCIE-1

MINI CARD-1
WLAN

MINI CARD-2
UMA TV/ROBSON

NEW CARD

Page 25

USB-3

Page 25

PCIE-5

LAN
RTL8102

Page 27

Page 26

PCI Bus

Page 19

Bluetooth

USB-2

Azalia
Page 12, 13, 14, 15

OZ129

Page 26

New Card

Page 24

USB-9

LPC

32.768KHz

Page 27
C

M/B USB2

4 IN 1

USB-7

Page 24

1394
C

Page 24

Page 27

M/B USB

ITE8512

USB-6

VGA
Board

Page 27

TV/ROBSON

Page 28

USB-8

Page 25

USB
Board

Port-A

HP
Page 30

Port-B

MIC JACK

AUDIO CODEC
ALC268/ALC272

FAN

T/P
Board

Key
Board

FLASH
ROM

CIR

Page 3

Page 26

Page 26

Page 28

Page 28

Touch Pad
Board

Daughter
Board

Function
Board

Page 29

Page 30
D

INT SPK
Page 29

SPK AMP
Page 29

PROJECT : PB5/6
Quanta Computer Inc.

http://mycomp.su/x/
1

Size

Document Number

Date:

Friday, March 21, 2008

Rev
1A

Block Diagram
3

Sheet

1
8

of

35

Clock Generator

PBY160808T-301Y-N_6
L41

VCC3

02

VCCP_VDD

PBY160808T-301Y-N_6

C507

0.1u/10V_4

C553

C544

C540

C543

C528

C532

C537

C545

*10u/10V_6

10u/10V_6

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

L50

VCCP

C535
C88

0.1u/10V_4

C521

10u/10V_6

10u/10V_6

C84

0.1u/10V_4

C542

0.1u/10V_4

C515

0.1u/10V_4

C93

T36
PCLK_OZ129

25 PCLK_OZ129
CG_XIN

33p/50V_4
2

C101

Y2

33p/50V_4

14.318MHZ
C100

PCLK_EC

28 PCLK_EC

CL=20p

13

PCLK_ICH

PCLK_ICH

R118

56

R86

CLK_BSEL0 R91

VDD_PCI
VDD_48
VDD_PLL3
VDD_REF

VDD_CK_VDD_PCI
VDD_CK_VDD_CPU

39
55

VDD_SRC
VDD_CPU

12
20
26
45
36
49

VDD_96_IO
VDD_PLL3_IO
VDD_SRC_IO_1
VDD_SRC_IO_3
VDD_SRC_IO_2
VDD_CPU_IO

R114

33_4

R110

PCLK_DEBUG_R

PCI0/CR#_A

PCLK_PCM_R

PCI1/CR#_B

33_4

PCLK_OZ129_R

PCI2/TME

R109

10K_4

PCI_CLK_SIO_R

PCI3

R107

33_4

PCLK_EC_R

PCI4/SRC5_EN

R101

33_4

CG_XOUT

14 CLKUSB_48

2
9
16
61

VCCP_VDD

0.1u/10V_4

PCLK_DEBUG

24 PCLK_DEBUG

PCLK_ICH_R

7
60

XTAL_IN

CG_XOUT

59

XTAL_OUT

FSA

33_4
2.2K_4

10

14

14M_ICH

R108

USB_48/FSA

FSB

57

FSB/TEST/MODE

FSC

62

REF0/FSC/TESTSEL

8
11
15
19
52
23
29
42
58

10K_4
33_4

IO_VOUT

48

SCLK
SDA

64
63

CGCLK_SMB
CGDAT_SMB

SRC5/PCI_STOP#
SRC5#/CPU_STOP#

38
37

PM_STPPCI#
PM_STPCPU#

CPU0
CPU0#

54
53

CLK_CPU_BCLK_R
CLK_CPU_BCLK#_R

RP14

CPU1
CPU1#

51
50

CLK_MCH_BCLK_R
CLK_MCH_BCLK#_R

RP12

SRC8/ITP
SRC8#/ITP#

47
46

CLK_PCIE_MINI3_R
CLK_PCIE_MINI3#_R

SRC10#
SRC10

35
34

CLK_PCIE_3GPLL#_R
CLK_PCIE_3GPLL_R

SRC11/CR#_H
SRC11#/CR#_G

33
32

CLK_MCH_OE#_R
NEW_CLKREQ#_R

R74
R73

SRC9
SRC9#

30
31

CLK_PCIE_NEW_R
CLK_PCIE_NEW_R#

RP2

3
1

4 0X2
2

SRC7/CR#_F
SRC7#/CR#_E

44
43

CLK_PCIE_MINI2_R
CLK_PCIE_MINI2#_R

RP8

1
3

2 0X2
4

SRC6
SRC6#

41
40

CLK_PCIE_MINI_R
CLK_PCIE_MINI#_R

RP6

1
3

2 0X2
4

CLK_PCIE_MINI 24
CLK_PCIE_MINI# 24

To WLAN

SRC4
SRC4#

27
28

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

RP4

3
1

4 0X2
2

CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23

To LAN

CK505

PCIF5/ITP_EN

CG_XIN

CLK_BSEL1
CLK_BSEL2 R111

U8
VDD_CK_VDD_PCI
VDD_CK_VDD_48
VDD_CK_VDD_PCI
VDD_CK_VDD_REF

VSS_PCI
VSS_48
VSS_IO
VSS_PLL3
VSS_CPU
VSS_SRC1
VSS_SRC2
VSS_SRC3
VSS_REF

BOM Option Table

PM_STPPCI# 14
PM_STPCPU# 14

To SB

1
3

2 0X2
4

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

To CPU

1
3

2 0X2
4

CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5

To NB

RP10

1
3

2 IV@0X2
4

RP3

1
3

2 0X2
4

CLK_PCIE_MINI3 24
CLK_PCIE_MINI3# 24

INT VGA
EXT VGA

To NB

CLK_MCH_OE# 6
NEW_CLKREQ# 24
CLK_PCIE_NEW 24
CLK_PCIE_NEW# 24

To New Card

CLK_PCIE_MINI2 24
CLK_PCIE_MINI2# 24

VCC3

To TV

PM_STPPCI#

R76

PM_STPCPU#

R75

2.2K_4

NEW_CLKREQ#_R

R560

10K_4

2.2K_4

SRC3/CR#_C
SRC3#/CR#_D

24
25

CLK_PCIE_ICH_R
CLK_PCIE_ICH#_R

RP5

3
1

4 0X2
2

CLK_PCIE_ICH 13
CLK_PCIE_ICH# 13

To SB

SRC2/SATA
SRC2#/SATA#

21
22

CLK_PCIE_SATA_R
CLK_PCIE_SATA#_R

RP7

3
1

4 0X2
2

CLK_PCIE_SATA 12
CLK_PCIE_SATA# 12

To SB

SRC1/SE1
SRC1#/SE2

17
18

DREFSSCLK_R
DREFSSCLK#_R

SRC0/DOT96
SRC0#/DOT96#

13
14

DREFCLK_R
DREFCLK#_R

3
1

4 0
2

DREFCLK 6
DREFCLK# 6

To NB

CKPWRGD/PWRDWN#

56

RP13

Description

IV@
EV@

To ROBSON

CLK_PCIE_3GPLL# 6
CLK_PCIE_3GPLL 6

475/F_4
475/F_4

Reference

CK_PWRGD 14

ICS9LPRS365BGLFT
ICS9LPRS365
RTM875T-606
(ALPRS365K13) (AL000875K06)

Pin 4

PCI2/TME

PCI2/TME
internal PD

Pin 5

PCI-3

PCI-3/SRC5_EN
internal PD

Pin 6

PCI-4/27M_SEL
PCI-4/27M_SEL internal PD

Pin 7

PCIF-5/ITP_EN
PCIF-5/ITP_EN internal PD

PULL HIGH

VCC3

PULL DOWN

NO OVERCLOCKING

PIN37/38 IS SRC5

PIN37/38 IS
PCI_STOP/CPU_STOP

(default)

PIN 17/18 IS 27MHz

PIN 17/18
IS SRC/DOT

(default)

(default)

PIN 46/47 IS CPUITP

R520

10K_4

R113

*10K_4

R521

*10K_4

R106

10K_4

PCLK_OZ129

<MAIN>:ICS9LPRS365BGLFT QCI:ALPRS365K13
<SECOND>:SLG8SP512TTR: QCI:AL8SP512K05

NORMAL RUN

PIN 46/47 IS SRC8

VCC3

(default)

VCC3

R526

*10K_4

R100

10K_4

PCLK_EC
HIGH 27MHz
LOW SRC

DREFSSCLK_R
DREFSSCLK#_R

RP9

RP11

PCLK_ICH

1
3

2 IV@0X2
4

DREFSSCLK 6
DREFSSCLK# 6

To NB

3
1

4
2

CLK_MXM 20
CLK_MXM# 20

To VGA Card

EV@0X2

VCC3

FREQ. SEL TABLE

Clock Gen I2C

VCCP

BSEL Frequency Select Table

FSC

FSB

FSA

Frequency

266Mhz

133Mhz

166Mhz
VCCP

200Mhz

400Mhz

Reserved

100Mhz

333Mhz

R88

*56_4

3 CPU_BSEL2

VCCP

R95

CLK_BSEL0

Q7
2

0_4

R89

3 CPU_BSEL1

R87

MCH_BSEL0 6
14,24

SDATA

1K_4

*0_4

R94

1K_4

R112

0_4

R116

*0_4

R117

1K_4

10K_4
CGDAT_SMB

CGDAT_SMB 17

CLK_BSEL1

MCH_BSEL1 6
14,24

CLK_BSEL2

SCLK

Q8

R134

RHU002N06

10K_4
CGCLK_SMB

10p

C508

10p

CLKUSB_48

C87

10p

14M_ICH

C95

10p

PCLK_ICH

C512

10p

PCLK_DEBUG C505

22p

MCH_BSEL2 6

PROJECT : PB5/6
Quanta Computer Inc.
Document Number

Rev
1A

CLK GEN
Date:

http://mycomp.su/x/

C506

PCLK_EC

CGCLK_SMB 17

Size

PCLK_OZ129

VCC3

0_4

R93

R127

RHU002N06

3 CPU_BSEL0

Sheet

Friday, May 30, 2008

1

of

35

H_A#[3..16]

12
12
12
12

R578
H_INTR
H_NMI
H_SMI#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

A6
A5
C4
0_4

T19
T18
T15
T13
T158
T159
T26
T160
T20

A20M#
FERR#
IGNNE#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

M4
N5
T2
V3
B2
D2
D22
D3
F6

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]

F1

H_BREQ#

D20
B3

H_IERR#
H_INIT#

LOCK#

H4

H_LOCK#

RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#

C1
F3
F4
G3
G2

H_CPURST#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#

HIT#
HITM#

G6
E4

H_HIT#
H_HITM#

CONTROL

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

PROCHOT#
THERMDA
THERMDC
THERMTRIP#

ZS2 Default no use this function

H_BREQ# 5

R67
H_INIT#

56_4

VCCP

12

H_LOCK# 5
H_CPURST# 5
H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5
H_HIT#
H_HITM#

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

D21
A24
B25

H_PROCHOT#_D
H_THERMDA
H_THERMDC

T11
T7
T6
T9
T10
T5

5
5

H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#[16..31]

Connect it to CPU DBR# is for ITP debug port

or CPU interposer (like ICE) to reset the system

0_4 SYS_RST#

R68

5
5
5

VCCP

SYS_RST# 14

R40
1K/F_4

5
5
5

H_DSTBN#1
H_DSTBP#1
H_DINV#1

CPU_PM_THRMTRIP#

T25
T23
T22
T12
T8
T24
T21

R39
2K/F_4

H CLK
BCLK[0]
BCLK[1]

A22
A21

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

C7

H_D#[0..15]

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2
2
2
2

Layout note:
H_GTLREF: Zo=55 ohm,L<0.5"
2/3*VCCP+-2%

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

H_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
CPU_TEST7
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

AD26
C23
D25
C24
AF26
AF1
A26
C3
B22
B23
C21

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]

BOM Option Table

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5
H_D#[48..63]

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

COMP[0]
COMP[1]
COMP[2]
COMP[3]

R26
U26
AA1
Y1

COMP0
COMP1
COMP2
COMP3

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

ICH_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGD
H_CPUSLP#
PSI#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#

MISC

H_D#[32..47]

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#

DATA GRP 2

H_DEFER#
H_DRDY#
H_DBSY#

U29B

5
5
5

DATA GRP 3

H5
F21
E1

H_ADS#
H_BNR#
H_BPRI#

THERMAL

ICH

H_A20M#
H_FERR#
H_IGNNE#

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

H_ADS#
H_BNR#
H_BPRI#

IERR#
INIT#

BR0#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

H1
E2
G5

DATA GRP 1

H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

DEFER#
DRDY#
DBSY#

ADDR GROUP_1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

12 H_A20M#
12 H_FERR#
12 H_IGNNE#
C

K3
H2
K2
J3
L1

ADS#
BNR#
BPRI#

XDP/ITP SIGNALS

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#[17..35]

03

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

DATA GRP 0

H_ADSTB#0
H_REQ#[0..4]

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

ADDR GROUP_0

U29A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

5
5

Reference

Description

N/A

N/A

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5
R48
R47
R43
R44

27.4/F_6
54.9/F_4
27.4/F_6
54.9/F_4

Layout note:
comp0,2: Zo=27.4ohm, L<0.5"
comp1,3: Zo=55ohm, L<0.5"
C

ICH_DPRSTP# 6,12,31
H_DPSLP# 12
H_DPWR# 5
H_PWRGD 12
H_CPUSLP# 5
PSI#
31

Penryn_1p0

RESERVED

Layout note:
ICH_DPRSTP# , Daisy Chain
(SB>PowerIC>NB>CPU)

Penryn_1p0

Thermal Trip

XDP

VCCP

CPU Thermal monitor

VCCP

VCCP

VCC3

D31
R581

FDV301N

*10K_4

*BAS316
*51/F_4
2

H_CPURST#

VCCP

R32
R33
R34

*51/F_4
56_4
54.9/F_4

XDP_TCK
XDP_TRST#

R36
R35

56_4
56_4

Q22
3

20,28,35 MBCLK

2
1

SYS_SHDN#

R568

10K_4

10K_4

U27
2
3

Q24

2ND_MBCLK#

7
8

SDAT
SCLK

2ND_MBDATA#

VCC

RHU002N06
5

SYS_SHDN#

30

*0_4 PM_THRMTRIP#

R563

*10K_4

R565

0_4

VCC3

R566

10K_4

VCC3

R569

330_4

VCC3

PM_THRMTRIP# 6,12
14,29 THERM_ALERT#

No use Thermal trip CPU side still PU 56ohm.

Use Thermal trip can share PU at SB side

4
6

DXP

C555

DXN

2200p/50V_4

H_THERMDA

H_THERMDC

ADDRESS: 98H

THERM_ALERT#_R

Processor hot

GND

OVT
ALERT

G780

NS LM95245 PU this pin

R571

0.1u/10V_4

20,28,35 MBDATA

Q26
MMBT3904
3

R562

RHU002N06

C562
*1u/16V_6

56.2/F_4

200_6 LM86VCC C554

R561

XDP_TDO
XDP_TDI
XDP_TMS

R572

CPU_PM_THRMTRIP#

VCC3

VCCP

Reserve 1K for XDP function

6,14,31 DELAY_VR_PWRGOOD

R580

VCC3
Q29

30

SYS_SHDN#

VCCP

Q23

THER_SHD#

MMBT3904

No use PROCHOT CPU side still PU 56ohm.

Use PROCHOT to optional receiver CPU side PU
68ohm and through isolat 2.2K ohm to receiver
side

R71
A

56_4

H_PROCHOT#_D

R70

*0_4

H_PROCHOT# 31

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Rev
1A

CPU(1/2) HOST BUS

Date:
5

http://mycomp.su/x/

Sheet

Friday, May 30, 2008

1

of

35

04

BOM Option Table

Reference

Description

N/A

N/A

Need NC 20PCS 10u before A1 BOM released(A0 all stuff)

Place these parts reference
to Intel demo board.

U29D

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]

Layout Note:
Inside CPU center cavity in 2 rows

VCC_CORE
VCC_CORE
U29C

C586

C588

C35

C591

C27

C573

C599

C38

C59

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

VCC_CORE

C593

C46

C54

C39

C594

C597

C45

C31

C26

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

VCC_CORE

C658

C589

C598

C32

C29

C574

C61

C28

C37

C595

0.1u

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

VCC_CORE

C659

C587

C592

C585

C583

C584

C596

C572

C590

C571

0.1u

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

Penryn_1p0
.

VCC_CORE

C44

VCC_CORE Bulk CAPs place

to BOT of CPU centeral

C58

+
330u/2.5V_7343

330u/2.5V_7343

VCC_CORE

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

VCCP_CPU

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

CPU_G21

VCCA[01]
VCCA[02]

B26
C26

+VCCA_PROC

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VSSSENSE

AE7

C52

C41

C48

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

VCCP_CPU

C34

C57

C36

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

VCCP_CPU

R51

0_4

VCCP

R564
+

0_1206

C556

VCCP Bulk CAP

close to Pin

270u/2V_7343

VCC1.5

R69

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

31
31
31
31
31
31
31

C78

C72

0.01u/16V_4

10u/10V_8

0_6

Place 0.01u
near pin-B26

VCC_CORE

Penryn_1p0
.

R586

Penryn CPU Power Status and max current table

POWER PLANE S0

S3

S4/S5

Voltage

I(max)

100/F_6

Note

VCC_CORE

VID

47A

Standard Voltage CPU

VCC_CORE

VID

50A

SV Design Target

VCC_CORE

VID

TBD

Extreme Edition CPU

VCC_CORE

VID

67A

EE Design Target

VCCA

+1.5V

130mA

VCCP

+1.05V

4.5A

Before VCC Stable

VCCP

+1.05V

2.5A

After VCC Stable

VCCSENSE 31
VSSSENSE 31
R587
100/F_6

Layout Note:
Route VCCSENSE and VSSSENSE traces at
27.4 Ohms with 50 mil spacing.
Place PU and PD within 1 inch of CPU.

(See Penryn EMTS Rev:1.0 Table7,8 for voltage and current)

(See Penryn EMTS Rev:1.0 Table-3 for VID table)

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Rev
1A

CPU(2/2) POWER
Date:
5

http://mycomp.su/x/

Sheet

Friday, May 30, 2008

1

of

35

05
H_A#[3..16] 3

H_D#[0..15]

VCCP

H_D#[16..31]

H_D#[32..47]

0.3125*VCCP
W:10,S:20 , L<0.5"

R538
221/F_4
H_SWING
C

R530

C509

100/F_4

0.1u/10V_4

W:10,S:20 , L<0.5"

H_RCOMP

H_D#[48..63]

R128
24.9/F_4
B

VCCP

2/3*VCCP
W:10,S:20 , L<0.5"

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP

R539

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
C5
E3

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

HOST

U26A
3

H_SWING
H_RCOMP

1K/F_4
H_AVREF
R534

R522

0_4

3
3

H_CPURST#
H_CPUSLP#

H_CPURST#
H_CPUSLP#

C12
E11

H_CPURST#
H_CPUSLP#

H_DVREF
H_AVREF
H_DVREF

2K/F_4

A11
B11

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

BOM Option Table

Reference

Description

N/A

N/A

H_A#[17..35] 3

H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BREQ# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#[3..0]

3
B

H_DSTBN#[3..0] 3

H_DSTBP#[3..0] 3

H_REQ#[0..4] 3

H_RS#[2..0] 3

H_AVREF
H_DVREF
CANTIGA_1p2

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Rev
1A

NB (1/7) HOST
Date:
5

http://mycomp.su/x/

Friday, May 30, 2008

Sheet
1

of

35

BOM Option Table

Reference

U26B

RSVD14

B31

RSVD15

MCH_RSVD17

T51
T72
T38
T74
T76
T156
T75

M1

RSVD17

MCH_RSVD20

AY21

RSVD20

MCH_RSVD21
MCH_RSVD22
MCH_RSVD23
MCH_RSVD24
MCH_RSVD25

B2
BG23
BF23
BH18
BF18

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR3
M_CLK_DDR4

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

AR24
AR21
AU24
AV20

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#3
M_CLK_DDR#4

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

BC28
AY28
AY36
BB36

M_CKE0
M_CKE1
M_CKE3
M_CKE4

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

BA17
AY16
AV16
AR13

M_CS#0
M_CS#1
M_CS#2
M_CS#3

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

BD17
AY17
BF15
AY13

M_ODT0
M_ODT1
M_ODT2
M_ODT3

SM_RCOMP
SM_RCOMP#

BG22
BH21

M_RCOMP
M_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

BF28
BH28

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

AV42
AR36
BF17
BC36

SM_VREF
SM_PWROK
SM_REXT
MCH_SM_DRAMRST#

B38
A38
E41
F41

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

F43
E43

CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

AE41
AE37
AE47
AH39

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AE40
AE38
AE48
AH40

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AE35
AE43
AE46
AH42

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

R99
R528
R147
R143
R203
R186
R141
R104

0_4
0_4
0_4
0_4
0_4
100_4
*0_4
0_4

PM_DPRSTP#
The Daisy chain topology should
be routed from ICH9M to IMVP ,
then to (G)MCH and CPU, in that
order.
B

RST_IN#_MCH
THRMTRIP#_R
DPRSLPVR_R

AT11
T20
R32

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

TP_MCH_NC1
TP_MCH_NC2
TP_MCH_NC3
TP_MCH_NC4
TP_MCH_NC5
TP_MCH_NC6
TP_MCH_NC7
TP_MCH_NC8
TP_MCH_NC9
TP_MCH_NC10
TP_MCH_NC11
TP_MCH_NC12
TP_MCH_NC13
TP_MCH_NC14
TP_MCH_NC15
TP_MCH_NC16
TP_MCH_NC17
TP_MCH_NC18
TP_MCH_NC19
TP_MCH_NC20
TP_MCH_NC21
TP_MCH_NC22
TP_MCH_NC23
TP_MCH_NC24
TP_MCH_NC25

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25

CLK
DMI

NC

T153
T146
T143
T139
T152
T80
T154
T145
T78
T151
T144
T150
T149
T142
T138
T148
T73
T155
T77
T157
T141
T137
T147
T140
T44

NB Thermal trip pin

No use Thermal trip NB side can
NC.(NB has ODT)

PM_SYNC#_R
R29
ICH_DPRSTP#_R
B7
PM_EXTTS#0_1_EC_R N33
TS#DIMM0_1_R
P32
AT40

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

AD35
AE44
AF46
AH43

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

B33
B32
G33
F33
E33

GFX_VR_EN

EV_IV@

EV&IV diff. value

M_CLK_DDR#0 17
M_CLK_DDR#1 17
M_CLK_DDR#3 17
M_CLK_DDR#4 17
M_CKE0
M_CKE1
M_CKE3
M_CKE4

16,17
16,17
16,17
16,17

U26C
L<0.5" , If PCIE not support
still connect to +VCC_PEG

LVDS I/F

M_CS#0 16,17
M_CS#1 16,17
M_CS#2 16,17
M_CS#3 16,17
M_ODT0 16,17
M_ODT1 16,17
M_ODT2 16,17
M_ODT3 16,17

19 INT_LVDS_EDIDCLK
11,19 INT_LVDS_EDIDDATA
19 INT_LVDS_DIGON
T31

T71

19 INT_TXLCLKOUT19 INT_TXLCLKOUT+
19 INT_TXUCLKOUT19 INT_TXUCLKOUT+

SM_DRAMRST# only for

DDR3.(DDR2 NC).

19 INT_TXLOUT019 INT_TXLOUT119 INT_TXLOUT2-

DREFCLK 2
DREFCLK# 2
DREFSSCLK 2
DREFSSCLK# 2

T35
19 INT_TXLOUT0+
19 INT_TXLOUT1+
19 INT_TXLOUT2+

CLK_PCIE_3GPLL 2
CLK_PCIE_3GPLL# 2

T33
19 INT_TXUOUT019 INT_TXUOUT119 INT_TXUOUT2-

DMI_TXN[3:0] 13

T52
19 INT_TXUOUT0+
19 INT_TXUOUT1+
19 INT_TXUOUT2+

DMI_TXP[3:0] 13

T54
DMI_RXN[3:0] 13

TV IF (Disable)

DMI_RXP[3:0] 13

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

CRT I/F
T32
T34
T47
T42
1

C34

18 INT_CRT_DDCCLK
18 INT_CRT_DDCDAT
18 INT_HSYNC

T39

INT_HSYNCR140
INT_VSYNCR148

AH37
AH36
AN36
AJ35
AH34

CL_CLK0
CL_DATA0
MPWROK
CL_RST#0
MCH_CLVREF_R

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

N28
M28
G36
E36
K36
H36

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLK_MCH_OE#
MCH_ICH_SYNC#

TSATN#

B12

TSATN#

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

B28
B30
B29
C29
A28

CL_CLK0 14
CL_DATA0 14
MPWROK 14
CL_RST#0 14

HSYNC/VSYNC serial R place close to NB

+1.05V_VCC_PEG
D

19 INT_LVDS_PWM
19 INT_LVDS_BLON

18 INT_VSYNC

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

INT HDMI

INT_LVDS_PWM
INT_LVDS_BLON
L_CTRL_CLK

L32
G32
M32

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

L_CTRL_DATA
INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA

M33
K33
J33

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

INT_LVDS_DIGON
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXUCLKOUTINT_TXUCLKOUT+

M29
C44
B43
E37
E38
C41
C40
B37
A37

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2INT_TXLOUT3-

H47
E46
G40
A40

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_TXLOUT3+

H48
D45
F40
B40

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

INT_TXUOUT0INT_TXUOUT1INT_TXUOUT2INT_TXUOUT3-

A41
H38
G37
J37

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+
INT_TXUOUT3+

B42
G38
F37
K37

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R

F25
H25
K25

TVA_DAC
TVB_DAC
TVC_DAC

INT_TV_RNT

H24

TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

C31
E32

TV_DCONSEL_0
TV_DCONSEL_1

INTB

E28

CRT_BLUE

INTG

G28

CRT_GREEN

INTR

J28

CRT_RED

CRT_IRTN

G29

CRT_IRTN

H32
J32
J29
E29
L29

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

INT_CRT_DDCCLK
INT_CRT_DDCDAT
IV@30.1/F_4HSYNC_G
CRTIREF
IV@30.1/F_4VSYNC_G

PEG_COMPI
PEG_COMPO

T37
T36

EXP_A_COMPX

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

C_PEG_TXN0
C_PEG_TXN1
C_PEG_TXN2
C_PEG_TXN3
C_PEG_TXN4
C_PEG_TXN5
C_PEG_TXN6
C_PEG_TXN7
C_PEG_TXN8
C_PEG_TXN9
C_PEG_TXN10
C_PEG_TXN11
C_PEG_TXN12
C_PEG_TXN13
C_PEG_TXN14
C_PEG_TXN15

C497
C121
C495
C137
C490
C148
C487
C158
C484
C164
C481
C170
C476
C174
C468
C179

EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

C_PEG_TXP0
C_PEG_TXP1
C_PEG_TXP2
C_PEG_TXP3
C_PEG_TXP4
C_PEG_TXP5
C_PEG_TXP6
C_PEG_TXP7
C_PEG_TXP8
C_PEG_TXP9
C_PEG_TXP10
C_PEG_TXP11
C_PEG_TXP12
C_PEG_TXP13
C_PEG_TXP14
C_PEG_TXP15

C498
C120
C493
C132
C491
C145
C489
C153
C485
C161
C483
C168
C480
C173
C469
C177

EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

VGA

PM_EXTTS#0
PM_EXTTS#1

PM

14 PM_SYNC#
3,12,31 ICH_DPRSTP#
17 PM_EXTTS#0
17 PM_EXTTS#1
3,14,31 DELAY_VR_PWRGOOD
13 PLT_RST#_NB
3,12 PM_THRMTRIP#
14,31 PM_DPRSLPVR

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

ME

T41
T56

11 MCH_CFG_19
11 MCH_CFG_20

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

ME_JTAG_TMS

MISC

T59
T43

11 MCH_CFG_16

AM35

EXT VGA

IHM@

TV

T46

11 MCH_CFG_12
11 MCH_CFG_13

ME_JTAG_TDO

CFG

T40

11 MCH_CFG_9
11 MCH_CFG_10

AN35

PEG_CLK
PEG_CLK#

HDA

T48
T55

11 MCH_CFG_5
11 MCH_CFG_6
11 MCH_CFG_7

ME_JTAG_TDI

MCH_BSEL0
MCH_BSEL1
MCH_BSEL2
MCH_CFG_3
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20

2 MCH_BSEL0
2 MCH_BSEL1
2 MCH_BSEL2
C

ME_JTAG_TCK

GRAPHICS VID

JTAG_TMS

T67

AL34
AK34

ME JTAG

JTAG_TDI

T65

INT VGA

EV@

LVDS

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

M_CLK_DDR0 17
M_CLK_DDR1 17
M_CLK_DDR3 17
M_CLK_DDR4 17

GRAPHICS

T24

MCH_RSVD15

RSVD

T37

MCH_RSVD14

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

AP24
AT21
AV24
AU20

06

Description

IV@
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9

PCI-EXPRESS

T57
D

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12

DDR CLK/ CONTROL/COMPENSATION

MCH_RSVD1
MCH_RSVD2
MCH_RSVD3
MCH_RSVD4
MCH_RSVD5
MCH_RSVD6
MCH_RSVD7
MCH_RSVD8
MCH_RSVD9

T50
T53
T30
T58
T64
T62
T60
T61
T49

For IV @ Connect to 30.1ohm

For EV@ NC

R153

49.9/F_4

PEG_RXN[15:0] 20

PEG_RXP[15:0] 20

PEG_TXN[15:0] 20

PEG_TXP[15:0] 20

CANTIGA_1p2

DDPC_CTRL for HDMI port C

SDVO_CTRL for HDMI port B

T29

DDPC_CTRLDATA 11
T45
SDVO_CTRLDATA 11
CLK_MCH_OE# 2
MCH_ICH_SYNC# 14

Close U3030
NOTE:
If (G)MCH's HD Audio signals are connected to ICH9M for
iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
only on 1.5V. These power pins on ICH9M can be supplied
with 3.3V if and only if (G)MCH's HDA is not connected to
ICH9M. Consequently, only 1.5V audio/modem codecs can
be used on the platform.

T162
T163
T164
T165
T166

INTR

L48

0@IV

INT_CRT_RED 18

INTG

L49

0@IV

INT_CRT_GRN 18

INTB

L47

0@IV

INT_CRT_BLU 18

C549 C550 C551

C552 C548 C547

*5.6P *5.6P *5.6P

*5.6P *5.6P *5.6P

CANTIGA_1p2

Check list note : CL_REF=0.35V

SM_VREF.Default use voltage divider for poor layout cause +SMDDR_VREF not
meet spec.And Intel circuit PU/PD is 1K,But Check list PU/PD is 10K.

VCCP

<Checklist ver0.8>
If TSATN# is not used, then it must be terminated
with a 56- pull-up resistor to VCCP.
VCCP
TSATN#

R166

R202

0_6

SMDDR_VREF

R189

*10K/F_4

+1.8VSUS_GMCH

56_4

R529

CLK_MCH_OE# 10K_4

R102

VCC3

1K/F_4
MCH_CLVREF_R

SM_VREF

C136

PM_EXTTS#0

10K_4

R152

PM_EXTTS#1

10K_4

R149

R170

0.1u/10V_4

IV&EV Dis/Enable LVDS setting(See DG 1.0 P190 Table 103)

R195
*10K/F_4

511/F_6

VCC3

R122

IV@0_4

LVDS_VREFH
LVDS_VREFL

For IV @ 0ohm
For EV@ NC

R120

For IV @ 2.37K/F
For EV@ NC

IV@2.37K/F_4

LVDS_IBG

R79

IV@10K_4

L_CTRL_CLK

R80

IV@10K_4

L_CTRL_DATA

For IV @ 2.37K 10K

For EV@ NC

IV&EV Dis/Enable CRT setting(See DG 1.0 P190 Table 103)

SM_REXT

R199

R130
R136

*EV@0_4
*EV@0_4

INT_CRT_DDCCLK
INT_CRT_DDCDAT

For IV @ NC
For EV@ 0ohm to GND or NC

R137
R145

*EV@0_4
*EV@0_4

HSYNC_G
VSYNC_G

For IV @ NC
For EV@ 0ohm to GND or NC

SM_PWROK only for DDR3.(DDR2 PD only)

+1.8VSUS_GMCH

+1.8VSUS_GMCH

+1.8VSUS_GMCH

R495

SM_RCOMP_VOH

1K/F_4
C465

C464

0.01u/16V_4

2.2u/6.3V_6

HWPG_1.8V 28,33

R500
R492

R491

R185
*12K/F_4

3.01K/F_4
80.6/F_4

*20/F_4
SM_PWROK

M_RCOMP

M_RCOMP#

Dis TV/En CRT( See DG1.0 P208 Table 118)

499/F_4

R129
R131
R135

EV_IV@150/F_4
EV_IV@150/F_4
EV_IV@150/F_4

INTB
INTG
INTR

R496

*20/F_4

80.6/F_4

http://mycomp.su/x/
5

R488
1K/F_4

C461
0.01u/16V_4

R124
R121

EV_IV@75_4 INT_TV_COMP
EV_IV@75_4 INT_TV_Y/G
EV_IV@75_4 INT_TV_C/R

0_4
0_4

TV_DCONSEL_0
TV_DCONSEL_1

For IV @ 75ohm to GND

For EV@ 0ohm to GND

For IV @ 0ohm to GND

For EV@ 0ohm to GND

For IV @ Connect to 150ohm/F

For EV@ Connect to 0ohm GND

SM_RCOMP_VOL

R497

R125
R132
R139

IV&EV Dis/Enable PLL setting(See DG 1.0 P190 Table 103)

R184
10K/F_6

C458

R119

2.2u/6.3V_6

EV_IV@1K/F_4

CRTIREF

For IV @ Connect to 1.02K/F

For EV@ Connect to 0ohm GND

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

R535
R523
R126
R133

EV@0_4
EV@0_4
EV@0_4
EV@0_4

For IV @ NC
For EV@ 0ohm to GND

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Wednesday, June 04, 2008

Layout Note :See DG1.0 P180

Rev
1A

NB(2/7)
2

Sheet

of

35

07

BOM Option Table

Reference

Description

N/A

N/A

17 M_A_DQ[32..39]

17 M_A_DQ[40..47]

17 M_A_DQ[48..55]
B

17 M_A_DQ[56..63]

SA_RAS#
SA_CAS#
SA_WE#

BB20
BD20
AY20

M_A_RAS#
M_A_CAS#
M_A_WE#

17 M_B_DQ[0..7]
M_A_BS#0 16,17
M_A_BS#1 16,17
M_A_BS#2 16,17
M_A_RAS# 16,17
M_A_CAS# 16,17
M_A_WE# 16,17

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM[0..7] 17

17 M_B_DQ[16..23]

M_A_DQS[0..7] 17

17 M_B_DQ[24..31]

M_A_DQS#[0..7] 17

17 M_B_DQ[32..39]

M_A_A[0..14] 16,17
17 M_B_DQ[40..47]

17 M_B_DQ[48..55]

17 M_B_DQ[56..63]

CANTIGA_1p2

U26E
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

M_A_BS#0
M_A_BS#1
M_A_BS#2

MEMORY

17 M_A_DQ[24..31]

BD21
BG18
AT25

SYSTEM

SA_BS_0
SA_BS_1
SA_BS_2

17 M_B_DQ[8..15]

MEMORY

17 M_A_DQ[16..23]

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

SYSTEM

17 M_A_DQ[8..15]

AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

DDR

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR

U26D

17 M_A_DQ[0..7]

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

M_B_BS#0
M_B_BS#1
M_B_BS#2

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

M_B_RAS#
M_B_CAS#
M_B_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_BS#0 16,17
M_B_BS#1 16,17
M_B_BS#2 16,17
M_B_RAS# 16,17
M_B_CAS# 16,17
M_B_WE# 16,17

M_B_DM[0..7] 17

M_B_DQS[0..7] 17

M_B_DQS#[0..7] 17

M_B_A[0..14] 16,17

CANTIGA_1p2

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Friday, May 30, 2008

Rev
1A

DDRII
5

http://mycomp.su/x/

Sheet
1

of

35

BOM Option Table

+1.8VSUS_GMCH
+1.8VSUS_GMCH

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

BA36
BB24
BD16
BB21
AW16
AW13
AT13

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

+VGFX_CORE_INT

CANTIGA_1p2

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

AJ14
AH14

VCC_AXG_SENSE
VSS_AXG_SENSE

+VGFX_CORE_INT

R174
R173

IV@10/F_6
IV@10/F_6

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

EXT VGA

08

1.8VSUS
0_1206

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

C463

C462

C163

10u/6.3V_8

10u/6.3V_8

0.1u/10V_4

C156
330u/2.5V_7343

C122

C135

C131

C127

0.1u/10V_4

0.22u/6.3V_4

0.22u/6.3V_4

22u/6.3V_8

Close to GMCH

VCCP

C91
VCCP

270u/2V_7343

Close to GMCH
+VGFX_CORE_INT

See Page 9 EV&IV table

C128
IV@0.47u/6.3V_4

C112

C124

C143

C111

C133

IV@1u/16V_6

IV@10u/10V_8

IV@10u/6.3V_8

IV@0.1u/10V_4

IV@0.1u/10V_4

R172

IV@0_0402

R154

IV@0_0402

R164

IV@0_0402

R169

IV@0_0402

R155

IV@0_1206

R519

IV@0_1206

R163

R167

R165

EV@0_6

EV@0_6

EV@0_6

DR8
DR9

Place close to the GMCH

and different location

+VGFX_CORE_INT

+ C92

+ C85

IV@330u/2.5V_7343

IV@330u/2.5V_7343

Close to GMCH

NB Power Status and max current table(1/3)

POWER PLANE

S0

S3

Voltage

I(max)

VCC(EXT_VGA)

S4/S5
X

+1.05V

2178mA

Note

VCC(INT_VGA)

+1.05V

2899mA

VCC_AXG

+1.05V

8700mA

VCC_SM(800)

+1.8VSUS

3A

(DDRII-667) 2.6A

VCC_SM(Standby)

+1.8VSUS

1mA

Self Refresh during S3

Graphics Core
B

(See NB EDS Rev:1.0 Section 10.1 for max current)

(See NB EDS Rev:1.0 Section 12.2 for DC voltage)

Close to each pins

1.8V Internal connect to power

VCC SM LF

VCC NCTF

R156
0_4

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

POWER

VCC_35

VCC GFX NCTF

T32

VCCP

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC GFX

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34

VCC CORE

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

POWER

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

INT VGA

EV@

U26G

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

VCC SM

U26F

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

Description

IV@

+VGFX_CORE_INT
R208

VCCP

Reference

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

AV44
BA37
AM40
AV21
AY5
AM10
BB13
C169

C150

C165

C162

C140

C167

C160

0.1u/10V_4

0.1u/10V_4

0.22u/6.3V_4

0.22u/6.3V_4

0.47u/10V_6

1u/16V_6

1u/16V_6

1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially

2. VCC_AXG_SENSE PU to +VGFX_CORE_INT with 10ohm
and VSS_AXG_SENSE PD with 10ohm for Intel suggest
CANTIGA_1p2

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Friday, March 21, 2008

Rev
1A

NB(4/7) VCC ,NCTF

http://mycomp.su/x/
5

Sheet
1

of

35

+3V_A_TV_CRT
L44

VCC3

C538

Reference

+3V_A_CRT_DAC

C510

R536

C529

C533

IV@0.1u/10V_4

IV@0.01u/16V_4

EV@0_4

IV@0.1u/10V_4

IV@0.01u/16V_4

L46

IV@0_8

VCCP

L13

EXT VGA

IHM@

INT HDMI

R123

C539

C86

C99

EV@0_4
IV@220u/2.5V_7343

INT VGA

EV@

+1.05VM_DPLLA

IV@0_8

R559
+

C546

Description

IV@

C517

DR1
DR7

VCCP

09

BOM Option Table

+3V_A_TV_CRT

+3V_A_DAC_BG

IV@BLM18PG181SN1D_6

IV@10u/10V_8

EV@0_4

IV@0.1u/10V_4

IV@220u/2.5V_7343

IV@0.1u/10V_4

DR11

DR10
VCCP
U26H

L18

+1.05VM_HPLL

0_6
C125

C129

4.7u/10V_6

0.1u/10V_4

+1.05VM_MPLL

0_6

+3V_A_CRT_DAC

B27
A26

+3V_A_DAC_BG

A25
B25

VCCA_DAC_BG
VSSA_DAC_BG

+1.05VM_DPLLA

F47

VCCA_DPLLA

+1.05VM_DPLLB

R187

+1.05VM_MPLL_RC

*0.5/F_6

C134

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

L48

VCCA_DPLLB

+1.05VM_HPLL

AD1

VCCA_HPLL

+1.05VM_MPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

VTT

+1.05VM_MCH_PLL2 R168

PLL

0_6

C142

+1.8VSUS_TXLVDS
0.1u/10V_4

*22u/6.3V_8
C530
IV@1000p/50V_4
VCC1.5

R194

+1.05VM_A_SM

0_6
C172

C154

C155

C151

C152

4.7u/10V_6

1u/6.3V_4

+1.5V_VCCA_PEG_BG AD48

0_8

10u/6.3V_8

0.1u/10V_4

+1.05VM_A_SM

VCCP

R175

+1.05VM_A_SM_CK

0_6
C157

C149

AA48

VCCA_PEG_PLL

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

C144

10u/6.3V_8

C500

C502

2.2u/6.3V_6

4.7u/10V_6

4.7u/10V_6

+1.05VM_AXF

L42

0.1uh_6

C513

C531

1u/6.3V_4

*10u/10V_8

+1.8VSUS_VCC_SM_CK

L37

VCCP

1uh_8

+1.8VSUS_GMCH

C459
R498

+1.8VSUS_SMCK_RC

0.1u/10V_4
C

C466
10u/10V_8

POWER

0.1u/10V_4

270u/2V_7343

+1.8VSUS_TXLVDS

L45

R548

C522

EV@0_4

IV@0.1uh_6

1.8VSUS

C514

IV@1000p/50V_4

IV@10u/6.3V_8
VCCP

DR3
DR4

*2.2u/6.3V_6

C501

0.47u/6.3V_4

1/F_4

+1.05VM_PEGPLL
*10u/6.3V_8

+ C504

C123

C488

+
100u/10V_7343

VCCA_PEG_BG

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

A SM

VCCP

R514

A LVDS

R188

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

A PEG

VCCP

CRT

+1.05VM_DPLLB

C516

IV@0.1u/10V_4

R525

IV@0.01u/16V_4

EV@0_4

DR5

R527
EV@0_4

IF iHDMI not used,HDA

connect ot GND(DG1.0 P277)
+1.5V_VCC_HDA

DR12

B24
A24

VCCA_TV_DAC_1
VCCA_TV_DAC_2

A32

VCC_HDA

VCC1.5

R546

+1.5V_TVDAC

0_6
C518

C524

0.1u/10V_4

0.01u/16V_4

+1.5V_TVDAC

M25

VCCD_TVDAC

+1.5V_QDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

+1.05VM_MCH_PLL2
+1.05VM_PEGPLL

AA47

VCCD_PEG_PLL

M38
L37

VCCD_LVDS_1
VCCD_LVDS_2

+1.5V_QDAC

IV@BLM18PG181SN1D_6

C536

C519

C511

R537

IV@10u/6.3V_8

IV@0.1u/10V_4

IV@0.01u/16V_4

EV@0_4

BAT54

CANTIGA_1p2

BF21
BH20
BG20
BF20

+1.8VSUS_VCC_SM_CK

+3V_VCC_HV

0_6

10_4

+1.05V_SD

R547

VCC3

C525

VCC_TX_LVDS

K47

+1.8VSUS_TXLVDS

VCC_HV_1
VCC_HV_2
VCC_HV_3

C35
B35
A35

+3V_VCC_HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

V48
U48
V47
U47
U46

+1.05V_VCC_PEG

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

AH48
AF48
AH47
AG47

+1.05V_VCC_DMI

+1.05V_VCC_PEG

+1.05V_VCC_PEG
C109

R518

0_8

VCCP

C108
+ C503

VTTLF

+1.8VSUS_DLVDS
0.1u/10V_4
L43

LVDS

C130

VCC1.5

+1.05VM_AXF

0.1u/10V_4

HV

FOR iHDMI HDA I/F only

IHM@0.1u/10V_4

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

PEG

+3V_TV_DAC
C520

B22
B21
A21

R551

+1.5V_VCC_HDA

IHM@0_6

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

DMI

R541

D30

TV

VCC1.5

VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

AXF

C523

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

SM CK

+3V_TV_DAC

IV@0_6

HDA

R545

D TV/CRT

VCC3

A CK

+1.05VM_A_SM_CK

VTTLF1
VTTLF2
VTTLF3

4.7u/10V_6

10u/6.3V_8
220u/2.5V_7343
B

+1.05V_VCC_DMI

R158

0_8

+1.05V_VCC_PEG

C471
0.1u/10V_4
*91nh_32X25

A8
L1
AB2

L38

VCCP

C478
C119

C107

C102

C467

+
*220u/2.5V_7343

0.47u/6.3V_4

0.47u/6.3V_4

0.47u/6.3V_4

Del it to save space?

*10u/10V_8

DR6

NB Power Status and max current table(2/3)(NB left side)

POWER PLANE
VCCP

L40

+1.05VM_PEGPLL

BLM18PG181SN1D_6

R515

VCCA_CRT_DAC

S4/S5

I(max)

+3.3V

73mA

Note

EXT&INT VGA Power Plane Option table

POWER PLANE

EXT VGA

INT VGA

MARK

+3.3V

VCCD_LVDS

GND

+1.8VSUS

DR2

+1.05V

64.8mA

VCC_TX_LVDS

GND

+1.8VSUS

DR3

+1.05V

64.8mA

VCCA_LVDS

GND

+1.8VSUS

DR4

VCCA_HPLL

+1.05V

24mA

VCCA_MPLL

+1.05V

139.2mA

VCCA_LVDS

+1.8VSUS

+1.8VSUS_DLVDS

IV@0_6
C534
IV@1u/6.3V_4

R540
EV@0_4

DR2

http://mycomp.su/x/

VCCA_AXF

VCC_SM_CK(800)

VCC_TX_LVDS

Voltage

I(max)

+1.05V

852mA

+1.05V

322mA

+1.8VSUS

124mA

+1.8VSUS

119mA

VCC_HV

+3V

GND

+3V

DR5

VCC_PEG

+1.05V

1782mA

VCCD_QDAC

GND

+1.5V

DR6

VCC_DMI

+1.05V

456mA

+1.5V

+1.5V

VCCA_PEG_BG

+1.5V

414uA

VCCA_DAC_BG

GND

+3V

DR7

+1.05V

50mA

VCC_AXG

GND

+1.05V

DR8 Page 8

VCCA_SM(DDRII-800)

+1.05V

720mA

(DDRII-667) 480mA

VCC_AXG_NCTF

GND

+1.05V

DR9 Page 8

VCCA_SM_CK(800)

26mA

(DDRII-667) 24mA

VCCA_DPLLA

GND

+1.05V

DR10

VCCA_TV_DAC

+3.3V

79mA

VCCA_DPLLB

GND

+1.05V

DR11

VCC_HDA

+1.5V

50mA

VCC_HDA

GND

+1.5V

DR12 For iHDMI

VCCD_TVDAC

+1.5V

35mA

VCCD_QDAC

+1.5V

125uA

VCCD_HPLL

+1.05V

157mA

VCCD_PEG_PLL

+1.05V

50mA

VCCD_LVDS

+1.8VSUS

60mA
3

S4/S5

VCCA_TV_DAC

VCCD_TVDAC

VCCA_PEG_PLL

+1.05V

VTT

VCCA_DPLLB

13.2mA

S3

DR1

VCCA_DPLLA

+1.05VM_PEGPLL_RC

S0

+3V

VCCA_DAC_BG

1/F_4

POWER PLANE

GND

0.1u/10V_4

5mA

NB Power Status and max current table(3/3)(NB Right side)

VCCA_CRT_DAC

0.1u/10V_4

10u/10V_8

Voltage

C496

1.8VSUS

S3

C494

C499

R552

S0

Note
FSB at 1067MHz

(DDRII-667) 120mA

106mA

(See NB EDS Rev:1.0 Section 10.1 for max current)

(See NB EDS Rev:1.0 Section 12.2 for DC voltage)

EXT VGA->Disable TV/CRT/LVDS/HDMI(See DG 1.0 P190 Table 103)

PROJECT : PB5/6

INT VGA->Disable TV/Enable CRT( See DG1.0 P208 Table 118)

Quanta Computer Inc.

INT VGA->Disable HDMI(See DG 1.0 P277 section 3.10.4)

Size

Document Number

Date:

Thursday, April 24, 2008

Rev
1A

NB(5/7) POWER
2

Sheet

of

35

VSS

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233

BA16

VSS_235

AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CANTIGA_1p2

VSS

VSS NCTF

10

U26J
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

VSS SCB

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

NC

U26I
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

VSS_351
VSS_352
VSS_353
VSS_354
VSS_355

U24
U28
U25
U29
AJ6

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4

BH48
BH1
A48
C1

VSS_SCB_6
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43

BOM Option Table

Reference

Description

N/A

N/A

MCH_VSS_351
MCH_VSS_352
MCH_VSS_353
MCH_VSS_354
MCH_VSS_355

R160
R159
R151
R157
R178

0_4
0_4
0_4
0_4
0_4

A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
A47

PROJECT : PB5/6

CANTIGA_1p2

Quanta Computer Inc.

Size

Document Number

Rev
1A

NB(6/7) VSS
Date:
5

http://mycomp.su/x/

Sheet

Friday, March 21, 2008

1

10

of

35

North Bridge Strap Pin Configuration Table

11

(See DG 1.0 P295 Table 184)

(See NB EDS 1.0 P187 Table 74)

Pin Name
D

Strap description

Configuration

PU<4.02K> PD <2.21K>

CFG[2:0]

FSB Frequency Select

CFG[4:3]

Reserved

CFG5

DMI X2 Select

0 = DMI X2
1 = DMI X4(Default)

6 MCH_CFG_5

CFG6

iTPM Host Interface

0 = iTPM Host Interface is enabled

1 = iTPM Host Interface is disabled(Default)

6 MCH_CFG_6

CFG7

ME TLS Confidentiality

0 = AMT Firmware will use TLS cipher suite with no confidentiality

1 = AMT Firmware will use TLS cipher suite with confidentiality(Default)

6 MCH_CFG_7

CFG8

Reserved

[000]= FSB 1066MHz

[010] = FSB 800MHz

[011] = FSB 667MHz

Note

See Page 2 FSB selection table

CFG9

PCI Express Graphics

Lane Reversal

0 = Reverse Lanes
1 = Normal operation(Default)

6 MCH_CFG_9

CFG10

PCIE Loopback enable

0 = Enabled
1 = Disabled (Default)

6 MCH_CFG_10

CFG11

Reserved

CFG12

ALLZ

0 = ALLZ mode enable

1 = disable(Default)

6 MCH_CFG_12

CFG13

XOR

0 = XOR mode enable

1 = disable(Default)

6 MCH_CFG_13

CFG[15:14]

Reserved

CFG16

FSB Dynamic ODT

0 = Dynamic ODT disable

1 = Dynamic ODT Enable(Default)

6 MCH_CFG_16

CFG[18:17]

Reserved

CFG19

DMI Lane Reversal

0 = Normal (Default)
1 = Lanes Reversed

6 MCH_CFG_19

CFG20

Digital Display Port

(SDVO/DP/iHDMI)
Concurrent with PCIE

0 = Only Digital Display port (SDVO/DP/iHDMI) or PCIE is

operational (Default)
1 = Digital Display port (SDVO/DP/iHDMI) and PCIE are operating
simultaneously via PEG port

6 MCH_CFG_20

SDVO_CTRLDATA

SDVO Present

0 = No SDVO/HDMI/DP Device Present(Default)

1 = SDVO/HDMI/DP Device present

L_DDC_DATA

Local Flat Panel(LFP) Present

0 = LFP Disable(Default)
1 = LFP Card Present;PCIE disable

DDPC_CTRLDATA

Digital Display Present

0 = Digital display(HDMI/DP) device absent(Default)

1 = Digital display(HDMI/DP) device present

6 SDVO_CTRLDATA

6,19 INT_LVDS_EDIDDATA

6 DDPC_CTRLDATA

R115

*4.02K/F_4

R146

*10K/F_4

R142

*4.02K/F_4

Enable iTPM

BOM Option Table

R549

*4.02K/F_4

R550

*4.02K/F_4

R144

*4.02K/F_4

R150

*4.02K/F_4

R138

*4.02K/F_4

R85

*4.02K/F_4

VCC3

R84

*4.02K/F_4

VCC3

R92

*2.2K/F_4

VCC3

R103

*2.2K/F_4

VCC3

R90

*2.2K/F_4

VCC3

Reference

Description

N/A

N/A

Enable iTPM Table

A

PAGE

Net Name

PU & PD

NOTE

11

MCH_CFG_6

PD 10K to GND

NB Strap pin

13

SPI_MOSI

PU 20K to +3V_S5

SB Strap pin

14

CLGPIO5

PU 10K to +3V_S5

SB Strap pin

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Rev
1A

NB(7/7) STRAP
Date:
5

http://mycomp.su/x/

Sheet

Friday, May 30, 2008

1

11

of

35

RTC CRYSTAL

BOM Option Table

Layout note:
DPRSTP# , Daisy Chain
(SB>Power>NB>CPU)

Reference

LDRQ0/1# : Internal PU

A25
F20
C22

RTCRST#
SRTCRST#
INTRUDER#

CLK_32KX2
ICH_INTVRMEN

CLEAR_CMOS

LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2

D13
D12
E13

LAN_TXD0
LAN_TXD1
LAN_TXD2

ICH_GPIO56

B10

GPIO56

GLAN_COMP

B28
B27

GLAN_COMPI
GLAN_COMPO

HDA_BIT_CLK_R
HDA_SYNC_R

AF6
AH4

HDA_BIT_CLK
HDA_SYNC

CLEAR_CMOS 28

20K_6
C395

G2
*SHORT_ PAD

1u/6.3V_4

VCCRTC

20K_6

SRTC_RST#

21 ACZ_SDIN0

R316

G1
*SHORT_ PAD

C317
1u/6.3V_4

T168
T167
T85

T133
T87

R424

1M_4

R317

332K/F_4

SM_INTRUDER#

(DG 1.0 Table-292)

ICH_INTVRMEN

Internal VRM enabled for

VccSus1_05, VccSus1_5,
VccCL1_5, VccLAN1_05 and
VccCL1_05.

FWH4/LFRAME#

K3

LFRAME#

AE7

HDA_RST#

ACZ_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AF4
AG4
AH3
AE5

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDOUT_R

AG5

HDA_SDOUT

ICH_GPIO33
ICH_GPIO34

AG7
AE8

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

SATA_LED#

AG8

SATALED#

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

AJ16
AH16
AF17
AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C

AH13
AJ13
AG14
AF14

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

LAD0
LAD1
LAD2
LAD3

J3
J1

A20GATE
A20M#

N7
AJ27

GATEA20
H_A20M#

DPRSTP#
DPSLP#

AJ25
AE23

H_DPRSTP#_R
H_DPSLP#_R

FERR#

AJ26

H_FERR#_R

CPUPWRGD

AD22

H_PWRGD

IGNNE#

AF25

H_IGNNE#

INIT#
INTR
RCIN#

AE22
AG25
L3

H_INIT#
H_INTR
RCIN#

24,28
24,28
24,28
24,28

12

INT HDMI

+1.05V_ICH_IO
VCC3

LFRAME# 24,28

LDRQ#0
LDRQ#1

LDRQ0#
LDRQ1#/GPIO23

HDA_RST#_R

T86

VCCRTC

GLAN_CLK

C13

An RC delay circuit with a time delay in the range

of 18 ms to 25 ms should be provided

R425

INTVRMEN
LAN100_SLP

E25

F14
G13
D14

RESET JUMP
VCCRTC

B22
A22

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

LAD0
LAD1
LAD2
LAD3

T120
T93

R459
*56_4

R458
R233

0_4
0_4

R473

56_4

GATEA20 R289

8.2K_4

RCIN#

10K_4

R294

R457
56_4

ICH_DPRSTP# 3,6,31
H_DPSLP# 3

H_FERR#

H_FERR# 3

H_PWRGD 3
H_IGNNE# 3
H_INIT# 3
H_INTR 3
RCIN# 28

NMI
SMI#

AF23
AF24

H_NMI
H_SMI#_R

AH27

H_STPCLK#

THRMTRIP#

AG26

H_THERMTRIP_R

TP12

AG27

ICH_TP12

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AH11
AJ11
AG12
AF12

SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4_C
SATA_TXP4_C

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10

SATA_RXN5_C
SATA_RXP5_C
SATA_TXN5_C
SATA_TXP5_C

SATA_CLKN
SATA_CLKP

AH18
AJ18

CLK_PCIE_SATA#
CLK_PCIE_SATA

SATARBIAS#
SATARBIAS

AJ7
AH7

SATA_RBIAS_PN

H_NMI

+1.05V_ICH_IO

R219

0_4

H_SMI#

H_SMI#

R218
56_4

H_STPCLK# 3
R456

56_4

H_THERMTRIP_RR

T136

R217

*0_4

PM_THRMTRIP#

PM_THRMTRIP# 3,6

Layout note:
PU R needs to placed within 2" of ICH9-M,
series R must be placed within 2"of PU R w/o stub.

SATA I/F
CLK_PCIE_SATA# 2
CLK_PCIE_SATA 2

R468

ICH9M REV 1.0

SATA_RBIAS_PN<0.5".Avoid routing
next to clock/high speed signals

RVCC3

+1.05V_ICH_IO

R226
*56_4

GATEA20 28
H_A20M# 3

STPCLK#

IHDA

RTC
LPC

RTCX1
RTCX2

CLEAR_CMOS
SRTC_RST#
SM_INTRUDER#

K5
K4
L6
K2

SATA

10M_6

3
4

10p/50V_4

C23
C24

R335

32.768KHZ
Y4
C324

CLK_32KX1
CLK_32KX2

LAN / GLAN
CPU

CLK_32KX1

10p/50V_4

2
1

C325

Description

IHM@

U22A

24.9/F_4

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

C440
C439
C437
C438

3900p/25V_4
3900p/25V_4
3900p/25V_4
3900p/25V_4

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

C436
C435
C433
C434

3900p/25V_4
3900p/25V_4
3900p/25V_4
3900p/25V_4

SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C

SATA_RXN4
SATA_RXP4
SATA_TXN4
SATA_TXP4

SATA_RXN4
SATA_RXP4
SATA_TXN4
SATA_TXP4

C360
C359
C361
C362

3900p/25V_4
3900p/25V_4
3900p/25V_4
3900p/25V_4

SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4_C
SATA_TXP4_C

SATA_RXN5
SATA_RXP5
SATA_TXN5
SATA_TXP5

SATA_RXN5
SATA_RXP5
SATA_TXN5
SATA_TXP5

C629
C630
C628
C627

3900p/25V_4
3900p/25V_4
3900p/25V_4
3900p/25V_4

SATA_RXN5_C
SATA_RXP5_C
SATA_TXN5_C
SATA_TXP5_C

To SATA HDD

26
26
26
26

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

To SATA HDD1

26
26
26
26

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

To SATA ODD

26
26
26
26

To eSATA

27
27
27
27

BIT_CLK_AUDIO
R327

ICH_GPIO56

10K_4

R462
0
VCC1.5
R311

24.9/F_4

GLAN_COMP

24.9 Ohm pull up to 1.5V for

GLAN_COMPI/O is required, no
matter intel LAN is used or not.

C432
10p

HD Audio I/F(CODEC& iHDMI)

RTC BATTERY
3VPCU

VCCRTC
R613

HDA_SDOUT_R

R476

33_4

ACZ_SDOUT_AUDIO

21

1K_4

R614
D26

R_3VRTC
D27
HDA_SYNC_R
HDA_RST#_R

R466

33_4

R442

33_4

ACZ_SYNC_AUDIO

1
RB500V

1
RB500V

0
CLEAR_CMOS 28

C394

21

ACZ_RST#_AUDIO 21

1u/10V_6
R417
HDA_BIT_CLK_R

South Bridge Strap Pin (1/3)

R464

33_4

RTC_N02

Strap description

Sampled

Configuration

Flash Descriptor Security

Override Strap

PWROK

0 = The Flash Descriptor Security will be overridden.

1 = The security measures defined
in the Flash Descriptor will be in effect

PU/PD
2

Pin Name

5VPCU

1K_4

BIT_CLK_AUDIO 21

HDA_DOCK_EN/
GPIO33

This strap should only be enabled in manufacturing

environments using an external pull-up resistor.

SATALED#

PCI Express Lane Reversal

(Lanes 1-4)

PWROK

TP3

XOR Chain Entrance

PWROK

HDA_SDOUT

XOR Chain Entrance /PCI Express*

Port Config 1 bit 1(Port 1-4)

PWROK

http://mycomp.su/x/

R428

8.66K/F_4 R432

R431
4.7K_4

CN11

3
4

3
4

1
2

8.66K/F_4

Q17
MMBT3904

1
2

RTC_N03

R430

15K_4

53261-0290
85204-0200-2P-L

Internal PU
ICH_TP3

HDA_SDOUT

RSVD

Enter XOR Chain

Normal opration(Default)

Set PCIE port config bit 1

Description

14

ICH_TP3

ICH_TP3

R299

PROJECT : PB5/6

*1K_4

Quanta Computer Inc.

HDA_SDOUT_R

R467

*1K_4

Size

+3V_HDA_IO_ICH

Document Number

Rev
1A

SB(1/4) HOST

PU VCC1.5

Date:
2

Sheet

Friday, May 30, 2008

1

12

of

35

BOM Option Table

PCI/PCI-E/USB/DMI/SPI
AD[0..31]

25

R435
R434
T91
T109

INTA#

0_4
*0_4

INTA#_R
INTB#_R
INTC#_R
INTD#_R

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

F1
G4
B6
A7
F13
F12
E6
F6

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

D8
B4
D6
A5

CBE0#
CBE1#
CBE2#
CBE3#

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

PLTRST#
PCICLK
PME#

C14
D4
R2

PLT_RST-R#
PCLK_ICH
PCI_PME#

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

Interrupt I/F

J5
E1
J6
C4

PIRQA#
PIRQB#
PIRQC#
PIRQD#

INTE#
INTF#
INTG#
INTH#

H4
K6
F2
G2

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

REQ0#
GNT0#
T113
T102
T110
T92
T103
T104

25
25

CBE0#
CBE1#
CBE2#
CBE3#

25
25
25
25

IRDY#
PAR
PCIRST#
DEVSEL#

25
25
24,25,28
25

STOP#
TRDY#
FRAME#

25
25
25

24
24
24
24

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

C274
C271

0.1u/10V_4
0.1u/10V_4

PCIE_TXN1_C
PCIE_TXP1_C

N29
N28
P27
P26

PERN1
PERP1
PETN1
PETP1

24
24
24
24

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

C285
C278

0.1u/10V_4
0.1u/10V_4

PCIE_TXN2_C
PCIE_TXP2_C

L29
L28
M27
M26

PERN2
PERP2
PETN2
PETP2

24
24
24
24

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

C296
C300

0.1u/10V_4
0.1u/10V_4

PCIE_TXN3_C
PCIE_TXP3_C

J29
J28
K27
K26

PERN3
PERP3
PETN3
PETP3

24
24
24
24

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

C302
C304

0.1u/10V_4
0.1u/10V_4

PCIE_TXN4_C
PCIE_TXP4_C

G29
G28
H27
H26

PERN4
PERP4
PETN4
PETP4

E29
E28
F27
F26

PERN5
PERP5
PETN5
PETP5

PCIE_TXN6_C
PCIE_TXP6_C

C29
C28
D27
D26

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

T100
T99
T95

SPI_CLK
SPI_CS0#
SPI_CS1#

D23
D24
F23

T108
T101

SPI_MOSI
SPI_MISO

D25
E23

USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
USBOC#8
USBOC#9
USBOC#10
USBOC#11

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

23
23
23
23

PCLK_ICH 2
PCI_PME# 25

PCIE_RXN6
PCIE_RXP6
PCIE_TXN6
PCIE_TXP6

C309
C308

0.1u/10V_4
0.1u/10V_4

T98

ICH9M REV 1.0

PLT_RST-R#

R346

0_4

GFXRST#

R345

0_4

PLT_RST#_NB

INT VGA

EV@

EXT VGA

13

U22D

PCI

GFXRST# 20
PLT_RST#_NB 6

VCC3

PCI ROUTING
IDSEL
TABLE
REQ0# / GNT0# AD17

INTERUPT

DEVICE

INTA#/INTB#

OZ129T

REQ1# / GNT1# AD20

INTC#/INTD#

CB1410

USBRBIAS_PN

AG2
AG1

PCI-Express

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

Description

IV@

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

V27
V26
U29
U28

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB27
AB26
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

T26
T25

CLK_PCIE_ICH#
CLK_PCIE_ICH

AF29
AF28

DMI_IRCOMP_R

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
USBP11USBP11+

Direct Media Interface

U22B
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

SPI

25

Reference

USB

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

6
6
6
6

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

6
6
6
6

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

6
6
6
6

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

6
6
6
6

+1.5V_PCIE_ICH

R247
24.9/F_4

CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
USBP9USBP9+
T123
T124
T126
T125

27
27
27
27
27
27
27
27
19
19
27
27
24
24
24
24
24
24
24
24

ICH9M REV 1.0

R244
22.6/F_4

C450

0.1u/50V_6
U13
2

PLTRST#

4
TC7SH08FU

R344
100K_4

PLTRST# 23,24

R411
*100K_6

South Bridge Strap Pin (2/3)

Pin Name

Strap description

PCI PULL-UP
Sampled

Configuration

USBOC# PULL-UP

PU/PD

RP48
FRAME#
IRDY#
LOCK#
REQ2#

HDA_SYNC

PCI Express Port

Config 1 bit 0 (Port 1-4)

PWROK

0 = Default
1 = Setting bit 0

GNT2# / GPIO53

PCI Express Port

Config 2 bit 2 (Port 5-6)

PWROK

0 = Setting bit 2
1 = Default

GNT1# / GPIO51

ESI Strap(Server Only)

PWROK

0 = DMI for ESI-compatible

1 = Default

VCC3

GNT3# / GPIO55

Top-Block Swap Override

PWROK

VCC3

6
7
8
9
10

RP45

5
4
3
2
1

USBOC#7
USBOC#1
USBOC#0
USBOC#3

INTB#_R
STOP#
REQ1#
DEVSEL#

3VSUS

6
7
8
9
10

8.2K_10P8R

0 = "top-block swap" mode

1 = Default

GNT3#

R330

*1K_4

VCC3

6
7
8
9
10

USBOC#6
USBOC#2
USBOC#5
USBOC#4

3VSUS

10K_10P8R

VCC3

RP47
INTH#
REQ0#

5
4
3
2
1

RP38

5
4
3
2
1

INTG#
REQ3#
PERR#
INTD#_R

USBOC#9
USBOC#8
USBOC#11
USBOC#10

8
6
4
2

7
5
3
1

3VSUS

10K_8P4R

8.2K_10P8R
A

SPI_MOSI

Integrated TPM Enable

CLPWROK

0 = INT TPM disable(Default)

1 = INT TPM enable

Disable iTPM
SPI_MOSI

R331

*20K_4

3VSUS
VCC3

RP46
PCI_GNT#0

GNT0#

Boot BIOS Selection 0

SPI_CS#1

Boot Location

INTC#_R
GNT0#

PWROK

R306

*1K_4
INTF#

SPI(Default)
VCC3

SPI_CS1# /
GPIO58 / CLGPIO6

Boot BIOS Selection 1

http://mycomp.su/x/
5

CLPWROK

PCI

LPC

6
7
8
9
10

5
4
3
2
1

INTA#_R
SERR#
INTE#
TRDY#

PROJECT : PB5/6
Quanta Computer Inc.

8.2K_10P8R
SPI_CS1#

R302

*1K_4

Size

Document Number

Rev
1A

SB (2/4) PCIE/PCI/USB
Date:
3

Sheet

Friday, May 30, 2008

1

13

of

35

BOM Option Table

RVCC3

R341

10K_4

ICH_GPIO60

R340

10K_4

SMB_CLK_ME

R338

10K_4

SMB_DATA_ME

R319

10K_4

RI#

2,24 SCLK
2,24 SDATA

T121

R337

10K_4

SYS_RST#

R339

10K_4

SMB_ALERT#

R619

*10K_4

SYS_RST#

PM_SYNC#

SCLK
SDATA
ICH_GPIO60
SMB_CLK_ME
SMB_DATA_ME
RI#

F19

SUS_STAT#
SYS_RST#

R4
G19

PM_SYNC#

M6

SMB_ALERT#
WP#

VCC3
R342

10K_4

STPPCI#

R320

10K_4

STPCPU#

8.2K_4

25

10K_4

28

R286

10K_4

SERIRQ

R220

8.2K_4

THERM_ALERT#

R215

10K_4

KBSMI#

R334

*10K_4

SCI#

R440

10K_4

ICH_GPIO35

R253

10K_4

ICH_GPIO38

R243

10K_4

ICH_GPIO39

T82
T161

T83
T115

T84

SCI#(PU to MAIN or S5)

leakage issue
R350

RVCC3

6 MCH_ICH_SYNC#

R221

0_4

12

SCI#

10K_4

21

SPKR
ICH_TP3
T81
T135
T134

VRMPWRGD
TP11

ICH_GPIO35
ICH_GPIO38
ICH_GPIO39
ICH_GPIO48
DMI_TERM_SEL
CLGPIO5

AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8

GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

SPKR
MCH_ICH_SYNC#_R
ICH_TP3
ICH_TP8
ICH_TP9
ICH_TP10

M7
AJ24
B21
AH20
AJ20
AJ21

SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10

*10K_4

R328

100/F_4

Description

N/A
BOARD_ID3
BOARD_ID2
ICH_GPIO36
ICH_GPIO37

N/A

H1
AF3

14M_ICH
CLKUSB_48

SUSCLK

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

C16
E16
G17

SUSBR#
SUSCR#
SLP_S5#

S4_STATE#/GPIO26

C10

ICH_GPIO26

G20

ICH_PWROK

M2

PM_DPRSLPVR_R

PWROK
DPRSLPVR/GPIO16

14M_ICH 2
CLKUSB_48 2

VCC3

T122
R323
R324

SUSB#
SUSC#

0_4
0_4

SUSB#
SUSC#

28
28

*10K_4

ICH_GPIO36

R266

10K_4

ICH_GPIO37

R222

10K_4

PM_BATLOW#

R325

8.2K_4

DNBSWON#

R280

10K_4

PM_LAN_ENABLE_R

R336

0_4

RVCC3

T94
T105

BATLOW#

B13

PM_BATLOW#

PWRBTN#

R3

DNBSWON#

LAN_RST#

D20

PM_LAN_ENABLE_R

RSMRST#

D22

PM_RSMRST#_R

CK_PWRGD

R5

CK_PWRGD

CLPWROK

R6

ECPWROK

SLP_M#

B16

SLP_M#

CL_CLK0
CL_CLK1

F24
B19

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

F22
C19

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

C25
A19

CL_VREF0_SB
CL_VREF1_SB

CL_RST0#
CL_RST1#

F21
D18

CL_RST#0
CL_RST#1

MEM_LED/GPIO24
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
WOL_EN/GPIO9

A16
C18
C11
C20

ICH_GPIO24
HDPACT
ICH_GPIO14
SWI#

0_4 PM_DPRSLPVR

R441

PM_DPRSLPVR 6,31

PM_BATLOW# 28
DNBSWON#
R318

28

*0_4 PM_RSMRST#_R

CK_PWRGD
R285

2
0_4

MPWROK 6

VCC3

VCC3

T111
CL_CLK0 6

R427

R288

T112
3.24K/F_6

CL_DATA0 6
T106

*3.24K/F_6

CL_VREF0_SB

CL_VREF1_SB

C399
CL_RST#0 6

R426

0.1u/10V_4

C289

453/F_4

R290

*0.1u/10V_4

*453/F_4

T96
HDPACT

RVCC3

CLGPIO5

VCC3
R236

14

ICH9M REV 1.0

Enable iTPM(PU to PCU or S5?)

R329

WAKE#
SERIRQ
THRM#

A20

BOARD_ID4
WP#

28 WP#

CLKRUN#

D21

ICH_GPIO13
BOARD_ID0
BOARD_ID1

T90

STP_PCI#
STP_CPU#

ICH_TP11

SCI#

28 SCI#
19 BLON

SMBALERT#/GPIO11

AH23
AF19
AE21
AD20

P1

CLK14
CLK48

PMSYNC#/GPIO0

VR_PWRGD_CLKEN

KBSMI#
Port_C#

KBSMI#

SUS_STAT#/LPCPD#
SYS_RESET#

A14
E19

E20
M5
AJ23

PCIE_WAKE#
T116

RI#

A17

L4

PCIE_WAKE#
SERIRQ
THERM_ALERT#

VCC3

RVCC3

STPPCI#
STPCPU#

0
0
CLKRUN#

CLKRUN#

23,24 PCIE_WAKE#
28
SERIRQ
3,29 THERM_ALERT#

CLKRUN#

RVCC3
R297

R620
R621

2 PM_STPPCI#
2 PM_STPCPU#

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA
GPIO

SDATA

SMB

2.2K_4

U22C
G16 SMBCLK
A13 SMBDATA
E17 LINKALERT#/GPIO60/CLGPIO4
C17 SMLINK0
B18 SMLINK1

Clocks

R343

R298

Reference
SCLK

SYS GPIO
Power MGT

2.2K_4

MISC
GPIO
Controller Link

R301

28

MCH_ICH_SYNC#_R

SWI#

ICH_GPIO24

R322

*10K_4

HDPACT

R321

*10K_4

ICH_GPIO14

R326

10K_4

SWI#

R293

10K_4

R312

*10K_4

RVCC3
VCC3

C341

DELAY_VR_PWRGOOD need PU 2K to +3V.

ZS2 PU at power side(NEED CHECK PWR CKT)
DELAY_VR_PWRGOOD 1

3,6,31 DELAY_VR_PWRGOOD
U17

1
2
3

R373

5
4
NC7SZ04

VR_PWRGD_CLKEN

2
100K_4

U18
4

ICH_PWROK
R478

*0_4

TC7SH08FU
R375
10K_4

C637

Q19
MMBT3906

1000P
PM_RSMRST#_R

R369
100K_4

RSMRST# 28

R472

4.7K_4

RVCC3

R477
10K_4

31 VR_PWRGD_CK410#

VR_PWRGD_CK410#

ECPWROK

19,28 ECPWROK

0.1u/10V_4

0.1u/16V_4

C339

D29
BAV99

Pin Name
GPIO20

Strap description
Reserved

Sampled

Configuration

PU/PD

Board ID

ID4

BOARD_ID3 of TE1M always keep

low, TE1 hasn't support TV

ID3

ID2

ID1

R227

PWROK

H
L

CCFL Panel
LED Panel

SPKR

GPIO49

No Reboot

PWROK

DMI Termination
Voltage

PWROK

0 = for desktop applications

1 = for mobile applications
Internal PU

http://mycomp.su/x/

SPKR

R291

*1K_4

VCC3

H
L

W/ G-SENSOR
W/O G-SENSOR

R241

*1K_4

W/ HDMI
W/O HDMI

VCC3

VCC3

VCC3

R461

R224

R436

D28
BAV99

3
R455
2.2K_4

R267

*10K_4

*10K_4

*10K_4

*10K_4

*10K_4

BOARD_ID4

BOARD_ID3

BOARD_ID2

BOARD_ID1

BOARD_ID0

PROJECT : PB5/6
R239
*10K_4

H
L

W/ TV
W/O TV
DMI_TERM_SEL

VCC3

ID0
H
L

NEW CARD
CARD BUS

0 = Default
1 = No Reboot mode

VCC3

Board ID Table

South Bridge Strap Pin (3/3)

R460
*10K_4

R216

R437

*10K_4

*10K_4

R258

Quanta Computer Inc.

*10K_4
Size

Document Number

Date:

Friday, May 30, 2008

Rev
1A

SB(3/4) GPIO

H
L
3

Sheet
1

14

of

35

BOM Option Table

Reference

Description

N/A

N/A

15

U22F

A6

+5VPCU_ICH_V5REF_SUS

1 BAT54

C315
R332

VCC5

3VPCU

D21

0.1u/10V_4

10/F_6

1 BAT54

C216
R257

5VPCU

0.1u/10V_4

10/F_6

+1.5V_PCIE_ICH
VCC1.5

L23

+1.5V_PCIE_ICH

2 BLM21PG221SN1D_8

220u/2.5V_7343

C219

C277

10u/6.3V_8

C287

10u/6.3V_8

2.2u/6.3V_6

VCC1.5

R259

0_8

+1.5V_SATA_ICH L22

+1.5V_APLL_ICH

10uh_8
C208

10u/10V_8

1u/6.3V_4

+1.5V_SATA_ICH

VCC1_5_B[1]
VCC1_5_B[2]
VCC1_5_B[3]
VCC1_5_B[4]
VCC1_5_B[5]
VCC1_5_B[6]
VCC1_5_B[7]
VCC1_5_B[8]
VCC1_5_B[9]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

VCC1_5_A[1]
VCC1_5_A[2]
VCC1_5_A[3]
VCC1_5_A[4]
VCC1_5_A[5]
VCC1_5_A[6]
VCC1_5_A[7]
VCC1_5_A[8]

1u/6.3V_4
+1.5V_SATA_ICH

VCC1.5

R268

+1.5V_USB_ICH

0_8
C261
0.1u/10V_4

C314

VCC1_5_A[21]
VCC1_5_A[22]

AC12
AC13
AC14

VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]

VCCLAN1_05[1]
VCCLAN1_05[2]

+3VM_VCCPAUX

A12
B12

VCCLAN3_3[1]
VCCLAN3_3[2]

+1.5V_ICH_GLANPLL_R

A27

VCCGLANPLL

+1.5V_PCIE_ICH

D28
D29
E26
E27

VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

+SB_VCCGLAN3_3

A26

1uh_6

VCC_DMI[1]
VCC_DMI[2]

W23
Y23

V_CPU_IO[1]
V_CPU_IO[2]

AB23
AC23

VCC3_3[1]

AG29

+3V_DMI_ICH

VCC3_3[2]

AJ6

+3V_SATA_ICH

VCC3_3[7]

AC10

VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]

AD19
AF20
AG24
AC20

VCC3_3[8]
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

C286

0.1u/10V_4

0.1u/10V_4

VCCP
U22E

+1.5V_ICH_VCCDMIPLL

L26
C272

C273

0.01u/16V_4

10u/10V_8

C275

C276

4.7u/10V_6

10u/6.3V_8

+1.05V_ICH_DMI

1uh_6

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

VCC1.5

+1.05V_ICH

R282

0_6

R275

0_6

VCCP

R469

0_6

VCC3

+1.05V_ICH_IO
+1.05V_ICH_IO
C247

C254

C234

0.1u/10V_4

0.1u/10V_4

4.7u/10V_6

C431
0.1u/10V_4

+3V_VCCPCORE_ICH

R470

0_6

VCC3

R269

0_6

VCC3

C441
0.1u/10V_4

B9
F9
G3
G6
J2
J7
K7

+3V_PCI_ICH

AJ4

+3V_HDA_IO_ICH

+3V_HDA_IO_ICH

C230
0.1u/10V_4

VCCSUSHDA

AJ3

+3V_VCCSUSHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

AC8
F17

+TP_VCCSUS1_05_ICH_1
+TP_VCCSUS1_05_ICH_2

T89
T97

VCCSUS1_5[1]

AD8

+TP_VCCSUS1_5_ICH_1

T88

VCCSUS1_5[2]

F18

+VCCSUS1_5_INT_ICH

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]

A18
D16
D17
E22

+3VPCU_ICH

VCCSUS3_3[5]

AF1

VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

R315

VCC3

R232

0_6

VCC1.5

R231

0_6

RVCC1.5

R308

0_6

RVCC3

R279

0_8

C288

C297

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

C298
0.1u/10V_4

0_8

C301

C207
0.1u/10V_4

C210
0.1u/10V_4

+3VPCU_USB_ICH
C220

C267

C266

0.022u/16V_4

0.022u/16V_4

0.1u/10V_4
Check list:
0.1U for Pin AF1

VCCCL1_05

G22

+VCCCL1_05_INT_ICH

VCCCL1_5

G23

+VCCCL1_5_INT_ICH

VCCCL3_3[1]
VCCCL3_3[2]

A24
B24

C293

C292

C299

*0.1u/10V_4

*0.1u/10V_4

0.1u/10V_4

+3VM_VCCCL3_ICH

R313

0_6

VCC3

C310

C311

10u/10V_8

2.2u/6.3V_6

SB Power Status and max current table(1/2)(SB left side)

S0

S3

VCCRTC

+VCCRTC

6uA

C239

V5REF

+5V

2mA

4.7u/10V_6

V5REF_SUS

+5V_S5

VCC1_5_B

+1.5V

VCCSATAPLL

+1.5V

VCC1_5_A

+1.5V

VCCUSBPLL

+1.5V

11mA

0_6

S4/S5

Voltage

I(max)

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]
VSS_NCTF[9]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

SB Power Status and max current table(2/2)(SB right side)

POWER PLANE

S0

S3

VCC1_05

+1.05V

VCCDMIPLL

+1.5V

23mA

VCC_DMI

+1.05V

48mA

V_CPU_IO

+1.05V

47mA

VCC3_3

+3V

1.342A

VCCHDA

+1.5V

11mA

VCCSUSHDA

+1.5V_S5

11mA

2mA

Note
6uA@G3

1mA@S3/S4/S5

646mA

S4/S5

Voltage

I(max)

Note

1.634A

2mA
308mA

1mA@S3/S4/S5

Powered by Vcc1_05 in S0

VCCSUS1_05

+1.05V

Powered by Vcc1_05 in S0

Tied to +3V,not +3VSUS

VCCSUS1_5

+1.5V

Powered by Vcc1_5_A in S0

23mA

VCCSUS3_3

+3VSUS

80mA

VCCCL1_05

+1.05V

Powered by Vcc1_05 in S0

VCCCL1_5

+1.5V

Powered by Vcc1_5_A in S0

VCCCL3_3

+3V

VCCLAN1_05

+1.05V

VCCLAN3_3

+3V

VCCGLANPLL

+1.5V

VCCGLAN1_5

+1.5V

VCCGLAN3_3

+3V

1mA

X
19mA

212mA

19mA

52mA@S3/S4/S5

Tied to +3V,not +3VSUS

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Friday, March 21, 2008

http://mycomp.su/x/

Rev
1A

SB(4/4) POWER

Note:VCCSUS1_05 , VCCSUS1_5 are powered by VccSus3_3 in S3/S4/S5

5

VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
ICH9M REV 1.0

VCCGLAN3_3

POWER PLANE

R433

R29

C265

0_8

ICH9M REV 1.0

+1.5V_PCIE_ICH

VCC3

VCCDMIPLL

R276

GLAN POWER

L29

VCC1_5_A[20]

G10
G9

A10
A11

+VCCLAN1_05_INT_ICH

0.1u/10V_4

VCC1.5

VCC1_5_A[18]
VCC1_5_A[19]

AC21

USB CORE

0_6

AC18
AC19

VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

0.1u/10V_4

R347

VCC1_5_A[17]

AA7
AB6
AB7
AC6
AC7

+1.5V_USB_ICH

VCC3

AC9

VCCUSBPLL

C262

0.1u/10V_4

VCC1_5_A[9]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

AJ5

C322

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

VCC1_05[1]
VCC1_05[2]
VCC1_05[3]
VCC1_05[4]
VCC1_05[5]
VCC1_05[6]
VCC1_05[7]
VCC1_05[8]
VCC1_05[9]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCHDA

ATX

+1.5V_SATA_ICH
C238

V5REF_SUS

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

C291
1u/6.3V_4

V5REF

ARX

C213

VCCRTC

VCCA3GP

+ C263

AE1

CORE

D24

0.1u/10V_4

VCCP_CORE

VCC3

C312

0.1u/10V_4

+1.05V_ICH

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

PCI

+SB_V5REF

C313

VCCPSUS

VCCRTC

A23

VCCPUSB

VCCRTC

Sheet

15

of

35

DDR2 Dual channel A/B PULL UP

BOM Option Table

Reference

Description

N/A

N/A

16

M_A_A[14..0]

M_A_A[14..0] 7,17

M_B_A[14..0]

M_B_A[14..0] 7,17

DDRII A CHANNEL
SMDDR_VTERM

DDRII B CHANNEL

SMDDR_VTERM

C225

C197

C201

C202

C259

C198

C280

C257

C284

C282

C199

C226

C256

C227

C223

C224

C221

C283

C250

C260

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

C258
0.1u/10V_4

C222

C196

C281

C200

C279

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

Place one cap close to every 2 pull-up resistor terminated to SMDDR_VTERM

6,17

M_CKE1

6,17

M_CKE0

M_A_A3
M_A_A1

RP21

1
3

2 56X2
4

M_A_A9
M_A_A5

RP22

1
3

2 56X2
4

M_A_A2
M_A_A4

RP28

1
3

2 56X2
4

6,17
7,17

M_CKE3
M_B_BS#2

M_A_A11

RP26

1
3

2 56X2
4

6,17
6,17

M_ODT1
M_CS#1

RP23

1
3

2 56X2
4

6,17
7,17

M_ODT3
M_B_BS#0

1
3

2 56X2
4
7,17

M_A_BS#0

1
3

2 56X2
4

7,17
7,17

M_A_CAS#
M_A_WE#

6,17
7,17

M_CS#0
M_A_RAS#

7,17
6,17

M_B_CAS#
M_CS#3

6,17

M_CKE4

6,17
7,17

M_ODT2
M_B_RAS#

6,17

M_ODT0

M_A_A8
M_A_A12

7,17
7,17

RP24

M_A_BS#2
M_A_BS#1

RP27
M_A_A0

SMDDR_VTERM

M_A_A7
M_A_A6

M_A_A10

RP25

1
3

2 56X2
4

RP37

1
3

2 56X2
4

RP18

1
3

2 56X2
4

RP31

1
3

2 56X2
4

RP20

1
3

2 56X2
4

RP19

1
3

2 56X2
4

RP30

1
3

2 56X2
4

RP32

1
3

2 56X2
4

RP43

1
3

2 56X2
4

RP39

1
3

2 56X2
4

RP29

1
3

2 56X2
4

RP44

1
3

2 56X2
4

SMDDR_VTERM

M_B_A10
7,17

RP33

M_B_WE#
M_B_A3
M_B_A1

7,17

M_B_BS#1

RP34

RP40
M_B_A0
M_B_A7
M_B_A11

RP42

M_B_A8
M_B_A5

RP35

1
3

2 56X2
4

1
3

2 56X2
4

1
3

2 56X2
4

1
3

2 56X2
4

1
3

2 56X2
4

SMDDR_VTERM

M_B_A6

M_B_A13
6,17

M_B_A2
M_B_A4

RP41

1
3

2 56X2
4

M_B_A9
M_B_A12

RP36

1
3

2 56X2
4

M_A_A14

R254

56_4

M_A_A13

M_CS#2

M_B_A14

R287

56_4

SMDDR_VTERM

SMDDR_VTERM

PROJECT : PB5/6
Quanta Computer Inc.
Size

http://mycomp.su/x/
1

Document Number

Rev
1A

DDR RES. ARRAV

Date:
3

Friday, May 30, 2008

7

Sheet

16
8

of

35

DDR II DIMM Socket

7
7
7
7
7
7
7
7

M_A_DM[0..7] 7
M_A_DQS[0..7] 7
M_A_DQS#[0..7] 7
M_A_A[0..14] 7,16

7
7
7
7
7
7
7
7

M_A_DQ[0..7]
M_A_DQ[8..15]
M_A_DQ[16..23]
M_A_DQ[24..31]
M_A_DQ[32..39]
M_A_DQ[40..47]
M_A_DQ[48..55]
M_A_DQ[56..63]

SMDDR_VREF_DIMM

M_B_DQ[0..7]
M_B_DQ[8..15]
M_B_DQ[16..23]
M_B_DQ[24..31]
M_B_DQ[32..39]
M_B_DQ[40..47]
M_B_DQ[48..55]
M_B_DQ[56..63]

M_A_DQS#1
M_A_DQS1
M_A_DQ14
M_A_DQ15

M_A_DQ17
M_A_DQ20
M_A_DQS#2
M_A_DQS2
M_A_DQ23
M_A_DQ18
M_A_DQ25
M_A_DQ28
B

M_A_DM3
M_A_DQ30
M_A_DQ31
6,16
7,16

M_CKE0

M_CKE0

M_A_BS#2

M_A_BS#2

M_A_A12
M_A_A9
M_A_A8
M_A_A5
M_A_A3
M_A_A1

7,16
7,16

M_A_BS#0
M_A_WE#

7,16
6,16

M_A_CAS#
M_CS#1

6,16

M_ODT1

M_A_A10
M_A_BS#0
M_A_WE#
M_A_CAS#
M_CS#1
M_ODT1
M_A_DQ37
M_A_DQ36
M_A_DQS#4
M_A_DQS4

M_A_DQ35
M_A_DQ34
M_A_DQ40
M_A_DQ41
M_A_DM5
M_A_DQ43
M_A_DQ47
M_A_DQ53
M_A_DQ48

M_A_DQS#6
M_A_DQS6
M_A_DQ50
M_A_DQ51
M_A_DQ61
M_A_DQ60
M_A_DM7
M_A_DQ58
M_A_DQ59
DDRDAT_SMB
DDRCLK_SMB
VCC3

VCC3

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

N/A

17

1.8VSUS
CN14

VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

M_A_DQ4
M_A_DQ0

M_B_DQ1
M_B_DQ0

M_A_DM0
M_B_DQS#0
M_B_DQS0

M_A_DQ7
M_A_DQ6

M_B_DQ2
M_B_DQ7

M_A_DQ13
M_A_DQ9

M_B_DQ9
M_B_DQ8

M_A_DM1
M_CLK_DDR0
M_CLK_DDR#0

M_B_DQS#1
M_B_DQS1

M_CLK_DDR0 6
M_CLK_DDR#0 6

M_A_DQ10
M_A_DQ11

M_B_DQ11
M_B_DQ10

M_A_DQ16
M_A_DQ21

M_B_DQ19
M_B_DQ16

PM_EXTTS#0
M_A_DM2

M_B_DQS#2
M_B_DQS2

PM_EXTTS#0 6

M_A_DQ19
M_A_DQ22

M_B_DQ22
M_B_DQ23

M_A_DQ29
M_A_DQ24

M_B_DQ28
M_B_DQ29

M_A_DQS#3
M_A_DQS3

M_B_DM3

M_A_DQ27
M_A_DQ26

M_B_DQ31
M_B_DQ30

M_CKE1

M_CKE3

M_CKE1

6,16

6,16

M_A_A14

7,16

M_CKE3

M_B_BS#2

M_B_BS#2

M_A_A11
M_A_A7
M_A_A6

M_B_A12
M_B_A9
M_B_A8

M_A_A4
M_A_A2
M_A_A0

M_B_A5
M_B_A3
M_B_A1

M_A_BS#1
M_A_RAS#
M_CS#0

M_A_BS#1 7,16
M_A_RAS# 7,16
M_CS#0 6,16

M_ODT0
M_A_A13

M_ODT0

6,16

7,16
7,16

M_B_BS#0
M_B_WE#

7,16
6,16

M_B_CAS#
M_CS#3

6,16

M_ODT3

M_B_A10
M_B_BS#0
M_B_WE#
M_B_CAS#
M_CS#3
M_ODT3

M_A_DQ32
M_A_DQ33

M_B_DQ36
M_B_DQ32

M_A_DM4

M_B_DQS#4
M_B_DQS4

M_A_DQ39
M_A_DQ38

M_B_DQ38
M_B_DQ34

M_A_DQ44
M_A_DQ45

M_B_DQ41
M_B_DQ40

M_A_DQS#5
M_A_DQS5

M_B_DM5

M_A_DQ46
M_A_DQ42

M_B_DQ46
M_B_DQ43

M_A_DQ49
M_A_DQ52

M_B_DQ48
M_B_DQ49

M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR1 6
M_CLK_DDR#1 6

M_A_DM6

M_B_DQS#6
M_B_DQS6

M_A_DQ54
M_A_DQ55

M_B_DQ51
M_B_DQ55

M_A_DQ56
M_A_DQ57

M_B_DQ56
M_B_DQ57

M_A_DQS#7
M_A_DQS7

M_B_DM7
M_B_DQ59
M_B_DQ62

M_A_DQ62
M_A_DQ63
R252
R251

2
2

10K_4
10K_4

DDRDAT_SMB
DDRCLK_SMB
VCC3

CGDAT_SMB
CGCLK_SMB
VCC3

DDR2_5.6H

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

PC4800 DDR2 SDRAM

SO-DIMM (200P)

M_A_DQ8
M_A_DQ12

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

PC4800 DDR2 SDRAM

SO-DIMM (200P)

M_A_DQ2
M_A_DQ3

Description

N/A

1.8VSUS
CN16

M_A_DQS#0
M_A_DQS0

Reference
M_B_DM[0..7] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[0..14] 7,16

1.8VSUS

M_A_DQ1
M_A_DQ5

SMDDR_VREF_DIMM

1.8VSUS
A

BOM Option Table

DDR2_10.1H

CH-A SPD ADDRESS:??????

M_B_DQ4
M_B_DQ5

1.8VSUS

M_B_DM0
M_B_DQ6
M_B_DQ3
+ C372
M_B_DQ12
M_B_DQ13

330u/2.5V_3528

C445

C449

C408

C409

C448

2.2u/6.3V_6

2.2u/6.3V_6

2.2u/6.3V_6

2.2u/6.3V_6

2.2u/6.3V_6

M_B_DM1
M_CLK_DDR3
M_CLK_DDR#3

M_CLK_DDR3 6
M_CLK_DDR#3 6

VCC3

1.8VSUS

M_B_DQ15
M_B_DQ14
C229

C232

C410

C237

C206

C194

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

2.2u/6.3V_6

0.1u/10V_4

M_B_DQ20
M_B_DQ17
PM_EXTTS#1
M_B_DM2

PM_EXTTS#1 6
SMDDR_VREF_DIMM

M_B_DQ18
M_B_DQ21
M_B_DQ25
M_B_DQ24

C255

C253

0.1u/10V_4

2.2u/6.3V_6

M_B_DQS#3
M_B_DQS3
M_B_DQ27
M_B_DQ26
M_CKE4

M_CKE4

6,16

M_B_A14
M_B_A11
M_B_A7
M_B_A6
1.8VSUS
M_B_A4
M_B_A2
M_B_A0
M_B_BS#1
M_B_RAS#
M_CS#2

M_B_BS#1 7,16
M_B_RAS# 7,16
M_CS#2 6,16

M_ODT2
M_B_A13

+ C336
330u/2.5V_3528

C444

C406

C446

C411

C447

2.2u/6.3V_6

2.2u/6.3V_6

2.2u/6.3V_6

2.2u/6.3V_6

2.2u/6.3V_6

M_ODT2 6,16

VCC3

1.8VSUS
M_B_DQ37
M_B_DQ33
M_B_DM4

C233

C231

C236

C235

C251

C252

M_B_DQ39
M_B_DQ35

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

2.2u/6.3V_6

0.1u/10V_4

M_B_DQ45
M_B_DQ44
M_B_DQS#5
M_B_DQS5

SMDDR_VREF_DIMM

M_B_DQ42
M_B_DQ47
M_B_DQ52
M_B_DQ53
M_CLK_DDR4
M_CLK_DDR#4

C203

C204

0.1u/10V_4

2.2u/6.3V_6

M_CLK_DDR4 6
M_CLK_DDR#4 6

M_B_DM6
M_B_DQ54
M_B_DQ50
M_B_DQ60
M_B_DQ61

SMDDR_VREF_DIMM

M_B_DQS#7
M_B_DQS7
M_B_DQ63
M_B_DQ58
R439
R438

R272
10K_4
10K_4

R273

*10K_4

0_6

R223

*10K_4

SMDDR_VREF
D

1.8VSUS

VCC3

PROJECT : PB5/6

CH-A SPD ADDRESS:??????

Quanta Computer Inc.

http://mycomp.su/x/
1

Size

Document Number

Rev
1A

DDR SO-DIMM
Date:
3

Friday, May 30, 2008

Sheet

17
8

of

35

HDMI
R358

20 EXT_HDMI_DDCDAT

R599
EV@2K

R355
EV@10K_4

18

DVI

R600
EV@2K

EV@10K_4

EXT_HDMI_DDCDAT

VCC5

VCC3

DDC5DAT

Q13
EV@RHU002N06
VCC3

DVI-I

DDC5CLK

For EMI

Q33
EV@RHU002N06
Modify

AMD commend

R1

Co-Layout

Close HDMI connector

swap
*HDM@WCM2012-90
HDMITX2N_C
3
HDMITX2P_C
2
R637
100
*HDM@WCM2012-90
HDMITX1P_C
3
HDMITX1N_C
2
R638
100
*HDM@WCM2012-90
HDMITX0N_C
3
HDMITX0P_C
2
R639
100
*HDM@WCM2012-90
HDMICLK+_C
3
HDMICLK-_C
2
R640
100

4
1
L51

4
1

20 EXT_HDMITX1P
20 EXT_HDMITX1N
L52

4
1

20 EXT_HDMITX0N
20 EXT_HDMITX0P
L53

4
1

20 EXT_HDMICLK+
20 EXT_HDMICLK-

VCC5
R630
100K_4

499/F_4
499/F_4

HDMICLK-_C
HDMICLK+_C

R629
R628

499/F_4
499/F_4

HDMITX0N_C
HDMITX0P_C

R632
R631

499/F_4
499/F_4

HDMITX1N_C
HDMITX1P_C

R633
R634

Q38
RHU002N06

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

20 EXT_DVITX2N
20 EXT_DVITX2P

CRT_DDCCLK
CRT_DDCDATA
VSYNC1
20 EXT_DVITX1N
20 EXT_DVITX1P

L55
20 EXT_HDMITX2N
20 EXT_HDMITX2P

R627
R626

CN19

100

R2

100

HDMITX2N_C
HDMITX2P_C

499/F_4
499/F_4

CRT_VCC

Close to connector

20 EXT_DVITX0N
20 EXT_DVITX0P

DVI_HPD

R590

R7

100

R8

100

10K

20 EXT_DVICLK+
20 EXT_DVICLK-

DVI-I_CNN

CN25
A:(8/23) Change footprint from 0402 to 0603
20 EXT_HDMITX2P
20 EXT_HDMITX2N
20 EXT_HDMITX1P
20 EXT_HDMITX1N
C

20 EXT_HDMITX0P
20 EXT_HDMITX0N
20 EXT_HDMICLK+
20 EXT_HDMICLK-

R601
R602

HDM@0_6
HDM@0_6

HDMITX2P_C
HDMITX2N_C

R594
R593

HDM@0_6
HDM@0_6

HDMITX1P_C
HDMITX1N_C

HDM@0_6
HDM@0_6

R598
R597

HDM@0_6 HDMICLK+_C
HDMICLK-_C
HDM@0_6

C621
*22P/50V_4

*22P/50V_4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

HDMITX2N_C
HDMITX1P_C
HDMITX1N_C
HDMITX0P_C

HDMITX0P_C
HDMITX0N_C

R595
R596

C633
C622
*22P/50V_4

HDMITX2P_C

R617

0
HDMITX0N_C
HDMICLK+_C
HDMICLK-_C
HDMI_SCL
HDMI_SDA

C634
D38

*22P/50V_4

F1

VCC5

HDMIC_5V

CH501
DDC5CLK
DDC5DAT

L2
L3

HDMI_SCL
HDMI_SDA

0
0
C626

C1
20

HDMI_HPD

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

20

D2+
D2 Shield
D2D1+
D1 Shield
D1- SHELL1
D0+ SHELL2
D0 Shield
D0- SHELL3
CK+ SHELL4
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET

C1

C1

CRT_R1

C2

C2

CRT_G1

C3

C3

CRT_B1

C4

C4

HSYNC1

C5

C5

25
26
27
28
29
30

25
26
27
28
29
30

EXT_HDMI_DDCCLK

20 EXT_HDMI_DDCCLK
D

DVI_HPD

DVI_HPD

dvi-070939fr029s237pr-c-30p-v

P/N:DFDS29FR019

Activate: H

1/3 Modify
R591

20
21

*100K

22
23

HDM@HDMI-C12816-119A5-L

0.1U

C625

*10P/50V

*10P/50V

CRT PORT
VCC5

VCC3
.1U/10V

U3
VSYNC

10K
DDC_DATA

4VSYNCL

CRT_DDCDATA
L5
BLM11A121S

VSYNC1

R22

D2
DA204U

L6
BLM11A121S

*AHCT1G125DCH
0

2N7002E-T1-E3
Q2
VCC5

HSYNC

10K

DDC_CLK

C15

*10P

*10P

C4

C7

10P

10P

HSYNC1

4HSYNCL

CRT_DDCCLK
L4
BLM11A121S
R21

2N7002E-T1-E3
Q1

PTC:DK100TPU028

0
VCC3

VCC3

D3
DA204U

VCC3

D1
DA204U

CRT_VCC
L9
FBM2125HM330

2
1

L8
BLM11A121S

C16
*AHCT1G125DCH

DDCCLK

U4

D5
DA204U

R14

HSYNC1

VCC3

R18
2.2K

VSYNC1

VCC3

R19
2.2K
DDCDAT

C18
R9

VCC5

VCC3

D6
DA204U

DKZ00TFU101
F2
2

D4

POLY_SWITCH

20 EXT_VGA_GRN

EV@0_4

CRT_R

R543

EV@0_4

CRT_G

R544

EV@0_4

CRT_B

R531

EV@0_4

HSYNC

CRT_R

L7

MLB-160808-0070B-N3

CRT_R1

R532

EV@0_4

VSYNC

CRT_G

L1

MLB-160808-0070B-N3

CRT_G1

R533

EV@0_4

DDCCLK

CRT_B

L10

MLB-160808-0070B-N3

CRT_B1

R524

EV@0_4

DDCDAT

*0.1U
CN22

20 EXT_VGA_BLU
20 EXT_HSYNC
20 EXT_VSYNC
20 EXT_CRT_DDCCLK
20 EXT_CRT_DDCDAT

C10
R13
150/F

R3
150/F

6 INT_CRT_GRN
6 INT_CRT_BLU
INT_HSYNC

INT_VSYNC

6 INT_CRT_DDCCLK
6 INT_CRT_DDCDAT

R81

IV@0_4

R82

IV@0_4

R83

IV@0_4

R96

IV@0_4

R97

IV@0_4

R98

IV@0_4

R105

IV@0_4

http://mycomp.su/x/
5

C19
C11

C2

C8

5.6P

5.6P

5.6P

11
12

CRT_DDCDATA

13

HSYNC1

14

VSYNC1

15

CRT_DDCCLK

150/F
5.6P

5.6P

P/N:DFDS15FR084
17

6 INT_CRT_RED

C5

6
1
7
2
8
3
9
4
10
5

R20
5.6P

R542

VCC5
RC1206

C3

16

20 EXT_VGA_RED

CH501H

close to NB & VGA connector

DSUB-070549FR015SX03CX-15P-V

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Monday, June 23, 2008

Rev
1A

DVI / CRT / HDMI

4

Sheet
1

18

of

35

6 INT_TXUCLKOUT+
6 INT_TXUCLKOUT-

IV@0X2 3
1

4
2

6 INT_TXUOUT0+
6 INT_TXUOUT0-

IV@0X2 3
1

4
2

RN8

6 INT_TXUOUT1+
6 INT_TXUOUT1-

IV@0X2 3
1

4
2

RN5

6 INT_TXUOUT2+
6 INT_TXUOUT2-

IV@0X2 3
1

4
2

RN2

TXUCLKOUT+
TXUCLKOUT-

RN11

VIN

INVCC0

R567
100K_4

C557

8/13 Change Size To 1206

3VPCU

10u/25V_1206

1000P_4

TXUOUT2+
TXUOUT21

EV@0X2 2
4

1
3

RN12

20 EXT_LVDS_TXU#0
20 EXT_LVDS_TXU0

EV@0X2 2
4

1
3

RN7

20 EXT_LVDS_TXU#1
20 EXT_LVDS_TXU1

EV@0X2 2
4

1
3

RN3

20 EXT_LVDS_TXU#2
20 EXT_LVDS_TXU2

EV@0X2 2
4

1
3

RN1

28

10/22 update p/n From DFHS40FS825 to DFWF40MS000

0.1u/10V_4

CN3
INVCC0

21

CCD_POWER
R58
R57

INT_MIC

INT_MIC

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41

VCC3
CCD_POWER
MIC_GND_R
0_4
Analog MIC_R
0_4
DISPON
TXLCLKOUT+
TXLCLKOUTTXLOUT0+
TXLOUT0-

C66
22p/50V_4

TXLOUT1+
TXLOUT1IV@0X2 3
1

4 RN16
2

TXLCLKOUTTXLCLKOUT+

6
6

INT_TXLOUT2INT_TXLOUT2+

IV@0X2 3
1

4 RN6
2

TXLOUT2TXLOUT2+

6
6

INT_TXLOUT0INT_TXLOUT0+

IV@0X2 3
1

4 RN13
2

TXLOUT0TXLOUT0+

6
6

INT_TXLOUT1INT_TXLOUT1+

IV@0X2 3
1

4 RN9
2

TXLOUT1TXLOUT1+

20 EXT_LVDS_TXLCK
20 EXT_LVDS_TXLCK#

EV@0X2 2
4

1 RN15
3

20 EXT_LVDS_TXL0
20 EXT_LVDS_TXL#0

EV@0X2 2
4

1 RN14
3

20 EXT_LVDS_TXL1
20 EXT_LVDS_TXL#1

EV@0X2 2
4

1 RN10
3

20 EXT_LVDS_TXL2
20 EXT_LVDS_TXL#2

EV@0X2 2
4

1 RN4
3

TXLOUT2+
TXLOUT2-

LCD_VCC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

LCD_EDIDDATA
LCD_EDIDCLK
LCD_VADJ
USBP4+_C
USBP4-_C
TXUCLKOUT+
TXUCLKOUTTXUOUT0+
TXUOUT0TXUOUT1+
TXUOUT1TXUOUT2+
TXUOUT2-

ACES_88242-40XX_LVDS

11/01 add stitch cap for LVDS

VCC3

20 EXT_LVDS_TXUCK#
20 EXT_LVDS_TXUCK

LID#

MR1
EC2648-B3-F

C71

6 INT_TXLCLKOUT6 INT_TXLCLKOUT+

19

C559

R72
TXUOUT1+
TXUOUT1-

LCD TYPE CONNECTOR

HALL SENSOR

TXUOUT0+
TXUOUT0-

VCC3

LCD PANEL MODULE

C70
C77
0.1u/10V_4

0.1u/10V_4

EMI CAP
CCD_POWER

LCD_VCC
R49
R583

6 INT_LVDS_DIGON

A:(8/20) Remove switch IC, Modify ckt to original ckt

EV@0_4

R556

IV@0_4

R553

Q30
2N7002E

VCC3

3VPCU

0.1U

IN

OUT

IN

GND

ON/OFF GND

*0
DIGON_R

0.1u/10V_4

C69

0.1u/10V_4

C558

0.1u/10V_4

0_8
LCD_VCC

C67
C53

C50

10U/10V

0.1U

100p/50V_4
LCD_EDIDDATA

AAT4280IGU-2-T1

20 EXT_DISP_ON

R584
10K

C569

C65

100p/50V_4

C62

100p/50V_4

*0.1u/10V_4
LCD_EDIDCLK

VCC5

LCD_VADJ
Q31
2N7002E

R53
2.2K

R585
10K

LCD_EDIDCLK

R555
EV@0_4

3NB_PWRGD_5V

14,28 ECPWROK

R554

6 INT_LVDS_EDIDCLK

VCC3

Q4
C60

20 EXT_LVDS_PNLCLK

C68

VCC3

IV@0_4
VCC3

R55
LCD_VADJ
2.2K
20 EXT_LVDS_PNLDAT
6,11 INT_LVDS_EDIDDATA

R558

EV@0_4

R557

IV@0_4

28

LCD_EDIDDATA

R577

ADJ

6 INT_LVDS_PWM

BTO

USBP4-_C
USBP4+_C

VCC3

CAMERA MODULE
CCD_POWER

0_8

C567

VCC5

RP1

CCD@0_4P2R_S
1
3

2
4

R579
10K

10u/10V_8
R576
*CCD@4.7K_4

*CCD@1000p_4

C560

*0_4

USBP4USBP4+

13
13

*CCD@DLW21HN900SQ2L

CCD_POWER
C566

Q28
*CCD@AO3413

*0.1u/10V_4

R574

14

BLON

28

LID#

14,28 ECPWROK

*CCD@0.1u/10V_4

6 INT_LVDS_BLON

A:(8/30) Follow TE1, no stuff 1000p,0.1u

R56

EV@0_4

R54

D36

BAS316

D32

BAS316

D33

3
2

3
2

L12
C564

VCC3

0.1U

2
4

DISPON

U6
TC7SH08FU

20 EXT_LVDS_BLON

IV@0_4

BAS316

4
1

C63

4
1

R575

VCC5

0_4

CCD_POWERON

R52
10K

28

PROJECT : PB5/6

Q27
*CCD@DTC144EU

Quanta Computer Inc.

A:(11/27) Camera module power VCC5 or VCC3?

http://mycomp.su/x/
1

Size

Document Number

Date:

Friday, May 30, 2008

Rev
1A

LCD CONN& CAREMA

3

Sheet

19
8

of

35

A:(8/18) update VGA conn footprint base on Allan information

A:(8/23) update VGA conn pin-define (change pin 1 location)
CN18

EXT_HDMI_DDCCLK
EXT_HDMI_DDCDAT

18 EXT_HDMI_DDCCLK
18 EXT_HDMI_DDCDAT

EXT_LVDS_PNLCLK
EXT_LVDS_PNLDAT

19 EXT_LVDS_PNLCLK
19 EXT_LVDS_PNLDAT

VGA_R
VGA_G
VGA_B
EXT_LVDS_TXL#2
EXT_LVDS_TXL2

19 EXT_LVDS_TXL#2
19 EXT_LVDS_TXL2

EXT_LVDS_TXL#1
EXT_LVDS_TXL1

19 EXT_LVDS_TXL#1
19 EXT_LVDS_TXL1

EXT_LVDS_TXL#0
EXT_LVDS_TXL0

19 EXT_LVDS_TXL#0
19 EXT_LVDS_TXL0

EXT_LVDS_TXLCK#
EXT_LVDS_TXLCK

19 EXT_LVDS_TXLCK#
19 EXT_LVDS_TXLCK

EXT_DVITX1N
EXT_DVITX1P
EXT_DVITX2N
EXT_DVITX2P
EXT_HDMICLKEXT_HDMICLK+

18 EXT_HDMICLK18 EXT_HDMICLK+

EXT_HDMITX2N
EXT_HDMITX2P

18 EXT_HDMITX2N
18 EXT_HDMITX2P

EXT_HDMITX1N
EXT_HDMITX1P

18 EXT_HDMITX1N
18 EXT_HDMITX1P

EXT_HDMITX0N
EXT_HDMITX0P

18 EXT_HDMITX0N
18 EXT_HDMITX0P

*0_6
VIN
A:(9/14) no stuff for A-stage

R78

EV@QT00200A-5120T-9F

C619

0.1u/10V

0.1u/10V

2
C110

*5.6P *5.6P *5.6P

VCC_CORE

C25

C64

C81

0.1u/10V

0.1u/10V

0.1u/10V

C600

5VSUS

C492

H9

H10

C24

C30

0.1u/10V

0.1u/10V

VCC5

C400

0.1u/10V

H15

0.1u/10V

C126

0.1u/10V

H4

H2

0.1u/10V

H7

C609
0.1u/10V

H13

C9

C570

0.1u/10V

H16

0.1u/10V

H21

H31

H29

H30

H25
B

H27

H19

H18

H11

H20

H14

H22

H26

H23

H24

H8

H17

H1

H28

H3

H6

H12

PAD2

PAD1

S8-90RCG

18 EXT_CRT_DDCCLK
18 EXT_CRT_DDCDAT

C582
0.1u/10V

VIN

C541

H5

PEG_TXN0
PEG_TXP0
EXT_CRT_DDCCLK
EXT_CRT_DDCDAT

C23
0.1u/10V

PEG_TXN0
PEG_TXP0

C316
0.1u/10V

6
6

PEG_TXN1
PEG_TXP1

C103

C396
0.1u/10V

PEG_TXN1
PEG_TXP1

C104

C404
0.1u/10V

6
6

PEG_TXN2
PEG_TXP2

EXT_VGA_BLU 18

PEG_TXN2
PEG_TXP2

EXT_VGA_GRN 18

VCCP

6
6

VCC3

H32

S8-90RCG

PEG_TXN3
PEG_TXP3

PEG_TXN3
PEG_TXP3

EXT_VGA_RED 18

6
6

PEG_TXN4
PEG_TXP4

3VSUS
0

PEG_TXN4
PEG_TXP4

6
6

PEG_TXN5
PEG_TXP5

PEG_TXN5
PEG_TXP5

6
6

PEG_TXN6
PEG_TXP6

VGA_MBDATA

PEG_TXN6
PEG_TXP6

3,28,35 MBDATA
EXT_DVICLK+ 18
EXT_DVICLK- 18

6
6

PEG_TXN7
PEG_TXP7

R516
EV@4.7K_4
Q20
EV@RHU002N06

PEG_TXN7
PEG_TXP7

4.7P

6
6

PEG_TXN8
PEG_TXP8

EXT_DVITX0N 18
EXT_DVITX0P 18

PEG_TXN8
PEG_TXP8

4.7P

6
6

PEG_TXN9
PEG_TXP9

PEG_TXN9
PEG_TXP9

6
6

PEG_TXN10
PEG_TXP10

EXT_DVITX1N 18
EXT_DVITX1P 18

PEG_TXN10
PEG_TXP10

VGA_MBCLK

1
VCC3

6
6

3,28,35 MBCLK
EXT_DVITX2N 18
EXT_DVITX2P 18

4.7P

PEG_TXN11
PEG_TXP11

4.7P

6
6

PEG_TXN11
PEG_TXP11

20

R517
EV@4.7K_4
Q21
EV@RHU002N06

For EMI

PEG_TXN12
PEG_TXP12

Close CN27

PEG_TXN12
PEG_TXP12

VCC3

6
6

PEG_TXN13
PEG_TXP13

PEG_RXN15
1
PEG_RXN15 6
PEG_RXP15
3
PEG_RXP15 6
5
PEG_RXN14
7
PEG_RXN14 6
PEG_RXP14
9
PEG_RXP14 6
11
PEG_RXN13
13
PEG_RXN13 6
PEG_RXP13
15
PEG_RXP13 6
C97
17
PEG_RXN12
19
PEG_RXN12 6
PEG_RXP12
EXT_DVITX2N
21
PEG_RXP12 6
EXT_DVITX2P
23
PEG_RXN11
C98
25
PEG_RXN11 6
PEG_RXP11
27
PEG_RXP11 6
EXT_DVITX1N
29
PEG_RXN10
EXT_DVITX1P
31
PEG_RXN10 6
PEG_RXP10
C527
33
PEG_RXP10 6
35
PEG_RXN9
EXT_DVITX0N
37
PEG_RXN9 6
PEG_RXP9
EXT_DVITX0P
39
PEG_RXP9 6
C526
41
PEG_RXN8
43
PEG_RXN8 6
PEG_RXP8
EXT_DVICLK+
45
PEG_RXP8 6
EXT_DVICLK47
PEG_RXN7
49
PEG_RXN7 6
PEG_RXP7
51
PEG_RXP7 6
53
PEG_RXN6
55
PEG_RXN6 6
PEG_RXP6
57
PEG_RXP6 6
59
PEG_RXN5
61
PEG_RXN5 6
PEG_RXP5
VGA_R
L16
63
PEG_RXP5 6
65
PEG_RXN4
VGA_G
L15
67
PEG_RXN4 6
PEG_RXP4
69
PEG_RXP4 6
VGA_B
L14
71
PEG_RXN3
73
PEG_RXN3 6
PEG_RXP3
75
PEG_RXP3 6
C113 C105 C106
77
PEG_RXN2
79
PEG_RXN2 6
PEG_RXP2
81
PEG_RXP2 6
83
PEG_RXN1
*5.6P *5.6P *5.6P
85
PEG_RXN1 6
PEG_RXP1
87
PEG_RXP1 6
89
PEG_RXN0
91
PEG_RXN0 6
PEG_RXP0
93
PEG_RXP0 6
95
CLK_MXM#
97
CLK_MXM# 2
CLK_MXM
99
CLK_MXM 2
101
103
GFXRST# 13
105
DVI_HPD 18
107
MAINON 28,32,33,34
109
GFXPG
28
VGA_MBDATA
111
VGA_MBCLK
113
115
EXT_LVDS_BLON 19
117
EXT_DISP_ON 19
119
HDMI_HPD 18
121
EXT_HSYNC
123
EXT_HSYNC 18
EXT_VSYNC
125
EXT_VSYNC 18
127
EXT_LVDS_TXU#2
129
EXT_LVDS_TXU#2 19
EXT_LVDS_TXU2
131
EXT_LVDS_TXU2 19
133
EXT_LVDS_TXU#1
135
EXT_LVDS_TXU#1 19
EXT_LVDS_TXU1
137
EXT_LVDS_TXU1 19
139
EXT_LVDS_TXU#0
141
EXT_LVDS_TXU#0 19
EXT_LVDS_TXU0
143
EXT_LVDS_TXU0 19
145
EXT_LVDS_TXUCK#
147
EXT_LVDS_TXUCK# 19
EXT_LVDS_TXUCK
149
EXT_LVDS_TXUCK 19
151
EXT_DVICLK153
EXT_DVICLK+
155
EXT_DVITX0N
157
EXT_DVITX0P
159
161
163
0.5A
VCC5
165
167
169
171
173
1.5A
VCC3
175
177
A:(9/14) no stuff for A-stage
179
181
183
VCC3
VCC5
VIN
185
187
R77
189 *0_6
191
VIN
C90
C89
C96
C94
C83
C82
193
4A
195
EV@0.1u/10V_4
*0.1u/50V_6
197
199

PEG_TXN13
PEG_TXP13

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
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153
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157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

PEG_TXN14
PEG_TXP14

6
6

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
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96
98
100
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106
108
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112
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118
120
122
124
126
128
130
132
134
136
138
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142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

6
6

PEG_TXN14
PEG_TXP14

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

PEG_TXN15
PEG_TXP15

PEG_TXN15
PEG_TXP15

6
6

EV@0.1u/10V_4

EV@10u/6.3V_6

EV@10u/6.3V_6

*0.1u/50V_6

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Friday, June 06, 2008

Rev
1A

MXM CONNECTOR
5

http://mycomp.su/x/

Sheet
1

20

of

35

Codec(ALC272)
CPLS HP-L 22

C140,C144 for ALC272,

NC @ALC268

R544 for ALC272,

NC @ALC268

AGND
D

VCC5

+5V_ADO

AVDD_5V
R292
BK2125HS330_8

24

LINE1-L

23

LOUT2-L

MIC1-R

22

MIC1-R

C418

2.2U-6.3V_6 MIC1-R1

MIC1-L

C417

2.2U-6.3V_6 MIC1-L1

C421 *.1U_4

MIC2-VREFO

19

C420 .1U_4

LINE1-VREFO

18

C419 *.1U_4

17

C416

2.2U-6.3V_6

2.2K

R284

MIC2-L

16

C415

2.2U-6.3V_6

R283

2.2K_4

LINE2-R

15

MIC1-R1

22

MIC1-L1

22

C303

BAS316

AGND
MIC2-VREFO

INT_MIC

19

AOUTL
AOUTR

12K_6

LIN1

C402 2.2U/10V_8 AOUR_G1432R309

12K_6

18

RIN1

2
17

LIN2
RIN2

INSPKL+

14

INSPKR+
SENSEA

PCBEEP

13

R277

20K/F_4 MIC1-JD

R278

*39.2K/F_4 HP-JD

C430
10U-6.3V_8

C428
.1U_4

HP-JD

22
AGND

C424
.1U_4
R444

ACZ_RST#_AUDIO

12

SHDN_G1432

10K_4

MUTE

11

20

IN1/IN2

13

ROUT+
ROUTLOUT+
LOUT-

19
12
24
7

C318

C319

120P

120P

AGND
C

RBYPASS
LBYPASS
SHDN
MUTE

AGND
INSPKR+
INSPKRINSPKL+
INSPKL-

L30
L31
L33
L32

CON4

INSPKR+N
INSPKR-N
INSPKL+N
INSPKL-N

CX8HS241006
CX8HS241006
CX8HS241006
CX8HS241006
C320

C321

120P

120P

4
3
2
1
5
R_L_SPEAKERS
AGND

AGND

AGND

Q32
DTC144EUA

22,28 VOLMUTE#

AGND

BIT_CLK_AUDIO 12

*10P_4

ACZ_SDOUT_AUDIO

VCC5

Q18
2N7002

UMT_213-3-1_3
BA144EUAZ04

ACZ_SDIN0 12

0_4

ACZ_SDOUT_AUDIO

12
R249

0_6

R429

*0_6

R270

0_6

R333

*0_6

+5V_ADO
L21

R450

R310

0_4

16
3

SPEAKER CON.

AGND

VOL

C425

C426

ENBEEP

R304

4.7U/10V_8
4.7U/10V_8

12

ACZ_SYNC_AUDIO

ACZ_SDIN0

22_4

R445

28

10U/10V_8

VCC1.5

*10P_4

C398
C413

G1432

-AZ_RST_C

BIT_CLK

SPKR

11K_4
330P_4
11K_4
330P_4

BEEP

ACZ_SYNC_AUDIO

ACZ_SDIN268

14

C397

.1U/10V_4

1u

+AZA_VDD
C427
10U-6.3V_8

R295
C405
R314
C401

MIC1-JD 22

ALC268

T128
T127
0_6

C305

U21

C403 2.2U/10V_8 AOUL_G1432 R305

AVDD_5V

R446

C412

AGND
D37

C414
VCC3

AVDD_5V

AGND

.1U/10V_4 10U/10V_8

AGND

12

SYNC

RESET#
11

10

DVDD-IO

Sense A

LINE2-L
SDATA-IN

SPDIFO1
DVDD2

48

EAPD

DMIC-CLK1/2

DVSS1

SPDIFO2

46

BIT-CLK

T129

45

47

20

MIC2-R

EAPD_47

MIC1-L
LINE2-VREFO

DMIC-CLK3/4

0_4

ALC272

SDATA-OUT

T131
R245

NC

44

T132
C

AVSS2

43

DVSS

T130

AGND

LOUT2-R

AVDD_5V

21

JDREF

42

40

DMIC-3/4/GPIO1

ALC268_JDREF

20K/F_6

15
6
8
23

26

25
AVDD1

27
VREF

AVSS1

29

30

31

28
MIC1-VREFO

CBP

CBN

CPVEE

32

33
HPOUT-L

HPOUT-R

34
Sense B

LINE1-R

AVDD2

AOUT-EXT-R 41

EAPD

FRONT-L

MONO-OUT

AOUT-EXT-L 39

EAPD

10U/10V_8
R244 for ALC272,
NC @ALC268

38

R248

C407

.1U/16V_4

37

AOUT-EXT-R

28

0_4

+5V_ADO
AOUT-EXT-L
AGND

C290
R281

SubWoofer

DMIC-1/2/GPIO0

22

FRONT-R

36

35

MIC2-VREFO
U23

RVDD
NC
NC
NC

2.2u

14

C246

2.2u

C228
AOUTR

GND

AOUTR

10U_6

LVDD

22

R214,R215 at ALC268 0 ohm, ALC272 NC

AREF C248

AOUTL

THRMPAD
GND/HS
GND/HS
GND/HS
GND/HS

AOUTL

VREFOUT_L 22

.1U_4

25
22
21
10
9

22

VREFOUT_R 22

VREFOUT_L
C249

AGND 0_4
R271

5.1K/F

Speaker
D

R219,R224 for ALC268,

NC @ALC272
VREFOUT_R
0_4

R256

MIC2-VREFO

R246

21

SYSTEM MIC

CPLS HP-R 22
CPLS HP-R

HP-JD

22

47K_4
BEEP

TI201209G121_8_3A

C268
.1U_4

C215
.1U_4

C264
.1U_4

C218
10U-6.3V_8
AGND

R449
10K_4

C429
1000P
AGND
U24
R471

*0_4

+5V_268_VEN

SHDN

GND

3
C442
.1U_4

C193
10U-6.3V_8

VIN

VO

SET

R452
*36K_4

*G913-C
A

Vout =1.25(1+R71/R72)
R242

R451
*12K_4

PROJECT : PB5/6

0_6

Quanta Computer Inc.

AGND
AGND

Size

Document Number

Date:

Friday, May 30, 2008

Rev
1A

ALC272/AMP
5

http://mycomp.su/x/

Sheet
1

21

of

35

Subwoofer

22

LM358 Power
+5VA

VCC5
U16
4

C332
0.1U

C335
10U

5
29.4K/F
RC0603

OUT

R366
SET

IN

GND

SHDN

C338
0.1U

G923
AL000923003

AGND
R367
10K/F
RC0603
AGND

2nd order low pass filter(338HZ)

Cutoff:770Hz
C389

4700P/25V

C356

*0_4
C343

FIL2_OUT

5VAMP

AGND
0.1U

7
+5VA

R372

1K

U15B
LMV358MM

CS21003J949
R368
1K

R380

6.2K

R390

620K

C352
1000P

C340
1U

WF_SHDN#

10

IN

R416 1

AUD_AMP_MUTE#

OUT+

SPK_WF+

OUT-

12

SPK_WF-

VDD
PVDD1
PVDD2

8
5
11

VOLMUTE#

21,28 VOLMUTE#

2 0

Q16
DTC144EUA

MUTE

BIAS

WF_BIAS

C374
*1U

AGND
UMT_213-3-1_3
BA144EUAZ04

AGND

C373
1U

AGND

AGND

CON5
WIRE-TO-BOARD

1
2

AGND

5V 2A

5VAMP

SHDN#

0.1U

10K
R402

FIL2_OUT

U15A
LMV358MM

C391

C639
120P

C379
0.1U

C375
0.1U

C378
0.1U

PGND1
PGND2

1
6

R403

GND

2
12K

10K

1
3

1
R397

5VAMP

1U

AGND
C638
120P

C358

C392

12K
2

2
12K

22K/F

U19

R420
1U
1

AGND

8
1
R377

AOUTL
AOUTR

1U

21
21

C350

22K/F

Cutoff:8.8Hz

R422

L35
BLM21PG600SN1D(60,3A)

SubWoofer

21
+5VA

2
6.2K

R392

C327
10U

0.1U
0.1U

2WF_GAIN 1

VCC5
1

C357

R401

0
R418

C390
10U

R419

R396

WF_CF

Mixer & 1nd order low pass filter(338HZ)

Vout=Vset{1+R(pin4,pin5)/R(pin5,gnd)}
Vset=1.25V
Vout=1.25(1+29.4K/10K)=4.925V
Vout=1.25(1+28.7K/10K)=4.8375V
Vout=1.25(1+27K/10K)=4.625V

C388
22U/10V

AGND
MAX9711

AGND AGND

AGND

HP
SYSTEM MIC

21 VREFOUT_L

D23

BAS316

Normal Open Jack

R296
4.7K_4

21
21

MIC1-L1
MIC1-R1

MIC1-L1
MIC1-R1

R300
R307

1K
1K

SUYIN=010188FR006G128JL

MIC-L

L27

0_6

MIC_L

MIC-R

L28

0_6

MIC_R
MIC1-JD

1
2
6
3
4
5

R357

4.7K_4

64

CPLS HP-R

21

21 VREFOUT_L

D22

BAS316

C306

C294

C307

C295

*47P_4

*47P_4

*47P_4

*47P_4

7
8

R303
CN13

HP_R
R356

64

CPLS HP-L 21

AGND

21 VREFOUT_R

AGND

AGND

AGND

AGND

HP_L
21

MIC1-JD

Normal Open Jack

HP_R

R274

C244

L24

10_6

L25

10_6

LINEOUTR
C270

AGND

21

39P_4

C269

7
8

*39P_4

1
2
6
3
4
5

LINEOUTL

HP-JD

CON6

3
AGND
2

SUYIN=010188FR006G128JL

39P_4

AGND

*39P_4
R265
0

HP_L

HEADPHONE

AGND

C245

AGND

R448

0_4

Q10
*AO3403
R447

*10K_4

PROJECT : PB5/6

VCC3

Quanta Computer Inc.

http://mycomp.su/x/
5

Size

Document Number

Date:

Wednesday, June 04, 2008

Rev
1A

Audio JACK /Woofer

4

Sheet
1

22

of

35

23

RVCC3

LAN_REALTEK_RTL8102E

C603

C616

C615

C604

0.1U

0.1U

0.1U

0.1U

GND

For RTL8102EL, use this block.

* C684 and C685 are for U2 EVDD12 pin 19.

L11
0_6

DVDD12

R25

CTRL12A

R29

0_4

EVDD12

CTRL12A_L

CTRL12/VDD

0_6

C610

Change L51 to 0 ohm

in RTL8102EL
application.

C605
0.1U

C611
0.1U

10U/10V

C612
1U

R28

GND

0_4

Remove R1 & R2
in RTL8102EL
application.

GND

Note 1: The Trace length

between L1 and 8111DL's Pin
1 must be within 0.5 cm. C5
and C8 to L1 must be within
0.5cm. Refer to Layout guide
for more detail.

DVDD12
C614
0.1U

C617
0.1U

C606
0.1U

C602
0.1U

C601
0.1U

GND

RVCC3

C608
0.1U

C607

R589

10U/10V

*0_4

R31
2.49K/F

Remove R5 and R6 in RTL8102EL

application.

RVCC3

RVCC3_ROM
R23

EEDO

0.1U
C613

R592

0_4

CLK_LAN_X1
Y1

U2

C20

25MHz/20pF/25ppm
27P/50V_4

CLK_LAN_X2
RVCC3
MDI0+
MDI0DVDD12
MDI1+
MDI1-

BG625000486
LAN_GND

XTL-5_3X3_2-3_8-1_2H

GND
T1
T3

MDI2+
MDI2DVDD12
MDI3+
MDI3-

1
2
3
4
5
6
7
8
9
10
11
12

C21

CS
SK

1
2

EECS
EE_CLK

R26

VCC3

RD+

RX+

16

RJ45_MX1+

MDI1-

RD-

CT

14

MCT1

CT

RX-

15

RJ45_MX1-

MDI0+

TD+

TX-

RJ45_MX0-

MDI0-

TD-

CMT

11

MCT0

CT

TX+

10

RJ45_MX0+

CON9
RJ45_MX1RJ45_MX1+
RJ45_MX0RJ45_MX0+

8
7
6
5
4
3
2
1

10
9
13
13

LAN_GND

36
35
34
33
32
31
30
29
28
27
26
25

DVDD12
EE_CLK
EEDI
EEDO
EECS
GND
DVDD12
RVCC3
ISOLATEB
PERSTB
PCIE_WAKE#
CLKREQB

R11
1K_4

R12

15K

PLTRST# 13,24
PCIE_WAKE# 14,24

VCC3

10K

R10
CLKREQB

DVDD12 13
GND
14
15
16
CLK_PCIE_LAN
17
CLK_PCIE_LAN# 18
EVDD12
19
20
21
GND
22
23
24

U30
NS681686
MDI1+

C22
0.01U

EEDI

10K

AVDD33
DVDD12
MDIP0
LED1/EESK
MDIN0
LED2/EEDI
NC/FB12
LED3/EEDO
MDIP1
EECS
MDIN1
GND
RTL8102EL/8111DL DVDD12
GND
NC/MDIP2
VDD33
NC/MDIN2
ISOLATEB
DVDD12/AVDD12
PERSTB
NC/MDIP3
LANWAKEB
NC/MDIN3
CLKREQB

EVDD12

*CXM11A20001

*0.1U

DVDD12
GND
HSIP
HSIN
REFCLK_P
REFCLK_N
EVDD12
HSOP
HSON
EGND
NC/SMCLK
NC/SMDATA

T2
T4

R27

*0

DI

48
47
46
45
44
43
42
41
40
39
38
37

C14

1000P/3KV_1808

LAN_GND

R5
C6

VCTRL12A/SROUT12
GND
RSET
VCTR12DVDDSR
NC/VDDSR
NC/ENSWREG
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VDD33

27P/50V_4
C620

0_4

*0_4

DO
NC
ORG
VCC
GND

0.01uF

0.01uF
R603

R6

4
7
6
8
5

*AT93C46

C632

GND
RVCC3

CTRL12A
GND
RSET
CTRL12/VDD
CTRL12/VDD
CTRL15/VDD33
CLK_LAN_X2
CLK_LAN_X1
RVCC3
DVDD12

C623

0.1U

3.6K
U1

*0_4
C631

R24

*10K

RVCC3
R588

PCIE_TXP6
PCIE_TXN6

2 CLK_PCIE_LAN
2 CLK_PCIE_LAN#

RJ45-C100F8-100B-8P-L

0.01U
A

R16
75/F

R15
75/F

C12
RJ45_TER

DB0VC1LAN07 (NS681686)

13
13

1000P/3KV_1808

C17

0.1U/10V_4
PCIE_RXP6_C
PCIE_RXN6_C

C13

0.1U/10V_4

PCIE_RXP6
PCIE_RXN6

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Friday, May 30, 2008

Rev
1A

LAN_REALTEK_RTL8102EL
5

http://mycomp.su/x/

Sheet
1

23

of

35

VCC1.5
VCC3
A:(8/18) Due to EC assign Pin111 to other function
Remove uR_SOUT_CR from EC
A:(8/23) Remove uR_SWD from EC

C386

C383

24

C382
C380

C381

0.1u/10V_4

10u/10V_8

0.001u/50V_40.1u/10V_4 10u/10V_8

RVCC3

MINI-Card I (WLAN)
CN9

2 PCLK_DEBUG
13,25,28 PCIRST#

R383
R382

2 CLK_PCIE_MINI
2 CLK_PCIE_MINI#

R384

0_4
CLK_PCIE_MINI_C
CLK_PCIE_MINI_C#

0_4
0_4

*2N7002E-LF
Q15
3

14,23 PCIE_WAKE#

WLAN_WAKE#

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

VCC3

R391

53

C15706-190A1-L

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

15
13
11
9
7
5
3
1

*10K

USBP7+_C
USBP7-_C

VCC3

R408
R407

USBP7+ 13
USBP7- 13

VCC1.5
PLTRST#

VCC1.5

ROBSON

VCC3

CN15

MINI-Card II (TV)

R234

*0_4

R235

0_4

13
13

PCIE_TXP3 R238
PCIE_TXN3 R230

PCIE_TXP3
PCIE_TXN3

0_4 PCIE_TXP3_C
0_4 PCIE_TXN3_C

C209
PCIE_RXP3
PCIE_RXN3
C212

PCIE_RXP3
PCIE_RXN3

0.1u/10V_4
PCIE_RXP3_C
PCIE_RXN3_C
0.1u/10V_4

CN10

C354
13
13

PCIE_RXP1
PCIE_RXN1

PCIE_RXP1
PCIE_RXN1

C353

15
13
11
9
7
5
3
1

0_4 CLK_PCIE_MINI2_C
0_4 CLK_PCIE_MINI2_C#

R387
R386

2 CLK_PCIE_MINI2
2 CLK_PCIE_MINI2#

0.1u/10V_4
PCIE_RXP1_TV
PCIE_RXN1_TV
0.1u/10V_4

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

53

C15725-180A5-L

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

GND

0_4 PCIE_TXP1_TV
0_4 PCIE_TXN1_TV

GND

PCIE_TXP1 R379
PCIE_TXN1 R378

PCIE_TXP1
PCIE_TXN1

54

13
13

PDAT_SMB

LAD0
12,28
LAD1
12,28
LAD2
12,28
LAD3
12,28
LFRAME# 12,28

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

2,14 SDATA
LAD0
LAD1
LAD2
LAD3
LFRAME#

13
13

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

R255
EV@4.7K_4
Q11
EV@RHU002N06

PLTRST# 13,23

VCC3

C640
1000P

Reserved
Reserved
Debug(PCIRST#)
Debug(PCICLK)
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

PDAT_SMB
PCLK_SMB

PCIRST#

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

PCLK_SMB

1
RVCC3

H=9mm

*10K_4

2,14 SCLK
0_4
0_4

0.1u/10V_4
PCIE_RXP0_WLAN
PCIE_RXN0_WLAN
0.1u/10V_4

A:(9/12) Add WIMAX LED

WiMAX_LED#_A R410

VCC3

0_4 CLK_PCIE_MINI3_C
0_4 CLK_PCIE_MINI3_C#

R228
R225

2 CLK_PCIE_MINI3
2 CLK_PCIE_MINI3#

VCC1.5

USBP10+_C
USBP10-_C

R415
R414
R413

0_4
0_4
0_4

USBP8+ 13
USBP8- 13

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

Reserved
Reserved
Debug(PCIRST#)
Debug(PCICLK)
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

15
13
11
9
7
5
3
1

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

C15725-180A5-L

PDAT_SMB
PCLK_SMB

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

GND

C351

C355
PCLK_DEBUG
PCIRST#

VCC1.5

GND

PCIE_RXP2
PCIE_RXN2

PCIE_TXP0_WLAN
PCIE_TXN0_WLAN

0_4
0_4

R250
EV@4.7K_4
Q12
EV@RHU002N06

VCC3

54

13
13

R395
R381

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

53

PCIE_TXP2
PCIE_TXN2

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

GND

13
13

0_4

GND

0_4

R393

Reserved
Reserved
Debug(PCIRST#)
Debug(PCICLK)
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

54

R394

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

VCC3
VCC1.5

USBP9+_C
USBP9-_C
R262
R263

R264
R260
R261

*0_4
0_4
0_4

USBP9+ 13
USBP9- 13

PDAT_SMB
PCLK_SMB

*0_4
*0_4

VCC1.5
VCC3

PLTRST# 13,23
R404

10K

D25

VCC3

PLTRST#

WLSW

1SS355

28

VCC1.5
VCC3

H=8mm

VCC1.5
VCC3
RF_EN_TV

PLTRST#
R412

PLTRST# 13,23

*10K

VCC3

VCC1.5

PDAT_SMB

R406

C385

10p

PCLK_SMB

R405

C384

10p

VCC3

A:(8/29) follow EMI suggestion, reserve RC termination

VCC3

VCC3

C422
*10U/10V/X5R_8

C243
C423
*0.1u/10V_4 *0.1u/10V_4

C240
*10U/10V/X5R_8

C241
C242
*0.1u/10V_4 *0.1u/10V_4

H=8mm

A:(9/7) per TI FAE suggestion:

(1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF)
(2)Please put these caps closed to IC
(3)R4101(pin 19,OC#) value should change to 2k ohm.

New card
CN4

New Card's Power Switch

NEW CARD'S POWER SWITCH

CPUSB# : ( Internal Pull Up , active low when card support USB )
SHDN# : ( Internal Pull Up )
NEW_SMDATA

13,23
R61

NEW@0_4

NEW_SMCLK

VCC3

AUXOUT

15

+NEW_3VAUX

1.5VIN
1.5VIN

1.5VOUT
1.5VOUT

11
13

+NEW_1.5V

6
20

SYSRST#
SHDN#

1
10
9

18
16
7

STBY#
CPPE#
CPUSB#

RCLKEN
NC
GND

VCC3

3.3VIN
3.3VIN

17

AUXIN

VCC1.5

12
14
PLTRST#

T14
RCLKEN
*10K
T16

A:(8/23) change to another SMBus channel.

SCL1/SDA1 is dedicated SMbus interface for ASF devices only.

NEW@OZ27C10LN-C1

PERST#
OC#

OMC

AL005538001

Ricoh

AL002231000

TI

13
13

PCIE_RXP4
PCIE_RXN4

2 CLK_PCIE_NEW
2 CLK_PCIE_NEW#

RVCC3

R64
NEW@0_4

2 NEW_CLKREQ#

PERST#
+NEW_3VAUX

Q6
*NEW@DTC144EU
PCIE_WAKE#

14,23 PCIE_WAKE#

+NEW_1.5V
NEW_SMDATA
NEW_SMCLK

R63

8
19

T17
CPPE#
CPUSB#

CPUSB#

PERST#_R

R45

T28
T27

NEW@0_4
R50

NEW@28.7K/F_4

PERST#
C56
NEW@3300p/50V_4

RVCC3

NEW@47K_4

13
13

USBP6+
USBP6-

R60
R59

C47

NEW Card_CLKREQ#

C49

NEW@0.1u/10V_4
NEW@0.1u/10V_4NEW@4.7u/6.3V_6
NEW@0.1u/10V_4

R65

*NEW@10K_4

R66

C43

+NEW_3V

RVCC3

NEW@130801-1

Header
Ejector

+NEW_1.5V

C40

2
C74

C75

C76

C80

C73

NEW@0.1u/10V_4NEW@0.1u/10V_4
NEW@4.7u/6.3V_6
NEW@0.1u/10V_4

http://mycomp.su/x/

C79

NEW@4.7u/6.3V_6
NEW@0.1u/10V_4NEW@0.1u/10V_4

NEW@4.7u/6.3V_6
NEW@0.1u/10V_4

(0918) Reserve CLKREQ#

circuit to NEW_CLKREQ# of
clock generator

A:(9/7) per TI FAE suggestion:

(1)Please keep all Input and Output capacitor value > 4.8uF (0.1uF +4.7uF)

*NEW@10K_4

130801-1
131851-V

DFHD26MR074
FBBL5001010

PROJECT : PB5/6

C51

C33

29
30

3
+NEW_3VAUX

C42

GND1
GND29
PETp0 GND30
PETn0
GND2
PERp0
PERn0
GND3
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
WAKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_DGND4

1
2

*NEW@NC7SZ32P5X
VCC1.5

USBP6+_C
USBP6-_C

RVCC3
U7

VCC3

NEW@0_4
NEW@0_4

VCC3

B:(9/27) Change from +3V_S5 to +3V

NEW_CLKREQ#
RVCC3

CPPE#
NEW Card_CLKREQ#
+NEW_3V

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

+NEW_3V

RVCC3

PLTRST#

R46

3.3VOUT
3.3VOUT

3
5

GMT

AL027C10003

PCIE_TXP4
PCIE_TXN4

RCLKEN

Quanta Computer Inc.

*NEW@2N7002E
Q5

PCLK_SMB

H=0.8mm

U5
2
4

AL000577001

13
13

NEW@0_4

Thermal GND

R62

21

PDAT_SMB

Vendor

CPPE# : ( Internal Pull Up , active low when card support PCIE )

QCI PN

Size

Document Number

Rev
1A

MINI CARD/NEW CARD

Date:

Sheet

Wednesday, June 04, 2008

1

24

of

35

CARD READER

25

CARDREADER POWER
3VRUN

C460

C473

C472

4.7u/6.3V_6

0.1u/10V_4

0.1u/10V_4

VCC3

VCC3

L36

BK1608HS220_6

MC_PWR_3V# 4
1
9

C453
1u/16V_8
C477

C474

C166

C486

0.1u/10V_4

0.1u/10V_4

4.7u/6.3V_6

0.1u/10V_4

0.1u/10V_4

INTA#
R510

100/F_4

OZ129_IDSEL

The 100ohm is that reduce the notice form PCI signal

13
13
13
13

CBE3#
CBE2#
CBE1#
CBE0#
OZ129_IDSEL

2 PCLK_OZ129
13
DEVSEL#
13
FRAME#
13
IRDY#
13
TRDY#
13
STOP#
13
PAR
13
REQ0#
13
GNT0#
13,24,28 PCIRST#
13
INTA#
13 PCI_PME#
14 CLKRUN#

INTA#
PCI_PME#
CLKRUN#

IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
REQ#
GNT#
PCI_RST#
INTA#
PME#
CLKRUN#

83
84

1394_XIN
1394_XOUT

TPBIAS
TPA+
TPATPB+
TPB-

76
75
74
72
71

TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N

Y5

4
113
111
112
107
108
110
117
114

MC_PWR_3V#
SD/MS_CLK_C
R487
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#

MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#

95
93
89
87
88
90
94
96
119
100
118
109
105
101
98
99
97

MS_D1

NC1
NC2
NC6
NC7
NC5
NC3
NC4
NC8

2
8
9
10
13
126
127
128

MC_3V#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#

MEDIA_ACTV

12
16
33
66
68
104
115
116
121
123
124

MEDIA_LED: 1=Enable MEDIA_LED activity(Default)

5.9K/F_4

78

XI
XO

TEST0
TEST1

5
45
42
39
40
41
43
44
17
18
1
11
3
6

C479
R505

REF

OC#

*10K_4

VCC_XD

R482

C451

C452

C454

0.01u_4

0.01u_4

0.01u_4

VCC3

15p_4

24.576MHz

C/BE3#
C/BE2#
C/BE1#
C/BE0#

1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD

28
38
46
55

106

PCI_VCC
PCI_VCC
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCA
3.3VCCA
3.3VCCA
3.3VCCA

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

OUT3
OUT2
OUT1

VCC_XD

C482

4 IN 1 CONN
15p_4

H=1.2mm Better than 50ppm

VCC_XD
VCC3

47

MS_BS
MS_D1
MS_D0
MS_D2
MS_CD#
MS_D3
SD/MS_CLK

SD/MS_CLK
C475
22P

R508
R506
R504
R503
R501
R493

R480

VCC_XD

CON7

SD_CD_C

*10K

SD_CD#

VCC_XD

*10K
MS_BS_1#
MS_D1_C
MS_D0_C
MS_D2_C
MS_INS
MS_D3_C

47
47
47
47
47
47

R479

VCC3
MS_BS
MS_D0
MS_D2
MS_D3

R494

1
2
3
4
5
6
7
8
9
10

MS-GND1
MS-BS
MS-D1
MS-SDIO(D0)
MS-D2
MS-INS
MS-D3
MS-SCLK
MS-VCC
MS-GND2

SD-CD/DAT3
SD-CMD
SD-GND1
SD-VDD
SD-CLK
SD-GND2
SD-DAT0
SD-DAT1
SD-DAT2

11
12
13
14
15
16
17
18
19

20
21

SD-SW(RSV)
SD-SW(GND)

SD-SW(WP)
SD-SW(WP-GND)

22
23

47

VCC_XD

SD_D3_C
SD_CMD_C

47
47

R485
R490

SD_D3
SD_CMD

SD/MS_CLK
SD_D0_C
SD_D1_C
SD_D2_C

47
47
47

R511
R512
R481

SD_D0
SD_D1
SD_D2

SD_SW

47

R513

SM_WPI#/SD_WP

Molex47265-0001-CARD-READER

Supporting MMC/SD/MS Cards

MS_CD#

C183

C178

0.1U

0.1U

Molex P/N:DFHD23MS0B6
TTN P/N:DDFHD23MS0A8

1394

85
86

AGND
AGND
AGND
AGND
AGND
AGND

AD17

AD17

19
20
21
22
23
24
25
27
29
30
31
32
34
35
36
37
47
48
49
50
51
52
53
54
57
58
59
60
61
62
63
64

65
69
70
77
80
82

GNT0#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

REQ0#

AD[0..31]

AD[0..31]

EN#
GND
GND-C

8
7
6

14
15
91
92
120
125

C457

4.7u/6.3V_6

26
56
7
102
103
122
67
73
79
81

C159

U25
OZ129T
13

IN1
IN2

VCC1.8

VCC_XD

30mil

U11
RT9711BPF
2
3

TPBIAS0

H=1.6mm
L39

C470

1394@1u/10V_4

0_6
R502

R499

1394@56.2/F_4

1394@56.2/F_4

L56
4
1

4
1

3
2

3
2

*1394@CL-2M2012-121JT
RN17

As close as
possible to JM380

TPA0P
TPA0N

1
3

L1394_TPA0+
L1394_TPA0-

2
4

RN18
PCLK_OZ129

TPB0N
TPB0P

3
1

CN24
5

L1394_TPB0L1394_TPA0L1394_TPA0+
L1394_TPB0+

1394@0_4P2R_S

1
3
4
2

L1394_TPB0L1394_TPB0+

4
2

1394@C13141-10405-L

1394@0_4P2R_S
R483
R486

R489

*22_4
1394@56.2/F_4

1394@56.2/F_4

1394_COM

L57
1
4

1
4

2
3

These 1394 signals are high speed

differential pairs and must be kept equal
length with a differential impedance (Zo)
of 110ohms.

2
3

*1394@CL-2M2012-121JT

C455
C456
*22p_4

R484
1394@270p/25V_4
1394@5.1K/F_4

Reserve EMI

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Wednesday, June 04, 2008

Rev
1A

OZ129 ( CARD READER / 1394)

A

http://mycomp.su/x/

Sheet

25

of

35

26

VCC5
1.8VSUS
C364

0.01u/16V_4

C366

0.01u/16V_4

C363

0.01u/16V_4

C365

0.01u/16V_4

C641

0.1u/16V_4

C642

0.1u/16V_4

C643

0.1u/16V_4

C644

0.1u/16V_4

+1.8VSUS_GMCH

C645

0.1u/16V_4

5VPCU

C646

0.1u/16V_4

C647

0.1u/16V_4

C648

0.1u/16V_4

C649

0.1u/16V_4

1.8VSUS

SATA ODD

CN8
GND14

14

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

DP
+5V
+5V
RSVD
GND
GND

8
9
10
11
12
13

GND15

15

SATA_TXP4 12
SATA_TXN4 12
SATA_RXN4 12
SATA_RXP4 12

R398

1K_4

Device Present

+5VSATA_ODD

R370

C370

C371

C369

C368

C367

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

10u/10V_8

0_8

5VSATA

C18534-11305-L
C

SATA HDD

2'nd SATA HDD

CN7

GND23

23

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND24

24

A:(9/5) update footprint

A:(9/13) update footprint

CN17
SATA_TXP0 12
SATA_TXN0 12
SATA_RXN0 12
SATA_RXP0 12

+3.3VSATA1

R376

VCC3

C349

C654

4.7u/6.3V_6

0.1u/10V_4

0.1u/10V_4

+5VSATA1
C345

BK2125HM241

C348

R374
C346

C344

0.1u/10V_4 0.1u/10V_4 10u/10V_8

BK2125HM241

5VSATA

C657
0.1u/10V_4

SA@127043FR022GX51ZR

GND23

23

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND24

24

SATA_TXP1 12
SATA_TXN1 12

SATA_RXN1 12
SATA_RXP1 12

+3.3VSATA2

R161
C114

C115

4.7u/6.3V_6

0.1u/10V_4

+5VSATA2
C117

R162
C118

C116

0.1u/10V_4 0.1u/10V_4 10u/10V_8

BK2125HM241

VCC3

C655
0.1u/10V_4
BK2125HM241

VCC5

C656
0.1u/10V_4

SA@127043FR022XX27ZR

PROJECT : PB5/6
Quanta Computer Inc.

http://mycomp.su/x/
5

Size

Document Number

Date:

Monday, June 02, 2008

Rev
1A

SATA / HyberFLASH
4

Sheet
1

26

of

35

CN5
13
13

R349
R351

USBP5+
USBP5-

T118
L34

T117

VCC3
T114

MNB-201209-0060P-N2Q

1
2
3
4
5
6
7
8
9
10

USBP5-_C
USBP5+_C

0_4
0_4

BT_AVTIVE_R
HW_RADIO_DIS#
WLAN_ACTIVE_R
BT_VCC
BLUELED

GND1
USB_D+
USB_DRSVD
BT_AVTIVE(PIO5)
HW_RADIO_DIS#
WLAN_ACTIVE(PIO6)
+3.3V
LED
GND2

CN20
D

8
9
10
11

GND
GND
GND
GND

1
2
3
4
5
6
7

GND1
TXP
TXN
GND2
RXN
RXP
GND3

R605
R604

0_4
0_4

SATA_TXP5
SATA_TXN5

R606
R607

0_4
0_4

SATA_RXN5
SATA_RXP5

TPDATA_1
TPCLK_1
C211

C205
C195
0.1u/10V_4
4.7u/10V_8

*10P_4

C214
*10P_4

BLUETOOTH

C387
.1U_4

SATA_TXP5 12
SATA_TXN5 12

+5V_TP

CON2
L20 1

VCC5
SATA_RXN5 12
SATA_RXP5 12

28
28

VCC3

R237
R240

TPDATA
TPCLK

+5V_TP

2 BLM18PG181SN1D_6

6
5
4
3
2
1

TPDATA_1
TPCLK_1

0_4
0_4

GND
E-SATA
ESATA-CD013C0EA-7P-L-H

C217

6
5
4
3
2
1

T/P_Board
*100p/50V_4

R348
4.7K

AFNXX0-N2G1V-6P-R-kw3

DFHS06FS178
3

HW_RADIO_DIS#
0
28

Q14
DTC144EUA

BT_ON

VCC3

R618

UMT_213-3-1_3
BA144EUAZ04

R635
*4.7K

1
2
3
4
5
6
7
8
9
10
11
12
CN2
TOUCH PAD 12P

VCC5
5VPCU
28
28
28
28
28
28

RF_SW
RF_LED
TP_ON
TP_LED#
PWRLED#
NBSWON#

ANT_GND

CN1
GND

SIG

GND

GND
ANT

1
SIG
DFHS01FS000
MMCX-25-10904-T-3P
25-501A0-L

DFHD01MS381

GND
ANT_GND

CN23

5VPCU
NBSWON#

ANT_GND
R4

C576

PWRLED#
C55

C581

1000p/50V_4

1000p/50V_4

0
0.1u/10V_4
ANT_GND

DKZ00TFU101
F3
1
2

5VSUS

POLY_SWITCH

USBVCC0

VCC5

USBVCC0

TP_LED#
C575

RC1206
C624
100U/6.3V-3528

+
C650
0.1U

C618
0.1U

0.1u/10V_4

TP_ON
C580

C579

1000p/50V_4

1000p/50V_4

RF_LED
RP49
0_4P2R_S

USBVCC0
USBP3-_C
USBP3+_C

4
1

3
2

C636
*47P/50V

USBVCC0

USBVCC0

5
6
7
8

C577

1000p/50V_4

1000p/50V_4

3
2

USB

D34
DA204U

L54

4
1

C635
*47P/50V

1
2
3
4

D35
DA204U

*DLW21HN900SQ2L

1
3

2
4

USBP3USBP3+

13
13

RF_SW
C578

CN21

5VUSB
C331
C651
0.1u

C652
1000P

C653
1000P

C328
0.1u

*10u/10V_8
13
13

USBP2+
USBP2-

13
13

USBP1+
USBP1-

13
13

USBP0+
USBP0-

R352
R359

0_4
0_4

USBP2+_C
USBP2-_C

R353
R360

0_4
0_4

USBP1+_C
USBP1-_C

R354
R361

0_4
0_4

USBP0+_C
USBP0-_C

1
2
3
4
5
6
7
8
9
10
11
12
CN6
USB_CONN

PROJECT : PB5/6
Quanta Computer Inc.

http://mycomp.su/x/
5

Size

Document Number

Rev
1A

ESATA/SW/ TP/ USB /BT/TV

Date:
4

Wednesday, June 04, 2008

Sheet
1

27

of

35

VCC3

R207
10K_4

30
EC_3AVCC

3VPCU
C138
C175

C171

C146

C186

C181

BK1608HS121-T

EC_3VSTBY L19
C182

C139

1000P/16V_4

C141

L17

3VPCU

R214

10K_4

VCC3

R213

*10K_4

SYS_HWPG

3VPCU

BK1608HS121-T

VCC3

32 HWPG_1.05V

HWPG

D14

BAS316

D12

BAS316

D11

EV@BAS316

D10

EV@BAS316

D9

EV@BAS316

0.1U
0.1U

0.1U

0.1U

3VPCU

0.1U

20
R636
MY16
MY17

HWPG

29
29

12
14
14
14

GATEA20
SERIRQ
KBSMI#
SCI#

D8

BAS316

D17

BAS316
D15
BAS316

PCURST#
D18

12
RCIN#
14 PM_BATLOW#

D16

17
126
5
15
23
14
4
16

BAS316

BAS316

CIR_IN

119
123
T79

GPC0/CRX
GPB2/CTX

56
57
33
19
20

84
83
82

HWPG_1.5V

6,33

HWPG_1.8V

MBCLK
MBDATA

GPIO
LPC

SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
SMCLK2/GPF6
SMDAT2/GPF7

110
111
115
116
117
118

PS2CLK0/GPF0
PS2DAT0/GPF1
PS2CLK1/GPF2
PS2DAT1/GPF3
PS2CLK2/GPF4
PS2DAT2/GPF5

85
86
87
88
89
90

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/GPA6
PWM7/GPA7

24
25
28
29
30
31
32
34

TACH0/GPD6
TACH1/GPD7

47
48

IT8512

CIR

R212
470K

MBCLK
MBDATA
D7

BAS316

CAPSLED# 29
CELL-SET 35
RF_LED

TPCLK
TPDATA

D13

BAS316

CCD_POWERON

-PCUHOLD

UART

TXD/GPB1
RXD/GPB0

A/D D/A

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4
ADC5/GPI5
ADC6/GPI6
ADC7/GPI7

66
67
68
69
70
71
72
73

R183
10K
U9

8512_SCE#
8512_SCK
8512_SI
8512_SO

R182
R181
R205

47
47
15

8512_SCK_R
8512_SI_R
8512_SO_R

19

1
6
5
2

CE#
SCK
SI
SO

VDD

HOLD#

WP#

VSS

WP#

WP#

C147
0.1U

W25X80
Q37
*MMBT3906

2
1

35
112
109
108

BATLED0#
BATLED1# 29
TEMP_MBAT
MBATV

DNBSWON#
HWPG
SUSC#

TEMP_MBAT 35
MBATV 35
RF_SW 27

MID1

EAPD

MID2
MID3

C187

21

*39P
R176

76
77
78
79
80
81

DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3
DAC4/GPJ4
DAC5/GPJ5

10K@EV

C180
*39P

C176
*39P

3VPCU
B

R423

U10

U20

32.768KHZ
2

C190
10P

R421
*10K_4

4
3

CIR_IN

1
2

AJ085120F02

C393 0.1u/10V_4

5VPCU

75

IT8512

CIR@0_4

C184
10P

CIR_VCC

VCC

OUT

3
4

GND
GND

IR-IRM-V538-TR1
IR-IRM-V538-TR1-3P-pb2
BEBK0076Z00

C189
*0

0.1U

5VPCU

PMUX1
PMUX2

2
128

CK32KE
CK32K

MX[0..7]

C192

35
29
35
19

Y3

R171
0

3VPCU

CC-SET
VFAN
CV-SET
ADJ

AVSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS

CLOCK

29

10K

R204
10K

FANSIG 29
D/C#
35

WUI5/GPE5
RING#/PWRFAIL#/LPCRST#/GPB7

KBMX

58
59
60
61
62
63
64
65

MY[0..15]

R608

R177
*10K@IV

1
12
27
49
91
113
122

KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

29

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55

FLRST#/WUI7/GPG0/TM
FLCLK/SCK
FLAD3/GPG6
FLASH
FLAD2/SO
FLAD1/SI
FLAD0/SCE#
FLFRAME#/GPG2

KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

*10K

27
27

NUMLED# 29
PWRLED# 27
ENBEEP 21
REFON 35
WLSW 24
SWI#
14
BT_LED# 29
BT_ON 27

NBSWON# 27
SUSB# 14
ACIN
35

WAKE UP

0.1U

*100K

10K

R210

10K 10K

RF_LED 27
TP_LED# 27
TP_ON 27
PCIRST# 13,24,25

125
18
21

PWRSW/GPE4
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1

C188

R193

10K

R209

SWI#

14

106
105
104
103
102
101
100

R206

WLSW

VCC5

MBCLK
3,20,35
MBDATA 3,20,35
DNBSWON# 14

120
124

TMR0/WUI2/GPC4
TMR1/WUI3/GPC6

8512_SO
8512_SI
8512_SCE#

NBSWON#

LPCPD#

PCURST#

8512_SCK

WLSW

PWM

10K

NBSWON#

4.7K_4
4.7K_4

3VPCU

3VPCU

R197

27
24

R200
R201

107
99
98
97
96
95
94
93

SM BUS

VSTBY

3
74

127

LPCPD#/WUI6/GPE6
GA20/GPB5
SERIRQ
ECSMI#/GPD4
ECSCI#/GPD3
WRST#
KBRST#/GPB6
PWUREQ#/GPC7

34

RVCC3

PS/2

LPCPD#

GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
GPH0/ID0/SHBM

LID#
PCLK_EC

LID#
PCLK_EC
LFRAME#

LAD0
LAD1
LAD2
LAD3
LPCRST#/WUI4/GPD2
LPCCLK
LFRAME#

GPE3/ISCLK
GPE2/ISAS
GPE1/ISAD

10
9
8
7
22
13
6

VBAT
AVCC

LAD0
LAD1
LAD2
LAD3

VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

0.1U

12,24
12,24
12,24
12,24
19
2
12,24

11
26
50
92
114
121

C191
*10P

C185

KSO16/GPC3
KSO17/GPC5
GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7

PCLK_EC
R211
*22

EV@10K_4

RSMRST# 14
VRON 31
ECPWROK 14,19
MAINON 20,32,33,34
SUSON 33,34
RVCC_ON 34
CHG# 35

MY16
MY17

VCC3 3VPCU

VCCRTC

VOLMUTE# 21,22
SUSC# 14

GFXPG

T66
T63
T69

0.1U

R180

0.1U

R179

0.1U
D

NBSWON#

Q9
DTA124EU

27

NBSWON#

35

ACIN

14

SUSB#

D20

BAS316

D19

BAS316

-PCUHOLD

3VPCU

R229

R190

R191

R192

100K

100K

100K

100K
R622

R623

R624

R625

MID1
MID2
MID3
12 CLEAR_CMOS

http://mycomp.su/x/
5

CLEAR_CMOS

MID3 MID2 MID1

0
0
0
0
0
PB6
1
1
PB6M 0
0
PB5M

PROJECT : PB5/6
Quanta Computer Inc.
Size

Document Number

Date:

Tuesday, June 10, 2008

Rev
1A

EC ITE8512
Sheet
1

28

of

35

LED

CPU FAN

BATTERY CHARGE LED

29

LED3
1

28

R38

330_6

5VPCU

17-21SYGC/S530-E2/TR8
LED17-21VGC-TR8
R610
3VPCU

Q34
MMBT3906
BATLED1#

10K_4

3VPCU
VCC5
R570
100K
28

FANSIG

LED4
3

R41

330_6

VCC5

R42

R582
*10K_4

R30

330_6

VCC5

THERM_ALERT#

3,14 THERM_ALERT#

17-21SYGC/S530-E2/TR8
LED17-21VGC-TR8

C561

28

*0.01u/16V_4
CON8

U28
2

LED2
1

BA144EUAZ04

C568
0.1u/10V_4

VCC3

10K_4

Q35
MMBT3906

UMT_213-3-1_3
VCC3

28 BT_LED#

10K_4

Q25
DTC144EUA

VCC5

17-21SYGC/S530-E2/TR8
LED17-21VGC-TR8

Q3
MMBT3906

R573

BLUE TOOTH LED

VIN

VO
GND
/FON GND
GND
VSET GND

1
4

VFAN

TH_FAN_POWER

3
5
6
7
8

C565

3
2
1

C563

85205-0300L
10u/10V_8 0.01u/16V_4

G995
R611

28 CAPSLED#

VCC3

FANPWR = 1.6*VSET

10K_4

Number Lock

G995/Pin1- internal pull high (+5V)

LED

LED1
Q36
MMBT3906
28 NUMLED#

R17

330_6

VCC5

17-21SYGC/S530-E2/TR8
LED17-21VGC-TR8
R612

VCC3

10K_4

Keyboard CONN

28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28

MY10
MY15
MX4
MX5
MY8
MX6
MX0
MY0
MX3
MX1
MY13
MX7
MX2
MY3
MY11
MY12
MY2
MY9
MY14
MY6
MY7
MY5
MY1
MY4

MY10
MY15
MX4
MX5
MY8
MX6
MX0
MY0
MX3
MX1
MY13
MX7
MX2
MY3
MY11
MY12
MY2
MY9
MY14
MY6
MY7
MY5
MY1
MY4

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

MX5
MX4
MY15
MY10

220Px4
7
5
3
1

CP5
8
6
4
2

MY0
MX0
MX6
MY8

CP4
8
6
4
2

MX7
MY13
MX1
MX3

3VPCU

3VPCU
RP17
MY4
MY5
MY6
MY7

10
9
8
7
6

MY11
MY12
MY13
MY14

10
9
8
7
6

MX4
MX5
MX6
MX7

10
9
8
7
6

1
2
3
4
5

MY3
MY2
MY1
MY0

28
28
28
28

MY17
MX0
MY16
MY15

MY17
MX0
MY16
MY15

R198
R196
R615
R616

*10K
10K
*10K
10K

10KX8
RP16

220Px4
7
5
3
1

CP3
8
6
4
2

MY12
MY11
MY3
MX2

220Px4
7
5
3
1

CP2
8
6
4
2

MY6
MY14
MY9
MY2

220Px4
7
5
3
1

CP1
8
6
4
2

MY4
MY1
MY5
MY7

1
2
3
4
5

MY10
MY9
MY8

10KX8

P/N:DFFC24FR181

24

CP6
8
6
4
2

220Px4
7
5
3
1

CON3
AFN240-A2G1T-24P-L
AFN240-A2G1T-24P-L-kw3

Bot

220Px4
7
5
3
1

contact

RP15
1
2
3
4
5

MX3
MX2
MX1

10KX8

15"

17"

CAPSLED
K_LED_P
(Pin 31)

FN_F10

K_LED_P
(Pin 6)

NUMLED

K_LED_P

PROJECT : PB5/6

(Pin 1)

Quanta Computer Inc.

http://mycomp.su/x/
5

Size

Document Number

Rev
1A

SW/LED/Keyboard
Date:
4

Friday, May 30, 2008

Sheet
1

29

of

35

MAIND

SUSD

MAIND

33,34

SUSD

34

VIN
3

SYS_SHDN#

2
VIN

PR23
0_4

PR178

PD17
UDZS5.1BTE-17

PC26
0.1u/50V_6

PC10
4.7u/10V_8

2
0.1u/50V_6

PC11
0.1u/50V_6
REF

8
7
6
5

3V5V_EN

PR34
2.2_6
1

PC7

PC19

PC15

5V_DL

0.1u/50V_6
PR26
1/F_6
1
2

1
2
3

PC25
2200p/50V_6
1

PR16
0_4

PQ9
FDS6690AS

3
2
1
3V_LX

SKIP
DDPWRGD_R
3V5V_EN

PR39
2.2_6

PR17
0_6

PR28
1/F_6
2

3V_DL

PC20
1u/16V_6

OCP:8A

SKIP

PR27
0_6

VL

PR19
PR22

PC16
0.1u/50V_6

PC21
0.1u/50V_6

PD2
1PS302

PR30
22_8

+15V_ALWP

VL

PR29

15V

0_6

DDPWRGD_R

PR24

0_6

SYS_HWPG 28

L(ripple current)
=(19-3.3)*3.3/(2.2u*0.5M*19)
~2.48A

Iocp=8-(4.18/2)=5.91A
Vth=5.91A*15mOhm=88.65mV
R(Ilim)=(88.65mV*10)/5uA
~177.3K

PR18
*0_6

REF

PR25
*10K_6

OCP:8A

L(ripple current)
=(19-5)*5/(2.2u*0.4M*19)
~4.18A

*0_6

PD1
1PS302

+
330U/6.3V/7343/ESR=25

PQ11
FDS6690AS

PC22
0.1u/50V_6

PC17
0.1u/50V_6

PC36

0.1u/50V_6

3VPCU
2

PC33

PC30
2200p/50V_6

0.1u/50V_6
330u/6.3V_6X5.7

PR14
196K/F_6
2

PR31

*0_6

*200K_4
PR33
*39K_4
2

PC18
0.1u/50V_6

Iocp=8-(2.48/2)=6.67A
Vth=6.67A*15mOhm=100.05mV
R(Ilim)=(100.05mV*10)/5uA
~200.1K
3VPCU

5
6
7
8

3VPCU

1
2
5
6

3VPCU

MAIND

5VPCU

PQ17
AO4468
4

34

RVCCD

RVCCD

PQ14
AO6402

5VPCU

1
2
5
6

5VPCU
5VPCU

1
2
5
6

10u/25V_1206

PU2
MAX17020

3VPCU

3VPCU
REFIN2
1

32
31
30
29
28
27
26
25

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

17
18
19
20
21
22
23
24

8
7
6
5
1

PR15
*0_4
+
PC8

1
PR20

PAD
PAD
PAD

1
2
3

5V_LX
2

5VPCU

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD

35
34
33

9
10
11
12
2
DDPWRGD_R 13
178K/F_6
3V5V_EN
14
15
16
37
36

OCP : 8A

PL2
2R2uH-5.8mR

3
2
1

5VPCU

PL1
2R2uH-5.8mR

PC23
*2200p/50V_6

PQ8
FDS8878

8
7
6
5
4
3
2
1

OCP: 8A
5VPCU

3V_DH

*0_6

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

5V_DH

PR9

BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2

PQ10
FDS8878

PR32
*2.2_6
2

PC14
1u/10V_6

PR11
100K_4

PR13
0_4

PC12
1u/10V_6

PR10
0_4

PC13
PR12
10K_4

5
6
7
8

PC28
10u/25V_1206

PC24
10u/25V_1206

5
6
7
8

PC29
10u/25V_1206

PC34
2200p/50V_6

PC32
0.1u/50V_6

PR21
39K/F_4
PC31
*100U/25V_6X7.7

PC27
2200p/50V_4

10_6

VL

VL

VIN

1
2
5
6
PQ18
AO6402

MAIND 3

5VUSB

PQ5
AO6402

SUSD

3
2
1

4
VCC3

3VSUS

VCC5
3
2
1

5VSATA

SUSD 3

PQ30
AO6402

SUSD

PQ29
AO6402

MAIND 3

1
2
5
6

5
6
7
8

RVCC3
PQ7
AO4468

PROJECT : PB5/6
5VSUS

Quanta Computer Inc.

Size

http://mycomp.su/x/
5

Document Number

Rev
1A

SYSTEM 3V/5V
Date:
4

Wednesday, June 04, 2008

Sheet
1

30

of

35

PC139
2200p/50V_6

6266A_UG1

2
3,6,12 ICH_DPRSTP#
14 VR_PWRGD_CK410#
PR155

VID0

0_6

40

VID3

PR164

0_6

41

VID4

0_6

42

0_6
VR_ON

PR60

0_4

PR61

0_4

PU7
ISL6262A

UGATE2
BOOT2

DPRSLPVR

PHASE2
LGATE2

30

PGND2

29

ISEN2

23

VID5

43

VID6

44

VR_ON

45

CLKEN#

1
2

1
2
3

PC137
0.22u/25V_8

DPRSTP#

47

CLK_EN#
NC

1
1

PC140
0.1u/50V_6

PC148
*2200p/50V_6
PL11
1

6266A_LG2

0.36uH
2

PR42

+ PC1
ISEN2

PC47
2

25

OCSET

VSUM

19

PD4
2.2_6 *SSM24PT

PQ12
AOL1412

PQ48
AOL1412

330u/2V_7343

PC38
2200p/50V_6
PR38
0_6

1000p/50V_4

PR36
0_6

PR66

VDIFF

PC128
1000P/50V/X7R/0402

13.3K/F_4

VSUM

1K/F_4
12

FB2

11

FB

PR156

PC143
10u/25V_1206

PQ45
AOL1414

PC135
0.22u/25V_6

1K/F_4

13

PC144
10u/25V_1206
PR175
*2.2_6

6266A_PH2

DPRSLPVR

46

PR154
255R/F/0402

6266A_UG2

27
PR173 2.2_6
26 1
2

28

VR_ON

PR55
10K/F_6

4.7u/25V_8

PR165

VID2

31

VID1

39

499/F_4

5
38

0_6

0_4

1
2
3

48
3V3

PVCC

0_6

PR58

PC40

37

PC136
0.22u/25V_6

5VPCU

SOFT

+
PC149
560U/2.5V/ESR=10

PC142
2200p/50V_6

NTC

VIN
ISEN1

VR_TT#

PR167

PR161

6,14 PM_DPRSLPVR

PR169

PR56

VRON

24

1
2
3

0_6

PR163

H_VID6
28

DPRSLPVR

1 PC49
0.022u/50V_6

2
2

ISEN1

RBIAS

ISEN2

1
2
3

4.02K/F_4

33

H_VID5

*0_6

1
2
3

1/F_6

PR168

H_VID4

PR166

32

PGND1

H_VID3

PR35
0_6

147K/F_6

LGATE1

10K/F_6

PGD_IN

34

PR64
*0_6

H_VID2

3.65K/F_6

PR171

PSI#

PHASE1

PR162
11K/F_4

PR57
2.7K/F_4

PC134
68n/25V_6

PSI#_1

H_VID1

PR174 2.2_6
36 1
2

PGD_IN

PR172

PC37
2200p/50V_6

PSI#_1

*0_4

H_VID0

BOOT1

35

0_4

PR153

PR62

PR170

330u/2V_7343

PD3
*SSM24PT

PC138

PR152

470K_4 NTC

GND_T

VR_ON

PC44 1
.01u/16V_4

Panasonic
4
ERT-J0EV474J

49

PQ13
AOL1412

+ PC2

VSUM

UGATE1

0.22u/25V_8

H_PROCHOT#
PR177

GND

21

PSI#

PR151

+ PC3

PR37
0_6

PR149
*10K/F_4

4
PQ47
AOL1412

Throttling temp.
105 degree C

RVCC3

20

22

Close to Phase 1 Inductor

6266A_LG1

PC132
0.1u/50V_6

VIN

PC41
1u/25V_8

VCC

0_8

PR69

0.36uH
2

330u/2V_7343

PC42
0.1u/50V_6

PR50
10/F_6

PGOOD

PSI#

PR41
2.2_6

PSI#

VCC_CORE

PC35
*2200p/50V_6
PL12
1

PR157
1.91K/F_4

5VPCU

PC147
100U/25V_6X7.7

PC146
10u/25V_1206

6266A_PH1

PR158
10_4

PQ46
AOL1414

PR59
10/F_6

PC51
0.1u/50V_6

PC145
10u/25V_1206

VCC3

PWR_MON

VIN

4.99K/F_6
PGD_IN
1

PR68
2

PR43
*2.2_6
2

3,6,14

1
2
3

DELAY_VR_PWRGOOD

PC141
0.1u/50V_6

VIN
+

PC133
0.22u/10V_6

PR52

3.65K/F_6

PR51

10K/F_6

VSUM
97.6K/F_4

PC129
470P/50V/X7R/0402

10

PR176
10K _6 NTC

COMP

Panasonic
ERT-J1VR103J

1/F_6

PR53

*0_6

PR160
1K/F_4

1000p/50V_6

ISEN1

DFB
17

15

PR54
18

PC130

VW
RTN

PR150
6.81K/F/0402
1

16

DROOP

VO

PC48
220P/50V/X7R/0402

VSEN

14

PR67

PC43
0.33u/25V_6

Close to Phase 1 Inductor

PR159
3.9K/F_4

PC46
2
1
0.01U/16V/X7R/0402

PC131
2

180p/50V_4
ISL6266_VO
1
A

2
1

PC45
0.01U/16V/X7R/0402

PC50
.01u/16V_4

PR65

0_4

PR63

0_4

Parallel

PROJECT : PB5/6

VCCSENSE 4
VSSSENSE 4

Quanta Computer Inc.

Size

Document Number

Date:

Wednesday, June 04, 2008

Rev
1A

CPU CORE

http://mycomp.su/x/
5

Sheet
1

31

of

35

VIN
5VSUS
PR71
10_6

12

PHASE

11

VDD

OC

10

FB

PGOOD

PU6
RT8202

VDDP

LGATE

NC

TPAD

17

14

NC

PC57
0.1u/50V_6

PC125
10u/25V_1206

PC126
10u/25V_1206
B

PC127
*2200p/50V_6

OCP: 14A

UGATE-1.05V
PL10
PHASE-1.05V
PR144

VCCP

3.24K/F_6

LGATE-1.05V

PQ43
AOL1412

1R5uH-3.9mR
PR142
2.2_6
+
+
PC53
PC52
330u/2V_7343 330u/2V_7343

PR145

PC122
33p/50V_6

4.02K/F_6

PC121
2200p/50V_6
PR143
10K/F_6

21

18

PC58
2200p/50V_6

GND

PGND

GND

GND

GND

PQ44
AOL1414

UGATE

VOUT

PC123
.1u/25V_8

TON

20

PC54

PC124

PC61
1u/16V_6

HWPG_1.05V

13

GND

PR141
*10K_6

BOOT

PC56
2200p/50V_6

16

PC59
*0.1u/50V_6

EN/DEM

1
2
3

15
3VSUS

28

PR148
*2.2_6

4.7u/10V_8

1
2
3

0_6

20,28,33,34 MAINON

19

PR70

PC55

*0.1u/50V_6
PR146
0_6

PR147
1M_6

PD16
RB500V
PC60

VCCPGND
VCCPGND *1000p/50V_6

VCCPGND

.01u/50V_6
1.05V_FB

PR230

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)

VOUT=(1+R2/R3)*0.75

Rds*OCP=RILIM*20uA
AOL1412 Rds=4.6mOhm
14A OCP --- OC=3.22K

short
VCCPGND

PROJECT : PB5/6
Quanta Computer Inc.

http://mycomp.su/x/
1

Size

Document Number

Date:

Wednesday, June 04, 2008

Rev
1A

VCCP
2

Sheet
5

32

of

35

5
6
7
8

VIN
1.8VSUS

PR134
*2.2_6
4

10u/10V_1206

PQ27
FDS8878

PU3
TPS51116

SMDDR_VTERM
PC77
10u/10V_8

51116GND

DRVH

19

VBST

20

LL

18

DRVL

17

PC115
2200p/50V_6

PC112
*2200p/50V_6
PR88

VTT

VTTSNS

GND

VTTGND

PGND

16

MODE

S3

11

S3_1.8V

S5

12

S5_1.8V
5VIN

0_6

PC79

0.1u/50V_6

PC83
10u/25V_1206

PC82
10u/25V_1206

OCP: 12.44A
PL6
1.8VSUS
2R2uH-5.8mR

5
6
7
8

PC81
10u/10V_8

VLDOIN

3
2
1

PC70

5VIN
PC86
0.033u/50V_6
5VIN

VTTREF

COMP

VDDSNS

10

V5IN

14

PGOOD

13

CS

15

VDDQSET

21
22
23
24
25
26
27

PR126
0_6
51116GND
51116GND

PR136

*0_6

PR137

0_6

20,28,32,34

SUSON

28,34

3VPCU

2.2/F_6

HWPG_1.8V 6,28

PC84

+ PC118

330u/4V_7343

330u/4V_7343

PC102
2200p/50V_6

3VPCU

100K/F_6

PQ28
FDS6676AS_NL

PR98
5.1K/D_6

*1000p/50V_6

FOR DDR II

DIS_MODE

5VIN

5VPCU
PC150
*18P/50V/0402

PR122
0_6

1.8VSUS

MAINON

PR132

PR133
0_6
C

+ PC119

PR112
PR108
0_6
PR106
0_6

3
2
1

SMDDR_VREF

GND
GND
GND
GND
GND
GND
GND

DIS_MODE

PC110
4.7u/6.3V_6

51116GND
PR229

PR110
*110K/F_6

R2

S3_1.8V

short

S5_1.8V

(10u*PR98)/Rdson+Delta_I/2=Iocp

51116GND
PR109
*76.8K/F_6

R1

PC100
*0.1u/50V_6

PC95
*0.1u/50V_6

R1=(100*Vout-R2)K
B

51116GND

1.8VSUS

MAIND

30,34
1
2
5
6

MAIND

PQ41
FDC653N_NL

MAIND

VCC1.8

PROJECT : PB5/6
Quanta Computer Inc.
Size

http://mycomp.su/x/
5

Document Number

Rev
1A

DDR 1.8V
Date:
4

Wednesday, June 04, 2008

Sheet
1

33

of

35

1.8VSUS

3VSUS

PR95
*100K_4
PU4
D

PC93
10u/6.3V_8

PC89
0.1u/10V_4

VIN

POK

VIN1

GND

VOUT

VOUT

HWPG_1.5V 28

VCC1.5

APL5913
8

PR91
100K_4

15V

VCNTL

PR1
1M_6

PR5
1M_6

PR4
22_8

PC87
1u/10V_4

1
PC85
47n/50V_4

PC94
10u/6.3V_8

Vout =0.8(1+R1/R2)
=1.5V

2
PQ2
DMN601K-7

PC91
0.1u/10V_4

PQ3
DMN601K-7

PC92
10u/6.3V_8

PQ1
DTC144EU

PR2
1M_6

RVCC_ON

PR94
100K/F_4

30

RVCCD

28

88.7K/F_4

RVCCD

RVCC_ON_G

PC78
*0.1u/50V_6

4,9,12,15,21,24

PR97

RVCC1.5

VCC1.5

2.8A
6

VIN

EN

5VPCU

PR92
0_6

FB

20,28,32,33 MAINON

VIN

SMDDR_VREF

3VSUS

1.8VSUS

5VSUS

15V
28

PR45
1M_6

PR47
22_8

PR44
22_8

PR46
22_8

PR48
22_8

RVCC_ON

1
0_6

PR49
1M_6

3VPCU
30

PQ15
DMN601K-7

PQ20
DMN601K-7
1

PQ19
DMN601K-7

PQ21
DMN601K-7

PQ22
DMN601K-7

SHDN

GND

VIN

PC39
*2200p/50V_4

VO

NC

RVCC1.5

PC5
1u/16V_6

G909

PC6
*0.1u/50V_6

PQ16
DTC144EU

PR40
1M_6

SUSON

28,33

PC4
2.2u/10V_6

SUSD

SUSD
3

SUS_ON_G

0.15A

PU1

PR3
2

VIN

VCC3

PR6
1M_6

VCC1.5

VCC5

PR104
22_8

PR103
22_8

15V

VCC1.8

PR101
22_8

PR102
22_8

PR8
1M_6

30,33

MAIND

MAIND
3

MAINON_ON_G

PQ31
DMN601K-7

PQ32
DMN601K-7

PQ6
DMN601K-7

PC9
*2200p/50V_4

2
PQ33
DMN601K-7

2
PQ34
DMN601K-7

PQ4
DTC144EU

PR7
1M_6

20,28,32,33 MAINON

PROJECT : PB5/6
Quanta Computer Inc.

http://mycomp.su/x/
5

Size

Document Number

Date:

Wednesday, June 04, 2008

Rev
1A

DISCHARGE
4

Sheet
1

34

of

35

VA

PF1
BUS-10A-1206
1
2

PL5
HI0805R800R-00_8

PD11
*SSM34PT

PC106
2200p/50V_6

PL4
HI0805R800R-00_8

87502-0400-4P-L

PC96
0.1u/50V_6

PC97
0.1u/50V_6

PD13
SSM34PT

1
2
3

VA2

R1

PC104
0.1u/50V_6

VIN

8
7
6
5

PR114
220K/F_6

PC108
0.1u/50V_6

PR115
220K/F_6

PD14
P4SMAJ20A

ACIN_1

2
PR129
*10K/F_6

0_6
D/C#

PR75
10K_6

28

PQ35
IMD2AT108

CSIN_1

UDZS15B-7-F
PR130
6.8K/F_6

PR113

PD9

ACIN

PR100
20/F_6

ACPRN

ACPRN

24

DCIN

2
3
2
1
18

ISL6251_PHASE

LGATE

14

ISL6251_LGATE

PGND

13

GND

12

VADJ

11

ACLIM

10

ISL6251_VDD
2

PR181
*10K_6

PR76
100_4

PR77
100_4
MBCLK

3,20,28

MBDATA

3,20,28

3VPCU

28

CELL-SET

3
2
1
PR105
0_6

PQ37
*DMN601K-7

CHLIM

VRFE

ICM

1P

R3

PR119
10K/F_6

PR117
*514K/F_6

CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A

ICMNT

PR179
10K_6

PC111
*3300p/50V_4

4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)
CC-SET

28

Vaclm=((33//152)/(33//152+19.6//152))*Vref
B

CHG#

1
PC99
*100p/50V_6

28

*0_6

R2=adapter current sense resistnece

CHG#

28

PR180
0_6
PQ49
DTC144EU

PR78
*100K/F_6

CV-SET
PR118

PR111
3.3K/F_6

PC101
.01u/50V_6

PC69
*.01u/50V_6

PC120
10u/25V_1206

LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)
ICMNT

PD6
ZD5.6V
1

PD5
ZD5.6V

PC66
10u/25V_1206

Float = 4.2V / CELL

PR128
*100_4

PR120
*100K/F_6

PC65
2200p/50V_6

CSOP_1

PR121
*514K/F_6

ACLIM

PC103
100p/50V_6

PC90
.01u/50V_6

PR79
4.99K/F_6
2

6251CELLS_1

REFP

47p/50V_6

ADDRESS: 16H

PC72
2200p/50V_6

VREF
PR123
10K/F_6

VADJ

6251VCOMP2

DMN601K-7
PQ26

PC64
.01u/50V_6

CSON_1

VREF

PC68
47p/50V_6

PC117
0.1u/50V_6

PC67

SUYIN BATTERY

MBAT+

6251EN

TEMP_MBAT

VCOMP

ICOMP

PR96
0_6

PL8
HI0805R800R-00_8

PQ40
FDS6690AS

R2

BUS-15A-1206

PR85
2.2_6

ID

EN

PF2
P_BAT
ID
B/I
TEMP_MBAT

PR93
10K/F_6

TEMP_MBAT 28
HI0805R800R-00_8
PL7
MBAT+

6251VCOMP1

Modify on 11/05
TEMP_MBAT

CN12

PR140
0.033_3720

PL9
PCMC063T-6R8MN
6251LR

ACSET

CELLS

PC116
100p/50V_6

ISL6251_UGATE

PHASE
PU5
ISL6251A

6251ICOMP 5

PR82
10K_6

PQ39
FDS8878

1
23

6251ACSET 2
PR84
*100K_4

17

PC153 PC152
0.1u/50V_6
0.1u/50V_6

CSON

PR90
82.5K/F_6

3VPCU

5
6
7
8

15

19

UGATE

PC113
.1u/25V_8
6251B_1

PC114
10u/25V_1206

ACPRN
PC73
0.1u/50V_6

PR83
10/F_6

PR125
2.7_6
6251B_2
16

PC80
0.1u/50V_6
PC76
2200p/50V_6
PC71
*2200p/50V_6

5
6
7
8

CSON 22

PR86
20/F_6

10A
10A
DKA00VFU000 DKA00VFU000

PD15
RB500V

BOOT

DCIN

10 1
2
11 3
4
5
6
7
12 8
9
13

CSOP

2
1

CSON_1

10K Ohm
10K Ohm
PR119 CS31003F949 CS31003F949

CSIN

CSOP 21
PC75
47n/25V_6

CSIP

PR87
20/F_6
CSOP_1

10K Ohm
2.43K Ohm
PR123 CS31003F949 CS22433F913

PR89
*2.2_6

CSIN
20

CSIP

Add PR83,PR81 11/05

20m Ohm
20m Ohm
CS+020AGM00 CS+020AGM00

PC98
4.7u/10V_8
1
2

ISL6251_VDDP

VDD

Discrete

PR124
4.7_6

PC88
0.1u/50V_6

PR81
*0_6

PR107
2.2/F_6

PR80
*100K_4

ACIN

VDDP

UMA

28

VIN

PL3
HI0805R800R-00_8
VA3

PC74
2.2u/10V_8
ISL6251_VDD 1
2

Input sense resistor and Constant power setting table

PQ25
DMN601K-7

CSIP_1
3VPCU

PF1

PR74
33K_6

PR127
10K/F_6

PC107
2200p/50V_6

8
7
6
5

PC151
0.1u/50V_6

PD10
SW1010CPT

PR116

1
2
3

PC109
0.1u/50V_6

DFHS04FR741

28

PQ42 FDS6675

PC105
0.1u/50V_6

PQ36 FDS6675

2P

87502-0400-4P-L

PD12
SSM34PT
2P

1
2
3
4

1P

PCN1

0.02_7520
PR116

PF1

CELL-SET = Low ----> Cells = VDD ---->4S

CELL-SET = High ----> Cells = GND ---->3S

PQ23
MBAT+

PR72

PC62
0.1U/25V/X7R/0603

PQ24

200K/F_6

28

REFON

REFP

DMN601K-7

*DA204U

MBATV

28
A

PC63
0.01u/50V_6

PR73
40.2K/F_6

*DA204U

PD7
3TEMP_MBAT

PD8
3 ID

REFP

3VPCU

3VPCU

IMD2A

IMD2AT108
VIN

PROJECT : PB5/6
Quanta Computer Inc.

http://mycomp.su/x/
5

Size

Document Number

Date:

Wednesday, June 04, 2008

Rev
1A

CHARGER
4

Sheet
1

35

of

35