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Compal Confidential: Mobile Penryn uFCPGA With Intel Cantiga - PM+ICH9-M Core Logic Schematics Document
Compal Confidential: Mobile Penryn uFCPGA With Intel Cantiga - PM+ICH9-M Core Logic Schematics Document
Compal confidential
Schematics Document
Mobile Penryn uFCPGA with Intel
Cantiga_PM+ICH9-M core logic
2008-02-25
3
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Cover Sheet
Rev
0.4
Date:
Sheet
E
of
53
Compal confidential
CK505
1
Thermal Sensor
EMC1402
VRAM DDR2
128/512MB
P6,7, 8
Fan conn
Dock connecter
P6
H_A#(3..35)
Discrete
Nvidia
NB9M-GE
FSB
H_D#(0..63)
P20,21,22
DDR2 SO-DIMM X2
BANK 0, 1, 2, 3
CRT
P40
Dual Channel
USB conn x3
USB2.0 X12
DMI X4
BT Conn
C-Link
USB Camera
New Card
P31
P19
Azalia
Intel ICH9-M
Realtek
811C(Gbe)
P36
P42
PCI-E BUS*5
Mini-Card*2
P36
P18
Support V1.3
HDMI
P15, 16
FCBGA 1329
P19
CRT
P17
uFCPGA-478 CPU
P6
64bits
LVDS Panel
Interface
72QFN
Clock Generator
SLG8SP553V
Mobile Penryn
page 23,24
TV out
SATA Master-1
SATA Slave
mBGA-676
Audio CKT
SATA Slave
Codec_IDT9271B7
P25,26,27,28
TPA6017A2
P33
P35
P31
JMB385
MDC
P32
RJ45/11 CONN
P30
P34
LPC BUS
SATA HDD Connector
P29
LED
7 in1 Slot
P39
ENE
KB926
P32
RTC CKT.
P29
P38
P26
Int.KBD
e-SATA Connector
With 3'th USB
P39
Dock
P29
P40
P38
SPI
CIR Conn
P35
SPI ROM
25LF080A P37
P39
Security Classification
P41
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Block Diagram
Rev
0.4
Date:
Sheet
E
of
53
Voltage Rails
X MEANS
OFF
O MEANS ON
Symbol Note :
: means Digital Ground
+5VS
+3VS
power
plane
+1.5VS
+0.9V
+1.8V
+5VALW
+B
+VCCP
+CPU_CORE
+3VALW
+2.5VS
+1.8VS
+NVVDD
State
+PCIE
USB assignment:
USB-0 Right side
USB-1 Right side
S0
S1
S3
S5 S4/AC
PCIe assignment:
PCIe-1 TV tuner/WWAN/Robeson
PCIe-2 X
PCIe-3 WLAN
INVERTER
BATT
SERIAL
EEPROM
Thermal
Sensor
KB926
KB926
ICH9
NB9M
SODIMM
NB9M
G-sensor
LVDS
CRT
NB9M
NB9M
DDC2_DATA
DDC2_CLK
3VDDCDA
3VDDCCL
HDMIDAT_VGA
HDMICLK_VGA
NB9M
HDMI
HEX
ADDRESS
DDR SO-DIMM 0
A0
10100000
DDR SO-DIMM 1
A4
10100100
D2
11010010
Security Classification
2008/02/25
Issued Date
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Notes List
Rev
0.4
Date:
Sheet
of
53
50mA
50mA
177mA
1A
D
+V_BATTERY
ICH9
Dock con
AC
1A
+3VALW_EC
10mA
VIN
1.7A
2A
1A
+3VAUX_BT
20mA
LVDS CON
35mA
LAN
60mA
INVPWR_B+
278mA
SPI ROM
5.89A
+3VALW
5.39A
550mA
B++
+3VS
1.5A
657mA
+1.5VS
ICH_VCC1_5
ICH9
2.2A
1.56A
+5VALW
MDC 1.5
New card
Mini card (WLAN)
ICH9
+LCDVDD
LVDS CON
+3VS_CK505
C
390mA
NB9M (VGA)
ICH9
1A
0.58A
+3VS_DVDD
ALC268
JMB385
250mA
0.3A
PC Camera
300mA
0.3A
25mA
Finger printer
35mA
1.3A
+5VS
+VDDA
IDT 9271B7
B+
7A
10mA
360mA
1.8A
NB9M (VGA)
+5VAMP
ODD
3.7A
3.7 X 3=11.1V
DC
700mA
MCH
SATA
BATT
1.9A
B+++
12.11A
8 A
+1.8V
DDR2
50mA
800Mhz
4.7A
1.26A
+VCCP
2.3A
CPU_B+
10mA
+VCC_CORE
34A/1.025V
Muti Bay
+0.9V
1.17A
2A
1.8A
4G x2
ICH9
MCH
CPU
CPU
0.27A
0.19A
2.725A
+NVVDDP
+NVVDD
+1.1V_PCIE
+PCIE
NB9M (VGA)
2A/1.1V
Security Classification
NB9M (VGA)
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
of
53
Security Classification
2008/02/25
Issued Date
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Power sequence
Rev
0.4
Date:
Sheet
of
53
+3VS
ITP-XDP Connector
@ R1
1
XDP_DBRESET#_R
1K_0402_5%
XDP_BPM#3
XDP_BPM#2
XDP_BPM#1
XDP_BPM#0
H_A#[3..16]
H_A20M#
H_FERR#
H_IGNNE#
26
26
26
26
H_STPCLK#
H_INTR
H_NMI
H_SMI#
H_A20M#
H_FERR#
H_IGNNE#
H_STPCLK#
H_INTR
H_NMI
H_SMI#
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
A6
A5
C4
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
H_BR0#
IERR#
INIT#
D20
B3
H_IERR#
H_INIT#
LOCK#
H4
H_LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
HIT#
HITM#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
H_DEFER#
H_DRDY#
H_DBSY#
F1
BR0#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
H_ADS#
H_BNR#
H_BPRI#
9
9
9
H_DEFER# 9
H_DRDY# 9
H_DBSY# 9
H_BR0#
T1
+VCCP
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
1
0.1U_0402_16V4Z
Removed at 5/30.(Follow
Chimay)
XDP_TCK
H_RESET# 9
H_RS#0 9
H_RS#1 9
H_RS#2 9
H_TRDY# 9
H_HIT#
H_HITM#
2
C1
Place TP with a
GND 0.1" away
H_LOCK# 9
G6
E4
R9
1K_0402_5%
2
1H_PWRGOOD_R
XDP_HOOK1
7,26 H_PWRGOOD
9
@
26
H_INIT#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
THERMAL
ICH
H_ADSTB#1
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
H_ADS#
H_BNR#
H_BPRI#
H5
F21
E1
DEFER#
DRDY#
DBSY#
ADDR GROUP_1
K3
H2
K2
J3
L1
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
26
26
26
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H1
E2
G5
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
D21
A24
B25
H_THERMDA_R
H_THERMDC_R
C7
H_THERMTRIP#
A22
A21
51_0402_1%
XDP_TMS
R3
51_0402_1%
XDP_TDO
R4
51_0402_1%
XDP_BPM#5
R5
51_0402_1%
XDP_HOOK1
R6
2 @ 54.9_0402_1%
XDP_TRST#
R7
51_0402_1%
XDP_TCK
R8
51_0402_1%
CLK_CPU_XDP
CLK_CPU_XDP#
CLK_CPU_XDP 17
CLK_CPU_XDP# 17
H_RESET#_R
R10
XDP_DBRESET#_R R11
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_PRE
1
2
+VCCP
2 1K_0402_1%
1 0_0402_1%
H_RESET#
XDP_DBRESET#
R12
0_0402_5%
2
R13
R14
R15
1
1
1
2 56_0402_1%
2 100_0402_5%
2 100_0402_5%
+VCCP
H_THERMTRIP# 9,26
C2
U1
2
1
VDD
SMCLK
SMB_EC_CK2
H_THERMDA
DP
SMDATA
SMB_EC_DA2
H_THERMDC
2
2200P_0402_50V7K
DN
ALERT#
GND
H_THERMDA
H_THERMDC
C3
1
THERM#
BCLK[0]
BCLK[1]
R2
H_HIT#
9
H_HITM# 9
H_PROCHOT#
H CLK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TD0
TRST#
TDI
TMS
GND17
CONN@
SAMTE_BSH-030-01-L-D-A
0.1U_0402_16V4Z
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#[17..35]
ADS#
BNR#
BPRI#
CONTROL
9
9
9
9
9
9
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
XDP/ITP SIGNALS
H_ADSTB#0
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP_0
JCPU1A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0
CLK_CPU_BCLK
CLK_CPU_BCLK#
+3VS
CLK_CPU_BCLK 17
CLK_CPU_BCLK# 17
R16
1
2
10K_0402_5%
THERM#
SMB_EC_CK2 21,38
SMB_EC_DA2 21,38
EMC1402-1-ACZL-TR_MSOP8
Address:100_1100
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
+VCCP
XDP_TDI
Penryn
JP2
D1
RB751V_SOD323
@
R17
56_0402_5%
C4
4.7U_0805_10V4Z
1
2
3
4
+VCCP
C5
0.1U_0402_16V4Z
1
2
G1
G2
ACES_88231-02001
+FAN
1
2
5
6
2 2
D Q2
OCP#
@ D2
27
38
RLZ5.1B_LL34
FAN_PWM
SI3456BDV-T1-E3_TSOP6
OCP#
3
1
@ Q1
MMBT3904_NL_SOT23-3
H_PROCHOT#
+VCCP
A
ZZZ1
R18
56_0402_5%
PCB
Security Classification
H_IERR#
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
of
53
+VCC_CORE
+V_CPU_GTLREF
TEST1
TEST2
TEST3
TEST4
@
@
TEST5
TEST6
TEST7
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
AD26
C23
D25
C24
AF26
AF1
A26
C3
B22
B23
C21
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]
MISC
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3
COMP[0]
COMP[1]
COMP[2]
COMP[3]
R26
U26
AA1
Y1
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#
DATA GRP 2
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2
Penryn
CPU_BSEL
CPU_BSEL2
CPU_BSEL1
166
200
JCPU1C
H_DSTBN#2 9
H_DSTBP#2 9
H_DINV#2 9
H_D#[48..63] 9
H_DSTBN#3 9
H_DSTBP#3 9
H_DINV#3 9
H_DPRSTP# 9,26,49
H_DPSLP# 26
H_DPWR# 9
H_PWRGOOD 6,26
H_CPUSLP# 9
H_PSI#
49
R23
R24
R25
R26
CPU_BSEL0
+VCC_CORE
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21 +VCCPA
+VCCPB
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VCCSENSE 49
VSSSENSE
AE7
VSSSENSE
VSSSENSE 49
+VCCP
R19
1
1
2
2
0_0402_5%
0_0402_5%
C
R20
1
+ C6
330U_D2E_2.5VM_R7
+1.5VS
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
49
49
49
49
49
49
49
0.01U_0402_16V7K
17
17
17
2 1K_0402_5%
2 1K_0402_5%
T2
T3
T4
T5
T6
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
1
1
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
27.4_0402_1%
2
1
H_DSTBN#1
H_DSTBP#1
H_DINV#1
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
54.9_0402_1%
2
1
@ R21
@ R22
9
9
9
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1
DATA GRP 1
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
27.4_0402_1%
2
1
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#[16..31]
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 0
9
9
9
9
H_D#[32..47]
JCPU1B
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0
54.9_0402_1%
2
1
H_D#[0..15]
DATA GRP 3
10U_0805_6.3V6M
1
C7
1
C8
Penryn
.
0
1
266
R27
1K_0402_1%
+VCC_CORE
R28
+V_CPU_GTLREF
R29
2K_0402_1%
2 100_0402_1%
VCCSENSE
2 100_0402_1%
VSSSENSE
R30
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
of
53
+VCC_CORE
5
1
C9
10U_0805_6.3V6M
C10
10U_0805_6.3V6M
C11
10U_0805_6.3V6M
C12
10U_0805_6.3V6M
C13
10U_0805_6.3V6M
C14
10U_0805_6.3V6M
C15
10U_0805_6.3V6M
C16
10U_0805_6.3V6M
+VCC_CORE
JCPU1D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
C17
10U_0805_6.3V6M
C18
10U_0805_6.3V6M
C19
10U_0805_6.3V6M
C20
10U_0805_6.3V6M
C21
10U_0805_6.3V6M
C22
10U_0805_6.3V6M
C23
10U_0805_6.3V6M
C24
10U_0805_6.3V6M
+VCC_CORE
5
1
C25
10U_0805_6.3V6M
C26
10U_0805_6.3V6M
C27
10U_0805_6.3V6M
C28
10U_0805_6.3V6M
C29
10U_0805_6.3V6M
C30
10U_0805_6.3V6M
C31
10U_0805_6.3V6M
C32
10U_0805_6.3V6M
+VCC_CORE
5
1
C33
10U_0805_6.3V6M
C34
10U_0805_6.3V6M
C35
10U_0805_6.3V6M
C36
10U_0805_6.3V6M
C37
10U_0805_6.3V6M
C38
10U_0805_6.3V6M
C39
10U_0805_6.3V6M
C40
10U_0805_6.3V6M
C
+VCC_CORE
C41
330U_D2E_2.5VM_R7
+
C42
C43
<BOM Structure>
1
+
C44
330U_D2E_2.5VM_R7
@
B
330U_D2E_2.5VM_R7
330U_D2E_2.5VM_R7
+VCCP
C45
0.1U_0402_10V6K
C46
0.1U_0402_10V6K
C47
0.1U_0402_10V6K
C48
0.1U_0402_10V6K
C49
0.1U_0402_10V6K
C50
0.1U_0402_10V6K
Penryn
.
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
of
53
B15
K13
F13
B13
B14
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#_0
H_RS#_1
H_RS#_2
B6
F12
C8
H_RS#0
H_RS#1
H_RS#2
H_RS#0
H_RS#1
H_RS#2
6
6
6
2
1
2 10K_0402_5%
R39
2 10K_0402_5%
CLKREQ#_7
R40
2 10K_0402_5%
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
7
7
7
7
27 PM_BMBUSY#
7,26,49 H_DPRSTP#
15 PM_EXTTS#0
16 PM_EXTTS#1
27,38 PM_PWROK
1
2
1
2 100_0402_5%
0_0402_5%
0.1U_0402_16V4Z
R41
R42
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_PWROK
THERMTRIP#
DPRSLPVR
1 @
C55
2
+1.8V
R55
1
C59
2
1
221_0603_1%
2
1
+H_SWNG
V_DDR_MCH_REF
R48
10K_0402_1%
C57
R54
15,16 V_DDR_MCH_REF
0.1U_0402_16V4Z
C58
R47
0.1U_0402_16V4Z
H_RCOMP
100_0402_1%
2
1
R52
0.1U_0402_16V4Z
+H_VREF
24.9_0402_1%
2
1
1K_0402_1%
1
A
2K_0402_1%
2
1
R46
R45
10K_0402_1%
Near B3 pin
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
BC28
AY28
AY36
BB36
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
BA17
AY16
AV16
AR13
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
BD17
AY17
BF15
AY13
M_ODT0
M_ODT1
M_ODT2
M_ODT3
SM_RCOMP
SM_RCOMP#
BG22
BH21
SMRCOMP
SMRCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
BF28
BH28
SMRCOMP_VOH
SMRCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
AV42
AR36
BF17
BC36
V_DDR_MCH_REF
SM_PWROK
SM_REXT
TP_SM_DRAMRST#
@
BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
15
15
16
16
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
15
15
16
16
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
15
15
16
16
M_ODT0
M_ODT1
M_ODT2
M_ODT3
F43
E43
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AE41
AE37
AE47
AH39
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
AE40
AE38
AE48
AH40
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AE35
AE43
AE46
AH42
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AD35
AE44
AF46
AH43
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
B33
B32
G33
F33
E33
GFX_VR_EN
C34
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AH37
AH36
AN36
AJ35
AH34
PEG_CLK
PEG_CLK#
M_CLK_DDR0 15
M_CLK_DDR1 15
M_CLK_DDR2 16
M_CLK_DDR3 16
R34
R35
15
15
16
16
+1.8V
2 80.6_0402_1%
2 80.6_0402_1%
1
1
2 0_0402_5%
2 499_0402_1%
B38
A38
E41
F41
CLK_MCH_3GPLL 17
CLK_MCH_3GPLL# 17
C
DMI_TXN0 27
DMI_TXN1 27
DMI_TXN2 27
DMI_TXN3 27
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
27
27
27
27
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
27
27
27
27
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
27
27
27
27
T30
T31
T32
T33
T34
T35
CL_CLK0
CL_DATA0
M_PWROK
CL_RST#
+CL_VREF
+VCCP
R43
1K_0402_1%
CL_CLK0 27
CL_DATA0 27
M_PWROK 27,38
CL_RST# 27
N28
M28
G36
E36
K36
H36
CLKREQ#_7
MCH_ICH_SYNC#
TSATN#
B12
TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
B28
B30
B29
C29
A28
T36
T37
C56
0.1U_0402_16V4Z
2
CLKREQ#_7 17
MCH_ICH_SYNC#
R44
499_0402_1%
27
TSATN# 38
56_0402_5%
1
2
R49
+VCCP
CANTIGA ES_FCBGA1329
Security Classification
R29
B7
N33
P32
AT40
AT11
T20
R32
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
NC
+VCCP
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
PM
PLT_RST#
+VCCP
RESERVED
RESERVED
RESERVED
RESERVED
AR24
AR21
AU24
AV20
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
17 MCH_CLKSEL0
17 MCH_CLKSEL1
17 MCH_CLKSEL2
20,25,30,31,32 PLT_RST#
6,26 H_THERMTRIP#
27,49 DPRSLPVR
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
R38
PM_EXTTS#1
H_AVREF
H_DVREF
BG23
BF23
BH18
BF18
PM_EXTTS#0
CANTIGA ES_FCBGA1329
Layout note:
T25
T26
T27
T28
R33
1K_0402_1%
H_DSTBN#0 7
H_DSTBN#1 7
H_DSTBN#2 7
H_DSTBN#3 7
6
6
6
6
6
RESERVED
+3VS
H_DINV#0 7
H_DINV#1 7
H_DINV#2 7
H_DINV#3 7
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
AY21
2
2
0.01U_0402_25V7K
2.2U_0603_6.3V4Z
C53
H_ADS#
6
H_ADSTB#0 6
H_ADSTB#1 6
H_BNR# 6
H_BPRI# 6
H_BR0#
6
H_DEFER# 6
H_DBSY# 6
CLK_MCH_BCLK 17
CLK_MCH_BCLK# 17
H_DPWR# 7
H_DRDY# 6
H_HIT#
6
H_HITM# 6
H_LOCK# 6
H_TRDY# 6
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
T24
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
SMRCOMP_VOL
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
CLK
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
RESERVED
RESERVED
RESERVED
DMI
L9
M8
AA6
AE5
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
C52
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
0.01U_0402_25V7K
L10
M7
AA5
AE6
2.2U_0603_6.3V4Z
C51
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
T21
T22
T23
B31
B2
M1
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
A11
B11
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
R32
3.01K_0402_1%
AP24
AT21
AV24
AU20
+H_VREF
J8
L3
Y13
Y1
SMRCOMP_VOH
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
R31
1K_0402_1%
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
H_CPURST#
H_CPUSLP#
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24
GRAPHICS VID
H_RESET#
H_CPUSLP#
C12
E11
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
ME
H_RESET#
H_CPUSLP#
H_SWING
H_RCOMP
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
+1.8V
MISC
C5
E3
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
CFG
+H_SWNG
H_RCOMP
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
HDA
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
HOST
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
U2B
RSVD
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
6
7
H_A#[3..35]
U2A
H_D#[0..63]
C54
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
of
53
16 DDR_B_D[0..63]
SA_RAS#
SA_CAS#
SA_WE#
BB20
BD20
AY20
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
A
MEMORY
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
U2E
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_A_BS0 15
DDR_A_BS1 15
DDR_A_BS2 15
DDR_A_RAS# 15
DDR_A_CAS# 15
DDR_A_WE# 15
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA[0..14]
15
15
15
15
CANTIGA ES_FCBGA1329
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
MEMORY
SA_BS_0
SA_BS_1
SA_BS_2
BD21
BG18
AT25
DDR_A_DM[0..7]
SYSTEM
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
DDR
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12
SYSTEM
U2D
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
DDR
15 DDR_A_D[0..63]
SB_BS_0
SB_BS_1
SB_BS_2
BC16
BB17
BB33
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
SB_RAS#
SB_CAS#
SB_WE#
AU17
BG16
BF14
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_BS0 16
DDR_B_BS1 16
DDR_B_BS2 16
DDR_B_RAS# 16
DDR_B_CAS# 16
DDR_B_WE# 16
DDR_B_DM[0..7]
16
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_MA[0..14]
16
16
16
CANTIGA ES_FCBGA1329
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
10
of
53
U2C
M33
K33
J33
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
M29
C44
B43
E37
E38
C41
C40
B37
A37
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
H48
D45
F40
B40
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
A41
H38
G37
J37
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
B42
G38
F37
K37
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
TVA_DAC
TVB_DAC
TVC_DAC
H24
TV_RTN
C31
E32
TV_DCONSEL_0
TV_DCONSEL_1
E28
CRT_BLUE
G28
CRT_GREEN
CRT_RED
CRT_IRTN
H32
J32
J29
E29
L29
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
VGA
J28
G29
TV
F25
H25
K25
GRAPHICS
H47
E46
G40
A40
LVDS
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
PCI-EXPRESS
L32
G32
M32
R57
1
2
49.9_0402_1%
PEG_COMPI
PEG_COMPO
T37
T36
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
C1289
C1290
C1291
C1292
C1293
C1294
C1295
C1296
C1297
C1298
C1299
C1300
C1301
C1302
C1303
C1304
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PEG_M_TXN0 20
PEG_M_TXN1 20
PEG_M_TXN2 20
PEG_M_TXN3 20
PEG_M_TXN4 20
PEG_M_TXN5 20
PEG_M_TXN6 20
PEG_M_TXN7 20
PEG_M_TXN8 20
PEG_M_TXN9 20
PEG_M_TXN10 20
PEG_M_TXN11 20
PEG_M_TXN12 20
PEG_M_TXN13 20
PEG_M_TXN14 20
PEG_M_TXN15 20
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
C1305
C1306
C1307
C1308
C1309
C1310
C1311
C1312
C1313
C1314
C1315
C1316
C1317
C1318
C1319
C1320
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PEG_M_TXP0 20
PEG_M_TXP1 20
PEG_M_TXP2 20
PEG_M_TXP3 20
PEG_M_TXP4 20
PEG_M_TXP5 20
PEG_M_TXP6 20
PEG_M_TXP7 20
PEG_M_TXP8 20
PEG_M_TXP9 20
PEG_M_TXP10 20
PEG_M_TXP11 20
PEG_M_TXP12 20
PEG_M_TXP13 20
PEG_M_TXP14 20
PEG_M_TXP15 20
PEG_RXN0 20
PEG_RXN1 20
PEG_RXN2 20
PEG_RXN3 20
PEG_RXN4 20
PEG_RXN5 20
PEG_RXN6 20
PEG_RXN7 20
PEG_RXN8 20
PEG_RXN9 20
PEG_RXN10 20
PEG_RXN11 20
PEG_RXN12 20
PEG_RXN13 20
PEG_RXN14 20
PEG_RXN15 20
CFG[4:3]
Reserved
0 = DMI x 2
1 = DMI x 4
CFG6
PEG_RXP0 20
PEG_RXP1 20
PEG_RXP2 20
PEG_RXP3 20
PEG_RXP4 20
PEG_RXP5 20
PEG_RXP6 20
PEG_RXP7 20
PEG_RXP8 20
PEG_RXP9 20
PEG_RXP10 20
PEG_RXP11 20
PEG_RXP12 20
PEG_RXP13 20
PEG_RXP14 20
PEG_RXP15 20
CFG8
Reserved
CFG10 (PCIE
Lookback
enable)
CFG11
0 = Enable
1 = Disable
Reserved
CFG[13:12] (XOR/ALLZ)
00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation
(Default)
CFG[15:14]
Reserved
Reserved
CFG[18:17]
1 = Reverse Lane
0 = Only PCIE or SDVO is operational.
CFG20 (PCIE/SDVO
concurrent)
+3VS
+3VS
R71
4.02K_0402_1%
R148
@
CANTIGA ES_FCBGA1329
CFG5
CFG5
CFG16
0_0402_5%
CFG19
CFG20
CFG11
CFG12
CFG13
CFG14
CFG15
R72
1
2
4.02K_0402_1%
@ R73
1
2
4.02K_0402_1%
@R75
1
2
4.02K_0402_1%
@R76
1
2
2.21K_0402_1%
R77
1
2
2.21K_0402_1%
R78
1
2
2.21K_0402_1%
@R80
1
2
2.21K_0402_1%
@R82
1
2
2.21K_0402_1%
@R85
1
2
2.21K_0402_1%
@R87
1
2
2.21K_0402_1%
@
R74
2.21K_0402_1%
CFG6
CFG8
CFG9
CFG10
R81
1
2
2.21K_0402_1%
1
2
2.21K_0402_1%
@R83
1
2
2.21K_0402_1%
@R84
1
2
2.21K_0402_1%
CFG17
@R86
1
2
2.21K_0402_1%
CFG18
Security Classification
2008/02/25
Issued Date
CFG7
@R79
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
11
of
53
+VCCP
+VCCP
R93
1
2
0_0603_5%
+V1.05VS_AXF
AD48
M38
L37
60.31mA
C82
C81
VTT
AXF
SM CK
A CK
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
V48
U48
V47
U47
U46
+VCC_PEG
VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI
AH48
AF48
AH47
AG47
+1.05VS_DMI
HV
PEG
DMI
+
C100
10U_0805_10V4Z
+1.05VS_DMI
+VCCP
L1
1
2
BLM18PG121SN1D_0603
+3VS_HV
R102
1
2
0_0805_5%
2
2
+VCCP
R104
1
2
0_0603_5%
+VCCP_D
456mA
VTTLF
VTTLF
VTTLF
A8
L1
AB2
+VCCP
0.47U_0603_10V7K
C112
+1.5VS_QDAC
C35
B35
A35
0.47U_0603_10V7K
C111
+1.05VS_PEGPLL
K47
VCC_HV
VCC_HV
VCC_HV
0.47U_0603_10V7K
C110
CANTIGA ES_FCBGA1329
C80
CRT
PLL
A LVDS
VCCD_LVDS
VCCD_LVDS
+1.8V_SM_CK
VCC_TX_LVDS
VTTLF
A PEG
A SM
50mA
VCCD_PEG_PLL
+VCCP
10U_0805_10V4Z
+1.05VS_PEGPLL
157.2mA
0.1U_0402_16V4Z
C109
VCCD_HPLL
AA47
118.8mA
1732mA
48.363mA
BF21
BH20
BG20
BF20
C108
AF1
+1.05VS_HPLL
0.1U_0402_16V4Z
105.3mA
58.67mA
C99
124mA
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
+VCCP
R101
1
2
MBK2012121YZF_0805
C106
VCCD_QDAC
+V1.05VS_AXF
10U_0805_10V4Z
VCCD_TVDAC
L28
+1.05VS_MPLL
B22
B21
A21
0.1U_0402_16V4Z
M25
+1.5VS_QDAC
VCC_AXF
VCC_AXF
VCC_AXF
C107
+1.5VS_TVDAC
0.1U_0402_16V4Z
50mA
R99
1
2
0_0805_5%
+VCC_PEG
TVA 24.15mA
TVB 39.48mA
24.15mA
TVX
VCCA_TV_DAC
VCCA_TV_DAC
VCC_HDA
VCCA_SM_CK
VCCA_SM_CK
26mA
VCCA_SM_CK
VCCA_SM_CK
26mA
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
A32
POWER
+1.5VS
C101
<BOM Structure>
720mA
321.35mA
AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23
B24
A24
R107
0_0402_5%
+1.5VS_TVDAC
+VCCP
R98
1
2
MBK2012121YZF_0805
C98
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
+1.05VS_HPLL
220U_D2_4VM
C105
R95
1
2
0_0805_5%
0.1U_0402_16V4Z
2
1U_0603_10V4Z
+1.8V
C93
AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16
C97
0.1U_0402_16V4Z
C104
10U_0805_10V4Z
C103
C102
1U_0603_10V4Z
+1.05VS_A_SM_CK
1U_0603_10V4Z
R103
1
2
0_0603_5%
C96
4.7U_0805_10V4Z
C92
C95
C94
10U_0805_10V4Z
220U_D2_4VM
10U_0805_10V4Z
VCCA_PEG_PLL
C91
+1.05VS_A_SM
R100
1
2
0_0805_5%
AA48
C90
+VCCP
0.022U_0402_16V7K
0.1U_0402_16V4Z
+1.8V_SM_CK
0.1U_0402_16V4Z
+1.05VS_PEGPLL
C89
TV
VCCA_PEG_BG
50mA
HDA
+1.5VS_PEG_BG
R97
1
2
0_0603_5%
D TV/CRT
+1.5VS
LVDS
+3VS
VSSA_LVDS
414uA
C85
VCCA_LVDS
J47
C79
J48
@ R96
1
2
0_0603_5%
0.1U_0402_16V4Z
139.2mA
VCCA_MPLL
13.2mA
1U_0603_10V4Z
AE1
24mA
C84
+1.05VS_MPLL
64.8mA
10U_0805_10V4Z
VCCA_HPLL
C83
VCCA_DPLLB
AD1
10U_0805_10V4Z
L48
+1.05VS_HPLL
64.8mA
C78
VCCA_DPLLA
2.2U_0805_16V4Z
F47
4.7U_0805_10V4Z
VCCA_DAC_BG
VSSA_DAC_BG
0.47U_0603_10V7K
A25
B25
10U_0805_10V4Z
2.68mA
C72
VCCA_CRT_DAC
VCCA_CRT_DAC
4.7U_0805_10V4Z
73mA
B27
A26
U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
C71
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
220U_D2_4VM
852mA
<BOM Structure>
U2H
D3
2
R105
1
2
10_0402_5%
R106
1
2
0_0402_5%
+3VS_HV
CH751H-40PT_SOD323-2
+3VS
+1.5VS
R112
1
2
100_0603_1%
C120
0.1U_0402_16V4Z
C119
0.01U_0402_16V7K
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
12
of
53
U2G
3000mA
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
AJ14
AH14
VCC_AXG_SENSE
VSS_AXG_SENSE
POWER
BA36
BB24
BD16
BB21
AW16
AW13
AT13
VCC SM
6326.84mA
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
1U_0603_10V4Z
CANTIGA ES_FCBGA1329
1U_0603_10V4Z
C145
C144
0.22U_0603_10V7K
0.47U_0402_6.3V6K
0.22U_0603_10V7K
C143
C142
AV44 VCCSM_LF1
BA37 VCCSM_LF2
AM40 VCCSM_LF3
AV21 VCCSM_LF4
AY5 VCCSM_LF5
AM10 VCCSM_LF6
BB13 VCCSM_LF7
C141
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
C140 0.1U_0402_16V4Z
@
@
C139 0.1U_0402_16V4Z
T42
T43
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
CANTIGA ES_FCBGA1329
PAD
PAD
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC SM LF
VCC
+VCCP
VCC NCTF
T32
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC CORE
AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
POWER
C123
0.01U_0402_16V7K
C130
10U_0805_10V4Z
C122
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
10U_0805_10V4Z
C126
C125
0.1U_0402_16V4Z
C133
0.22U_0402_10V4Z
C132
0.22U_0402_10V4Z
C124
10U_0805_10V4Z
C131
220U_D2_4VM
AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33
330U_D2E_2.5VM_R7
+1.8V
U2F
+VCCP
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
VCC GFX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
13
of
53
U2J
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
CANTIGA ES_FCBGA1329
BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA16
VSS
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS SCB
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
U2I
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
VSS
VSS
VSS
VSS
U24
U28
U25
U29
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
BH48
BH1
A48
C1
A3
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
CANTIGA ES_FCBGA1329
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
14
of
53
+1.8V
+1.8V
V_DDR_MCH_REF
10 DDR_A_DQS#[0..7]
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D11
DDR_A_D10
+1.8V
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_A_D16
DDR_A_D17
1
C150
C157
330U_D2E_2.5VM_R7
0.1U_0402_16V4Z
C149
C148
0.1U_0402_16V4Z
C156
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C155
2.2U_0805_16V4Z
C154
2.2U_0805_16V4Z
C153
C147
2.2U_0805_16V4Z
2.2U_0805_16V4Z
C152
2.2U_0805_16V4Z
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D29
DDR_A_D24
DDR_A_DM3
DDR_A_D26
DDR_A_D27
Layout Note:
Place one cap close to every 2
pullup
resistors terminated to +0.9VS
9 DDR_CKE0_DIMMA
10 DDR_A_BS2
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
10 DDR_A_BS0
10 DDR_A_WE#
10 DDR_A_CAS#
9 DDR_CS1_DIMMA#
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1
9 M_ODT1
DDR_A_D37
DDR_A_D36
C170
C169
C168
C167
C166
C165
C164
C163
C162
C161
C160
C159
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C158
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
+0.9V
DDR_CKE0_DIMMA
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D39
DDR_A_D38
DDR_A_D45
DDR_A_D44
DDR_A_DM5
+0.9V
56_0404_4P2R_5%
DDR_A_MA5
DDR_A_MA8
1
2
RP1
56_0404_4P2R_5%
DDR_A_MA3
DDR_A_MA1
1
2
4
3
4
3
4
3
4
3
RP3
56_0404_4P2R_5%
RP5
DDR_A_BS1
1
DDR_CS0_DIMMA# 2
4
3
4
3
56_0404_4P2R_5%
DDR_A_BS0
DDR_A_MA10
4
3
4
3
RP2
56_0404_4P2R_5%
1 DDR_A_BS2
2 DDR_CKE0_DIMMA
RP4
56_0404_4P2R_5%
1 DDR_A_MA11
2 DDR_A_MA6
RP6
56_0404_4P2R_5%
1 DDR_A_MA12
2 DDR_A_MA9
RP8
56_0404_4P2R_5%
1 DDR_A_MA4
2 DDR_A_MA2
Layout Note:
Place these resistor
closely JP3,all
trace length Max=1.5"
DDR_A_D47
DDR_A_D46
DDR_A_D49
DDR_A_D48
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D54
DDR_A_D50
DDR_A_D61
DDR_A_D60
RP7
1
2
DDR_A_DM7
DDR_A_D59
DDR_A_D58
56_0404_4P2R_5%
RP11
DDR_CS1_DIMMA# 2
M_ODT1
1
RP10
4
3
4
3
3
4
4
3
RP12
RP13
DDR_A_MA7
4
3
56_0404_4P2R_5%
1 DDR_A_RAS#
2 DDR_A_MA0
16,17 CLK_SMBDATA
16,17 CLK_SMBCLK
+3VS
56_0404_4P2R_5%
1 M_ODT0
2 DDR_A_MA13
CLK_SMBDATA
CLK_SMBCLK
56_0404_4P2R_5%
1 DDR_CKE1_DIMMA
2 DDR_A_MA14
R117 56_0402_5%
1
C171 C172
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
FOX_ASOA426-M4R-TR
SO-DIMM A
DDR_A_D6
DDR_A_D7
2008/02/25
2008/02/25
Deciphered Date
9,16
DDR_A_D13
DDR_A_D12
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR0 9
M_CLK_DDR#0 9
DDR_A_D15
DDR_A_D14
DDR_A_D20
DDR_A_D21
PM_EXTTS#0 9
DDR_A_DM2
DDR_A_D23
DDR_A_D22
DDR_A_D28
DDR_A_D25
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D31
DDR_A_D30
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA
DDR_A_BS1 10
DDR_A_RAS# 10
DDR_CS0_DIMMA#
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
DDR_A_MA13
M_ODT0
DDR_A_D32
DDR_A_D33
DDR_A_DM4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
B
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D43
DDR_A_D42
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 9
M_CLK_DDR#1 9
DDR_A_DM6
DDR_A_D51
DDR_A_D55
DDR_A_D57
DDR_A_D56
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
Security Classification
Issued Date
0.1U_0402_16V4Z
RP9
1
2
2.2U_0603_6.3V4Z
56_0404_4P2R_5%
DDR_A_CAS#
DDR_A_WE#
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
DDR_A_DM0
R116
10K_0402_5%
2
1
Layout Note:
Place near
JP3
DDR_A_D5
DDR_A_D0
R115
10K_0402_5%
2
1
DDR_A_D2
DDR_A_D3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C151
DDR_A_DQS#0
DDR_A_DQS0
10 DDR_A_MA[0..14]
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
C146
DDR_A_D4
DDR_A_D1
10 DDR_A_DQS[0..7]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
0.1U_0402_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2.2U_0805_16V4Z
10 DDR_A_DM[0..7]
V_DDR_MCH_REF
JDIMM1
10 DDR_A_D[0..63]
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
15
of
53
+1.8V
+1.8V
10 DDR_B_DQS#[0..7]
V_DDR_MCH_REF
10 DDR_B_D[0..63]
V_DDR_MCH_REF
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
Layout Note:
Place near
JP10
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
+1.8V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
DDR_B_D5
DDR_B_D4
DDR_B_DM0
DDR_B_D6
DDR_B_D7
9,15
C182
10 DDR_B_MA[0..14]
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
C173
DDR_B_D0
DDR_B_D1
0.1U_0402_16V4Z
10 DDR_B_DQS[0..7]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2.2U_0805_16V4Z
JDIMM2
10 DDR_B_DM[0..7]
DDR_B_D12
DDR_B_D13
DDR_B_DM1
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 9
M_CLK_DDR#2 9
DDR_B_D14
DDR_B_D15
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D19
DDR_B_D18
DDR_B_D28
DDR_B_D25
DDR_B_DM3
DDR_B_D30
DDR_B_D31
Layout Note:
Place one cap close to every 2
pullup
resistors terminated to +0.9VS
DDR_CKE2_DIMMB
9 DDR_CKE2_DIMMB
10
DDR_B_BS2
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
+0.9V
10
10
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
10 DDR_B_CAS#
9 DDR_CS3_DIMMB#
2
C196
C195
C194
C193
C192
C191
C190
C189
C188
C187
C186
C185
C184
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10
M_ODT3
M_ODT3
DDR_B_D32
DDR_B_D37
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
RP14
1
2
56_0404_4P2R_5%
DDR_B_BS0
DDR_B_WE#
4
3
RP16
1
2
RP17
4
3
4
3
4
3
4
3
56_0404_4P2R_5%
RP20
DDR_B_RAS#
1
DDR_CS2_DIMMB# 2
4
3
4
3
56_0404_4P2R_5%
DDR_B_MA10
DDR_B_CAS#
4
3
4
3
56_0404_4P2R_5%
DDR_B_MA0
DDR_B_BS1
RP18
1
2
RP19
RP21
RP22
1
2
RP25
3
4
4
3
RP26
DDR_CKE3_DIMMB 1
R120
2
56_0402_5%
4
3
DDR_B_D55
DDR_B_D50
56_0404_4P2R_5%
DDR_B_MA11
1
DDR_B_MA14
2
DDR_B_DQS#6
DDR_B_DQS6
56_0404_4P2R_5%
DDR_B_MA1
1
DDR_B_MA8
2
DDR_B_D52
DDR_B_D53
DDR_B_D60
DDR_B_D61
56_0404_4P2R_5%
DDR_B_MA7
1
DDR_B_MA6
2
DDR_B_DM7
DDR_B_D63
DDR_B_D58
56_0404_4P2R_5%
DDR_B_MA4
1
DDR_B_MA2
2
CLK_SMBDATA
CLK_SMBCLK
15,17 CLK_SMBDATA
15,17 CLK_SMBCLK
+3VS
56_0404_4P2R_5%
M_ODT2
1
DDR_B_MA13
2
56_0404_4P2R_5%
DDR_B_BS2
1
DDR_B_MA12
2
1
C197
SO-DIMM B
PM_EXTTS#1 9
DDR_B_DM2
DDR_B_D22
DDR_B_D23
DDR_B_D29
DDR_B_D24
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D26
DDR_B_D27
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB
2008/02/25
2008/02/25
Deciphered Date
0612 add
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_BS1 10
DDR_B_RAS# 10
DDR_CS2_DIMMB#
M_ODT2
DDR_B_MA13
M_ODT2
DDR_B_DM4
DDR_B_D39
DDR_B_D38
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D51
DDR_B_D54
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR3 9
M_CLK_DDR#3 9
DDR_B_DM6
DDR_B_D49
DDR_B_D48
DDR_B_D56
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D59
DDR_B_D62
R118
+3VS
10K_0402_5%
A
Title
Date:
DDR_B_D36
DDR_B_D33
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
DDR_B_MA14
Security Classification
Issued Date
C198
FOX_AS0A426-N8RN-7F
DDR_B_D16
DDR_B_D17
R119
56_0404_4P2R_5%
RP24
M_ODT3
2
DDR_CS3_DIMMB# 1
RP23
DDR_B_D42
DDR_B_D43
56_0404_4P2R_5%
DDR_B_MA9
1
DDR_CKE2_DIMMB
2
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SA0
SA1
10K_0402_5%
RP15
4
3
DDR_B_DM5
2.2U_0603_6.3V4Z
56_0404_4P2R_5%
DDR_B_MA5
DDR_B_MA3
DDR_B_D40
DDR_B_D41
Layout Note:
Place these resistor
closely JP3,all
trace length Max=1.5"
+0.9V
0.1U_0402_16V4Z
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_B_D21
DDR_B_D20
C181
C180
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C179
0.1U_0402_16V4Z
C178
0.1U_0402_16V4Z
C177
2.2U_0805_16V4Z
C183
2.2U_0805_16V4Z
C176
2.2U_0805_16V4Z
C175
2.2U_0805_16V4Z
C174
2.2U_0805_16V4Z
Rev
0.4
16
of
53
CPU
CLKSEL2 CLKSEL1 CLKSEL0 MHz
FSC
FSB
FSA
SRC
MHz
PCI
MHz
REF
MHz
100
33.3
14.318
DOT_96
MHz
USB
MHz
96.0
48.0
+3VS
R121
1
100
133
33.3
14.318
96.0
C199
10U_0805_10V4Z
200
100
33.3
14.318
96.0
48.0
166
100
33.3
14.318
96.0
48.0
333
100
33.3
14.318
96.0
48.0
0.1U_0402_16V4Z
100
100
33.3
14.318
96.0
48.0
400
100
33.3
14.318
96.0
48.0
C201
0.1U_0402_16V4Z
C202
0.1U_0402_16V4Z
C203
0.1U_0402_16V4Z
C204
0.1U_0402_16V4Z
C205
0.1U_0402_16V4Z
+1.05VS_CK505
+VCCP
CLK_XTAL_OUT
CLK_XTAL_IN
R122
1
2
0_0805_5%
Y1
C200
48.0
0_0805_5%
266
+3VS_CK505
0.1U_0402_16V4Z
1
1
C206
C207
14.31818MHZ_16P
2
10U_0805_10V4Z
C213
18P_0402_50V8J
Reserved
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
1
C209
C210
C211
C208
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C212
2
0.1U_0402_16V4Z
C214
18P_0402_50V8J
1
2
1
2
R129
1K_0402_5%
R126
R130
R132
R134
R136
9 CLKREQ#_7
9 CLK_MCH_BCLK#
9 CLK_MCH_BCLK
6 CLK_CPU_BCLK#
6 CLK_CPU_BCLK
NB
MCH_CLKSEL0 9
CPU
1
1
1
1
1
2
2
2
2
2
U3
+3VS_CK505
MCH_CLKSEL1 9
25 CLK_PCI_ICH
2
2
2 33_0402_1%
T44
31 CLK_DEBUG_PORT_1
37 CLK_DEBUG_PORT_0
38 CLK_PCI_EC
debug port
R_CKPWRGD
FSB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CLK_XTAL_OUT
CLK_XTAL_IN
15,16 CLK_SMBDATA
15,16 CLK_SMBCLK
R169
R155
R158
1
1
1
2 39_0402_1%
2 39_0402_1%
2 33_0402_1%
R161
2 33_0402_1%
FSC
REF1
CLK_SMBDATA
CLK_SMBCLK
PCI2_1
PCI2_2
27_SEL
PCI_CLK3
ITP_EN
CPU_BSEL2
+3VS_CK505
XDP/ITP
CLK_CPU_XDP 6
CLK_CPU_XDP# 6
CLK_MCH_3GPLL 9
CLK_MCH_3GPLL# 9
CLKREQ#_6 31
CLK_PCIE_MCARD2 31
CLK_PCIE_MCARD2# 31
3G_PLL
MiniCard_WLAN
1
2
R165
1K_0402_5%
MCH_CLKSEL2 9
R167
27 CLK_48M_ICH
@
R174
0_0402_5%
20 CLK_PCIE_VGA
20 CLK_PCIE_VGA#
R173
R175
1
1
2 39_0402_1%
2 0_0402_5%
2 0_0402_5%
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
H_STP_PCI#
H_STP_CPU#
H_STP_PCI# 27
H_STP_CPU# 27
MiniCard_WWAN
R_CLK_PCIE_MCARD0#
R_CLK_PCIE_MCARD0
R_CLKREQ#_10
R_CLK_SRC11
R_CLK_SRC11#
R144
R145
R146
R725
R726
1
1
1
1
1
2
2
2
2
2
R_CLK_PCIE_LAN#
R_CLK_PCIE_LAN
R_CLKREQ#_9
R152
R153
R738
1
1
1
2 0_0402_5%
2 0_0402_5%
2 475_0402_1%
CLK_PCIE_LAN# 30
CLK_PCIE_LAN 30
CLKREQ#_9 30
R_CLKREQ#_4
R_CLK_PCIE_NCARD#
R_CLK_PCIE_NCARD
R156
R159
R160
1
1
1
2 475_0402_1%
2 0_0402_5%
2 0_0402_5%
CLKREQ#_4 31
CLK_PCIE_NCARD# 31
CLK_PCIE_NCARD 31
R_CLKREQ#_C
R162
2 475_0402_1%
CLKREQ#_C 27
0_0402_5%
0_0402_5%
475_0402_1%
0_0402_5%
0_0402_5%
CLK_PCIE_MCARD0# 31
CLK_PCIE_MCARD0 31
CLKREQ#_10 31
CLK_SRC11 32
CLK_SRC11# 32
Card reader
GLAN
New Card
FSA
R_PCIE_SATA#
R_PCIE_SATA
R166
R168
1
1
2
2
0_0402_5%
0_0402_5%
+1.05VS_CK505
R_PCIE_ICH#
R_PCIE_ICH
R170
R172
1
1
2
2
0_0402_5%
0_0402_5%
R176
R177
1
1
2
2
33_0402_5%
33_0402_5%
CLK_PCIE_SATA# 26
CLK_PCIE_SATA 26
SATA
CLK_PCIE_ICH# 27
CLK_PCIE_ICH 27
ICH
+1.05VS_CK505
R_CLK_PCIE_VGA
R_CLK_PCIE_VGA#
SSCDREFCLK#
SSCDREFCLK
27M_SSC 21
27M_CLK 21
VGA
VGA
PCI_STOP#
CPU_STOP#
VDD_SRC_IO
SRC_10#
SRC_10
CLKREQ_10#
SRC_11
SRC_11#
CLKREQ_11#
SRC_9#
SRC_9
CLKREQ_9#
VSS_SRC
CLKREQ_4#
SRC_4#
SRC_4
VDD_SRC_IO
CLKREQ_3#
SLG8SP553VTR_QFN72_10x10
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1
7
FSC
@
R163
1K_0402_5%
R164
1
2
10K_0402_5%
R171
1
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
475_0402_1%
0_0402_5%
0_0402_5%
2
2
2
2
2
2
2
CKPWRGD/PD#
FS_B/TEST_MODE
VSS_REF
XTAL_OUT
XTAL_IN
VDD_REF
REF_0/FS_C/TEST_
REF_1
SDA
SCL
NC
VDD_PCI
PCI_1
PCI_2
PCI_3
PCI_4/SEL_LCDCL
PCIF_5/ITP_EN
VSS_PCI
+VCCP
1
1
1
1
1
1
1
+1.05VS_CK505
VDD_48
USB_0/FS_A
USB_1/CLKREQ_A#
VSS_48
VDD_IO
SRC_0/DOT_96
SRC_0#/DOT_96#
VSS_IO
VDD_PLL3
LCDCLK/27M
LCDCLK#/27M_SS
VSS_PLL3
VDD_PLL3_IO
SRC_2
SRC_2#
VSS_SRC
SRC_3
SRC_3#
R147
27 CLK_14M_ICH
CPU_BSEL1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
1
1
1
@
R143
1K_0402_5%
1
2
R150
1K_0402_5%
R154
1
2
0_0402_5%
@ R141
@ R142
R140
27,49
VGATE
49 CLK_ENABLE#
27 CK_PWRGD
+VCCP
FSB
R124
R125
R127
R131
R133
R135
R137
+3VS_CK505
@
R139
1K_0402_5%
R_CPU_XDP
R_CPU_XDP#
R_MCH_3GPLL
R_MCH_3GPLL#
R_CLKREQ#_6
R_CLK_PCIE_MCARD2
R_CLK_PCIE_MCARD2#
R_CLKREQ#_7
R_MCH_BCLK#
R_MCH_BCLK
R_CPU_BCLK#
R_CPU_BCLK
475_0402_1%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
CPU_BSEL0
+VCCP
VDD_CPU
CPU_0
CPU_0#
VSS_CPU
CPU_1
CPU_1#
VDD_CPU_IO
CLKREQ_7#
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
VDD_SRC_IO
SRC_7
SRC_7#
VSS_SRC
CLKREQ_6#
SRC_6
SRC_6#
VDD_SRC
R128
1
2
2.2K_0402_5%
R138
1
2
0_0402_5%
FSA
+1.05VS_CK505
+3VS_CK505
R123
1
56_0402_5%
CLRP1
NO SHORT PADS
+3VS
+3VS
PCI_CLK3
+3VS
V
6
21,27,31,37 ICH_SMBDATA
+3VS
R180
10K_0402_5%
R179
2.2K_0402_5%
@ C215
5P_0402_50V8C
C216
12P_0402_50V8J
@ C217
4.7P_0402_50V8C
@ C218
4.7P_0402_50V8C
Q3A
CLK_SMBDATA
1
2N7002DW-7-F_SOT363-6
+3VS
ITP_EN
0 = SRC8/SRC8#
1 = ITP/ITP#
0 = Enable DOT96 & SRC1(UMA)
1 = Enable SRC0 & 27MHz(DIS)
21,27,31,37 ICH_SMBCLK
R181
10K_0402_5%
Q3B
CLK_SMBCLK
CLK_48M_ICH
CLK_14M_ICH
CLK_PCI_ICH
CLK_PCI_EC
2N7002DW-7-F_SOT363-6
@
R182
10K_0402_5%
PCI_CLK3
ITP_EN
@
R183
10K_0402_5%
2008/02/25
2008/02/25
Deciphered Date
Title
Issued Date
2
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
17
of
53
+CRTVDD
GREEN_L
40
40
+5VS
D_HSYNC
BLUE_L
D_VSYNC
+5VS
C221
0.1U_0402_16V4Z
1
2
C222
0.1U_0402_16V4Z
1
2
@ D7
@ D6
@ D5
DAN217T146_SC59-3
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
RED_L
Place close to
JCRT
0.1U_0402_16V4Z
C220
JCRT1
1
BLUE_L
GREEN_L
RED_L
1.1A_6VDC_FUSE
RB491D_SC59-3
W=40mils
F1
1
DAN217T146_SC59-3
+RCRT_VCC
D4
+5VS
CRT
Connector
DAN217T146_SC59-3
+5VS
CONN@
SUYIN_070546FR015S263ZR
16
17
VSYNC_G_A
R185
R186
2.2K_0402_5%
2.2K_0402_5%
D_DDCDATA
U5
SN74AHCT1G125GW_SOT353-5
1 @
C223
2
1 @
C224
5P_0402_50V8C
1
1
D_VSYNC
2 0_0603_5%
R187
2.2K_0402_5%
R188
2.2K_0402_5%
Q5A
2
2
+3VS
2N7002DW-7-F_SOT363-6
+CRTVDD
R189
1
5
1
D_HSYNC
2 0_0603_5%
CRT_VSYNC
R184
1
CRT_VSYNC
P
OE#
CRT_HSYNC
20
+CRTVDD
U4
SN74AHCT1G125GW_SOT353-5
HSYNC_G_A
Y 4
20
P
OE#
5
1
+3VS
CRT_HSYNC
3VDDCDA
3VDDCDA 21
Q5B
5P_0402_50V8C
D_DDCCLK
<BOM Structure>
3
3VDDCCL
3VDDCCL 21
2N7002DW-7-F_SOT363-6
D_DDCDATA 40
D_DDCCLK 40
40
RED_L
40
GREEN_L
40
BLUE_L
150_0402_1%
150_0402_1%
150_0402_1%
L2
1
2
HLC0603CSCCR11JT_0603
L3
1
2
HLC0603CSCCR11JT_0603
L4
1
2
HLC0603CSCCR11JT_0603
RED_L
GREEN_L
BLUE_L
M_BLUE
M_GREEN
20
20
M_RED
20
10P_0402_50V8J
C228
C229
C230
10P_0402_50V8J
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
18
of
53
+LCDVDD
+LCDVDD
+LCDVDD
+5VALW
220P_0402_25V8J
@ C2111
C231
220P_0402_25V8J
0.1U_0402_16V4Z
R198
470_0402_5%
R199
1M_0402_5%
C232
0.1U_0402_16V4Z
C233
4.7U_0805_10V4Z
2
G
INVPWR_B+
6 2
+LCDVDD
1
@ C2110
+3VS
DMIC_DAT
+3VS
Q7
SI2301BDS-T1-E3_SOT23-3
DMIC_CLK
C234
Q8A
D
R200
2
2
1
2N7002DW-7-F_SOT363-6
DMIC_DAT
DMIC_CLK
+5V_LOGO
INV_PWM
BKOFF#
DAC_BRIG
LVDS_A2- 20
LVDS_A2+ 20
LVDS_A1- 20
LVDS_A1+ 20
LVDS_A0- 20
LVDS_A0+ 20
LVDS_ACLK- 20
LVDS_ACLK+ 20
R727
1
100_0805_5%
DDC2_CLK
DDC2_DATA
2N7002DW-7-F_SOT363-6
Q8B
ENAVDD
C239
R201
2.2K_0402_5%
21
LVDS_A2LVDS_A2+
LVDS_A1LVDS_A1+
LVDS_A0LVDS_A0+
LVDS_ACLKLVDS_ACLK+
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
GND
DMIC_DAT 33
DMIC_CLK 33
+5VS
INV_PWM 38
BKOFF# 38
DAC_BRIG 38
+3VS
USB_CAM
DDC2_CLK 21
DDC2_DATA 21
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
C238
0.047U_0402_16V7K
USB20_P4
USB20_N4
USB20_P4
USB20_N4
100K_0402_5%
1
2
680P_0402_50V7K
680P_0402_50V7K
1
2
C237
0.22U_0603_10V7K
27
27
680P_0402_50V7K
C235 C236
4.7U_0805_10V4Z
R202
2.2K_0402_5%
R203
2.2K_0402_5%
C435
680P_0402_50V7K
DDC2_CLK
DDC2_DATA
C434
680P_0402_50V7K
ACES_88242-4001
B+
INVPWR_B+
@
L5
DMIC_DAT
DMIC_CLK
1
C496
680P_0402_50V7K
0_0805_5%
L6
1
2
FBMA-L11-201209-221LMA30T_0805
@
C498
680P_0402_50V7K
BKOFF#
R717
10K_0402_5%
GND
BYP
R1091
SHDN
G916-390T1UF_SOT23-5
R1093
C1391
10U_0805_6.3V6M
R2072
0_0402_5%
27
@
R2073 1
GPIO20
10U_0805_6.3V6M
3
C1392
OUT
IN
2
2
U42
PJP4
PAD-OPEN 2x2m
PJP604
PAD-OPEN 2x2m
USB_CAM
215K_0603_1%
+5VS
+5VALW
100K_0402_1%
2 0_0402_5%
USB_VCCA is +3.9V
USB_VCCA =1.25X(1+R1091/R1093)
#SI Add GPIO20 control and reserve +5VS
Compal Secret Data
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
19
of
53
PEG Interface
U17F
NB9M-GS_BGA_533P
COMMON
4.7U_0603_6.3V6K
C257
1
C246
IFPA_TXD1
IFPA_TXD1
AA4
AA5
LVDS_A1- 19
LVDS_A1+ 19
IFPA_TXD2
IFPA_TXD2
Y4
W4
LVDS_A2- 19
LVDS_A2+ 19
C247
R205
1K_0402_1%
@
C248
IFPA_TXD3
IFPA_TXD3
AB5
AB4
IFPB_TXD4
IFPB_TXD4
V1
W1
1/13 PCI_EXPRESS
+VDD_MEM18
IFPB_TXD5
IFPB_TXD5
W2
W3
IFPB_TXD6
IFPB_TXD6
AA3
AA2
IFPB_TXD7
IFPB_TXD7
AA1
AB1
B
4700P_0402_25V7K
470P_0402_50V7K
IFPA_IOVDD V3
IFPA_IOVDD
IFPB_IOVDD V2
IFPB_IOVDD
C251
2 C266
1 C267
9,25,30,31,32
IFPA_TXC
IFPA_TXC
AD4
AC4
11
11
IFPB_TXC
IFPB_TXC
AB2
AB3
LVDS_ACLK- 19
LVDS_ACLK+ 19
2 C279
1 C280
PLT_RST#
C265 1
C268 1
PEG_RXP0
PEG_RXN0
PEX_RST#
AD9
PEX_REFCLKP
PEX_REFCLKN
AB10
AC10
11
11
11
11
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
11 PEG_RXP3
11 PEG_RXN3
C270 1
C271 1
PEX_TX1
PEX_TX1
AG12
AG13
PEX_RX1
PEX_RX1
C281 1
C282 1
PEX_TX2
PEX_TX2
AF13
AE13
PEX_RX2
PEX_RX2
C283 1
C284 1
PEX_TX3
PEX_TX3
AE15
AF15
PEX_RX3
PEX_RX3
PEX_TX4
PEX_TX4
AG15
AG16
PEX_RX4
PEX_RX4
C293 1
C294 1
PEX_TX5
PEX_TX5
AF16
AE16
PEX_RX5
PEX_RX5
C301 1
C302 1
PEX_TX6
PEX_TX6
C291 1
C292 1
PEG_RXP4
PEG_RXN4
11 PEG_M_TXP4
11 PEG_M_TXN4
11
11
U17D
W5
10K_0402_5%
11
11
5/13 DACC
DACC_VDD
R6
DACC_VREF
V6
DACC_RSET
PEG_RXP5
PEG_RXN5
11 PEG_M_TXP5
11 PEG_M_TXN5
NB9M-GS_BGA_533P
COMMON
PEG_RXP6
PEG_RXN6
AE18
AF18
PEX_RX6
PEX_RX6
C303 1
C304 1
PEX_TX7
PEX_TX7
AG18
AG19
PEX_RX7
PEX_RX7
C305 1
C306 1
PEX_TX8
PEX_TX8
AF19
AE19
PEX_RX8
PEX_RX8
C307 1
C308 1
2 0.1U_0402_16V4Z PEX_TX9
2 0.1U_0402_16V4Z PEX_TX9*
AB19
AB20
PEX_TX9
PEX_TX9
AE21
AF21
PEX_RX9
PEX_RX9
C309 1
C310 1
PEX_TX10
PEX_TX10
AG21
AG22
PEX_RX10
PEX_RX10
C315 1
C316 1
PEX_TX11
PEX_TX11
AF22
AE22
PEX_RX11
PEX_RX11
C322 1
C323 1
PEX_TX12
PEX_TX12
AE24
AF24
PEX_RX12
PEX_RX12
C324 1
C326 1
PEX_TX13
PEX_TX13
AG24
AF25
PEX_RX13
PEX_RX13
C328 1
C329 1
PEX_TX14
PEX_TX14
AG25
AG26
PEX_RX14
PEX_RX14
2 0.1U_0402_16V4Z PEX_TXP15AE25
2 0.1U_0402_16V4Z PEX_TXN15AE26
PEX_TX15
PEX_TX15
AF27
AE27
PEX_RX15
PEX_RX15
11 PEG_M_TXP6
11 PEG_M_TXN6
DACC_HSYNC U6
DACC_VSYNC U4
DAC C
11
11
PEG_RXP7
PEG_RXN7
11 PEG_M_TXP7
11 PEG_M_TXN7
DACC_RED T5
DACC_GREEN T4
11
11
DACC_BLUE R4
PEG_RXP8
PEG_RXN8
11 PEG_M_TXP8
11 PEG_M_TXN8
11
11
PEG_RXP9
PEG_RXN9
11 PEG_M_TXP9
11 PEG_M_TXN9
U17C
BLM18PG181SN1D_0603
NB9M-GS_BGA_533P
COMMON
150 mA
+3VS
470P_0402_50V7K
DACA_VDD
AG2
3/13 DACA
DACA_VDD
AF1
DACA_VREF
AE1
DACA_RSET
CRT
11 PEG_RXP10
11 PEG_RXN10
11 PEG_M_TXP10
11 PEG_M_TXN10
L9
DACA_VREF
4700P_0402_25V7K
C320
11 PEG_RXP11
11 PEG_RXN11
DAC A
R207
C319
DACA_HSYNC
DACA_VSYNC
AD2
AD1
CRT_HSYNC
CRT_VSYNC
DACA_RED
AE2
M_RED
DACA_GREEN
AE3
M_GREEN 18
DACA_BLUE
AD3
M_BLUE
C321
18
18
18
0.1U_0402_16V4Z 124_0402_1%
11 PEG_M_TXP11
11 PEG_M_TXN11
11 PEG_RXP12
11 PEG_RXN12
11 PEG_M_TXP12
11 PEG_M_TXN12
18
D7
DACB_VREF
F8
DACB_RSET
11 PEG_M_TXP13
11 PEG_M_TXN13
11 PEG_RXP14
11 PEG_RXN14
R196 R197
11 PEG_M_TXP14
11 PEG_M_TXN14
C330 1
C331 1
11 PEG_RXP15
11 PEG_RXN15
4/13 DACB
DACB_VDD
G6
11 PEG_M_TXP15
11 PEG_M_TXN15
C252
C253
1U_0603_10V4Z
1
C258
C254
C255
4.7U_0603_6.3V6K
470P_0402_50V7K
AB13
AB16
AB17
AB7
AB8
AB9
AC13
AC7
AD6
AE6
AF6
AG6
+PCIE
1.920 Amps
2
C249 C259
0.1U_0402_16V4Z
1U_0603_10V4Z
4.7U_0603_6.3V6K
1
C263
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
J10
J12
J13
J9
L9
M11
M17
M9
N11
N12
N13
N14
N15
N16
N17
N19
N9
P11
P12
P13
P14
P15
P16
P17
R11
R12
R13
R14
R15
R16
R17
R9
T11
T17
T9
U19
U9
W10
W12
W13
W18
W19
W9
C264
2 10U_0805_6.3V6M
VDD_SENSE
GND_SENSE
W15
W16
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
A12
B12
C12
D12
E12
F12
PEX_PLLVDD
AF9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C273
0.1U_0402_16V4Z
1
C274
1
C275
1
C277
0.1U_0402_16V4Z
+NVVDD
1
C276
C278
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
22U_0805_6.3VAM
1
C285
22U_0805_6.3VAM
1
C286
1
C287
470P_0402_50V7K
1
C295
1
C296
0.47u X 7
C289
0.1u X 7
22U_0805_6.3VAM
470P_0402_50V7K
22u X 3
1
C288
470P_0402_50V7K
470P_0402_50V7K
1
C297
1
C298
470P_0402_50V7K
1
C299
C300
470P_0402_50V7K
2
470P_0402_50V7K
+NVVDD_SENSE
R392 0_0402_5%
2
+3VS
110 mA
1
C1476
120mA
AF10
AE10
1
C325
0.1U_0402_16V4Z
RFU
C314
1
C311
2
1
C327
PEX_TERMP
4.7U_0603_6.3V6M
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
VDD33
PEX_PLLDVDD
R195
150_0402_1%
DACB_VDD
150_0402_1%
2
10K_0402_5%
150_0402_1%
NB9M-GS_BGA_533P
COMMON
R210
1
4
TV-OUT
11 PEG_RXP13
11 PEG_RXN13
U17E
C262
C317
1U_0402_6.3V4Z
C244
0.1U_0402_16V4Z
PEX_TX0
PEX_TX0
PEX_RX0
PEX_RX0
11 PEG_M_TXP3
11 PEG_M_TXN3
R206
10U_0805_6.3V6M
PEX_REFCLK
PEX_REFCLK
AE12
AF12
11 PEG_M_TXP2
11 PEG_M_TXN2
11
11
PEX_RST
1U_0603_10V4Z
11 PEG_M_TXP1
11 PEG_M_TXN1
RFU
AC9
AD7
AD8
AE7
AF7
AG7
11 PEG_M_TXP0
11 PEG_M_TXN0
CLOCK
470P_0402_50V7K
R204
0_0402_5%
1
17 CLK_PCIE_VGA
17 CLK_PCIE_VGA#
4.7U_0603_6.3V6K
4700P_0402_25V7K
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
DATA
1
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
AE9
600 mA
0.1U_0402_16V4Z
NB9M-GS_BGA_533P
COMMON
470P_0402_50V7K
2
1
L8
BLM18PG181SN1D_0603
+PCIE
U17A
1
2
IFPAB_PLLVDD
IFPAB_RSET
LVDS_A0- 19
LVDS_A0+ 19
1U_0603_10V4Z
2
L7
BLM18PG181SN1D_0603
IFPAB_PLLVDD AD5
IFPAB_RSET
AB6
4700P_0402_25V7K
V4
V5
0.1U_0402_16V4Z
100mA
1 4.7U_0603_6.3V6K
IFPA_TXD0
IFPA_TXD0
0.1U_0402_16V4Z
+VDD_MEM18
6/13 IFPAB
1
C446
0.01U_0402_25V7K
1
L10
BLM18PG181SN1D_0603
+PCIE
C447
1U_0402_6.3V4Z
R208 200_0402_1%
2
AG9
AG10
R209
2.49K_0402_1%
DACB_CSYNC D6
DAC B
DACB_RED F7
DACB_GREEN E7
DACB_BLUE E6
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Sheet
20
of
53
1
U17L
NB9M-GS_BGA_533P
COMMON
7/13 IFPC
+VDD_MEM18
R211
10K_0402_5%
BLM18PG181SN1D_0603
160 mA
IFPC_PLLVDD
IFPC_RSET
470P_0402_50V7K
1
L12
ROM_CS
C7
B9
A9
STRAP0
STRAP1
STRAP2
R214
40.2K_0402_1%
1
2
F11
ROM_SI
ROM_SO
ROM_SCLK
I2CH_SCL
I2CH_SDA
STRAP_REF_3V3
F10
STRAP_REF_MIOB
B10
4.7U_0603_6.3V6K
C337
ROM_CS#
A10 ROM_SI
C10 ROM_SO
ROM_SCLK
C9
10K_0402_5%
1
HDCP_SCL
A3
HDCP_SDA
A4
2
10K_0402_5%
C338
+PCIE
1
+3VS
R215
2 C340
2 C341
385 mA
BLM18PG181SN1D_0603
4700P_0402_25V7K
F9
BUFRST
N5
RFU
J5
RFU
F6
SPDIF
C342
4.7U_0603_6.3V6K
IFPC_IOVDD
10K_0402_5%
R217 @
TESTMODE
C15
D15
J6
IFPC_IOVDD
DP
IFPC_AUX
IFPC_AUX
G5
G4
TXD0
TXD0
TXD0
TXD0
IFPC_L3
IFPC_L3
J4
H4
HDMI_C_CLK- C1474
HDMI_C_CLK+ C1475
1
1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
HDMI_CLK- 42
HDMI_CLK+ 42
TXD1
TXD1
TXD2
TXD2
IFPC_L2
IFPC_L2
K4
L4
HDMI_C_TX0- C1468
HDMI_C_TX0+ C1469
1
1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
HDMI_TX0- 42
HDMI_TX0+ 42
TXD2
TXD2
TXD1
TXD1
IFPC_L1
IFPC_L1
M4
M5
HDMI_C_TX1- C1470
HDMI_C_TX1+ C1471
1
1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
HDMI_TX1- 42
HDMI_TX1+ 42
TXC
TXC
TXC
TXC
IFPC_L0
IFPC_L0
N4
P4
HDMI_C_TX2- C1472
HDMI_C_TX2+ C1473
1
1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
HDMI_TX2- 42
HDMI_TX2+ 42
2 C347
470P_0402_50V7K
AD25
1
U17G
RFU_GND
NB9M-GS_BGA_533P
COMMON
AC6
10K_0402_5%
R218
8/13 IFPE
10K_0402_5%
R220
@
0.01U_0402_25V7K
2 C346
4.7U_0603_6.3V6K
RFU
RFU
SPDIF_IN
+3VS
N6
M6
C349
33 SPDIF_OUT0
1
C343
+3VS
SPDIF
DVI
R212
1K_0402_1%
L13
40.2K_0402_1%
R216
MXM
IFPC_PLLVDD
IFPC_RSET
4700P_0402_25V7K
4.7U_0603_6.3V6K
R213
2
+3VS
11/13 MISC
STRAP0
STRAP1
STRAP2
P6
R5
NB9M-GS_BGA_533P
COMMON
U17H
+3VS
MXM
DVI
DP
IFPE_AUX
IFPE_AUX
D4
D3
TXD0
TXD0
TXD0
TXD0
IFPE_L3
IFPE_L3
B4
B3
TXD1
TXD1
TXD2
TXD2
IFPE_L2
IFPE_L2
C4
C3
TXD2
TXD2
TXD1
TXD1
IFPE_L1
IFPE_L1
D5
E4
TXC
TXC
TXC
TXC
IFPE_L0
IFPE_L0
F4
F5
IFPE_PLLVDD
IFPE_RSET
R234
10K_0402_5%
Closed to VGA
HDCP_WP
HDCP_SCL
HDCP_SDA
HDCP_WP
8
7
6
5
HDCP_SCL
10K_0402_5%
R223
THERM#_VGA
2200P_0402_50V7K
10K_0402_5%
R224
VDD
D+
3
4
D-
SCLK
VGA_SM_CLK
SDATA
VGA_SM_DA
ALERT#
GND
THERM#
H6
THERM_SCI#
THERM_SCI# 27,38
+3VS
IFPE_IOVDD
R236
10K_0402_5%
R222
AT88SC0808
VGA_THERMDC
VGA_THERMDA
@ C350
1
2
VCC
WP
SCL
SDA
A0
A1
A2
GND
U6
10K_0402_5%
R221
@
U7
1
2
3
4
0.1U_0402_16V4Z
C351
1
C
0.1U_0402_16V4Z
@
R219
10K_0402_5%
HDCP
ROM
@ C348
+3VS
+3VS
@ ADM1032ARMZ REEL_MSOP8
R1129
VGA_SM_CLK 2
VGA_SM_DA 2
@ 10K_0402_5%
0_0402_5%
1
1
SMB_EC_CK2 6,38
SMB_EC_DA2 6,38
R1130 0_0402_5%
+3VS
36 mA
0.1U_0402_16V4Z
C352
C353
2
1U_0402_6.3V4Z
C355
K5
PLLVDD
K6
VID_PLLVDD
L6
SP_PLLVDD
GPIO
I/O
ACTIVE
GPIO0
IN
N/A
GPIO1
IN
N/A
D11
XTAL_SSIN
XTAL_OUTBUFF
E9
XTAL_OUT
R233 0_0402_5%
1
2
GPIO2
OUT
GPIO3
OUT
GPIO4
OUT
XTALIN
Straps
MULTI LEVEL STRAPS
GPIO5
OUT
N/A
NVVDD VID0
GPIO6
OUT
N/A
NVVDD VID1
GPIO7
OUT
N/A
FBVDD VID0
GPIO8
IN
Thermal Alert
GPIO9
OUT
FAN PWM
9/13 I2C_GPIO_THERM_JTAG
VGA_THERMDC
D8
THERMDN
VGA_THERMDA
D9
THERMDP
JTAG_TCK
JTAG_TMS
@
JTAG_TDI
@
JTAG_TDO
@
JTAG_TRST
@
@
T47
T48
T49
T50
T51
OUT
N/A
SLI SYNCO
GPIO12
IN
N/A
AC Detect
0_0402_5%
2
2
0_0402_5%
17,27,31,37 ICH_SMBCLK
17,27,31,37 ICH_SMBDATA
AF3
AF4
AG4
AE4
AG3
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
R225
1
1
R226
VGA_SM_CLK
VGA_SM_DA
T1
T2
GPIO13
OUT
PS Control or HDMI_CEC
GPIO14
OUT
PS Control
HDMI_CLKHDMI_CLK+
HDMI_TX0HDMI_TX0+
HDMI_TX1HDMI_TX1+
HDMI_TX2HDMI_TX2+
GPU_VID1
GPU_VID0
+NVVDD
0.9V
1.09V
unused
DDC2_CLK
DDC2_DATA
I2CD_SCL
I2CD_SDA
N2
N3
I2CE_SCL
I2CE_SDA
Y6
W6
CRT
3VDDCCL 18
3VDDCDA
18
DDC2_CLK 19
DDC2_DATA 19
LVDS
HDMICLK_VGA 42
HDMIDAT_VGA 42
HDMI
N1
G1
C1
M2 ENVDD
M3
K3
K2
J2
C2 THERMAL ALERT
1
M1 SINN_GPIO9
1
0_0402_5%
D2
0_0402_5%
D1
J3
J1
K1
F3
G3
G2
F1
F2
HDA_BCLK
A7
HDA_SYNC
HDA_SDI
HDA_SDO
HDA_RST
B7
A6
B6
C6
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
499_0402_1%
HDMI_DETECT 42
ENAVDD 19
ENBKL
38
GPU_VID0 47
GPU_VID1 47
THERM#_VGA
2
THERM_SCI#
2
R396
R395
HDA_BITCLK_VGA
1 R249
2
5.1K_0402_5%
R399
33_0402_5%
26
HDA_SYNC_VGA 26
HDA_SDIN2 26
HDA_SDOUT_VGA 26
HDA_RST#_VGA 26
+3VS
1 R253
2
5.1K_0402_5%
HDA_SDIN2_R
Q74
2N7002_SOT23-3
2
G
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
I2CE_SCL
I2CE_SDA
1
2
R967
R966
R965
R964
R963
R962
R960
R961
499_0402_1%
<BOM Structure>
1 R251
2
5.1K_0402_5%
1 R252
2
15K_0402_5%
I2CB_SCL
I2CB_SDA
A2
B1
10/13 HDAUDIO
1 R250
2
5.1K_0402_5%
R2
R3
I2CC_SCL
I2CC_SDA
HD AUDIO
NB9M-GS_BGA_533P
COMMON
1 R248
45.3K_0402_1%
@
R1
T3
I2CB_SCL
I2CB_SDA
U17I
I2CA_SCL
I2CA_SDA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
I2CS_SCL
I2CS_SDA
1 R247
2
5.1K_0402_5%
GPIO11
1 R245
2 @
5.1K_0402_5%
1 R246
2
5.1K_0402_5%
R248
20 Kohms
10 Kohms
45 Kohms
30 Kohms
FBVref Select
1 R244
2
10K_0402_1%
Locating
16MX16 Hynix
16MX16 Samsung
32MX16 Hynix
32MX16 Samsung
N/A
1 R243
2
45.3K_0402_1%
Resistor Value
OUT
1 R242
2
5.1K_0402_5%
DDR2
GPIO10
+3VS
2 R231
2 R232
NB9M-GS_BGA_533P
COMMON
@ R235
10K_0402_5%
STRAP0
STRAP1
STRAP2
ROM_SI
ROM_SO
ROM_SCLK
2 R227
2 R230
2K_0402_5% 1
2K_0402_5% 1
U17M
27M_CLK
R229
10K_0402_5%
1
@ C357
18P_0402_50V8J
@ C356
18P_0402_50V8J
17
XTAL_IN
E10XTALOUT
XTALIN D10
1
R228
10K_0402_5%
2K_0402_5% 1
2K_0402_5% 1
I2CB_SCL
I2CB_SDA
USAGE
0.1U_0402_16V4Z
27M_SSC
17
GPU_PLLVDD
1
C354
I2CE_SCL
I2CE_SDA
C497
1U_0402_6.3V4Z
BLM18PG181SN1D_0603
2
1
L14
1
1U_0402_6.3V4Z
+PCIE
12/13 XTAL_PLL
Sheet
21
of
53
VRAM Interface
PJP605
+VDD_MEM18
+1.8VS
PAD-OPEN 3x3m
MDA[15..0]
23
MDA[31..16]
24
MDA[47..32]
24
MDA[63..48]
MDA[15..0]
U17B
MDA[31..16]
U17J
NB9M-GS_BGA_533P
COMMON
MDA[47..32]
MDA[63..48]
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
23
QSA[3..0]
24
QSA[7..4]
23
QSA#[3..0]
24
QSA#[7..4]
DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7
D23
C26
D19
B19
T24
T26
AA23
AB27
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
A24
C25
E19
A19
T22
T27
AA24
AA26
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
B24
D25
E18
A18
R22
R27
Y24
AA27
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
NB9M-GS_BGA_533P
COMMON
+VDD_MEM18
0.022U_0402_16V7K
1
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22
1
C358
1
C366
FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1
F24
F23
N24
N23
FB_CAL_PD_VDDQ
B15
FB_CAL_PU_GND
A15
FB_CAL_TERM_GND
1
C362
1
C370
1
C364
0.022U_0402_16V7K
1
C371
C365
C375
2 C372
2
<BOM Structure>
0.1U_0402_16V4Z
2 C374
1U_0402_6.3V4Z
23,24
CMDA0
CMDA1
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6
CMDA7
CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
CMDA17
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25
CMDA26
CMDA27
CMDA28
CMDA29
CMDA30
CLKA0
CLKA0#
CLKA1
CLKA1#
CMDA12
R1131 10K_0402_5%
1
2
CMDA11
R394 10K_0402_5%
1
2
23
23
24
24
R254 30_0402_1%
2
+VDD_MEM18
1
1
2 R255
30_0402_1%
B16 @1
2 R256
40.2_0402_1%
AC11
AC14
AC17
AC2
AC20
AC23
AC26
AC5
AC8
AF11
AF14
AF17
AF2
AF20
AF23
AF26
AF5
AF8
B11
B14
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B17
B2
B20
B23
B26
B5
B8
E11
E14
E17
E2
E20
E23
E26
E5
E8
H2
H5
J11
J14
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
J17
K19
K9
L11
L12
L13
L14
L15
L16
L17
L2
L5
M12
M13
M14
M15
M16
P19
P2
P23
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
P26
P5
P9
T12
T13
T14
T15
T16
U11
U12
U13
U14
U15
U16
U17
U2
U23
U26
U5
V19
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
V9
W11
W14
W17
Y2
Y23
Y26
Y5
GND
GND
GND
GND
GND
GND
GND
GND
0.1U_0402_16V4Z
1U_0402_6.3V4Z
C373
1
0.1U_0402_16V4Z
C363
C368
4.7U_0603_6.3V6K
4700P_0402_25V7K
4700P_0402_25V7K
C367
1
C369
4700P_0402_25V7K
0.022U_0402_16V7K
1
C361
C360
13/13 GND_NC
4.7U_0603_6.3V6K
0.022U_0402_16V7K
4700P_0402_25V7K
CMDA[30..0]
F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22
J22
L22
1
C359
0.022U_0402_16V7K
4700P_0402_25V7K
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
RFU
RFU
0.1U_0402_16V4Z
NC
NC
NC
NC
AA6
AC19
E15
T6
R257
FBA_DEBUG
M22
10K_0402_5%
+VDD_MEM18
@
+VDD_MEM18
FB_PLLAVDD
R19
FB_DLLAVDD
T19
FB_PLLAVDD
0.01U_0402_25V7K 2
DQMA[7..4]
@ R258
1K_0402_1%
1
C376
Rt
2
24
2/13 FRAME_BUFFER
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
A16
1
C377
1
C379
1
+PCIE
L15
BLM18PG181SN1D_0603
C380
1U_0402_6.3V4Z
FB_VREF
DQMA[3..0]
1
@ R259
1K_0402_1%
23
D21
C22
B22
A22
C24
B25
A25
A26
D22
E22
E24
D24
D26
D27
C27
B27
D16
E16
D17
F18
D20
F20
E21
F21
C16
B18
C18
D18
C19
C21
B21
A21
P22
P24
R23
R24
T23
U24
V23
V24
N25
N26
R25
R26
T25
V26
V25
V27
V22
W22
W23
W24
AA22
AB23
AB24
AC24
W25
W26
W27
AA25
AB25
AB26
AD26
AD27
Rb
0.1U_0402_16V4Z 1U_0402_6.3V4Z
C378
2 @
0.1U_0402_16V4Z
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VRAM / GND
Rev
0.4
Date:
Sheet
22
of
53
DATA Bus
Address
A3
CMD1
A0
CMD2
A2
CMD3
A1
32..63
A0
A1
CMD4
A3
QSA[7..0]
CMD5
A4
QSA#[7..0]
CMD6
A5
DQMA[7..0]
CMD7
22,24 QSA[7..0]
22,24 QSA#[7..0]
22,24 DQMA[7..0]
0..31
CMD0
MDA[63..0]
CMD8
CS#
CS#
CMDA[30..0]
CMD9
WE#
WE#
CMD10
BA0
BA0
CMD11
CKE
CKE
CMD12
ODT
ODT
22,24 MDA[63..0]
22,24 CMDA[30..0]
CMD13
CMDA10
CMDA18
L2
L3
BA0
BA1
CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA22
CMDA24
CMDA0
CMDA2
CMDA3
CMDA1
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
K8
J8
CK
CK
CMDA11
K2
CKE
CMDA8
L8
CS
CMDA9
K3
WE
CMDA15
K7
RAS
CMDA25
L7
CAS
F3
B3
LDM
UDM
CLKA0#
CLKA0
DQMA2
DQMA0
CMDA12
+VDD_MEM18
F7
E8
LDQS
LDQS
QSA0
QSA#0
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
CMDA27
C385
2
0.1U_0402_16V4Z
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
0.1U_0402_16V4Z
1
J1
J7
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
CMDA10
CMDA18
L2
L3
BA0
BA1
CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA22
CMDA24
CMDA0
CMDA2
CMDA3
CMDA1
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
K8
J8
CK
CK
CMDA11
K2
CKE
CMDA8
L8
CS
CMDA9
K3
WE
CMDA15
K7
RAS
CMDA25
L7
CAS
DQMA1
DQMA3
F3
B3
LDM
UDM
CMDA12
K9
ODT
QSA1
QSA#1
F7
E8
LDQS
LDQS
QSA3
QSA#3
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
CLKA0#
CLKA0
+VDD_MEM18
C383
MEM_VREF0
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
QSA2
QSA#2
R262
1K_0402_1%
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
MDA7
MDA0
MDA5
MDA2
MDA3
MDA4
MDA1
MDA6
MDA23
MDA18
MDA20
MDA16
MDA17
MDA21
MDA19
MDA22
ODT
1
2
R260
1K_0402_1%
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
VDDL
VSSDL
K9
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
C384
4.7U_0805_6.3V6K
MEM_VREF0
CMDA27
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
VDDL
VSSDL
MDA27
MDA28
MDA24
MDA31
MDA30
MDA25
MDA29
MDA26
MDA15
MDA9
MDA12
MDA8
MDA11
MDA13
MDA10
MDA14
+VDD_MEM18
A3
E3
J3
N1
P9
A11
CMD17
A10
A10
CMD18
BA1
BA1
CMD19
A8
A8
CMD20
A9
A9
CMD21
A6
A6
CMD22
A5
CMD23
A7
CMD24
A4
CMD25
CAS#
CAS#
CMD26
A13
A13
CMD27
BA2
BA2
A7
CMD30
0.1U_0402_16V4Z
1
C381
VSS1
VSS2
VSS3
VSS4
VSS5
RAS#
A11
CMD29
2
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
RAS#
CMD28
J1
J7
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
A12
CMD15
CMD16
C382
4.7U_0805_6.3V6K
22
CLKA0
CLKA0
U9
A12
R261
475_0402_1%
U8
CMD14
22
CLKA0#
CLKA0#
HY5PS561621F-25
HY5PS561621F-25
+VDD_MEM18
0.01U_0402_16V7K
1
A
C395
1000P_0402_50V7K
1
C396
1
C397
2
0.01U_0402_16V7K
4.7U_0805_6.3V6K
1
C398
1
C399
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C400
1
C401
0.01U_0402_16V7K
1
C402
0.1U_0402_16V4Z
1
C386
1000P_0402_50V7K
1
C387
1
C388
4.7U_0805_6.3V6K
1
C389
1
C390
0.01U_0402_16V7K
1
C391
1
C392
1
C393
A
0.01U_0402_16V7K
0.01U_0402_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0.01U_0402_16V7K
Security Classification
Issued Date
2008/02/25
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.1
Sheet
1
of
16
DATA Bus
Address
22,23 CMDA[30..0]
22,23 QSA#[7..0]
22,23 QSA[7..0]
22,23 MDA[63..0]
A3
CMD1
A0
CMD2
A2
CMD3
A1
32..63
A0
A1
CMD4
A3
CMD5
A4
CMDA[30..0]
CMD6
A5
QSA#[7..0]
CMD7
QSA[7..0]
CMD8
CS#
CS#
MDA[63..0]
CMD9
WE#
WE#
CMD10
BA0
BA0
CMD11
CKE
CKE
CMD12
ODT
ODT
DQMA[7..0]
22,23 DQMA[7..0]
0..31
CMD0
CMD13
CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA6
CMDA5
CMDA4
CMDA13
CMDA3
CMDA1
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
CLKA1#
CLKA1
CK
CK
K2
CKE
CMDA8
L8
CS
CMDA9
K3
WE
CMDA15
K7
RAS
CMDA25
L7
CAS
DQMA5
DQMA4
F3
B3
LDM
UDM
CMDA12
K9
ODT
MDA39
MDA32
MDA38
MDA34
MDA33
MDA37
MDA35
MDA36
MDA44
MDA43
MDA47
MDA40
MDA41
MDA46
MDA42
MDA45
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
K8
J8
CMDA11
U11
BA0
BA1
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
J1
J7
VDDL
VSSDL
0.1U_0402_16V4Z
1
QSA4
QSA#4
B7
A8
UDQS
UDQS
R266
1K_0402_1%
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
MEM_VREF1
R268
1K_0402_1%
CMDA27
C407
2
0.1U_0402_16V4Z
C405
LDQS
LDQS
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA6
CMDA5
CMDA4
CMDA13
CMDA3
CMDA1
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
K2
CKE
CMDA8
L8
CS
CMDA9
K3
WE
CMDA15
K7
RAS
CMDA25
L7
CAS
DQMA6
DQMA7
F3
B3
LDM
UDM
CMDA12
K9
ODT
QSA6
QSA#6
F7
E8
LDQS
LDQS
QSA7
QSA#7
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
MEM_VREF1
CMDA27
HY5PS561621F-25
0.01U_0402_16V7K
1
A
C417
1000P_0402_50V7K
1
C418
1
C419
2
0.01U_0402_16V7K
C420
0.1U_0402_16V4Z
1
C421
2
0.1U_0402_16V4Z
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
J1
J7
VDDL
VSSDL
+VDD_MEM18
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
1
C422
1
C423
2
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
1
C424
2
0.01U_0402_16V7K
1
C408
1000P_0402_50V7K
1
C409
1
C410
2
0.01U_0402_16V7K
0.1U_0402_16V4Z
1
A10
BA1
BA1
CMD19
A8
A8
CMD20
A9
A9
CMD21
A6
A6
CMD22
A5
CMD23
A7
CMD24
A4
CMD25
CAS#
CAS#
CMD26
A13
A13
CMD27
BA2
BA2
A7
CMD28
C404
4.7U_0805_6.3V6K
22
CLKA1
22
CLKA1#
CLKA1
R267
475_0402_1%
Issued Date
4.7U_0805_6.3V6K
1
C411
1
C412
CLKA1#
0.01U_0402_16V7K
1
C413
0.1U_0402_16V4Z
C414
C415
0.1U_0402_16V4Z
0.01U_0402_16V7K
Security Classification
2008/02/25
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A10
CMD18
CMD30
C403
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
CMD17
CMD29
2
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A11
+VDD_MEM18
4.7U_0805_6.3V6K
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
RAS#
A11
HY5PS561621F-25
+VDD_MEM18
MDA59
MDA60
MDA58
MDA62
MDA63
MDA56
MDA61
MDA57
MDA51
MDA53
MDA48
MDA55
MDA52
MDA49
MDA54
MDA50
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CK
CK
C406
2
4.7U_0805_6.3V6K
BA0
BA1
K8
J8
CMDA11
F7
E8
L2
L3
CLKA1#
CLKA1
+VDD_MEM18
+VDD_MEM18
QSA5
QSA#5
CMDA10
CMDA18
A12
RAS#
L2
L3
A12
CMD15
U10
CMDA10
CMDA18
CMD14
CMD16
Rev
0.1
of
16
+3VS
PCI_DEVSEL#
2 8.2K_0402_5%
PCI_STOP#
R274 1
2 8.2K_0402_5%
PCI_TRDY#
R275 1
2 8.2K_0402_5%
PCI_FRAME#
R276 1
2 8.2K_0402_5%
PCI_PLOCK#
R277 1
2 8.2K_0402_5%
PCI_IRDY#
R278 1
2 8.2K_0402_5%
PCI_SERR#
R279 1
2 8.2K_0402_5%
PCI_PERR#
U12B
D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3
+3VS
R281 1
2 8.2K_0402_5%
PCI_PIRQA#
R282 1
2 8.2K_0402_5%
PCI_PIRQB#
R283 1
2 8.2K_0402_5%
PCI_PIRQC#
R284 1
2 8.2K_0402_5%
PCI_PIRQD#
R285 1
2 8.2K_0402_5%
PCI_PIRQE#
R286 1
2 8.2K_0402_5%
PCI_PIRQF#
R287 1
2 8.2K_0402_5%
PCI_PIRQG#
R288 2
1 8.2K_0402_5%
PCI_PIRQH#
R289 1
2 8.2K_0402_5%
PCI_REQ0#
R290 1
2 8.2K_0402_5%
PCI_REQ1#
R292 1
2 8.2K_0402_5%
PCI_REQ2#
R293 1
2 8.2K_0402_5%
PCI_REQ3#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_GNT3#
PCI_GNT3#
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
F1
G4
B6
A7
F13
F12
E6
F6
PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
PCI_GNT3#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
D8
B4
D6
A5
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
D3
E3
R1
C6
E4
C2
J4
A4
F5
D7
PCI_IRDY#
PLTRST#
PCICLK
PME#
C14
D4
R2
PLT_RST#
CLK_PCI_ICH
PCI_PME#
PCI_RST# 37,38
@
R280
10_0402_5%
PCI_SERR#
38
PLT_RST# 9,20,30,31,32
CLK_PCI_ICH 17
PCI_PME# 38
@
C425
8.2P_0402_50V
Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#
ICH9-M ES_FCBGA676
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
H4
K6
F2
G2
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
1
R291
2
0_0402_5%
ACCEL_INT 37
PCI
J5
E1
J6
C4
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
2 8.2K_0402_5%
R273 1
R272 1
PCI_GNT0#
SPI_CS#1
Boot BIOS
Location
SPI
PCI
LPC
2
1K_0402_5%
*
+3VALW
27
SPI_CS1#_R
SPI_CS1#_R
@ R295
1
PCI_GNT0#
@ R296
1
2
1K_0402_5%
2
1K_0402_5%
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
25
of
53
DELL CONF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+RTCVCC
+3VS
R301
1
2
10K_0402_5%
ICH_SRTCRST#
@
R303
@
R304
+VCCP
LPC_AD[0..3]
INTVRMEN
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
R312
R313
R324
33_0402_5%
33_0402_5%
33_0402_5%
1
1
1
2
2
2
HDA_BITCLK
F14
G13
D14
R314
R316
R397
33_0402_5%
33_0402_5%
33_0402_5%
1
1
1
2
2
2
HDA_SYNC
D13
D12
E13
LAN_TXD_0
LAN_TXD_1
LAN_TXD_2
33_0402_5%
33_0402_5%
33_0402_5%
1
1
1
2
2
2
HDARST#
B10
R317
R318
R398
GPIO56
B28
B27
GLAN_COMPI
GLAN_COMPO
+1.5VS
R311
1
2 GLAN_COMP
24.9_0402_1%
HDA_BITCLK
HDA_SYNC
ICH9-M
MDC
33 HDA_SDIN0
34 HDA_SDIN1
21 HDA_SDIN2
CODEC
34 HDA_SDOUT_MDC
33 HDA_SDOUT_CODEC
21 HDA_SDOUT_VGA
R320
R321
R323
33_0402_5%
33_0402_5%
33_0402_5%
1
1
1
2
2
2
PAD T55
PAD T56
39 SATA_LED#
HDD
Multi bay
29
29
29
29
29
29
29
29
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0
SATA_TXP0
SATA_TXN0
SATA_TXP0
SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1
SATA_TXP1
FWH4/LFRAME#
K3
LPC_FRAME#
LDRQ0#
LDRQ1#/GPIO23
J3
J1
SATA_TXN1
SATA_TXP1
0.01U_0402_50V7K
C431
1
2
C433
1
2
0.01U_0402_50V7K
0.01U_0402_50V7K
C820
1
2
C821
1
2
LAN_RXD0
LAN_RXD1
LAN_RXD2
AF6
AH4
HDA_BIT_CLK
HDA_SYNC
HDARST#
AE7
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
AF4
AG4
AH3
AE5
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDOUT
AG5
HDA_SDOUT
AG7
AE8
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
AJ16
AH16
AF17
AG17
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
@
@
SATA_LED#
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN1_C
SATA_TXP1_C
AH13
AJ13
AG14
AF14
H_DPRSTP#
H_DPSLP#
@ R306
1
2
56_0402_5%
31,37,38
LPC_FRAME# 31,37,38
T54
A20GATE
A20M#
N7
AJ27
GATEA20
H_A20M#
DPRSTP#
DPSLP#
AJ25
AE23
H_DPRSTP_R#
H_DPSLP#
R309
R310
+VCCP
PAD
GATEA20 38
H_A20M# 6
FERR#
AJ26
R_H_FERR#
CPUPWRGD
AD22
H_PWRGOOD
IGNNE#
AF25
H_IGNNE#
INIT#
INTR
RCIN#
AE22
AG25
L3
H_INIT#
H_INTR
KB_RST#
NMI
SMI#
AF23
AF24
H_NMI
H_SMI#
R308
56_0402_5%
H_DPRSTP#
2
0_0402_5%
H_DPRSTP# 7,9,49
H_DPSLP# 7
H_FERR#
2
56_0402_5%
H_PWRGOOD
6,7
H_FERR# 6
H_IGNNE# 6
H_INIT# 6
H_INTR 6
KB_RST# 38
+VCCP
C
RTCRST#
SRTCRST#
INTRUDER#
B22
A22
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
CPU
33,38 HDA_RST#_CODEC
34 HDA_RST#_MDC
21 HDA_RST#_VGA
A25
F20
C22
ICH_INTVRMEN
LAN100_SLP
IHDA
34 HDA_SYNC_MDC
33 HDA_SYNC_CODEC
21 HDA_SYNC_VGA
ICH_RTCRST#
ICH_SRTCRST#
SM_INTRUDER#
H_NMI
H_SMI#
STPCLK#
AH27
H_STPCLK#
THRMTRIP#
AG26
THRMTRIP_ICH#
TP12
AG27
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AH11
AJ11
AG12
AF12
6
6
R315
56_0402_5%
H_STPCLK# 6
R319
2 54.9_0402_1%
H_THERMTRIP# 6,9
SATA_TXN4_C
SATA_TXP4_C
SATA_RXN4_C 29
SATA_RXP4_C 29
SATA_TXN4 29
SATA_TXP4 29
SATA_TXN4
SATA_TXP4
ODD
0.01U_0402_50V7K
SATA
33 HDA_BITCLK_CODEC
34 HDA_BITCLK_MDC
21 HDA_BITCLK_VGA
CLRP2
SHORT PADS
LAN / GLAN
1U_0603_10V4Z
C427
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
K5
K4
L6
K2
+RTCVCC
RTCX1
RTCX2
LPC
R307
1
2
20K_0402_5%
C23
C24
RTC
U12A
ICH_RTCX1
ICH_RTCX2
@ R305
1
2
56_0402_5%
C426
0.1U_0402_16V4Z
VGA
KB_RST#
ICH_INTVRMEN
R298
1
2
8.2K_0402_5%
1
R302
GATEA20
LAN100_SLP
1
R300
SM_INTRUDER#
0_0402_5%
2
1
1
R299
2
1M_0402_5%
2
330K_0402_5%
2
330K_0402_5%
2
180K_0402_5%
0_0402_5%
2
1
1
R297
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AH9
AJ9
AE10
AF10
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
AH18
AJ18
AJ7
AH7
SATA_TXN5_C
SATA_TXP5_C
2
2
SATA_RXN5_C 36
SATA_RXP5_C 36
SATA_TXN5 36
SATA_TXP5 36
0.01U_0402_50V7K
SATA_TXN5
1 C430
SATA_TXP5
1 C432
0.01U_0402_50V7K
CLK_PCIE_SATA#
CLK_PCIE_SATA
R322
0.01U_0402_50V7K
e-SATA
De-feature disable
CLK_PCIE_SATA# 17
CLK_PCIE_SATA 17
1
2
24.9_0402_1%
ICH9-M ES_FCBGA676
B
HDA_SDOUT_MDC
@ C502 1
12P_0402_50V8J
HDA_BITCLK_CODEC
C2128 1
56P_0402_50V9J
HDA_SDOUT_CODEC @ C499 1
12P_0402_50V8J
HDA_BITCLK_MDC
C2129 1
56P_0402_50V9J
HDA_SDOUT_VGA
12P_0402_50V8J
HDA_BITCLK_VGA
C2131 1
56P_0402_50V9J
@ C2130 1
BATT1
@ R326
1
HDA_SDOUT_CODEC
2
1K_0402_5%
ICH_RSVD
2
1K_0402_5%
ICH_RSVD
ICH_RTCX1
R328
1
HDA_SDOUT_CODEC
C436
15P_0402_50V8J
R329
1
W=20mils
W=20mils
2
0_0402_5%
2
2
C437
15P_0402_50V8J
BATT1.1
D8
1
1
+3VL
HDA_BITCLK
@
R327
10_0402_5%
ICH_RTCX2
10M_0402_5%
ICH_RSVD
+RTCVCC
27
@ R325
1
@
C439
10P_0402_25V8K
DAN202U_SC70
2
R330
3
1
2
W=20mils
1K_0402_5%
JBATT1
1
2
3
4
W=20mils
C438
1
2
GND
GND
ACES_85205-02001
CONN@
2.2U_0603_6.3V4Z
Y2
32.768KHZ_12.5P_MC-146
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
26
of
53
2 2.2K_0402_5%
2 2.2K_0402_5%
#SI connect to EC
U12C
R358
R359
R361
R362
R365
@
R340
10K_0402_5%
EC_SCI#
17
17
H_STP_PCI#
H_STP_CPU#
R345
17,49
R353
R374
R375
R376
R377
R378
R379
R373
R380
B
R381
EC_SCI#
EC_SMI#
R347 1
2 0_0402_5% GPIO12
@
LAN_DSM#_SB
17/14
R349 1
GPIO20
CR_WAKE#
DIS/UMA
19
GPIO20
32 CR_WAKE#
+3VS
GPIO49
R364
31 EXP_CPPE#
33
LINKALERT#
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
1K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
SB_SPKR
ICH_LOW_BAT#
TV Tuner/WWAN/Robeson
XDP_DBRESET#
WAKE#
SERIRQ
THRM#
VRMPWRGD
A20
TP11
AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8
GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
17
CLKREQ#_C
SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10
31
31
31
31
C445 1
C444 1
PCIE_RXN1
N29
PCIE_RXP1
N28
2 0.1U_0402_16V4Z PCIE_C_TXN1 P27
2 0.1U_0402_16V4Z PCIE_C_TXP1 P26
L29
L28
M27
M26
ME_EC_CLK1
ME_EC_DATA1
GPIO10
WLAN
EC_LID_OUT#
EC_SMI#
GPIO14
GLAN
Card reader
R747
@
10K_0402_5%
New Card
17/14
17" High
PCIE_RXN3
J29
PCIE_RXP3
J28
2 0.1U_0402_16V4Z PCIE_C_TXN3 K27
2 0.1U_0402_16V4Z PCIE_C_TXP3 K26
30
30
30
30
GLAN_RXN
GLAN_RXP
GLAN_TXN
GLAN_TXP
C452 1
C453 1
2
2
PERN5
PERP5
PETN5
PETP5
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
RP27
GLAN_RXN
G29
GLAN_RXP
G28
0.1U_0402_16V4Z GLAN_TXN_C H27
0.1U_0402_16V4Z GLAN_TXP_C H26
32
32
32
32
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
C501 1
C500 1
PCIE_RXN5
E29
PCIE_RXP5
E28
2 0.1U_0402_16V4Z PCIE_C_TXN5 F27
2 0.1U_0402_16V4Z PCIE_C_TXP5 F26
31
31
31
31
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4
C450 1
C451 1
PCIE_RXN4
C29
PCIE_RXP4
C28
2 0.1U_0402_16V4Z PCIE_C_TXN4 D27
2 0.1U_0402_16V4Z PCIE_C_TXP4 D26
PAD T61
PAD T62
@
@
25 SPI_CS1#_R
14" Low
UMA" Low
5
6
7
8
PAD T63
PAD T64
36
BT_OFF
31
WXMIT_OFF#
R383 1
2 0_0402_5%
+3VALW
RP28
5
6
7
8
10K_1206_8P4R_5%
SPI_CS1#_R
@
@
10K_1206_8P4R_5%
USB_OC#0
USB_OC#1
USB_OC#2
WXMIT_OFF#
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11
USBRBIAS
4
3
2
1
SLP_S3#
SLP_S4#
SLP_S5#
S4_STATE#/GPIO26
S4_STATE#
BATLOW#
G20
PM_PWROK
M2
R348 1
B13
ICH_LOW_BAT#
PWRBTN#
R3
LAN_RST#
D20
RSMRST#
10_0402_5%
PWRBTN_OUT#
SLP_S3#
SLP_S4#
SLP_S5#
1 @
C440
38
38
38
PM_PWROK 9,38
2 0_0402_5%
@
R343
10_0402_5%
SATA
GPIO
C448 1
C449 1
Dis" High
4
3
2
1
C16
E16
G17
C10
DPRSLPVR/GPIO16
CLK_14M_ICH 17
CLK_48M_ICH 17
T58 PAD
1 @
C441
D
4.7P_0402_50V8C
4.7P_0402_50V8C
R346
10K_0402_5%
1
2
DPRSLPVR 9,49
D22
R_EC_RSMRST#
CK_PWRGD
R5
CK_PWRGD
CLPWROK
R6
M_PWROK
R354 1
2 100_0402_5%
R355 1
2 10K_0402_5%
CK_PWRGD 17
EC_RSMRST# 38
M_PWROK 9,38
+3VS
SLP_M#
B16
CL_CLK0
CL_CLK1
F24
B19
CL_CLK0
CL_DATA0
CL_DATA1
F22
C19
CL_DATA0
CL_VREF0
CL_VREF1
C25
A19
CL_VREF0_ICH
CL_VREF1_ICH
CL_RST0#
CL_RST1#
F21
D18
CL_RST#
MEM_LED/GPIO24
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
WOL_EN/GPIO9
A16
C18
C11
C20
XMIT_OFF
GPIO10
GPIO14
LAN_WOL_EN
PERN2
PERP2
PETN2
PETP2
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
R748
10K_0402_5%
R746 @
10K_0402_5%
ICH_SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
PERN1
PERP1
PETN1
PETP1
31
31
31
31
DIS/UMA
CLK_14M_ICH
CLK_48M_ICH
@
R342
CL_CLK0
0.1U_0402_16V4Z
R360
2
3.24K_0402_1%
CL_DATA0 9
C442
2
CL_RST#
R363
453_0402_1%
NA lead free
+3VALW
9
0.1U_0402_16V4Z
XMIT_OFF 31
R370
2
1
1
+3VALW
100K_0402_5%
C443
R367
2
3.24K_0402_1%
R368
453_0402_1%
ICH9-M ES_FCBGA676
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
S4_STATE#
Board ID
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
SPI_CLK
SPI_CS0#
SPI_CS1#GPIO58/CLGPIO6
D25
E23
SPI_MOSI
SPI_MISO
N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3
AG2
AG1
V27
V26
U29
U28
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W29
W28
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
9
9
9
9
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB27
AB26
AA29
AA28
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
9
9
9
9
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_RXN3 9
DMI_RXP3 9
DMI_TXN3 9
DMI_TXP3 9
T26
T25
CLK_PCIE_ICH#
CLK_PCIE_ICH
AF29
AF28
DMI_IRCOMP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
D23
D24
F23
SPI
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#/GPIO44
OC9#/GPIO45
OC10#/GPIO46
OC11#/GPIO47
USB
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
DMI_RXN0 9
DMI_RXP0 9
DMI_TXN0 9
DMI_TXP0 9
D18
1
PM_PWROK 2
R_EC_RSMRST# 45
CH751H-40PT_SOD323-2
CLK_PCIE_ICH# 17
CLK_PCIE_ICH 17
R382
1
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
24.9_0402_1%
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
36
36
36
36
36
36
40
40
19
19
31
31
36
36
36
36
31
31
31
31
USBRBIAS
USBRBIAS#
ICH9-M ES_FCBGA676
R384
22.6_0402_1%
RP29
WXMIT_OFF#
USB_OC#5
USB_OC#10
USB_OC#11
CLKRUN#
H1
AF3
P1
CLK_14M_ICH
39
U12D
ICH_RI#
R745
10K_0402_5%
STP_PCI#
STP_CPU#
ICH_PCIE_WAKE#
+3VS
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#0
SMBALERT#/GPIO11
D21
CLK14
CLK48
SUSCLK
PMSYNC#/GPIO0
CLKREQ#_C
GPIO38
GPIO39
R393 1
GPIO48
2 0_0402_5%
GPIO49
GPIO57
@
R366
1K_0402_5%
1
2
+3VS
SB_SPKR
M7
MCH_ICH_SYNC# AJ24
9 MCH_ICH_SYNC#
ICH_RSVD
B21
26 ICH_RSVD
AH20
AJ20
AJ21
R424
Low -->default
High -->No boot
L4
8.2K_0402_5%
1
2
10K_0402_5%
USB_OC#6
USB_OC#1
USB_OC#2
USB_OC#4
A14
E19
PM_CLKRUN#
@
OCP#
CR_CPPE#
2 0_0402_5% GPIO7
30 ISOLATEB
GPIO57
H_STP_PCI#
R_STP_CPU#
OCP#
30 LAN_DSM#_SB
GPIO48
A17
PAD T59
6
32 CR_CPPE#
38
EC_SCI#
38
EC_SMI#
GPIO39
+3VS
1
2
100K_0402_5%
CR_WAKE#
GPIO37
M6
EC_LID_OUT#
VGATE
GPIO21
GPIO36
PM_BMBUSY#
SUS_STAT#/LPCPD#
SYS_RESET#
ICH_PCIE_WAKE# E20
SIRQ
M5
THERM_SCI#
AJ23
VGATE
R372
2 0_0402_5%
30,31 ICH_PCIE_WAKE#
38 SIRQ
21,38 THERM_SCI#
GPIO20
+3VALW
R371
9 PM_BMBUSY#
38 EC_LID_OUT#
HDDHALT_LED#
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
6 XDP_DBRESET#
clocks
SYS / GPIO
@
R339
10K_0402_5%
PM_BMBUSY#
R369
RI#
R4
G19
HDDHALT_LED#
R357
F19
SUS_STAT#
XDP_DBRESET#
@
CLK_48M_ICH
R356
ICH_RI#
GPIO21
HDDHALT_LED#
GPIO36
GPIO37
R352
CLKREQ#_C
T57
AH23
AF19
AE21
AD20
R351
PAD
SMB
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
R350
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
Power MGT
@ R338
+3VS
G16
A13
E17
C17
B18
THERM_SCI#
@ R337
D
OCP#
R335
R334
@ R336
PM_CLKRUN#
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1
MISC
GPIO
Controller Link
1
2
8.2K_0402_5%
CR_CPPE#
R344
R333
17,21,31,37 ICH_SMBCLK
17,21,31,37 ICH_SMBDATA
PCI - Express
SIRQ
R341
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
R331 1
R332 1
+3VALW
+3VS
4
3
2
1
5
6
7
8
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
10K_1206_8P4R_5%
Rev
0.4
Date:
Sheet
27
of
53
+RTCVCC
+VCCP
U12E
AE1
10U_0805_10V4Z
C459
C460
C456
10U_0805_10V4Z
2
2.2U_0603_6.3V4Z
CH751H-40_SC76
ICH_V5REF_RUN
20 mils
C465
0.1U_0402_10V6K
47mA
C478
1U_0603_10V4Z
1U_0603_10V4Z
+1.5VS
C483
0.1U_0402_16V4Z
C484
AC18
AC19
VCC1_5_A[18]
VCC1_5_A[19]
AC21
VCC1_5_A[20]
G10
G9
VCC1_5_A[21]
VCC1_5_A[22]
VCCSUS1_5[2]
212mA
VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2
@
@
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
AJ5
VCCUSBPLL
AA7
AB6
AB7
AC6
AC7
VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]
A10
A11
VCCLAN1_05[1]
VCCLAN1_05[2]
A12
B12
VCCLAN3_3[1]
19/78/78mA
VCCLAN3_3[2]
C487
2.2U_0603_6.3V4Z
CHB1608U301_0603
2
10U_0805_10V4Z
R390
1
+1.5VS
C488
A27
4.7U_0805_10V4Z
D28
2
D29
CHB1608U301_0603
E26
E27
1
VCCGLANPLL
R391
1
C489
0316 change design
+3VS
1
0.1U_0402_16V4Z
AJ3
1
1
AC8
F17
T65
T66
@
@
AD8 VCCSUS1_5_ICH_1
@
F18 VCCSUS1_5_ICH_2
@
VCCSUS3_3[05]
AF1
VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
(DMI)
C473
AJ4
A18
D16
D17
E22
R741
2 0_0402_5%
R740
2 0_0402_5%
0.1U_0402_16V4Z
1
C474
+3VALW
C475
+3VS
T67
T68
0.1U_0402_16V4Z
1
VCCCL1_05
VCCCL1_5
23mA
+1.5VS
VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
+3VALW
1342mA
80mA
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
1mA
A26
VCCGLAN3_3
ICH9-M ES_FCBGA676
GLAN POWER
0.1U_0402_16V4Z
VCC1_5_A[17]
VCCSUS1_5[1]
USB CORE
T69
T70
AC9
VCCSUS1_05[1]
VCCSUS1_05[2]
11mA 11mA
+3VS
C485
VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
AC12
AC13
AC14
+1.5VS
0.1U_0402_16V4Z
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
0.1U_0402_16V4Z
C480
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
ATX
C481
VCCSUSHDA
0.1U_0402_16V4Z
C479
+1.5VS
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
VCCPSUS
+1.5VS
ARX
+3VS
VCCSATAPLL
VCCPUSB
10U_0805_10V4Z
AJ19
C477
11mA VCCHDA
11mA
1U_0603_10V4Z
+1.5VS
C476
R389
1
2
CHB1608U301_0603
B9
F9
G3
G6
J2
J7
K7
+VCCP
+3VS
308mA
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
C468
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
AD19
AF20
AG24
AC20
C464
C467
AG29
AJ6
AC10
+VCCP
0.1U_0402_16V4Z
VCC3_3[01]
VCC3_3[02]
VCC3_3[07]
10U_0805_10V4Z
C466
0.1U_0402_10V6K
V_CPU_IO[2]
2mA
+1.5VS
C463
0.1U_0402_16V4Z
C472
R29
48mA V_CPU_IO[1]
C461
C471
W23
23mA VCC_DMI[1]
VCC_DMI[2] Y23
AB23
AC23
R385
1
2
CHB1608U301_0603
0.01U_0402_16V7K
0.1U_0402_16V4Z
20 mils
C470
ICH_V5REF_SUS
C469
CH751H-40_SC76
VCCDMIPLL
AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
C457
C455
0.1U_0402_16V4Z
D10
646mA
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
0.1U_0402_16V4Z
R388
10_0402_5%
C
2mA
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
4.7U_0603_6.3V6M
+5VALW +3VALW
1634mA
2mA
22U_0805_6.3VAM
D9
100_0402_5%
G3: 6uA
V5REF_SUS
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25
1
+
V5REF
CORE
ICH_V5REF_SUS
VCCRTC
A6
VCCA3GP
R386
A23
ICH_V5REF_RUN
VCCP_CORE
+3VS
20 mils
1
PCI
+5VS
40 mils
C458
220U_D2_4VM
R387
1
2
CHB1608U301_0603
+1.5VS
C454
0.1U_0402_16V4Z
C462
0.1U_0402_16V4Z
U12F
G22
G23
+3VALW
VCCCL1_05_ICH
@
C482
4.7U_0603_6.3V6M
T71
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
19/73/73mA
VCCCL3_3[1]
VCCCL3_3[2]
A24
B24
1 @
C486
1U_0603_10V4Z
+3VS
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
ICH9-M ES_FCBGA676
A
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
28
of
53
HDD Connector
JP3
1
C491
1
C492
2
0.1U_0402_16V4Z
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
C493
0.1U_0402_16V4Z
C490
10U_0805_10V4Z
+5VS
2
2
0.1U_0402_16V4Z
SATA_TXP0
SATA_TXN0
0.01U_0402_16V7K
SATA_RXN0
2
SATA_RXP0
2
0.01U_0402_16V7K
1 C494 SATA_RXN0_C
1 C495 SATA_RXP0_C
SATA_TXP0 26
SATA_TXN0 26
SATA_RXN0_C 26
SATA_RXP0_C 26
D
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
+3VS
+5VS
SUYIN_127072FR022G523_RV
CONN@
CD-ROM Connector
+5VS
JP5
PR@
C514
PR@
10U_0805_10V4Z
PR@
C513
1U_0603_10V4Z
C512
0.1U_0402_16V4Z
C515
10U_0805_10V4Z
PR@
GND
A+
AGND
BB+
GND
13
12
11
10
9
8
7
DP
V5
V5
MD
GND
GND
6
5
4
3
2
1
SATA_TXP4
SATA_TXN4
0.01U_0402_16V7K
SATA_RXN4
2
SATA_RXP4
2
0.01U_0402_16V7K
1 C510 SATA_RXN4_C
1 C511 SATA_RXP4_C
SATA_TXP4 26
SATA_TXN4 26
SATA_RXN4_C 26
SATA_RXP4_C 26
SUYIN_127382FR013GX09ZR
CONN@
JP12
26
26
26 SATA_RXN1_C
26 SATA_RXP1_C
SATA_RXN1_C
SATA_RXP1_C
SATA_TXP1
SATA_TXN1
0.01U_0402_16V7K
0.01U_0402_16V7K
1
1
SATA_TXP1
SATA_TXN1
2 C822 SATA_RXN1
2 C823 SATA_RXP1
18
TYCO_2023087-3
PA@
PA@
1
C519
GND
PA@
10U_0805_10V4Z
GND
+5VS
C518
2
4
6
8
10
12
14
16
1U_0603_10V4Z
VCC5
VCC5
VCC5
VCC3
VCC3
VCC3
GND
GND
C517
17
GND
TX+
TXGND
RXRX+
GND
GND
0.1U_0402_16V4Z
1
3
5
7
9
11
13
15
C516
10U_0805_10V4Z
PA@
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
29
of
53
+AVDD33
+3V_LAN
+3VALW
Close to Pin16,37,46,53
+3V_LAN
R2017
C650
0.1U_0402_16V4Z
@
R1106
+3V_LAN
0.1U_0402_16V4Z
2
C649
0_0805_5%
C651
C631
C642
C643
0.1U_0402_16V4Z
2
0_1206_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Q106
AP2305GN
2
G
He
k
uo
7
h
.
c
4
+LAN_VDD12
+LAN_VDD12
38 LAN_POWER_OFF
+CTRL_18
0.1U_0402_16V4Z
L83
1
2
4.7UH_1008HC-472EJFS-A_5%_1008
Close to Pin1
C630
22U_0805_6.3VAM
C636
C629
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C637
C638
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C639
0.1U_0402_16V4Z
C640
C641
0.1U_0402_16V4Z
U18
C654 1
27
GLAN_TXP
27
GLAN_TXN
29
HSOP
PCIE_RXN2_LAN
30
HSON
23
HSIP
24
HSIN
0.1U_0402_16V4Z
GLAN_REQ#
2
0_0402_5%
1
R456
17 CLKREQ#_9
17 CLK_PCIE_LAN
9,20,25,31,32
PLT_RST#
CLKREQB
26
REFCLK_P
27
REFCLK_N
20
PERSTB
+CTRL_18
SROUT12
FB12
62
ENSR
+LAN_VDD12
R2016
+3V_LAN
0_0603_5%
R446 1
2
2.49K_0402_1%
R454
1
2
0_0402_5%
ISOLATEB
27,31 ICH_PCIE_WAKE#
27 ISOLATEB
GLAN_WAKE#
64
45
47
48
44
LED3
LED2
LED1
LED0
54
55
56
57
LAN_LINK#
LAN_ACTIVITY#
MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3
3
4
6
7
9
10
12
13
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
RSET
LANWAKEB
36
ISOLATEB
LAN_X1
60
CKTAL1
LAN_X2
61
CKTAL2
EGND
31
EGND
15
17
18
34
35
39
40
41
42
R443
15K_0402_5%
4
3
2
1
DO
DI
SK
CS
GND
NC
NC
VCC
5
6
7
8
21
32
38
43
49
52
EVDD12
EVDD12
22
28
VDD33
VDD33
VDD33
VDD33
16
37
46
53
VDDSR
63
AVDD33
AVDD33
2
59
AVDD12
AVDD12
AVDD12
AVDD12
8
11
14
58
0.1U_0402_16V4Z
AT93C46-10SI-2.7_SO8
LAN_MDI2LAN_MDI2+
LAN_MDI1LAN_MDI1+
LAN_MDI0LAN_MDI0+
MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-
NC
NC
NC
NC
NC
NC
NC
NC
NC
24
23
22
21
20
19
18
17
16
15
14
13
C659
C660
C663
0.1U_0402_16V4Z
+LAN_EVDD12
0_0603_5%
C632
C633
0.1U_0402_16V4Z
+LAN_VDD12
25MHZ_20P
27P_0402_50V8J
2
C260
C256
0.1U_0402_16V4Z
27P_0402_50V8J
+LAN_EVDD12
LAN_ACTIVITY_R#
IGPIO
OGPIO
+3V_LAN
D89
@ PACDN042_SOT23~D
L85
0_0805_5%
+AVDD33
C634
22U_0805_6.3VAM
LAN Conn.
+3V_LAN
CONN@
JRJ45
C635
300_0402_5%
LAN_ACTIVITY#
0.1U_0402_16V4Z
+3V_LAN
R452 2
1
@ R2074
50
51
2
10K_0402_5%
C656
0.1U_0402_25V4K 2
+3VALW
LAN_DSM#
1
R2086
C1121
RJ45_MIDI3RJ45_MIDI3+
C2103
1
1
RJ45_MIDI2RJ45_MIDI2+
2
0.01U_0402_16V7K
C2104
2
0.01U_0402_16V7K
C2105
2
0.01U_0402_16V7K
RJ45_MIDI1RJ45_MIDI1+
RJ45_MIDI0RJ45_MIDI0+
2
0.01U_0402_16V7K
1LAN_ACTIVITY_R#
13
Yellow LED+
14
Yellow LED-
+LAN_VDD12
2
0_0402_5%
LAN_DSM#_SB 27
R450
1
2
75_0402_1%
R447
1
2
75_0402_1%
R448
1
2
75_0402_1%
R449
1
2
75_0402_1%
C657
0.1U_0402_25V4K
SHLD1
40 RJ45_MIDI3-
40 RJ45_MIDI3+
PR4+
40 RJ45_MIDI1-
PR2-
40 RJ45_MIDI2-
PR3-
40 RJ45_MIDI2+
PR3+
40 RJ45_MIDI1+
PR2+
40 RJ45_MIDI0-
PR1-
40 RJ45_MIDI0+
PR1+
+3V_LAN
LAN_LINK#
R451 2
LAN_LINK_R#
PR4-
DETCET PIN2
10
SHLD1
15
11
Green LED+
12
Green LED-
300_0402_5%
FOX_JM36113-P1122-7F
LANGND
RJ45_GND
16
DETECT PIN1
0.1U_0402_16V4Z
1LAN_X2
NS692405
C648
L84
+LAN_VDD12
U19
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
C647
+3VALW
C652
1
0.1U_0402_16V4Z
RTL8111C-GR_QFN64_9X9
LAN_MDI3LAN_MDI3+
C646
LAN_LINK_R#
ISOLATEB
0.1U_0402_16V4Z
C645
U15
LAN_DO
LAN_DI
LAN_SK
LAN_CS
EXPOSE_PAD
25
C644
1
1K_0402_1%
+3V_LAN
Y3
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
+3VS
R445
2
3.6K_0402_5%
LAN_X1 2
19
65
0.1U_0402_16V4Z
R453 1
C
1
1
1
8
r
o
fA
m
d
a0
e
0
B3
17 CLK_PCIE_LAN#
33
LAN_DO
LAN_DI
LAN_SK
LAN_CS
EEDO
EEDI/AUX
EESK
EECS
GLAN_RXN
GLAN_RXP
27
27
0.1U_0402_16V4Z
C653 1
PCIE_RXP2_LAN
2
C658
1
2
C661
0.1U_0402_16V4Z
C662
4.7U_0805_10V4Z
A
C664
1000P_1808_3KV7K
0.01U_0402_16V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
2 0.01U_0402_16V7K
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
30
of
53
0.01U_0402_16V7K
C575
0.1U_0402_16V4Z
+3VS_WWAN
CONN@
JP6
ICH_PCIE_WAKE#
CH_DATA
CH_CLK
CLKREQ#_10
17 CLKREQ#_10
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17 CLK_PCIE_MCARD0#
17 CLK_PCIE_MCARD0
27
27
27
27
0_0402_5%
2 PCIE_C_RXN1
2 PCIE_C_RXP1
0_0402_5%
1 R419
1 R421
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
PCIE_TXN1
PCIE_TXP1
R427
1
1
R428
+3VS_WWAN
0_0603_5%
2
2
0_0603_5%
53
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
+1.5VS_WLAN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
D11
1
WXMIT_OFF#
G1
G2
ICH_SMBCLK
ICH_SMBDATA
CLK_PCIE_MCARD2#
CLK_PCIE_MCARD2
17 CLK_PCIE_MCARD2#
17 CLK_PCIE_MCARD2
R704
1
0_0402_5%
R423 1
2
R425 1
2
0_0402_5%
17 CLK_DEBUG_PORT_1
+3VALW
+3VS_WWAN
27
27
PCIE_RXN3
PCIE_RXP3
27
27
USB20_N8 27
USB20_P8 27
PLT_RST#
2 0_0402_5% DEBUG@
PCIE_C_RXN3
PCIE_C_RXP3
PCIE_TXN3
PCIE_TXP3
PCIE_TXN3
PCIE_TXP3
WW_LED# 39
+3VS_WLAN
+1.5VS_WLAN
@
+3VS_WWAN
UIM_PWR R441
47K_0402_5%
1
2
UIM_DATA
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
+1.5VS
R431 1
+3VS
R432 1
2 0_1206_5%
+1.5VS_WLAN
@
R418
1
2
0_1206_5%
M_WXMIT_OFF#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
2 0_1206_5%
+3VS_WLAN
+3VS_WLAN
R699
R700
R701
R702
R703
C585
27
XMIT_OFF#
PLT_RST#
R424 1
R426 1
38 WWAN_POWER_OFF
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
DEBUG@
DEBUG@
DEBUG@
DEBUG@
DEBUG@
@
2 0_0805_5%
2 0_0805_5%
USB20_N5 27
USB20_P5 27
WL_LED# 39
+1.5VS_WLAN
+3VALW
@
R434
100K_0402_5%
D88
1
XMIT_OFF
XMIT_OFF#
D
2
G
CH751H-40PT_SOD323-2
@
Q10
2N7002_SOT23-3
R435
1
2
0_0402_5%
New Card
+3VS_PEC
C579 1
2 0.1U_0402_16V4Z
C580 1
2 0.1U_0402_16V4Z
PLT_RST#
38,39,41,50 SYSON
33,38,41,44,46,47,48
SUSP#
+3VALW
27 EXP_CPPE#
2
4
17
+3VALW
9,20,25,30,32
12
14
PLT_RST#
SYSON
SUSP#
R439 1
2 100K_0402_5%
EXP_CPPE#
1.5Vin
1.5Vin
3.3Vin
3.3Vin
AUX_IN
SYSRST#
1.5Vout
1.5Vout
11
13
3.3Vout
3.3Vout
3
5
+3VS_PEC
AUX_OUT
15
+3V_PEC
OC#
19
20
SHDN#
PERST#
STBY#
NC
10
9
18
CPPE#
GND
27
27
+1.5VS_PEC
R436
R437
USB20_N9
USB20_P9
Close to
JEXP 2 0_0402_5%
1
2 0_0402_5%
27,30 ICH_PCIE_WAKE#
CONN@
JEXP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
USB10USB10+
EXP_CPPE#
ICH_SMBCLK
ICH_SMBDATA
17,21,27,37 ICH_SMBCLK
17,21,27,37 ICH_SMBDATA
R438
1
2
0_0402_5%
+1.5VS_PEC
+1.5VS_PEC
+3V_PEC
PERST#
PCIE_PME#_R
PERST#
+3VS_PEC
16
17
CLKREQ#_4
EXP_CPPE#
CLKREQ#_4
17 CLK_PCIE_NCARD#
17 CLK_PCIE_NCARD
CPUSB#
RCLKEN
R5538D001-TR-F_QFN20_4X4~D
27
27
PCIE_RXN4
PCIE_RXP4
27
27
PCIE_TXN4
PCIE_TXP4
27
28
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
4.7U_0805_10V4Z
C577
C578
2
0.1U_0402_16V4Z
+1.5VS_PEC
4.7U_0805_10V4Z
1
C581
C582
2
0.1U_0402_16V4Z
+3V_PEC
4.7U_0805_10V4Z
C583
GND
GND
29
30
C584
SANTA_131851-A_LT
+3VS_WLAN
C576
1
2 0.1U_0402_16V4Z
LPC_FRAME# 26,37,38
LPC_AD3 26,37,38
LPC_AD2 26,37,38
LPC_AD1 26,37,38
LPC_AD0 26,37,38
+3VALW
+3VS_WLAN
+1.5VS_WLAN
ICH_SMBCLK
ICH_SMBDATA
2
G
+1.5VS_WLAN
1
2
1
2
1
2
1
2
1
2
@ R433
10K_0402_5%
18P_0402_50V8J
Q115
C571
0.1U_0402_16V4Z
UIM_CLK
AP2305GN
C570
FOX_AS0B226-S40N-7F
+3VALW
CH751H-40_SC76
C569
36
CH_DATA
36
CH_CLK
17 CLKREQ#_6
2 0_0805_5%
2 0_0805_5%
+1.5VS_WLAN
C568
CONN@
JP7
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP
M_WXMIT_OFF#
PLT_RST#
R420
1
R422
1
8
9
53
2
4.7U_0805_10V4Z
1
2
3
4
5
6
7
C567
ACES_88266-07001
FOX_AS0B226-S40N-7F
1
2
3
4
5
6
7
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP
C566
C574
JP4
C572
+3VS_WWAN
4.7U_0805_10V4Z
C573
4.7U_0805_10V4Z
+3VALW
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.01U_0402_16V7K
+1.5VS_WLAN
+3VS_WLAN
+3VS_WWAN
+3VALW
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
Rev
0.4
Sheet
E
31
of
53
+1.8VS_CR
+3VS
C1326
10U_0805_10V4Z
+VCC_4IN1
+3VS
#SI stuff
1
+VCC_OUT
C1329
0.1U_0402_16V4Z
2 C1328
2
1000P_0402_50V7K
2
C1327
0.1U_0402_16V4Z
+VCC_4IN1
R1128
0_0603_5%
1
2
+3VS
1 10K_0402_5%
1 10K_0402_5%
2
2
XDWP#_SDWP#
XD_RB#
U36
17 CLK_SRC11#
17 CLK_SRC11
27
27
+3VS
PCIE_TXN5
PCIE_TXP5
R709
1
2 10K_0603_5%
XD_CLE
1 10K_0402_5%
XD_ALE
27
27
R1048
@ 2
R1049
C1321 2
C1322 2
PCIE_RXN5
PCIE_RXP5
PCIE_C_RXN5
PCIE_C_RXP5
1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z
+3VS
R1046
1 8.2K_0402_5% PREXT
R972
2 10K_0402_5%
XDCE#
1
2
@ R706
100_0402_5%
1
@ C788
100P_0402_25V8K
SDCLK
2
1
@ R707
100_0402_5%
2
@ C789
100P_0402_25V8K
2
1
@ R708
100_0402_5%
2
@ C790
100P_0402_25V8K
XIN
APCLKN
APCLKP
9
8
APRXN
APRXP
11
12
R1047
1 10K_0402_5%
2
XD_RE#
3
4
7
38
39
2 200K_0402_5%
9,20,25,30,31
1
2
PLT_RST#
R50
27 CR_CPPE#
@
1
2 0_0402_5%
T39
@
APTXN
APTXP
PCIES_EN
PCIES
JMB385
XRSTN
XTEST
13
14
SEEDAT
SEECLK
27 CR_WAKE#
D86
1
CH751H-40PT_SOD323-2
XDCD1#_MSCD#
XDCD0#_SDCD#
15
16
CR1_CD1N
CR1_CD0N
SDCLK_MSCLK_XDCE#
R710
R711
R712
1
1
1
2 22_0402_5%
2 22_0402_5%
2 22_0402_5%
SDCLK
MSCLK
XDCE#
CR_LED#
CR1_PCTLN
21
CR1_LEDN
5
10
30
DV33
DV33
DV33
DV18
DV18
19
20
44
18
37
MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
48
47
46
45
43
42
41
40
29
28
27
26
25
23
22
NC
NC
NC
34
35
36
+3VS
APGND
17
C1336
0.1U_0402_16V4Z
APVDD
APV18
TAV33
APREXT
MSCLK
C1324
10U_0805_10V4Z
GND
GND
GND
GND
C1334
0.1U_0402_16V4Z
C1325
0.1U_0805_50V7M
C1335
0.1U_0402_16V4Z
+1.8VS_CR
XD_SD_MS_D0
XD_SD_MS_D1
C1332
XD_SD_MS_D2
0.1U_0402_16V4Z
XD_SD_MS_D3
SDCMD_MSBS_XDWE#
SDCLK_MSCLK_XDCE#
XDWP#_SDWP#
XD_CLE
XD_D4
XD_D5
XD_D6
XD_D7
XD_RE#
XD_RB#
XD_ALE
C1333
0.1U_0402_16V4Z
+VCC_4IN1
+VCC_OUT
40mil
#SI no stuff
3
4
2
C1330
0.1U_0402_16V4Z
24
31
32
33
U37
VIN
VOUT
VIN/CE VOUT
1
5
1
R1044
R1043
GND
RT9701-PB_SOT23-5
C1331 2
1U_0603_10V4Z
XDCD0#_SDCD#
XDCD1#_MSCD#
2 4.7K_0402_5%
2 4.7K_0402_5%
1
R1042 1
R1041 1
@ R1050
150K_0402_5%
JMB385-LGEZ0A_LQFP48_7X7
D42
XDCD1#_MSCD#
XDCD0#_SDCD#
1
DAN202U_SC70
XD_CD#
C1047
270P_0402_50V7K
+1.8VS_CR
+1.8VS
+5VS
+VCC_4IN1
R719
56_0402_5%
CR_LED#
2
G
S
XD-VCC
32
10
9
8
7
6
5
4
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
SDCMD_MSBS_XDWE#
XDWP#_SDWP#
XD_ALE
XD_CD#
XD_RB#
XD_RE#
XDCE#
XD_CLE
34
33
35
40
39
38
37
36
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
11
31
7IN1 GND
7IN1 GND
7 IN 1 CONN
Q54
2N7002_SOT23-3
2 0_0402_5%
D15
HT-F196BP5_WHITE
R51
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
R2098
4.7K_0402_5%
@
1
41
42
SD-VCC
MS-VCC
21
28
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CMD
SD-CD-SW
20
14
12
30
29
27
23
18
16
25
1
SDCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
SDCMD_MSBS_XDWE#
XDCD0#_SDCD#
SD-WP-SW
XDWP#_SDWP#
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
26
17
15
19
24
22
13
MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XDCD1#_MSCD#
SDCMD_MSBS_XDWE#
R705 1
+VCC_4IN1
2
0_0805_5%
B
#SI no stuff
7IN1 GND
7IN1 GND
TAITW_R015-B10-LM
CONN@
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
32
of
53
CODEC POWER
+3VS_HDA
+3VS
W=40Mil
R1053
1
2
0_0603_5%
C1341
+VDDA_CODEC
+VDDA_CODEC
2
0.1U_0402_16V4Z
1
31,38,41,44,46,47,48
(4.75V)
300mA
U39
SUSP#
VIN
GND
SHDN#
OUT
BP
G9191-475T1U_SOT23-5
C1343
C1340
1U_0603_10V4Z
C1338
0.1U_0402_16V4Z
C1337
1U_0603_10V4Z
C1342
0.1U_0402_16V4Z
R1052
1
2
BLM18BD601SN1D_0603
+3VS
+5VALW
C1344
2.2U_0805_16V4Z
R1051
1
2
BLM18BD601SN1D_0603
+VDDA_CODEC_R
C1339
0.1U_0402_16V4Z
+3VDD_CODEC
0.1U_0402_16V4Z
U38
+3VDD_CODEC
HDA_BITCLK_CODEC
DVDD_CORE*
DVDD_CORE
25
AVDD1*
38
AVDD2**
VOL_DN/DMIC_1/GPIO 2
+VDDA_CODEC_R
@
R1054
47_0402_5%
DVDD_IO
30
31
GPIO 5
43
EAPD_CODEC
38
DMIC_DAT 19
+3VS_HDA
GPIO 3
VREFOUT-E / GPIO 4
EAPD_CODEC
27
EC_BEEP
R1070 1
SB_SPKR
R1060 1
26,38 HDA_RST#_CODEC
R1061 1
C1349
@ C1358
1
2
0.1U_0402_16V4Z
47K_0402_5%
47K_0402_5%
19
DMIC_CLK
SDO
SDI_CODEC
2 33_0402_5%
HDA_SYNC_CODEC
10
SYNC
HDA_RST#_CODEC
11
RESET#
R1058
1
C1347
2 10K_0402_5%
1
HDA_SDOUT_CODEC
1
C1348
22_0402_5%
2
40
+VDDA_CODEC_R
SENSE_B#
R1062 1
R1063 1
2 5.1K_0402_1%
2 39.2K_0402_1%
SENSEB#
R1066
1
C1353
0.1U_0402_16V4Z
C1355
10U_0805_10V4Z
1
2
2
0_1206_5%
VREFOUT-B
28
VREFOUT_B
VREFOUT-C
29
SENSE_A
VC_REFA
13
SENSE
41
PORTA_L
39
HP_OUTL
PORTB_R
22
MIC_EXTR
PORTB_L
21
MIC_EXTL
SENSE_B / NC
37
NC
PORTC_R
24
MIC_INR
18
NC
PORTC_L
23
MIC_INL
19
NC
PORTD_R
36
LINE_OUT_R
NC
VREFFILT
26
AVSS1*
42
AVSS2**
DVSS**
1
2 5.1K_0402_1%
1
2 20K_0402_1%
1
2 39.2K_0402_1%
1
2 10K_0402_1%
0.1U_0402_16V4Z
1
2
HP_OUTR 35
1
C1350
1
C1351
35
15
DOCK_MICR
PORTE_L
14
DOCK_MICL
1U_0603_10V6K
2
0_1206_5%
GNDA
PORTF_L
MIC_EXT_L 35
MIC_IN_R 35
C1352
0.022U_0603_25V7K
@ R1064
0_0603_5%
C1354
1
Internal MIC
0.022U_0603_25V7K
MIC_IN_L 35
Internal SPKR.
LINE_OUT_L 35
1
R943
1
R944
DOCK_MICL_C
R910
2
10K_0402_5%
2
10K_0402_5%
DOCK_MIC_R
40
DOCK MIC
DOCK_MIC_L 40
R911
1.21K_0402_1%
92HD71B7X5NLGXA1X8_QFN48_7X7
35,40
C746 1U_0603_10V6K
DOCK_MICR_C
1
2
Jack MIC
MIC_EXT_R 35
1U_0603_10V6K
C753 1U_0603_10V6K
17
16
LINE_OUT_R 35
LINE_OUT_L
PORTD_L
PORTE_R
PORTF_R
EXTMIC_DET# 35
JACK_DET# 35,40
INTMIC_DET# 35
HP_OUTL 35
NC / OTP
27
VREFOUT_B 35
+VDDA_CODEC_R
34
20
#SI SPDIF0-->VGA
SPDIF_OUT0 21
R1056
R1057
R1059
R683
C1346
HP_OUTR
PORTA_R
SPDIF1-->Docking
SPDIF_OUT1 40
2
0_1206_5%
GND
SPDIF_OUT0
40
@ C1361
1
2
0.1U_0402_16V4Z
R1065
1
SPDIF_OUT1
48
DMIC_CLK
33
2
1
1U_0603_10V4Z CAP2
MONO_INR
12 PCBEEP
2
0.1U_0402_16V4Z
@ C1360
1
2
0.1U_0402_16V4Z
R1067
1
45
SPDIF OUT0
2 0.1U_0402_16V4Z
@ C1359
1
2
0.1U_0402_16V4Z
46
44
38
BITCLK
R1055 1
26 HDA_SDIN0
26 HDA_SYNC_CODEC
#SI connect to EC
26 HDA_SDOUT_CODEC
HDA_BITCLK_CODEC
GPIO 6
SPDIF OUT1 / GPIO 7
26 HDA_BITCLK_CODEC
MONO_OUT
32
1.21K_0402_1%
@
C1345
33P_0402_50V8K
1/10*Vin
need close to Codec
GNDA
#SI -3db test fail
SENSE A
SENSE B
Port
Resistor
Port
Resistor
39.2K
39.2K
20K
20K
10K
10K
5.11K
5.11K
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
Codec_IDT9271B7
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
E
33
of
53
+1.5VS
+3VS
+3VS
1
2
@ C618
10P_0402_25V8K
ACES_88018-124G
26
@C621
HDA_BITCLK_MDC
2
@ R478
10_0402_5%
4.7U_0805_10V4Z
13
14
15
16
17
18
2
0_0603_5%
2
0_0603_5%
+3VS
C620
HDA_SYNC_MDC
2 HDA_SDIN1_MDC
33_0402_5%
1
R475
@1
R476
2
4
6
8
10
12
C619
1
R477
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
GND
GND
GND
GND
GND
GND
26 HDA_SYNC_MDC
26 HDA_SDIN1
26 HDA_RST#_MDC
1
3
5
7
9
11
0.1U_0402_16V4Z
JP8
HDA_SDOUT_MDC
26 HDA_SDOUT_MDC
1000P_0402_50V7K
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
34
of
53
+5VAMP
SPEAKER
+5VS
+5VS
15.6 dB
RIN-
C1484
1
1
2 0.022U_0603_25V7K
2
0.022U_0402_16V7K
LIN+
1
1
2 0.022U_0603_25V7K
2
0.022U_0402_16V7K
LIN-
C1485
C1486
33 LINE_OUT_L
C1487
38
EC_MUTE#
EC_MUTE#
19
ROUT+
18
SPKR+
ROUT-
14
SPKR-
LOUT+
SPKL+
LOUT-
SPKL-
R1137
@ D55
PSOT24C_SOT23-3
D56 @
PSOT24C_SOT23-3
R1138
100K_0402_5%
SHUTDOWN
20
13
11
1
NC
12
BYPASS
10
1
C1488
1U_0805_16V7K
MIC_EXT_R
MIC_EXT_L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
HP_OUT_R
HP_OUT_L
33
EXTMIC_DET#
HP_DET#
EXTMIC_DET#
CIR_IN
CIR_IN
+5VL
MIC_EXT_R
HP OUT
33
MIC_EXT_L
MIC_EXT_L
4.7K_0402_5%
MIC_EXT_R
33
EXTMIC IN
DOCK_R
C795
HP_OUTL
DOCK_L
C796
1
2
1
2
47_0402_5%
DOCK_LOUT_R 40
R969
1
2
47_0402_5%
33
33
2
R681
1
10K_0402_5%
5
6
38 ANA_MIC_DET
DOCK_LOUT_L 40
150U_B_6.3VM_R40M
INTMIC_DET#
1
2
3
4
GND1
GND2
ACES_88231-04001
CONN@
33
HP_OUT_R
5
4
HP_OUT_L
2N7002DW-7-F_SOT363-6
Q109B
150U_B_6.3VM_R40M
C786
MIC_IN_L
MIC_IN_R
+3VS
JP51
1
2
3
4
R968
150U_B_6.3VM_R40M
Q47A
2N7002DW-7-F_SOT363-6
C785
R951
10K_0402_5%
R1079
4.7K_0402_5%
HP_OUTR
R1078
4.7K_0402_5%
Q47B
2N7002DW-7-F_SOT363-6
5
33
C854
INTMIC IN
Q109A
2N7002DW-7-F_SOT363-6
33
0.01U_0402_25V7K
Q49A
2
1
Q37
S 2N7002_SOT23-3
2
G
HP_DET#
+VDDA_CODEC
C1379
1U_0603_10V4Z
1
2
R1077
0_0402_5%
2
1
+VDDA_CODEC
2N7002DW-7-F_SOT363-6
R686
4.7K_0402_5%
R678
330K_0402_5%
ACES_87213-1400G
CONN@
1U_0603_10V4Z
2
1
C787 1
R685
Q49B
R684
2
1
0_0402_5%
VREFOUT_B
B+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
33
2N7002DW-7-F_SOT363-6
33,40 JACK_DET#
R676
10K_0402_5%
JP49
R750
10K_0402_5%
TPA6017A2_TSSOP20
+3VALW
4
3
2
1
JP60
100K_0402_5%
GND1
GND2
GND3
GND4
GAIN1
1
C1378
17
2 0.022U_0603_25V7K
2
0.022U_0402_16V7K
C1483
C1482
1
C1377
GND2
GND1
4
3
2
1
1
1
C1481
33 LINE_OUT_R
GAIN0
2
RIN+
2
R1135
100K_0402_5%
2 0.022U_0603_25V7K
2
0.022U_0402_16V7K
THERMAL PAD
1
1
R1134
100K_0402_5%
1
C1376
21
C1480
VDD
PVDD1
PVDD2
U40
16
15
6
C1375
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
2
2
2
2
0.1U_0402_16V4Z
1
R1102 1
R1103 1
R1104 1
R1105 1
SPKL+
SPKLSPKR+
SPKR-
E&T_3806-F04N-02R
6
5
C1479
100P_0402_50V8J
C1478
100P_0402_50V8J
10U_0805_10V4Z
100P_0402_50V8J
C1477
R1133
1
2
0_1206_5%
0.1U_0402_16V4Z
100P_0402_50V8J
150U_B_6.3VM_R40M
4
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
E
35
of
53
TPS2061IDGNR_MSOP8
2
USB_EN#
1
+
JP53
4.7U_0805_10V4Z
R1083
D46
USB_VCCC
W=60mils
8
7
6
5
C1383
1000P_0402_50V7K
OUT
OUT
OUT
OC#
C1382
0.1U_0402_16V4Z
C1381
GND
IN
IN
EN#
C1380
150U_D_6.3VM
1
2
3
4
USB20_N2
USB20_P2
2 10K_0402_5%
27
27
1
2
3
4
26
26
SATA_TXP5
SATA_TXN5
SATA_TXP5
SATA_TXN5
26 SATA_RXN5_C
26 SATA_RXP5_C
C1385 2
C1384 2
1 0.01U_0402_16V7K SATA_RXN5
1 0.01U_0402_16V7K SATA_RXP5
+5VALW
VBUS
DD+
GND
+5VALW
USB
SATA_TXN5
VIN
IO1
IO2 GND
SATA_TXP5
D
@ PRTR5V0U2X_SOT143-4
5
6
7
8
9
10
11
GND
A+ ESATA
AGND
BB+
GND
12
13
14
15
GND
GND
GND
GND
TYCO_1759576-1
CONN@
JP55
1
2
3
4
5
6
7
8
9
10
+5VALW
USB_EN#
27
27
USB20_N0
USB20_P0
27
27
USB20_N1
USB20_P1
11
12
1
2
3
4
5
6
7
8
9
10
GND1
GND2
ACES_87213-1000G
BT Connector
ACES_87213-0800G
10
B
Finger printer
GND 8
7
6
5
4
3
2
GND 1
8
7
6
5
4
3
2
1
+3VAUX_BT
USB20_P6_R
USB20_N6_R
R1084
R1085
@ R1086 1
@ R1087 1
1 0_0402_5%
1 0_0402_5%
2
2
USB20_P6
USB20_N6
BT_LED
CH_DATA
CH_CLK
1K_0402_5%
1K_0402_5%
2
2
0612 no install
D47
CONN@ JP57
+5VALW
3
D30 @
PACDN042_SOT23-3~D
R652
0_0402_5%
1
2
3
4
5
6
GND
GND
Q105
USB20_P6_R
0.1U_0402_16V4Z
C1386
R1090
1U_0603_10V4Z
100K_0402_5%
ACES_85201-06051
CONN@
BT_OFF
C1387
R1092
1
2
10K_0402_5%
C1388
C1389
2
4.7U_0805_10V4Z
C1390
1
2
0.1U_0402_16V4Z
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SI2301BDS_SOT23
0.01U_0402_16V7K
27
Security Classification
IO1
IO2 GND
+3VAUX_BT
+3VS_BT
1
2
3
4
5
6
7
8
VIN
JP24
USB20_N7_R
USB20_P7_R
2 0_0402_5%
2 0_0402_5%
@ PRTR5V0U2X_SOT143-4
C756
0.1U_0402_16V4Z
2
R634 1
R635 1
USB20_N7
USB20_P7
0_0603_5%
2
USB_EN#
27
27
0_0603_5%
2
R2113
1
38
2
0_0603_5%
R2112
1
+3VALW
+3VS
R628
1
2 0_0603_5%
SI2301BDS_SOT23
+3VALW
1
@ Q31
R627
USB20_N6_R
+3VS
27
27
39
31
31
Rev
0.4
Sheet
1
36
of
53
C711
+3VL
20mils
R552
100K_0402_5%
38,43 SMB_EC_CK1
38,43 SMB_EC_DA1
VCC
WP
SCL
SDA
C712
0.1U_0402_16V4Z
U28
8
7
6
5
A0
A1
A2
GND
U27
1
@
0.1U_0402_16V4Z
LPC Debug
Port
SPI ROM
+3VL
+3VL
1
2
3
4
AT24C16AN-10SI-2.7_SO8
38
FSEL#
38
SPI_CLK
38
FWR#
VCC
HOLD
SPI_FSEL#
2
10_0402_5%
SPI_CLK_R
2
10_0402_5%
SPI_FWR#
2
10_0402_5%
1
R553
1
R554
1
R556
VSS
B+
CONN@
JP18
SPI_SO
1
R555
FRD#
2
0_0402_5%
38
26,31,38 LPC_FRAME#
25,38
R557
100K_0402_5%
R2118
2
SPI_FSEL#
C2125
2
C2126
2
PCI_RST#
26,31,38 LPC_AD0
26,31,38 LPC_AD1
26,31,38 LPC_AD2
26,31,38 LPC_AD3
1
&U1
33_0402_5%
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
17 CLK_DEBUG_PORT_0
FRD#
22P_0402_50V8J
ON/OFFBTNLED#
R2119
SPI_CLK_R 2
33_0402_5%
R2120
2
SPI_FWR#
22P_0402_50V8J
C2127
2
33_0402_5%
SST25LF080B_SO8-200mil
VCC1PWRGD
SPI_CLK_JP52
SPI_CS#_JP52
SPI_SI_JP52
SPI_SO_JP52
SPI_HOLD#_0
22P_0402_50V8J
Ground
LPC_PCI_CLK
Ground
LPC_FRAME#
+V3S
LPC_RESET#
+V3S
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
VCC_3VA
PWR_LED#
CAPS_LED#
NUM_LED#
VCC1_PWRGD
SPI_CLK
SPI_CS#
SPI_SI
SPI_SO
SPI_HOLD#
Reserved
Reserved
Reserved
ACES_87216-2404_24P
#PV stuff
SPI_CLK
1
R558
2
0_0402_5%
SPI_CLK_JP52
DEBUG@
1
R559
2
0_0402_5%
SPI_CS#_JP52
DEBUG@
1
R560
2
0_0402_5%
SPI_SI_JP52
DEBUG@
HOLD#
2
3.3K_0402_5%DEBUG@
1
R562
2
0_0402_5%
SPI_HOLD#_0
1
R563
2
0_0402_5%
SPI_SO_JP52
DEBUG@
38,39 ON/OFFBTN_LED#
ON/OFFBTN_LED#
DEBUG@
1
R565
2
0_0402_5%
ON/OFFBTNLED#
38 VCC1_PWRGD
VCC1_PWRGD
DEBUG@
1
R566
2
0_0402_5%
VCC1PWRGD
Acceleromter-1
FSEL#
+3VALW
+3VS
+3VS_ACL
+3VS_ACL_IO
R561 1
D23
2
FWR#
R564
1
FRD#
2
0_0603_5%
CH751H-40PT_SOD323-2
+3VS_ACL
U29
LIS302DL
1
+3VS_ACL_IO
+3VS_ACL
25 ACCEL_INT
R1538
VDD_IO
VDD
8
9
INT 1
INT 2
12
13
14
17,21,27,31 CLK_SMBDATA
17,21,27,31 CLK_SMBCLK
+3VS_ACL
1
6
1 G_CS# 7
10K_0402_5%
GND
GND
GND
GND
2
4
5
10
SDO
SDA / SDI / SDO
SCL / SPC
RSVD
CS
RSVD
3
11
0.1U_0402_16V4Z
R1539
1
2
0_0603_5%
C713
C714
10U_0805_6.3V6M
+3VS_ACL_IO
LIS302DLTR_LGA14_3X5~D
<BOM Structure>
Acceleromter-2
U14
BMA150
VDDIO
VDD
9
2
CSB
GND
SCK
RSVD
RSVD
1
10
SDO
RSVD
RSVD
11
12
ACCEL_INT
INT
G_CS#
CLK_SMBCLK
A
CLK_SMBDATA
SDI
+3VS_ACL_IO
+3VS_ACL
BMA150_LGA12
@
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
37
of
53
+3VL_EC
1000P_0402_50V7K
EC request 10/23
1
+3VL_EC
R572
1
BATT_OVP
2
0_0805_5%
@
C722
1
@
R576
1
26
GATEA20
26
KB_RST#
27
SIRQ
26,31,37 LPC_FRAME#
26,31,37 LPC_AD3
26,31,37 LPC_AD2
26,31,37 LPC_AD1
26,31,37 LPC_AD0
2
33_0402_5%
15P_0402_50V8J
17 CLK_PCI_EC
R578 1
PCI_RST#
27
EC_SCI#
26,33 HDA_RST#_CODEC
1
0.1U_0402_16V4Z
JOPEN
+3VALW
+3VS
R713
100K_0402_5%
R721
10K_0402_5%
R583
10K_0402_5%
LID_SW#
TP_BTN#
SYSON
R584
8.2K_0402_5%
37,43
37,43
6,21
6,21
@
2
0_0402_5%
EC_PME#
TSATN#
31 WWAN_POWER_OFF
+3VL
39 ON/OFFBTN
R592
1
ON/OFFBTN
2
0_0402_5%
SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
ESB_CLK_R
ESB_DAT_R
EC_PME#
1@ R591 2 0_0603_5%
CONA#
CONA#
CRY2
Y5
NC
IN
NC
OUT
BATT_TEMP
BATT_OVP
ADP_I
ADP_ID
TP_BTN#
ANA_MIC_DET
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
DAC_BRIG
VCTRL
IREF
AC_SET
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
EC_MUTE#
USB_EN#
I2C_INT
MUTE_LED
TP_CLK
TP_DATA
EC_MUTE# 35
USB_EN# 36
I2C_INT
39
MUTE_LED 40
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
97
98
99
109
DOCK_VOL_UP#
DOCK_VOL_DWN#
AC_LED# 37
DOCK_VOL_UP# 40
DOCK_VOL_DWN# 40
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
122
123
PS2 Interface
GPIO
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
GPI
R190
R191
R192
1
1
1
73
74
89
90
91
92
93
95
121
127
L30
0_0603_5%
1
C726
2
2
2
2
R586
EC_RSMRST#
100
101 R588 1
2
EC_ON 0_0402_5%
102
WL_BLUE_LED#
103
104 R408 1
2
BKOFF#
100_0402_5%
105
M_PWROK
106
TP_LED#
107
108
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
V18R
124
KB926QFB0_LQFP128_14X14
2
0.1U_0402_16V4Z
CIR_IN
VCC1_PWRGD
FSTCHG
STD_ADP
CAPS_LED#
BAT_LED#
ON/OFFBTN_LED#
SYSON
VR_ON
AC_IN
SLP_S4#
ENBKL
EAPD_CODEC
THERM_SCI#
SUSP#
PWRBTN_OUT#
NMI_DBG#
L31
1
FRD#
R579 1
R580 1
2 10K_0402_5%
2 10K_0402_5%
39
39
+5VL
2 10K_0402_5%
CIR_IN
35,40
VCC1_PWRGD 37
FSTCHG 44
STD_ADP 44
CAPS_LED# 39
BAT_LED# 39
ON/OFFBTN_LED# 37,39
SYSON
31,39,41,50
VR_ON
49
FWR#
SPI_CLK
FSEL#
PM_PWROK
SLP_S4# 27
ENBKL
21
EAPD_CODEC 33
THERM_SCI# 21,27
SUSP#
31,33,41,44,46,47,48
PWRBTN_OUT# 27
PM_PWROK 9,27
ACIN
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
KSI4
1
100P_0402_50V8J
KSI6
1
ADP_ID
CH751H-40PT_SOD323-2
D14
1
2 PCI_SERR#
PCI_SERR#
ACIN
44
25
KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1
39 SMB_EC_CK1_R
39 SMB_EC_DA1_R
39
39
ESB_CLK
ESB_DAT
R729
R730
R731
R732
2
1
@
1
1
1
1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
SMB_EC_CK1
SMB_EC_DA1
ESB_CLK_R
ESB_DAT_R
C727
15P_0402_50V8J
Cypress
ENE
1
C791
ESB_CLK_R
R1100
1
ESB_DAT_R
R1099
1
C1464
2
C1465
2
@ C1466
2
@ C1467
2
@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
ACES_85201-2405
CONN@
CH751H-40PT_SOD323-2
+3VL
JP19
D16
1
R715
10K_0402_5%
D13
1
C1460
2
C1461
2
C1462
2
@ C1463
2
@
+3VL
CH751H-40PT_SOD323-2
14" INT_KBD
CONN.( TYPE "D"
KB)
R714
10K_0402_5%
NMI_DBG#
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
KSO1
1
100P_0402_50V8J
KSO2
1
KSI1
+3VL
AC_IN
100P_0402_50V8J @ C1458
1
2
KSI2
1
10K_0402_5%
C1452
2
C1453
2
@ C1454
2
@ C1455
2
@
KSO5
KSI5
R1132
EC_RSMRST# 27
EC_LID_OUT# 27
EC_ON
45
WL_BLUE_LED# 39
100P_0402_50V8J @ C1456
1
2
100P_0402_50V8J @ C1459
1
2
KSI3
1
10K_0402_5%
37
37
37
C1448
2
C1449
2
C1450
2
@ C1451
2
@
KSO0
C724
4.7U_0603_6.3V6K
2
0_0603_5%
KSO4
+3VL
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
KSO7
1
100P_0402_50V8J
KSO8
1
KSO3
37
33_0402_5%
33_0402_5%
33_0402_5%
BKOFF#
19
M_PWROK 9,27
TP_LED# 39
KSO6
For C
Revision
LAN_POWER_OFF_R
19
44
44
44
TP_CLK
TP_DATA
FRD#
100P_0402_50V8J
1
100P_0402_50V8J
KSO10
1
100P_0402_50V8J
KSO11
1
100P_0402_50V8J
KSO12
1
KSO9
R720
2 0_0402_5%
BATT_TEMP 43
BATT_OVP 43
ADP_I
44
ADP_ID
43
TP_BTN# 39
ANA_MIC_DET 35
DAC_BRIG
VCTRL
IREF
AC_SET
100P_0402_50V8J @ C1442
1
2
100P_0402_50V8J @ C1443
1
2
100P_0402_50V8J @ C1444
KSO13
1
2
100P_0402_50V8J @ C1445
KSO14
1
2
100P_0402_50V8J @ C1446
KSO15
1
2
19
6
33
44,45
0.01U_0402_16V7K
ECAGND
1
2
+3VL_EC
+EC_AVCC
C720
XCLK1
XCLK0
CRY1
INV_PWM
FAN_PWM
EC_BEEP
ACOFF
+5V
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
C725
15P_0402_50V8J
R733
63
64
65
66
75
76
SM Bus
@
R595
20M_0402_5%
32.768KHZ_12.5P_1TJS125DJ2A073
30 LAN_POWER_OFF
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
0_1206_5%
@
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
C723
15P_0402_50V8J
1
2
<BOM Structure>
R735
2
77
78
79
80
UTX
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
6
14
15
16
17
18
19
25
28
40
29
R593 4.7K_0402_5%
UTX
30
LAN_POWER_OFF_R 31
1
2
ON/OFFBTN
32
DIM_LED
34
41
DIM_LED
NUM_LED#
36
39
NUM_LED#
27
27
27
39
40 DOCK_SLP_BTN#
INV_PWM
FAN_PWM
EC_BEEP
ACOFF
R585
10K_0402_5%
#SI no stuff
R589
1
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
21
23
26
27
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
KSI0
PWM Output
AD
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
KSI7
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
25 PCI_PME#
12
13
37
20
2 0_0402_5% 38
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
GND
GND
GND
GND
GND
R581
8.2K_0402_5%
PCI_RST#
CLK_PCI_EC
PCI_RST#
ECRST#
R2067 1
1
2
3
4
5
7
8
10
J1
C721
25,37
2
47K_0402_5%
+3VL
GATEA20
KB_RST#
SIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
For EMI
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
2 4.7K_0402_5%
2 4.7K_0402_5%
2 4.7K_0402_5%
2 4.7K_0402_5%
1
1
1
1
11
24
35
94
113
R573
R577
R574
R575
2
100P_0402_50V8J
U30
SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2
1
C794
+3VS
+5VL
+EC_AVCC
+3VL
C719
2
2
1000P_0402_50V7K
67
C718
AGND
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C717
69
C716
ECAGND
C715
9
22
33
96
111
125
0.1U_0402_16V4Z
1
1
2
100P_0402_50V8J
4.7K_0402_5%
2
4.7K_0402_5%
2
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
38
of
53
White
Cap lock
+5VS_LED
200_0402_5%
+5VS_KBL +5VS_LED
White
Q112
2N7002_SOT23-3
R614
36
HT-F196BP5_WHITE
White
26
SATA_LED#
Battery
Charge LED
+5VALW_LED
QSMF-C16E_AMBER-WHITE
White
R1098
200_0402_5%
1
2
1
2
27 HDDHALT_LED#
2
200_0402_5%
2
R728
200_0402_5%
AMBER
5
6
G1
G2
0_0805_5%
1
2
3
4
WL_BLUE_LED# 38
R1126
100K_0402_5%
R193
ACES_85201-04051
31
WL_LED#
31
WW_LED#
0_0402_5%
0_0402_5%
R194
+5VS_LED
D19
1
HDD LED
+3VS
2
G
BAT_LED#
1
2
3
4
38
R1097
BT_LED
JP9
D52
R716
10K_0402_5%
1
HT-F196BP5_WHITE
+3VS
R1095
D50
38 CAPS_LED#
System LED
WL_LED
CH751H-40PT_SOD323-2
Amber
D53
White
1
+5VS
+5VS_LED
R613
10K_0402_5%
JP59
1
C2134
15P_0402_50V8J
PA@
PR@
PR
2
G
Q153
2N7002_SOT23-3
1
+
ACES_85201-1005N
CONN@
TP_LED#
TP_LED#
38
+5V
C60
22U_A_4VM
TP ON/OFF
T/P Board
TP_BTN#
TP_BTN# 38
T/P Power
5
6
+5V
R611
10K_0402_5%
SW1
TJG-533-V-T/R_6P
PA
QSMF-C16E_AMBER-WHITE
+3VL
+3VL_CAP
@ PJP703
PAD-OPEN 2x2m
R2121
1
G1
G2
5
6
1
C2132
1U_0603_10V4Z
5
6
GND
VIN
VOUT
G1
G2
1
2
3
4
0.1U_0402_16V4Z
Q23
1
2
3
4
@
C730
100P_0402_50V8J
SI2301BDS-T1-E3_SOT23-3
TP_CLK 38
TP_DATA 38
ACES_85201-04051
CONN@
C2133
ACES_85201-04051
CONN@
JP23
0_0805_5%
2
1
2
3
4
BP
+5V
R615
1
@
C731
100P_0402_50V8J
1
2
3
4
ON/OFFBTN
ON/OFFBTN_LED#
SHDN#
+5VALW
C729
JP10
38 ON/OFFBTN
37,38 ON/OFFBTN_LED#
+3VL_CAP
U43
10K_0603_1%
+5VL
+5VALW_LED
R612
10K_0402_5%
@
38
NUM_LED#
38 SMB_EC_DA1_R
White
D58
38 SMB_EC_CK1_R
38
ESB_CLK
38
ESB_DAT
38
I2C_INT
1
2
3
4
5
6
7
8
9
10
GND
GND
AMBER
QSMF-C16E_AMBER-WHITE
1
2
3
4
5
6
7
8
9
10
11
12
White
D54
C261
15P_0402_50V8J
AMBER
4.7U_0603_6.3V6K
33_0402_5%
15P_0402_50V8J
C2124
2
White
@ R2117
2
R610
200_0402_5%
Amber
33_0402_5%
2
ESB_DAT
R609
200_0402_5%
+3VL_CAP
White
C2123
2
Amber
@ R2116
2
+5VS_LED
System
Power LED
+5VALW_LED
200_0402_5%
R980
1
HT-F196BP5_WHITE
D17
ON/OFFBTN_LED#
31,38,41,50 SYSON
D28
PSOT24C_SOT23-3
+3VALW
C219
0.1U_0402_16V4Z
Q24
2N7002_SOT23-3
2
G
SYSON
1
2
TP_DATA
TP_CLK
0.33U_0603_10V7K
2
4
JP11
38
LID_SW#
1
2
3
4
C240
1
2
3
4
G1
G2
5
6
ACES_85201-04051
CONN@
Security Classification
10P_0402_50V8J
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
E
39
of
53
DOCK_PWR_ON Spec
0V = Notebook S4/S5, Dock off
2.5V = Notebook S3, Dock on
4V = Notebook S0, Dock on
D57
R751 1
2 1K_0402_5%
R752 1
2 1K_0402_5%
DOCK_PWRON
18 GREEN_L
18 RED_L
18 D_DDCDATA
18 BLUE_L
18 D_HSYNC
18 D_DDCCLK
27 USB20_N3
18 D_VSYNC
27
30
30
30
30
30
30
30
30
R753
10K_0402_5%
GREEN
RED
D_DDCDATA
BLUE
D_HSYNC
D_DDCCLK
USB20_N3
D_VSYNC
USB20_P3
RJ45_MIDI3+
RJ45_MIDI3RJ45_MIDI2+
RJ45_MIDI2RJ45_MIDI1+
RJ45_MIDI1RJ45_MIDI0+
RJ45_MIDI0-
USB20_P3
RJ45_MIDI3+
RJ45_MIDI3RJ45_MIDI2+
RJ45_MIDI2RJ45_MIDI1+
RJ45_MIDI1RJ45_MIDI0+
RJ45_MIDI0-
+V_BATTERY
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
+3VL
41
42
41
42
45
46
45
46
1000P_0402_50V7K
1 @
C747
1000P_0402_50V7K
CIR_IN
DOCK_PWRON
MUTE_LED_R
DOCK_SLP_BTN_R#
JACK_DET#
R_VOL_UP#
R_VOL_DWN#
SPDIFO_L
AUDIO_OGND
DOCK_LOUT_R
DOCK_LOUT_L
DOCK_MIC_R_C
DOCK_MIC_L_C
AUDIO_IGND
DOCK_PRESENT
#SI connect to EC
CIR_IN
1
1
35,38
R619
MUTE_LED
2 33_0402_5%
DOCK_SLP_BTN#
2 33_0402_5%
R622
R617 1
2 200_0402_5%
R618 1
200_0402_5%
2
MUTE_LED 38
DOCK_SLP_BTN# 38
JACK_DET# 33,35
DOCK_VOL_UP# 38
DOCK_VOL_DWN# 38
GNDA
DOCK_LOUT_R 35
DOCK_LOUT_L 35
GNDA
PJP3
B+
@
C748
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
R620
2K_0402_5%
+3VS_HDA
PAD-OPEN 2x2m
CONN@
FOX_QL1122L-H212AR-7F
R1140
33_0402_5%
R621
10K_0402_5%
2
G
Q13
2N7002_SOT23-3
SYSON#
DAN202U_SC70
41,48
+5VS
+3VALW
JDOCK1
43
44
Q27
2N7002_SOT23-3
@
Q114
MMBT3904_NL_SOT23-3
11/17 update
C894
1
2
2
B
1
GNDA
33 DOCK_MIC_R
DOCK_MIC_L_C
1
2
L37
FBM-11-160808-601-T_0603
33 DOCK_MIC_L
+DOCKVIN
1
C755
C754
220P_0402_50V7K 2
2 220P_0402_50V7K
+3VS
GNDAGNDA
C734
1000P_0402_50V7K
10K_0402_5%
SENSE_B# 33
MMBT3904_NL_SOT23-3
DOCK_MIC_L_C
R632
1
2
10K_0402_5%
R626
10K_0402_5%
R625
2
B
E
Q32
2
B
Q29
2N7002_SOT23-3
2
G
1 10K_0402_5%
C745
1000P_0402_50V7K
R596 2
C744
1000P_0402_50V7K
DOCK_VOL_DWN#
1 10K_0402_5%
R1143
110_0402_5%
R594 2
2
DOCK_VOL_UP#
220P_0402_25V8J
MIC_Dock
R_VOL_DWN#
1
+3VS
C1489
GNDA
R_VOL_UP#
1
R1142
0_0603_5%
SPDIFO_L
SPDIF_OUT1 33
0.1U_0402_16V7K
Q30
MMBT3904_NL_SOT23-3
C757
R633
47K_0402_5%
DOCK_LOUT_R
DOCK_LOUT_L
1
C741
C740
0.01U_0402_16V7K
R623
2K_0402_5%
R1141
1
2
220_0402_5%
2
G
22_0402_5%
0.01U_0402_16V7K
R754
DOCK_PRESENT
CONA#
38
1
1U_0603_10V6K
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
40
of
53
DIM LED
+5VALW
+5VALW
+5VS
B+
+3VALW
+5VALW_LED
Q33
+3VS
SI2301BDS-T1-E3_SOT23-3
C764
R637
10K_0402_5%
RUNON_3VS
1
Q34A
5
Q34B
SUSP
2
C765
2N7002DW-7-F_SOT363-6
@
2N7002DW-7-F_SOT363-6
38
DIM_LED 2
G
DIM_LED
C769
Q35
2N7002_SOT23-3
0.01U_0402_25V7K
0.01U_0402_25V7K
+5VS
+1.8VS
+3VL
C768
330K_0402_5%
40,48
SYSON#
SYSON#
100K_0402_5%
R640
100K_0402_5%
AO4466_SO8
C767
R639
10U_0805_10V4Z
1
2
3
4
C792
0.1U_0402_16V4Z
SUSP
SUSP
48
DIM_LED#
S
S
S
G
D
D
D
D
C766
8
7
6
5
10U_0805_10V4Z
1
R651
U34
+5VS_LED
Q11
SI2301BDS-T1-E3_SOT23-3
+3VL
B+
DIM_LED#
3
1
6
SUSP
C758
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R648
470_0402_5%
0.1U_0402_16V4Z
R638
470_0402_5%
C763
RUNON
1
1
330K_0402_5%
C762
C761
R649
330K_0402_5%
10U_0805_10V4Z
R636
U33
8 D
S 1
7 D
1
S 2
C759
6 D
S 3
5 D
4
G
10U_0805_10V4Z
2
AO4466_SO8
10U_0805_10V4Z
U32
8 D
S 1
7 D
1
S 2
C760
6 D
S 3
5 D
4
G
10U_0805_10V4Z
2
AO4466_SO8
B+
31,38,39,50 SYSON
R650
1K_0402_5%
Q36A
SUSP#
SUSP#
31,33,38,44,46,47,48
Q36B
2N7002DW-7-F_SOT363-6
SUSP
SYSON
0.1U_0402_16V4Z
RUNON_1.8VS
2N7002DW-7-F_SOT363-6
5
4
1
Q44B
C770
0.1U_0402_25V4K
2N7002DW-7-F_SOT363-6
H12
HOLEA
470_0402_5%
470_0402_5%
SUSP
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
H10
HOLEA
H14
HOLEA
H15
HOLEA
H16
HOLEA
H17
HOLEA
H18
HOLEA
H19
HOLEC
H20
HOLEC
Q42
SUSP 5
2
G
2N7002_SOT23-3
Q40B
SUSP
Q44A
FM1
2N7002DW-7-F_SOT363-6
H11
HOLEA
1
Q41
2N7002_SOT23-3
H9
HOLEA
H8
HOLEA
3
D
2
G
H7
HOLEA
1
R647
Q40A
SUSP
SYSON#
Q38B
1
SUSP
Q38A
SUSP
H6
HOLEA
470_0402_5%
R646
2
6
470_0402_5%
H5
HOLEA
+1.8VS
H4
HOLEA
+0.9V
R645
2
3
470_0402_5%
470_0402_5%
R644
470_0402_5%
R643
R642
1
R641
H3
HOLEA
+VCCP
H2
HOLEA
+1.5VS
+1.8V
+3VS
+5VS
H1
HOLEA
Discharge circuit
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
FM2
FM3
FM4
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
41
of
53
+3VS
+5VS_HDMI
@
R1039
2.2K_0402_5%
R1033
2.2K_0402_5%
+3VS
R1034
6.8K_0402_5%
R1040
6.8K_0402_5%
HDMIDAT
1
6
Q101A
2N7002DW-7-F_SOT363-6
1
2
0_0402_5% R1023
21 HDMIDAT_VGA
+3VS
HDMICLK
4
3
Q101B
2N7002DW-7-F_SOT363-6
1
2
0_0402_5% R1024
21 HDMICLK_VGA
WCM-2012-900T_0805
HDMI_R_CLK-
1
L70
HDMI_R_CLK+
HDMI_CLK+
HDMI Connector
WCM-2012-900T_0805
HDMI_TX0+ 1
HDMI_R_TX0-
HDMI_R_TX0+
2.2K_0402_5%
1
2
R1036
1
L71
R1035
21 HDMI_TX0+
C1250
@
+5VS_HDMI
2.2K_0402_5%
HDMI_TX0- 4
21 HDMI_TX0-
+5VS_HDMI
D41
1
C1249
C1247
@
0.1U_0402_16V4Z
22N_0402_16V7K
22N_0402_16V7K
21 HDMI_CLK-
HDMI_CLK-
JHDMI1
HDMI_R_TX1-
HDMI_TX1+
1
L72
HDMI_R_TX1+
21 HDMI_DETECT
HDMI_DETECT
D40
SKS10-04AT_TSMA
R1037
1
2
1K_0402_1%
L74
1
HDMIDAT
HDMICLK
FBML10160808121LMT_0603
R1038
10K_0402_1%
21 HDMI_TX1+
HDMI_TX1-
WCM-2012-900T_0805
21 HDMI_TX1-
C1248
2
330P_0402_50V7K
HDMI_R_CLKHDMI_R_CLK+
HDMI_R_TX0HDMI_R_TX0+
HDMI_R_TX1HDMI_R_TX1+
HDMI_R_TX2HDMI_R_TX2+
18
16
15
19
+5V
SDA
SCL
HP_DET
12
10
9
7
6
4
3
1
CKCK+
D0D0+
D1D1+
D2D2+
CEC
Reserved
13
14
GND
GND
GND
GND
GND
GND
GND
GND
DDC/CEC_GND
2
5
8
11
20
21
22
23
17
SUYIN_100042MR019S153ZL
CONN@
WCM-2012-900T_0805
21 HDMI_TX2-
21 HDMI_TX2+
HDMI_TX2-
HDMI_TX2+ 1
HDMI_R_TX2-
1
L73
HDMI_R_TX2+
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
0.4
Date:
Sheet
1
42
of
53
+3VALW
BATT
AC_LED# 47
499K_0402_1% 340K_0402_1%
PR4 1
PR1 1
2
2
105K_0402_1%
PR6 1
2
PC5
1000P_0402_50V7K
2
1
PC3
1000P_0402_50V7K
PC4
100P_0402_50V8J
2
1
2
1
PC2
100P_0402_50V8J
2
1
@PJSOT24C_SOT23-3
2
ADPIN
PL2
SMB3025500YA_2P
2
1
PJP1
PD1
8
3
PL1
SMB3025500YA_2P
1
2
0
-
PU1A
LM358ADT_SO8
PR5
10K_0402_5%
2
1
+DOCKVIN
5
4
3
2
1
VIN
RLZ3.6B_LL34
1
2
PR3
10K_0402_5%
0.01U_0402_25V7K
PC6
5
4
3
2
1
2
ADP_SIGNAL
@1000P_0402_50V7K
+5VALW
BATT_OVP <40>
PD4
PR2
10K_0402_5%
ACES_88334-057N
PC12
1
PR8
100_0402_5%
2 1
ADP_ID 41
0.01U_0402_25V7K
PC1
2
1
PQ3
TP0610K-T1-E3_SOT23-3
VMB
PL3
HCB2012KF-121T50_0805
2
PL4
HCB2012KF-121T50_0805
1
2
PJP2
PD2
@SM05_SOT23
1
EC_SMD
EC_SMC
1
2
PC8
1000P_0402_50V7K
PC9
0.01U_0402_50V4Z
PR7
47K_0402_1%
1
2
+5VS
CPU
SUYIN_200275MR008GXOLZR
1
1
BATT
8
7
6
5
4
3
2
1
9
10
8
7
6
5
4
3
2
1
GND
GND
PR14
100_0402_5%
PD3
@SM24.TC_SOT23-3
PH1
10K_TH11-3H103FT_0603_1%
P
0
PQ1
SSM3K7002FU_SC70-3
2
G
PU1B
LM358ADT_SO8
PC11
1000P_0402_50V7K
ENTRIP2 <47>
PR17
1K_0402_5%
PQ2
@SSM3K7002FU_SC70-3
2
G
BATT_TEMP
PR15
150K_0402_1%
2
PR12
2.55K_0402_1%
1
1
PC10
0.22U_0603_10V7K
+3VL
PR16
6.49K_0402_1%
1
2
1
2
PR11
150K_0402_1%
+5VALW
SMB_EC_CK1 <39,40>
<46>
SMB_EC_CK1
BAT_ID
EN0_TRIP <47>
PR10
15K_0402_1%
1
2
SMB_EC_DA1 <39,40>
SMB_EC_DA1
PR13
100_0402_5%
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
D
43
of
52
P4
B+
BATT
VIN
P2
HIDRV
26
DH_CHG
PH
25
LX_CHG
PC111
0.1U_0402_10V7K
1
2
4
VDAC
REGN
24
REGN
EXTPWR
LODRV
23
DL_CHG
14
ISYNSET
PGND
22
2
20
21
19
18
17
16
BQ24740VREF
47K_0402_5%
PR119
1
2
G
BAT_ID
PQ111
SSM3K7002FU_SC70-3
<45>
PC122
@0.1U_0603_25V7K
PR122
681K_0402_1%
1
2
<40>
IREF
PR120
2
1
133K_0402_1%
PR121
200K_0402_1%
PC124
0.1U_0603_25V7K
BATT
PR123
1M_0402_5%
1
2
PC118
0.1U_0402_10V7K
1U_0603_10V6K
IADAPT
15
PC120
0.22U_0603_10V7K
2
1
2
PC123
0.1U_0402_10V7K
PD104
1SS355_SOD323-2
4
1
2 2
1
PC135
470P_0603_50V8J
3
2
1
DPMDET
CELLS
SRP
SRN
FDS6900AS_SO8
PC119
VIN
PQ110
PR117
100K_0402_5%
1
2
PC121
100P_0402_50V8J
2
1
PR118
10K_0402_5%
1
2
ADP_I
BAT
IADAPT
1
2
<40>
SRSET
1
1
PR116
39K_0402_5%
BATT
PR112
0.015_1206_1%
1
2
PR141
4.7_1206_5%
Charge Detector
VIN_1
PL102
10U_LF919AS-100M-P3_4.5A_20%
1
2
5
6
7
8
VADJ
PQ106
DTC115EUA_SC70-3
12
13
+3VL
PR124
1K_0402_5%
1
2
VIN
VIN
PQ112
SSM3K7002FU_SC70-3
PACIN
LM393DG_SO8
8
P
PR133
10K_0603_0.1%
PU102B
PR134
10K_0402_5%
PD103
RLZ4.3B_LL34
FSTCHG#
1
STD_ADP <40>
PR136
60.4K_0402_1%
1
2 VIN_1
D
PQ113
SSM3K7002FU_SC70-3
2
G
FSTCHG
<40>
1.24VREF
2
S
2
G
G
4
PU102A
LM393DG_SO8
1
+
PR135
10K_0603_0.1%
PC126
0.047U_0402_16V7K
<40,47>
PR127
10K_0402_1%
CHGEN#
PR130
2.15K_0402_1%
1
2
PR128
10K_0402_5%
2
1
+3VL
PR132
100K_0402_5%
2
1
PR126
100K_0402_1%
PC125
0.1U_0603_25V7K
PR129
10K_0402_1%
2
1
1
PR131
133K_0402_1%
ACIN
+3VL
PR125
47_1206_5%
VIN
<40>
PQ108
AO4466_SO8
PD102
PR115
100K_0402_1%
PC117
1U_0603_10V6K
BST_CHG
ACOFF
PC131
@1000P_0402_50V7K
27
PC116
4.7U_0805_25V6-K
2
1
28
BTST
PC115
4.7U_0805_25V6-K
2
1
PVCC
PC110
1U_0805_25V6K
1
2
29
2
ACN
CHGEN
3
ACP
TP
PC114
4.7U_0805_25V6-K
VREF
11
CHG_B+
PR108
10_1206_5%
1
2
PU101
BQ24740RHDR_QFN28_5X5
VIN
PR105
10K_0402_5%
3
2
1
10
PR103
47K_0402_5%
1
2
ACOFF#
PC113
4.7U_0805_25V6-K
2
1
AGND
ACSET
7
IADSLP
PC134
PC104
4.7U_0805_25V6-K
2
1
1000P_0402_50V7K
2
1
2
1
PC129
PC105
470P_0402_50V7K
4.7U_0805_25V6-K
2
1
PC130
270P_0402_50V7K
5
6
7
8
1
PC109
@0.1U_0603_25V7K
PC102
1U_0603_6.3V6M
PC103
4.7U_0805_25V6-K
1
PC108
2
0.1U_0603_25V7K
RLS4148_LL34-2
PR114
@0_0402_5%
2
8
7
6
5
CHG_B+
+3VL
VADJ
PR113
143K_0402_1%
8
9
BQ24740VREF
1U_0603_6.3V6M
PQ109
VCTRL
1
2
3
PL101
HCB2012KF-121T50_0805
2
CHGEN#
ACDET
1
1
PR110
0_0402_5%
1
2
PC128
1
2
PC112
1
2
2
1SS355_SOD323-2
PR140
100K_0402_5%
@180P_0402_50V8J
SSM3K7002FU_SC70-3
3
PD101
ACOFF#
2
G
ACSET
LPREF
2
1
PR106
200K_0402_5%
PC106
0.22U_0603_16V7K
2
1
<32,34,40,43,48,49,50> SUSP#
PR109
150K_0402_5%
PR111
3K_0402_1%
1
2
PR104
0_0402_5%
2
PC107
@0.01U_0402_16V7K
PACIN_1
PACIN
PC133
470P_0402_50V7K
ACDET
1
2
AC_SET
2
S
PQ104
DTA144EUA_SC70-3
PQ105
DTC115EUA_SC70-3
3
1
PR102
0.012_2512_1%
1
2
8
7
6
5
<40>
PQ107
SSM3K7002FU_SC70-3
2
G
1
2
3
PR101
47K_0402_5%
1
2
PC101
47P_0402_50V8J
PR107
47K_0402_1%
1
2
PQ103
AM4835EP-T1-PF_SO8
1
2
3
8
7
6
5
LPMD
PQ101
AM4835EP-T1-PF_SO8
PC132
@1000P_0402_50V7K
PQ102
FDS6675BZ_SO8
S
PU104
ACDET
22P_0402_50V8J
2
100K_0402_1%
PR138
PR137
20K_0402_1%
PC127
REF
ANODE
NC
NC
1.24VREF
LMV431ACM5X_SOT23-5
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
CATHODE
Rev
0.4
Sheet
44
of
52
LG_5V
5
6
7
8
10U_1206_25V6M
PC305
PC317
@0.1U_0402_25V4K
2
1
18
17
+5VALWP
1
1
PR318
1
2
0_0805_5%
PC313
@22U_0805_6.3V6M
3
2
1
PC315
680P_0603_50V7K
VL
PC311
10U_0805_10V6K
EN0_TRIP
19
TPS51125RGER_QFN24_4X4
DRVL1
PL303
4.7UH_PCMC063T-4R7MN_5.5A_20%
1
2
PC310
150U_D_6.3VM
DRVL2
3
2
1
12
EN0
<40>
5
6
7
8
LX_5V
PR316
4.7_1206_5%
1
20
13
PC304
2200P_0402_50V7K
2
VFB1
LL1
VCLK
UG_5V
LL2
VREG5
21
11
PQ306
SSM3K7002FU_SC70-3
2
G
ENTRIP1
3
VREF
22
1
1
1
2
G
TONSEL
5
VFB2
VBST1
DRVH1
B++
PR308
PC308
2.2_0402_5% 0.1U_0402_10V7K
BST_5V 1
2 1
2
DRVH2
ENTRIP2
PQ302
AO4466_SO8
4
PGOOD
2VREF_51125
PQ305
SSM3K7002FU_SC70-3
24
VBST2
PR311
@620K_0402_5%
2
1
1
<45>
VO1
2
PC312
0.1U_0603_25V7K
ENTRIP1
PC314
@680P_0603_50V7K
PC309
220U_6.3VM_R15
PR306
133K_0402_1%
2
10
PR315
@4.7_1206_5%
2
1
LG_3V
VREG3
B++
23
VIN
UG_3V
GND
BST_3V
VO2
16
PR307
2 1
2
0_0402_5%
PC307
0.1U_0402_10V7K
LX_3V
1
PL302
3.3UH_SIQB74B-4R7PF_5.9A_20%
2
1
P PAD
SP8K10S-FD5_SO8
+3VALWP
PC306
10U_0805_6.3V6M
8
7
6
5
1G
1S/2D
1S/2D
1S/2D
15
D1
D1
G2
S2
ENTRIP2
1
2
3
4
PU301
25
1
2
PC303
4.7U_0805_25V6-K
1
2
PC301
2200P_0402_50V7K
2
1
PQ301
PR305
140K_0402_1%
1
2
ENTRIP1
PR304
20K_0402_1%
1
2
ENTRIP2
PR303
20K_0402_1%
1
2
+3VLP
2
PC316
@0.1U_0402_25V4K
PR302
30.9K_0402_1%
1
2
SKIPSEL
PL301
HCB2012KF-121T50_0805
PR301
13.7K_0402_1%
1
2
14
B++
B+
PC302
0.22U_0603_10V7K
2VREF_51125
PQ304
FDS6690AS_NL_SO8
R_EC_RSMRST#
+5VL
VL
PJP304
2
PJP302
VL
+5VALWP
PAD-OPEN 2x2m
2
+5VALW
+3VALWP
+3VL
+3VLP
PAD-OPEN 4x4m
PJP303
PJP301
2
+3VALW
1
PAD-OPEN 2x2m
PAD-OPEN 4x4m
EC_ON <40>
PR313
100K_0402_5%
PQ307
2
G
SSM3K7002FU_SC70-3
100K_0402_5%
PR314
2
1
2
PC318
0.022U_0402_16V7K
38 PACIN_1
4
1
PQ308
SSM3K7002FU_SC70-3
1
2
2
G
PR317
604K_0402_1%
Security Classification
2008/02/25
Issued Date
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
E
45
of
52
PR401
0_0402_5%
1
2
PL401
V5FILT
VFB
13
DH_1.05V
LL
12
LX_1.05V
TRIP
11
V5DRV
10
2200P_0402_50V7K
PC405
@4.7U_0805_25V6-K
PC404
2
1
4.7U_0805_25V6-K
PC403
2
1
1
2
PR411
1
2
0_0402_5%
3
2
1
DRVH
PQ401
AO4466_SO8
DRVL
2
PR406
11K_0402_1%
5
6
7
8
1
+5VALW
PR407
4.7_1206_5%
4
2
TPS51117RGYR_QFN14_3.5x3.5
+1.05V_VCCP
PR408
1
2
10.5K_0402_1%
1
+
PC415
4.7U_0805_10V6K
2 2
PGND
PGOOD
GND
PC409
1U_0603_10V6K
PC406
@680P_0402_50V7K
PL402
2.2UH_PCMC063T-2R2MN_8A_20%
1
2
DL_1.05V
+1.05V_VCCP
PC408
220U_6.3VM_R15
VOUT
TON
PC402
0.1U_0402_10V7K
@0.1U_0402_25V4K
PC414
2
1
5
6
7
8
BST1_1.05V1
B+
14
TP
VBST
2
PR405
2
1
0_0402_5%
EN_PSV
PU401
PR404
255K_0402_1%
1
2
15
1
PR403
316_0402_1%
2
PR402
0_0402_5%
3
2
1
+5VALW
BST_1.05V
1
+1.05V_VCCP
HCB1608KF-121T30_0603
1
2
1.05V_B+
PC401
@1000P_0402_50V7K
PR410
@10K_0402_5%
SUSP#
PC412
220P_0603_50V8J
PQ402
AO4468_SO8
1
2
PC413
@10P_0402_50V8J
PR409
25.5K_0402_1%
PJP401
+1.05V_VCCP
+VCCP
PAD-OPEN 4x4m
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
46
of
52
PR523
@200K_0402_1%
1
2
GPU_VID1<32,40,41,43,52>
PR522
@105K_0402_1%
1 1
2
PQ505
@SSM3K7002FU_SC70-3
3
PR524
10K_0402_5%
PC523
@0.01U_0402_16V7K
2
PR521
10K_0402_1%
1
2
1
GPU_VID0<32,40,41,43,52>
2
1
VBST1
DR VH2
DR VH1
21
UG_VGA
11
LL2
LL1
20
LX_VGA
LG_1.5V
12
DR VL2
DR VL1
19
LG_VGA
2
UG1_VGA
1
PR509
0_0402_5%
PGND1
TRIP1
PR516
@4.7_1206_5%
1 2
2
PR511
9.76K_0402_1%
PC519
@680P_0603_50V7K
PQ503
FDS6670AS_NL_SO8
+
2
1
2
PC521
@0.1U_0402_25V4K
PR510
16.5K_0402_1%
1
2
PC518
@680P_0603_50V7K
+NVVDDP
PL501
1UH_PCMC063T-1R0MN_11A_20%
1
2
TPS51124RGER_QFN24_4x4
18
17
V5IN
16
V5FILT
15
TRIP2
PGND2
13
1 2
14
1
PC509
4.7U_0805_6.3V6K
PC507
0.1U_0402_10V7K
22U_0805_6.3V6M
VBST2
10
LX_1.5V
PR507
0_0402_5%
2
1
22U_0805_6.3V6M
PC526
1
2
BST_VGA
22U_0805_6.3V6M
PC525
1
2
23
330U_X_2VM_R6M
PC524
1
2
EN1
22
PR515
@4.7_1206_5%
PC517
220U_B2_2.5VM
1
+
5
6
7
8
2
VFB1
3
GND
VO1
24
UG_1.5V
PQ501
AO4466_SO8
PGOOD1
PC508
1
PR508
+NVVDD_SENSE
5
6
7
8
2
0_0402_5%
3
2
1
UG1_1.5V
B+
PL502
HCB2012KF-121T50_0805
2
1
PL503
3.3UH_PCMC063T-3R3MN_6A_20%
2
1
B+++
+NVVDDP
EN2
PR519
10_0402_5%
PR518
PC510
22U_0805_6.3V6M
8
BST_1.5V
unused
3
2
1
PC506
PR506
0.1U_0402_10V7K
0_0402_5%
2
1 2
1
1
PGOOD2
SP8K10S-FD5_SO8
+1.5VSP
P PAD
1.09V
0_0402_5%
TONSEL
25
VO2
8
7
6
5
VFB2
PU501
1G
1S/2D
1S/2D
1S/2D
2200P_0402_50V7K
PC505
PC511
4.7U_0805_25V6-K
D1
D1
G2
S2
PC504
4.7U_0805_25V6-K
2
1
PR505
@0_0402_5%
PQ502
0.9V
+NVVDDP1
1
PR504
15.4K_0402_1%
1
2
PC516
@0.1U_0402_10V7K
1
2
3
4
+NVVDD
PR503
75K_0402_1%
1
2
GPU_VID0
GPU_VID1
+NVVDDP
@0.1U_0402_25V4K
PC520
2
1
2200P_0402_50V7K
PC502
2
1
PC501
4.7U_0805_25V6-K
2
1
PR502
75K_0402_1%
PR525
10K_0402_5%
PC522
0.022U_0402_16V7K
+NVVDD_SENSE
PR501
73.2K_0402_1%
+1.5VSP
PR520
61.9K_0402_1%
1 1
2
D
B+++
PQ504
SSM3K7002FU_SC70-3
3
PR513
0_0402_5%
2
<32,34,40,43,46,48,50> SUSP#
1
1
1
PR512
47K_0402_5%
2
SUSP# <32,40,41,43,52>
+5VALW
PC512
0.1U_0402_16V7K
PR517
@100K_0402_5%
1
2
PC515
4.7U_0805_10V6K
1
2
PC514
1U_0603_10V6K
PC513
@0.1U_0402_16V7K
1
2
PR514
3.3_0402_5%
PJP501
1
+1.5VSP
+1.5VS
+NVVDD
PAD-OPEN 4x4m
PJP502
1
+NVVDDP
2
PAD-OPEN 4x4m
PJP503
1
2
PAD-OPEN 4x4m
Security Classification
2008/02/25
Issued Date
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
47
of
52
+1.8V
VIN
GND
VCNTL
NC
VREF
NC
VOUT
NC
TP
+5VALW
PR601
1K_0402_1%
PC602
@10U_0805_10V4Z
PU601
PC601
10U_0805_10V4Z
PC603
1U_0603_16V6K
+0.9VP
1
2
G
PR603
1K_0402_1%
2
1
PR604
0_0402_5%
<43> SUSP
PQ601
SSM3K7002FU_SC70-3
1
2
PR602
@0_0402_5%
<42,43> SYSON#
2
1
PC604
0.1U_0402_16V7K
G2992F1U_SO8
PC605
10U_0805_6.3V6M
PC606
@0.1U_0402_16V7K
+5VALWP
EN
PC611
@0.01U_0402_16V7K
+PCIE
1
5
VIN
9
3
VOUT
FB
PC610
10U_0805_10V6K
+1.1V_PCIE
1
VIN
VOUT
PC612
22U_0805_6.3V6M
+1.1V_PCIE
PR606
0_0402_5%
<32,34,40,43,46,48,49> SUSP#
PJP603
POK
PR607
40.2K_0402_1%
PAD-OPEN 3x3m
PC613
47P_0402_50V8J
APL5913-KAC-TRL_SO8
PAD-OPEN 3x3m
+1.5VS
PC609
1U_0603_6.3V6M
PU603
VCNTL
+0.9V
GND
PJP601
+0.9VP
PR608
105K_0402_1%
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
48
of
52
PC224 1000P_0402_50V7K
1
2
PR238 1
VCC_PRM
PC231
0.22U_0603_10V7K
PR244 3.57K_0402_1%
PC230 0.1U_0402_16V7K
1
2
PR241
PR243 1K_0402_1%
PR242
PC229 180P_0402_50V8J
1
2
11K_0402_1%
VSSSENSE
3
2
1
3
2
1
PC208
1000P_0402_50V7K
PC240
2200P_0402_50V7K
2
1
PC241
2
1
47P_0402_50V8J
2
1
1
2
PC237
470P_0402_50V7K
2
1
PC207
2200P_0402_50V7K
2
1
PC206
4.7U_0805_25V6-K
2
1
PC205
4.7U_0805_25V6-K
2
1
47P_0402_50V8J
PC243
2
1
PR220
10K_0402_1%
2
1
1
2
PC238
47P_0402_50V8J
PC236
4.7U_0805_25V6-K
2
1
47P_0402_50V8J
1
PC223
1
2
0.22U_0603_10V7K
VCC_PRM
ISEN2
CPU_B+
10KB_0603_5%_ERTJ1VR103J
PH201
PC228
0.01U_0603_50V7K
2
5
VSUM
VSUM
1
2
PC227
@0.022U_0603_50V7K
PQ206
FDS6676AS_SO8
@0_0603_5%
2
PC226 820P_0603_50V7K
1
2
VCCSENSE
+5VS
1_0402_5%
PR233
1
PC225
0.1U_0603_25V7K
PR240 1K_0402_1%
5
PR239
10_0603_5%
2
PQ205
FDS6676AS_SO8
PR232
PC244
2
1
2.61K_0402_1%
220P_0402_50V7K
255_0402_1%
1
2
0.36UH_PCMC104T-R36MN1R17_30A_20%
2
1
PL203
3
2
1
4
PR234 1_0603_5%
PC221
1U_0402_6.3V6K
470P_0402_50V7K
2
2 PR237 1
1K_0402_1%
PC222
1 PR236 2
@0_0402_5%
CPU_B+
UGATE_CPU2-2
PU201
ISEN1
ISEN2
2
+VCC_CORE
NC
UGATE_CPU2-1 1
2
0_0603_5%
BOOT_CPU2
1
2
1
2
PR227
2.2_0603_5%
PC217
0.22U_0603_10V7K
PR229
4.7_1206_5%
1 2
1
PR246
4.7_1206_5%
2
1
26
PC214
2200P_0402_50V7K
2
1
PC235
4.7U_0805_25V6-K
2
1
RQW130N03_PSO8
4
PHASE_CPU2
PC218 1000P_0402_50V7K
PR235 97.6K_0402_1% PC220
1
2
2
PC212
4.7U_0805_25V6-K
2
1
5
PQ204
5
6
7
8
27
25
ISEN1
LGATE_CPU2
PR225
BOOT2
24
23
VDD
22
21
20
19
18
17
16
RTN
FB2
ISEN2
UGATE2
FB
12
GND
COMP
11
VIN
10
VSUM
28
VO
29
PHASE2
DFB
PGND2
VW
DROOP
OCSET
13
30
VSEN
13K_0402_1%
1
2
LGATE2
VDIFF
PR226
1
2
1000P_0402_50V7K PC216
PR228 6.81K_0402_1%
1
2
ISL6262ACRZ-T_QFN48_7X7
15
0.022U_0603_25V7K PC215
1
2
SOFT
VCC_PRM
PR231
10K_0402_1%
2
1
31
PR224
@0_0603_5%
1
2
PC211
1
2
ISEN1
0.22U_0603_10V7K
PC213
4.7U_0805_25V6-K
2
1
PVCC
PQ203
FDS6676AS_SO8
LGATE_CPU1
32
LGATE1
PR219
3.65K_0805_1%
2
1
PHASE_CPU1
33
PR230
3.65K_0805_1%
34
PGND1
PR223
1_0402_5%
VSUM
PC219
1500P_0603_50V7K
PHASE1
PQ202
FDS6676AS_SO8
PR218
4.7_1206_5%
2
1 2
1
PR245
PC210
4.7_1206_5%
1500P_0603_50V7K 2
1
UGATE_CPU1-1
3
2
1
36
35
5
6
7
8
14
PC234
4.7U_0805_25V6-K
2
1
PC233
4.7U_0805_25V6-K
2
1
5
4
BOOT1
UGATE1
PL202
0.36UH_PCMC104T-R36MN1R17_30A_20%
2
1
5
6
7
8
5
6
7
8
37
38
39
40
41
42
44
43
47
45
46
1
2
0_0603_5%
PR217
3
2
1
NTC
3
2
1
VID0
VID1
VR_TT#
VID2
VID3
VR_TT#
VID4
RBIAS
VID5
PMON
2
3
VID6
3V3
1 PR221 2
@0_0402_5% PR222 147K_0402_1%
1
2
CLK_EN#
PSI#
PC239
68U_25V_M_R0.44
PC204
68U_25V_M_R0.44
1
1
1
2
PR213
PR205
PR212
PR211
PQ201
PC242
470P_0402_50V7K
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
5
CPU_VID5
CPU_VID4
PR210
PR209
PC203
2.2U_0603_6.3V6K
RQW130N03_PSO8
1
PGOOD
H_PSI#
PL201
SMB3025500YA_2P
2
1
2
1
VGATE
DPRSLPVR
DPRSTP#
15,20
48
49
PC201
1U_0603_6.3V6M
PR216
@499_0402_1%
1.91K_0402_1%
PR215
0_0402_5%
2
GND
PR206
1
+3VS
+3VS
0_0402_5%
2
PC202
0.022U_0402_16V7K
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
PR204
1
CLK_ENABLE#
VR_ON
5,7,19 H_DPRSTP#
0_0402_5%
2
PR207
PR203
1
B+
CPU_B+
PR202
1_0603_5%
499_0402_1%
2
7,20 DPRSLPVR
PR208
PR201
CPU_VID6
VR_ON
32
+5VS
PC232 0.22U_0402_6.3V6K
2
1
+CPU_CORE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS
CONFIDENTIAL
Size
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION
OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, Date:
INC.
Monday, February 25, 2008
5
Rev
0.4
Sheet
1
49
of
52
PR701
0_0402_5%
1
2
PL701
VOUT
V5FILT
2200P_0402_50V7K
PC706
B+
PC707
@680P_0402_50V7K
14
DRVH
13
DH_1.8V
LX_1.8V
LL
12
TRIP
11
V5DRV
10
PR711
1
2
0_0402_5%
3
2
1
TP
TON
PC703
0.1U_0402_10V7K
4.7U_0805_25V6-K
PC705
2
1
BST1_1.8V 1
HCB1608KF-121T30_0603
1
2
PQ701
AO4466_SO8
PL702
2.2UH_PCMC063T-2R2MN_8A_20%
1
2
+1.8VP
1
2
1
2
PC712
@0.1U_0402_10V7K
PC713
@680P_0603_50V7K
PQ702
FDS6690AS_NL_SO8
3
2
1
DL_1.8V
PC711
@0.1U_0402_10V7K
TPS51117RGYR_QFN14_3.5x3.5
+
2
PC709
330U_D2_2VY_R15M
PC717
4.7U_0805_6.3V6K
5
6
7
8
PC716
4.7U_0805_10V6K
+5VALW
9
2
PGND
PR708
1
2
28K_0603_0.1%
+1.8VP
DRVL
PR707
@4.7_1206_5%
2 2
PGOOD
2
PR706
17.8K_0402_1%
VFB
GND
PC710
1U_0603_10V6K
2
1
0_0402_5%
VBST
2
PR705
EN_PSV
PU701
PR704
255K_0402_1%
1
2
15
1
PR703
316_0402_1%
2
+1.8VP
PR702
0_0402_5%
BST_1.8V
1
@0.1U_0402_25V4K
PC701
2
1
5
6
7
8
+5VALW
4.7U_0805_25V6-K
PC704
2
1
1.8V_B+
PC702
@1000P_0402_50V7K
SYSON
PR709
19.6K_0603_0.1%
PJP701
+1.8VP
+1.8V
PAD-OPEN 4x4m
PJP702
1
2
PAD-OPEN 4x4m
Security Classification
Issued Date
2008/02/25
Deciphered Date
2008/02/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
50
of
52
Title
DC Connector
/CPU_OTP
Date Request
Owner
Issue Description
Rev.
Solution Description
11/06
Compal
3.3VALWP/5VALWP
11/06
Compal
for Layout
44
Charger
11/06
Compal
EMI solution
Add PC128
49
CPU_CORE
11/06
Compal
EMI solution
Add PC240
47
1.5VSP/VGA_CORE
11/06
Compal
45
3.3VALWP/5VALWP
12/31
Compal
PWR request
44
Charger
Compal
EMI solution
49
+CPU_CORE
47
10
44
Charger
01/02
11
49
+CPU_CORE
02/15
Compal
12
43
DC Connector
/CPU_OTP
02/15
Compal
13
43
DC Connector
/CPU_OTP
02/19
Compal
WWAM issue
14
49
02/19
Compal
WWAM issue
43
45
12/31
Add PC242
12/31
Compal
EMI solution
Compal
HW request
Compal
EMI solution
+CPU_CORE
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
E
51
of
52
Item
Fixed Issue
PAGE
Modify List
Date
Phase
Transation Fail
08
20
11/07
DB
CRT(JCRT1)HDMI(JHDMI1)ESATA(JP53)Finger print(JJP24)FAN(JP2)Speaker(JP60)Multi
bay(JP12)Dual LED(D53D54
11/17
DB
Schematic Delete
11/17
DB
Change U42 to G916-390T1UF SOT23, it adjustable mode, R1091=215KR1093=100K,Add GPIO 20 to turn off power
11/07
DB
GPIO6= CR_CPPE#GPIO22=CR_WAKE#
11/17
DB
11/17
DB
2021
11/17
DB
2739
11/17
DB
10
3845
11/17
DB
11
37
11/17
DB
12
30
11/17
DB
13
30
11/17
DB
14
32
11/17
DB
15
33
11/17
DB
16
40
11/17
DB
17
C1480~C1487C1352C1354 change to 0.022UAmp output setup to 15.6 dBReserve C747C748 for GNDA and GND
11/17
DB
18
35
11/17
DB
19
35
Add C795C796 to avoid DC level, and add R968R969 to reduce HP out level
11/17
DB
20
Leakage problem
38
11/07
DB
21
38
11/07
DB
22
Can't Hibernation(SLP_S4#)
38
Connect SLP_S4# to SB
11/17
DB
23
40
11/12
DB
24
19
Add C496,C498
11/07
DB
19,20
19
27,32
27
11/21
DB
3335
25
21
Add Q74
01/04
SI
26
22
01/04
SI
27
22
01/04
SI
28
26
Add C499,C502
01/04
SI
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
52
of
53
Item
Fixed Issue
PAGE
Modify List
Date
Phase
30
01/04
SI
31
Add D88
01/04
SI
32
01/04
SI
32
Change Q54
01/04
SI
35
Change C1488 to 1U
01/04
SI
36
Add C2125,C2126,C2127
01/04
SI
38
R585 stuff
01/04
SI
38
Add R191
01/04
SI
39
Add R716
01/04
SI
10
39
Add C261(4.7U)
01/04
SI
11
40
01/04
SI
12
40
Add R594,R596
01/04
SI
13
SPDIF issue
40
follow Vader
01/04
SI
14
40
01/04
SI
15
41
01/04
SI
16
17
02/15
PV
17
19
reserve R717
02/15
PV
18
7,8
02/15
PV
19
26
02/15
PV
20
30
02/15
PV
21
31
Change WLAN and WWAN 0402 resistor to 0805, and WLAN change to +3VS power plane
02/15
PV
22
32
Direct drive LED and XD_ALE Pull L, and add D86 for D3E function
02/15
PV
23
36
02/15
PV
24
38
02/15
PV
25
39
Change all LED limit current resistor to 200 ohm and add Touch pad LED for PR
02/15
PV
26
40
02/15
PV
27
02/20
PV
28
42
add C1250,C1249
02/20
PV
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
53
of
53
Item
Fixed Issue
PAGE
Modify List
Date
Phase
17
reserve R148
02/15
PV
02/15
PV
27
02/15
PV
02/15
PV
39
02/15
PV
For EMI
37
02/15
PV
For EMI
30
02/15
PV
For EMI
39
02/15
PV
9
10
11
C
12
13
14
15
16
17
18
19
B
20
21
22
23
24
25
26
27
A
28
Compal Secret Data
Security Classification
2008/02/25
Issued Date
2008/02/25
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
0.4
Sheet
1
54
of
53