Program 1 3 input majority function detector

module india(a,b,c,d); input a,b,c; output d; reg d; always@(a,b) begin d=((~a&~b)|(~a&~c)|(~b&~c)); end endmodule

Otuput

Program 2
Tristate buffer
module russia(a,en,y); input a,en; output y; reg y; always@(a,en) begin if(en == 1) y=1'bz; else y=a; end endmodule

Output:

Program 3:
One bit comparator
module ussr(a,b,c); input a,b; output c; reg c;

always@(a,b) begin if (a==b) c= 1'b1; else c= 1'b0; end endmodule

Output:

Program 4:
Bit level equality detector
module cccp(a,b,c); input a,b; output c; reg c; always@(a,b) begin c=(a~^b); end endmodule

Output: