I

HPOOPIKH

APXE TEXNOOIA OIMIKOY

B'

I

K T M H/Y

ATPA 2001




HPOOPIKH

APXE TEXNOOIA OIMIKOY
B'
EITOYPIKA YTHMATA I

AYO YPAKH
K T M H/Y


AANAIO XATZHAKO
A. K T
E A

ANAITH INTEA
T M

HIA TAYPOOYO

IANNH AANOOYO

,
TYPORAMA

/ 19972001
ISBN: 9605383330
K : H 11/2
Copyright 2000

& , 26222 : (0610) 314094, 314206 : (0610) 317244
. 2121/1993,
.

.............................................................................................................................................................................

11

K 1

, , , ............... 13
1.1

.............................................................................................................................................. 15

1.2

1.3

...................................................................................
....................

16
18

1.3.1 (1940) .......................................................................................................... 18

1.3.2 (1950 1960)

..............................................................................................

18

1.3.3 (1959 1965) .......................................................................................... 20

1.3.4 (1965 1980)

.................................................................................................

1.3.5 (1980 1990)

..........................................................................................

1.3.6 (1990 )

20
21

.....................................................................................

22

...................................................................................................................................................................................

23

.........................................................................................................................................

23

..................................................................................................................................................

24

K 2

, , , ............... 25
2.1

2.2

2.3

.............................................................................................................................................................
......................................................................................................................

2.3.1

27

..............................................................................................

28

........................................................................................................

28

..................................................................................

29

..............................................................................................................

31

2.3.2 20
2.4

27

 E I T O Y P I K A Y T H M ATA I

2.5

.............................................................................................................................

33

2.5.1 ................................................................................................................................ 34
2.5.2
2.6

....................................................................................................................

35

.............................................................................. 37

...................................................................................................................................................................................

38

.........................................................................................................................................

39

..................................................................................................................................................

40

K 3

, , , ............... 41
3.1

3.2

3.3

........................................................................................................................... 45

3.4

3.5

3.6

3.7

( )

.................................................................................................................................................................
........................................................................................................................

........................................................................................................................................

44
44

47

............................................

48

..............................................................................................................................

56

...........................................

57

3.7.1

........................................................................................................

57

3.7.2 (Semaphores)

.......................................................................................................

58

................................................

60

.......................................................................................

65

3.7.3
3.7.4

3.7.5

..............................

75

3.7.6 V hardware ............................................................................... 76

3.7.7

.................................................................................................

79

3.8

.......................................................... 79

3.9

................................................ 80
3.9.1 (The Bakery Algorithm) ............. 81

EPIEXOMENA

...................................................................................................................................................................................

83

.........................................................................................................................................

85

..................................................................................................................................................

85

K 4

(Memory Management)

, , , ............... 87
4.1

(Preliminaries)

4.2

(Bare machine)

4.3

(Resident Monitor)

.................................................................................................................
..........................................................................................................
................................................................................

92
96
98

4.3.1 (Protection Hardware) ................................................................ 98

4.3.2 (Relocation) ..................................................................................................... 100
4.4

(Swapping) ........................................................................................................................... 103

4.4.1 (Backing Store)
4.4.2 (Swap Time)

............................................................................

103

...................................................................................

104

4.4.3 (Overlapped Swapping)

4.5

...................................

105

(Multiple Partitions) ......................................... 108

4.5.1 ....................................................................................................................... 109
4.5.2 (Fixed Regions) ............................................................................. 111
4.5.3 (Memory Fragmentation) .................................................. 118
4.5.4 (Variable Partitions)

......................................................

119

........................................................................................................

125

...............................................................................................................

128

.......................................................................................................................

129

4.5.5 (Compaction)
4.6 (Paging)
4.6.1 (Hardware)

4.6.2

.................................................................................

132

4.6.3 ..................................................................................... 135

4.6.4

...............................................................................................................................

138

4.6.5 ......................................................................................................................................... 138

 E I T O Y P I K A Y T H M ATA I

4.6.6 (Two Views of Memory)

4.7

(Segmentation)

...............................

141

..................................................................................................

143

4.7.1

...................................................................

143

4.7.2 ...................................................................................................................................................... 144

4.7.3
(Implementation of Segment Tables) ......................................................................... 147
4.7.4

..............................................................................................

4.7.5 ( )
4.8

(Combined Systems)

148

................................

151

............................................................

152

4.8.1 (Segmented Paging)

..............................

4.8.2 (Paged Segmentation)

..........................

152
153

................................................................................................................................................................................ 156

......................................................................................................................................

158

............................................................................................................................................... 159
K 5

(Virtual Memory)

, , ,

...........

161

...................................................................................................................................................

165

5.1

5.2

5.3

..................................................................................... 173

5.4

....................................................................................................................... 177

5.5

............................................................................................................. 180

5.6

5.6.1 FIFO

..........................................................................................................................

166

......................................................................................

182

.......................................................................................................................................................

183

5.6.2 (Optimal Replacement)

.........................................

186

5.6.3 LRU (Least Recently Used) ............................................................................................... 187

5.6.4 LRU .............................................................................................................. 189

EPIEXOMENA

5.6.5 bits

....................................................................................................

5.6.6

...........................................................................

190
191

5.6.7 ...... 191

5.6.8 .................... 192
5.6.9 .......................................................................................................................... 196
5.6.10 Ad Hoc
5.7

................................................................................................................

......................................................................................................................... 198
5.7.1

............................................................................................

5.7.2

(Thrashing)

199

................................................................................

200

..........................................................................................................

201

...........................................................................................................................

203

5.7.3
5.8

197

5.8.1 ........................................................................................................................................ 204

5.8.2 (Working Set Model)

.......................................

205

5.8.3 ...................................................................................... 208

5.9

..................................................................................................................................... 209
5.9.1

...........................................................................................................

209

5.9.2 I/O (/0 Interlock) ............................................................. 210

5.9.3 .......................................................................................................................... 212
5.9.4 ()
5.9.5

.............................................................................

214

...........................................................................................................

216

................................................................................................................................................................................ 218

......................................................................................................................................

220

............................................................................................................................................... 221


1999 2000, , . .

, / & .
. .

. , . / ( / ) ,
.

.
, . . , ()
.
, 2000

/ &

E:

,

.

, :
, , .
.
.

KEAAIO 1. E:

14

1.1
1.2
1.3

1.1

15

1.1

(.. , , , ) /. assembly, C. ( , hardware).
, :
(.. , hardware)
/ ( , ,
.).

/.
1.
/. / :
E/E


(.. , )
X 1

X 2

E~

Y~
( )

1.1

C

M
X 4

X 3

16

KEAAIO 1. E:

2. / , , .
3.
( ,
.)
1.1
/ .
1.2

, .
:
1. . ( )
/ . ,
. /

.

.
2. . , . / . ( )
/ ,

/ .
. , /
.
,

1 . 2

17

. / ...
3. . . / .
, , . /
.
/ , .

.

. ,
.
.
.
/.
, ,
/
. .
/.

. 1.2
.
~
( )
K M
E M
(1)~

1.2

18

KEAAIO 1. E:

( ), ( ) .
. ,
.
.

, . , , .
, . , .
, , ,
.
, ,
.
1.3

, /, ,
.
:
1.3.1 (1940)

.
.
1.3.2 (1950 1960)

1949 1956 /
. von Neumann
/ , .

1 . 3

(loading) , , ,
, , , /
().
(.. ) (loader),
. , (programming aids) . ,
,
(assemblers) , : assembler . assembler (
) (library routines).

( ) () .
, (
, FORTRAN
, ),
. batch :
, (system programms)
(.. assembler, compiler, )
. ,
(relocatable) .
(linking loaders) . ,
( ) (source
code) (object code).
, .
, .

19

20

KEAAIO 1. E:

, ( ) .
( E/E)
.
1.3.3 (1959 1965)

1959 63 .
hardware, , (data channel),
/ /.
I/ (),
/ ( ) .
I/ () .
,
. , .
, I/ .

.
(software buffering), ,
, (queuing) . ,
(interrupt handling),
( ) I/ interrupt , .
1.3.4 (1965 1980)

()
IBM 360. 360
, , . (OS 360), ,
, .
, (multi
programming).

1 . 3

(partitions), () . ( I/O) .

( ) , . Spooling ( Simultaneous
Peripheral Operations on Line). Spooling
.
(time sharing), , (interactive) CPU.
timesharing
MULTICS ( CTSS, MIT, Bell Labs General
Electric Unix), .
MULTICS Ken
Thomson ( Bell Labs) UNIX (
MULTICS PDP).
UNICS (Uniplexed Information and Computing Service), , B. Kernigham, UNIX.
Bell Labs, D. Ritchie, UNIX
() C (
Ritchie). Bell UNIX (..
VAX, Motorola .). .
1.3.5 (1980 1990)

(PCs). (user friendly) (.. XENIX, DOS .) ,
,
(multi tasking OS).

21

22

KEAAIO 1. E:

1.3.6 (1990 )

(Internet Web)
. , .
, processes (
),
Client Server ( ) (.. sockets), IP.

hardware,
. PCs
Windows, multi tasking UNIX (.. Solaris, POSIX .),
Windows N multi tasking . , Windows
(.. 1998 2000).
(), /
,
[ (CDs), video
(DVD), ]. , .
( high end)
, UNIX .

/ , (interfaces) Web . . ,
(WANs),
(NMS).

1 . 3

.
/ /
. , ( ) /.


,
. , : ()
, () () .

. , , ,
/ .
, (swapping) .
,
, 1940 ,
. ,
.

Brooks, The mythical manmonth: Essays on software engineering, reading MA:

AddisonWesley, 1975.
Corbato, On building systems that will fail, commun. CACM, vol. 34, June 1991,
pp. 72 81.
Deitel, Operating Systems, 2nd edition, Reading MA: AddisonWesley, 1990.

23

KEAAIO 1. E:

24

Finkel, An operating systems vade mecum, 2nd edition, Englewood Cliffs, NJ:
Prentice Hall, 1988.
Lampson, Hints for computer systems design, IEEE software, vol. 1, Jan. 1984, pp.
11 28.
)

Silberschatz et al., Operating System Concepts, 3rd edition, reading, MA:

AddisonWesley, 1991.
Tanenbaum, , Prentice Hall and ,
1993.

Assembler:

Batch system:

CPU:

Data channel:

I/O (input/output):

Interrupt handling:

Library routines:

Linking loaders:

Load:

Multiprogramming:

Object code:

Programming aids:

Queuing:

Real time system:

Relocatable code:

Software buffering:

Source code:

Swapping:

System program:

Timesharing:

: .
, ,
, , .

, :


. PCB
.
(
o ) .
.
.
.

.
.
.
.
( ).
.
.
.

KEAAIO 2:

26

( )

:
2.1
2.2
2.3
2.4
2.5
2.6

2.2

2.1

.


.
, , , software hardware /.

, (kernel). hardware.
2.2

. , /. .
:
.
.
.
(PCB)
.

.

.
. . , . ,
(

27

KEAAIO 2:

28

).
2.3

.

, .
.
2.3.1

(, , ),
CPU (
CPU) :
, , . CPU
, (.. modem
) .
, : , . , ( ) ,
( , ), .
, , , ( quantum
), , CPU ( /), ( ).
: ( ),
, (
, ), ,

.

2 . 3

29

()

E/E

E/E

2.1

2.3.2

(Process
Control Block PCB). (process descriptor) (state vector).
, PCB.

2.2

KEAAIO 2:

30

, PCB
. PCB.
PCB :
.
. , .
,
(
, ).
, , ,
.
.
(resources)
.
(volatile environment)
.
,
,
PCB.
, ,
. ,
PCB
. .
PCBs. ,
PCB
. PCB
, PCB . ,
PCB.

2.4

2.4

. :

,
,
, , ,
.
. , , . ,
.

, .
,
. .
(..
UNIX), .

(.. , I/O .). PCB
.
/
.
,
.

, .

31

KEAAIO 2:

32

,
.
/ (suspend / resume)
.
.
. , . ,
. ( )
.
:
(..
), , .

, , .
, , .
/ (
2.3). ,
. , . , , , , .
.

(.. modem).

2.5

33

E/E

E/E
~

E/E

2.5

,
. , .
, :
.
. ,

.

.

2.3

KEAAIO 2:

34

,
. , .
2.5.1

,
. , :
()
.
:
(supervisor call). , . ,
/, ,
., , ,
. ,


, , . .
.
, ,
.
, .
:
/. /. . / ,
.

2.5

restart interrupt
.
,
(modes), (user mode)
(supervisor mode). . , .
.
2.5.2

,
.
:
1. .
2. .
3. .
().
,
. , , ,
. .
,
.
.
,
.
, -

35

KEAAIO 2:

36

, . ,
(status flags)
. ( 2.4) ,
.
YAE TOY~
KATAXPHTE~
POPAMMATO

HH~
IAKOH~
1

NAI

EYHPETHE~
TH POYTINA IA~
THN HH 1

NAI

EYHPETHE~
TH POYTINA IA~
THN HH 2

NAI

EYHPETHE~
TH POYTINA IA~
THN HH n

OXI

HH~
IAKOH~
2

AYIA~
YEPHHH

OXI

HH~
IAKOH~

n
2.4

OXI

POYTINA AOY~
IA ANTH IAKOH

2 . 6

.
, , , . ,
.
, , ,
.
, CPU

. (preemptive)
(nonpreemptive).
CPU .
CPU.
, CPU
.
, /
quantum . , .
2.6

(kernel).
,
.[1]
, /,

(assembly), . assembly
(.. UNIX 1000 )
, (maintainable).
[1] , , .

37

KEAAIO 2:

38

:
(. 2.5.2)
(. 2.4)
(dispatching) (. 2.4)
(. 2.4)
(. 3.3)
(. 2.1)
/ (. 2.4)
.

.
. : , .
( ),
CPU ( ) .
( CPU) /. ,
, .
,
CPU
. : , , ,
, , .
2.5
. : , ,

B I B I O PA I A

, /
restart interrupt. , . : )
, () ()
.

. , CPU ,
, ,
.
, 2.6 ,
. : , , ,
, () , /,
.

Andrews and Schneider, Concepts and Notations for Concurrent Programming,

Computing Surveys, vol. 15, March 1983, pp. 3 43.
BenAri, Principles of Concurrent Programming, Englewood Cliffs, NJ: Prentice
Hall International, 1982.
Dubois et al., Synchronization, Coherence, and Event Ordering in Multiprocessors,
IEEE Computers, vol. 21, Feb. 1988, pp. 9 21.
)

Silberschatz et al., Operating System Concepts, 3rd edition, reading, MA:

AddisonWesley, 1991.

39

KEAAIO 2:

40

Blocked process:

Dispatching:

Dispatcher:

Hardware:

Interrupt:

Kernel:

Maintainable:

Mode:

nonpreemptive:

Preemptive:

Process Control Block (PCB):

Process descriptor:

Queue:

Qvantum:

Ready or runnable process:

Resource:

Resume:

Running process:

Software:

State vector:

Status flag:

Supervisor call:

Supervisor mode:

Suspend:

User mode:

Volatile environment:

,
,
. ,
.
, .

.

(
) .
,
.

/ .
.
, . ( :
synchronization)
,

.

:
Dekker .
-

KEAAIO 3:

42

.
.
.

. ,

.
.
send receive.
,
P(u) [wait(u)) V(u) (signal(u)];
;
,
.
region b do

. ;
: monitor ,
.
block wakeup .

.
.

Cobegin, coend






Send, receive

Wait, signal

Await
Test and set
Monitor

Block, wakeup

:
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9

43

KEAAIO 3:

44

3.1

, ,
(. ) .
(concurrent) . , (true
parallelism). ,
.
(indeterminism).
indetermision .
( ).
. , , ,
.
3.2

( )
cobegin s1 ; s2 ;; sn coend
S0

S1

S2

3.1

Sn+1

parbegin s1 ; s2 ;; sn parend

Sn

3.3

45

s1 , s2 ,, sn (, ). , s0 ; cobegin s1 ; s2
;; sn coend ; sn+1 3.1. ,
, ,
,
.
.
3.3

. , .
, 1, 2 cursor
(1)
( , ) (2). (interactive text processing). i (i = 1, 2)
1 P2 [ i (i = 1, 2) , ]:
BEGIN P1

BEGIN 2

cursor ,

cursor ,

1. cursor

1. cursor

2. 1

2. 2

CURSORPOSITION

CURSORPOSITION

END

END

CURSORPOSITION ( )
cursor . i ()
i.
CURSORPOSITION , .., 653.

KEAAIO 3:

46

cursor , ,
, . ,
CURSORPOSITION CURSORPOSITION mod .
cursor 342, 1
CURSORPOSITION 342. ,
, 1
CURSORPOSITION 654.
cursor (..
). ,
CURSORPOSITION 342.
P1 P2:
2: cursor 2 (2 = 654)
2 CPU,
. 1 .
1: cursor 1 (1 = 342)
1: 1 CURSORPOSITION (CURSORPOSITION = 342)
1 CPU,
. 2 .
2: 2 CURSORPOSITION (CURSORPOSITION = 654)

CURSORPOSITION! ( CURSORPOSITION
654 342).
A 3.1
total tally , :
Const n = 50;
var tally : shared integer;
procedure total
var count : integer;
begin
for count := 1 to n do
tally := tally + 1;

begin (* main program *)

tally := 0;
cobegin
total;
total;

3.4

47

end

coend;
writeIn(tally)
end

tally ,
total.

:
, / (
, ).
, ! , .
, , , (
), .
() ( ) . , , .., (,
I/O ) .
CURSORPOSITION .
1 2 CURSORPOSITION ( 1
, 2
).
,
. ( ) (mutual exclusion rule).
3.4

u , , , u
u
, / ( ). -

KEAAIO 3:

48

: u T,
( u)
.
(critical region) :

var u : shared T ;
u ( ). u (.. INTEGER, QUEUE, LIST
.)

region u do S ;
S u.
:
( u) .
,
.
.
3.5

(
) Q,
() R. Q R
( R).

. Q
R . , .
; P Q free . , (free = False), . (free
= True), .
, free, .

3 . 5

49

1
var free : shared boolean ;
begin
free := true ;
cobegin
P repeat

Q repeat

repeat until free;

repeat until free;

free := false ;

free := false ;

[ R]

[ R]

free := true ;

free := true ;

forever

forever
coend
end

free . Q free . (, .., Q repeat until free ). , free ( )

R ! ( .)
: ,
. free, Pturn,
R. Pturn = True
( False Q).
2
var Pturn : shared boolean ;
begin
Pturn := true;
cobegin
P repeat

Q repeat

repeat until Pturn ;

repeat until (not Pturn) ;

[ R]

[ R]

Pturn := false ;

Pturn := true ;

forever

forever

KEAAIO 3:

50

coend
end
H 2 , Pturn true
( false) .
R Q , ,
. , .., P R,
,
Q , R . loors ( repeat until), (busy waiting).
A 3.2

;

,
boolean . :
(), () , , ,
.
3
var Pturn , Qturn : shared boolean ;
begin
Pturn : false ; Qturn := false ;
cobegin
P repeat

Q repeat

Pturn := true ;

Qturn := true ;

repeat until (not Qturn) ;

repeat until (not Pturn) ;

[x R] ;

[x R];

Pturn := false ;

Qturn := false ;

3 . 5

forever

51

forever
coend
end

A 3.3
: R. ( ), , . ,
: ;
1
2 :
;
.
_______________;
_______________.
.
_______________ .
A .
( ) 2,
Pturn, Qturn, .

A 3.4
3. ; ;

Dekker
1965.

KEAAIO 3:

52

4 (Dekker)
var outside 1, outside 2 : shared boolean ;
turn : shared 12 ;
begin
outside 1 : true ; outside 2 := true ; turn := 1 ;
cobegin
P repeat

Q repeat

begin

begin

repeat

repeat

outside 1:= false ;

outside 2:= false ;

repeat

repeat

if outside 2 then go to enter ;

if outside 1 then go to enter ;

until turn = 2 ;

until turn = 1 ;

outside 1: = true ;

outside 2: = true ;

repeat until turn = 1 ;

repeat until turn = 2 ;

forever ;

forever ;

end

end

enter P inside ;

enter Q inside ;

[ R] ;

[ R] ;

turn: = 2 ;

turn: = 1 ;

outside 1:= true ;

outside 2:= true ;

P outside ;

Q outside ;

forever

forever
coend
end

Dekker R. Dijkstra
n .
:
Dekker
. . -

XXX

53

. , ,
, .

A 3.5
:
outside 1 := false /* 1
R */.
If outside 2 then goto enter /* 1 2 R.
.
outside1, outside2 turn
1; 2; ; turn
,
2;
. , loop :
(enter)
TON . .
(turn = 2)
(out 1 = True)
.

; ;

A 3.6
Dijkstra Hansen (1972)
region u do S.
. compiler ;
. Dekker -

KEAAIO 3:

54

. . , region u do S Dekker ( ) .
. Dekker .
:
. (, compiler .)
. .. Dekker:
var R : shared T ;
cobegin
P

repeat

repeat

region R do [ R];

region R do [ R];

forever

forever
coend

. Dekker.
,
, .
, .

A 3.7
. (noop = )
var flag: shared array[0..1] of boolean; /* FALSE */
turn : shared 0..1;
pi (i = 0 1. i = 0, j = 1, ).
repeat

XXX

55

flag[i] = TRUE;
while (turn != i) do begin
while (flag[j]) do noop;
turn := i;
end

flag[i] = FLASE;
until FALSE;

, p0 p1, . :
turn := 1,
P0:

flag[0] := true;

P0:

while (turn != 0)

P0:

while (flag[1])

P0:

turn := 0;

P0:

P0:

flag[0] = false;

P1:

flag[1] := true;

P1:

while (turn != 1)

P1:

while (flag[0])

P0:

flag[0] = true;

P0:

while (turn != 0)

P0:

P1:

turn = 1;

P1:

].

KEAAIO 3:

56

3.6

A 3.8
3
(Pturn = true)
.
,
, .
( ),
, , . 3 ;
:
repeat until (not Qturn)
repeat
begin
Pturn := false;
;
Pturn := true;
end ;
until (not Qturn) ;
( Q),

[, , (Q)
Q (P)].
2. ,
R ( , , , ) (indefinite postponement).
indefinite postponement,
(fair).
3. :

3 . 7 ( )

57

) ,
: .
) , : .
) .

3.7 ( )
3.7.1

P C, P
C, C
(Producer, Consumer). , (messages). P C , (P) (C) (..
C ). ,
,
. (buffer) (. 3.2). O
.
3.2

, :
1. .
2.
.
:

KEAAIO 3:

58

()


.
.
. , ,
var B: buffer max of T;
, max , .

send (M,B);
,
receive (M,B);
.
send receive ( ),
, send receive
.
: send, receive (by value) (by reference)
A 3.9
. send receive;

3.7.2 (Semaphores)

3 . 7 ( )

59

.
, ,
. , ,

. (semaphore). :
var v: semaphore;
send receive
signal (u) [ V(u)] wait (u) [ (u)].
V ( ) , . P V
, .
A 3.10
V(u) P(u) sent receive.
u 3 :
1. s(u):
2. r(u):
3. c(u):
.
:
0 r(u) s(u) + c(u) r(u) + maxint
maxint .
, , u,

u = s(u) + c(u) r(u)
[ u = c(u)].
:
1. P(u) [ wait(u)]: P(u) u > 0, u := u1 P(u) .

KEAAIO 3:

60

P(u) u = 0, u, qu,
.
2. V(u) [ signal (u)]: To V(u) u 1 qu ,
,
( pcb qu
ready queue), P(u)
, 1 u.
qu ( , ,
). ,
qu .

3.7.3

var R : shared T ;
cobegin
process P1
region R do S1

process P2
region R do S2

...
...

process Pn
region R do Sn

coend
P V :
var R : record content : T;
mutex : semaphore;
begin
mutex := 1;
cobegin
P1

Pn

begin begin
wait (mutex); wait (mutex);

3 . 7 ( )

61

S1; Sn ;
signal (mutex); signal (mutex);
end end
coend
end
:
wait (P) signal (V),
0 s(mutex) r(mutex)
,
0 r(mutex) s(mutex) + 1

0 r(mutex) s(mutex) 1
r(mutex) s(mutex)
P V,
. , (1)
.
:
A 3.11
1. , , ( ).
: , .
Dekker.
,
hardware,
memory interlock, . ,
,
hardware.

KEAAIO 3:

62

2. region v do S P
V, Compiler .

A 3.12


mutex :=1

wait(mutex);

signal(mutex);

S;

S;

wait(mutex);

wait(mutex);

(A)

(B)

() ()
;
:
H () . ()
.

A 3.13
,
.
,
()
. ,
. .

.

3 . 7 ( )

63

:
#define TRUE 1
#define FALSE 0
typedef int semaphore;
semaphore mutex =1; /*
*/
semaphore west = 1; /* */
semaphore east = 1; /* */
share int west_count = 0, east_count = 0; /*
*/

void east(void) {

void west(void) {

while (TRUE) {

0while (TRUE) {

wait(&east);

wait(&west);

east_count++;

west_count+;

if(east_count ==1)

if(west_count==1)

wait(&mutex);

wait(&mutex);

signal(&east);

signal(&west);

move_east();

move_west();

wait(&east);

wait(&west);

east_count;

west_count;

if(east_count == 0)

if(west_count == 0)

signal(&mutex);

signal(&mutex);

signal(&east);

signal(&west);

}
}

}
}

KEAAIO 3:

64

A 3.14
, .
(.. )
, ,

.
:
#define TRUE 1
#define FALSE 0
typedef int semaphore;
semaphore mutex = 1; /*
east_count west_count*/
semaphore turn = 1;/*
*/
share int west_count = 0, east_count = 0; /*
*/
share int flag = 0; /* */

void east(void) {

void west(void) {

while (TRUE) {

while (TRUE) {

wait(&mutex);

wait(&mutex);

east_count++;

west_count+;

signal(&mutex);

signal(&mutex);

if(flag ==0){

if(flag==1) {

move_east();

move_west();

wait(&mutex);

wait(&mutex);

east_count;

west_count;

3 . 7 ( )

if(west_count != 0)

if(east_count != 0)

flag = 1;

flag = 0;

signal(&mutex);

signal(&mutex);

}
}

65

}
}

3.7.4

, .

var u : shared T
region u do
begin
So ;
await B;
S1
end
boolean , u.
u,
Qu ( u).
, ,
.

KEAAIO 3:

66

, B(u)
( wait). , S1
. ,
, Qe,u [event queue Q(e,u)].

Qu. await
boolean . ,
Qe.
, Q(e,u) Qu,
.

Qe,u

Qe,u

3.3

3 . 7 ( )

67

A 3.15
1. ;
;
2. Qu
;
:
1.
u,
.
2. Qu FIFO;

3.4

A 3.16
.
c
. full
, empty, .
1. .
2. .

KEAAIO 3:

68

:
full (
) . full = 0. empty . empty = max.

type B = shared record

/* record*/

buffer : shared array 0max 1 of T ;

p, c : shared 0max 1;
full : shared 0max 1;

p = c = full = 0;
procedure send (m : T ; var b : B) ;
region b do
begin
await full < max ;
buffer (p) := m ;
p := (p +1) mod max;
full := full + 1;
end
procedure receive(var m : T; b : B);
region b do
begin
await full > 0;
m := buffer(c);
c := (c + 1) mod max;
full := full 1;
end

3 . 7 ( )

type B = record
v : shared record
buffer : shared array 0max 1 of T;
p,c : shared 0max 1;
full, empty : semaphore;

p = c = full = 0;
empty = max ;

procedure send (m : T; var b : B);

begin
with b do
begin
wait (empty);
region u do
begin
buffer (p) := m ;
p:= (p + 1) mod max;
end
signal(full);
end
end

procedure receive (var m : T; b : B) ;

begin
with b do

69

KEAAIO 3:

70

begin
wait (full) ;
region u do
begin
m: = buffer(c);
c: = (c + 1) mod max ;
end
signal (empty);
end
end

3.1:
:
( )
(.. multimedia web document).
, . , .
(,
, , ,
, ).
:
:
1. multimedia web document
2. , ( )
3. document
.
document ( )

3 . 7 ( )

71

.

ar =
rr =
aw =
rw =
ar = rr = aw = rw = 0
:
1. 0 <= rr <= aw 0 <= rw <= aw rw <= 1
2. not (rr > 0 rw > 0) ( ) rr*rw = 0
3. (rr = 0 rw = 0)
4. (ar > 0 aw > 0) (rr > 0 rw > 0) ( )
5. .
( aw = 0).

A 3.17
. grant reading,
,
grant writing, .
( , !
,
. .
.
:
()
type T = record
ar, rr, aw : shared integer ;

KEAAIO 3:

72

var u : shared T ;
reading, writing, w : semaphore ;

ar = rr = aw = rw = reading = writing = 0, w = 1.

cobegin
begin reader
region u do
begin
ar : = ar + 1 ;
grant reading (u, reading);
end
wait (reading);
read ;
region u do
begin
rr := rr + 1;
ar := ar 1;
grant writing (u, writing) ;
end

end
begin writer
region u do
begin
aw := aw + 1;
grant writing (u, writing);
end

3 . 7 ( )

end
begin writer
region u do
begin
aw := aw + 1;
grant writing (u, writing);
end
wait (writing);
P(w);
write;
V(w);
Region u do
begin
rw := rw + 1;
aw := aw 1;
grant reading (u, reading);
end

end

coend

procedure grant reading (var u : T ; reading : semaphore) ;

begin
with v do
if rr = 0 then
while rw < aw do

73

KEAAIO 3:

74

begin
rw : = rw + 1;
signal (writing);
end
end

var u : shared record
rr, aw : shared integer

rr = aw = 0
cobegin
begin reader
region u do
begin await aw = 0; rr := rr + 1 end
read;
region u do rr := rr 1

end
begin writer
region u do
begin aw = aw + 1 ; await rr := 0 end
write;
region u do aw := aw 1;

end

coend

3 . 7 ( )

3.7.5

S s
( true
false [ 0 1]) mutexS, delayS, ( V
).
mutexS, delayS : binary semaphore;
S : semaphore;
NS : shared integer;
mutexS = 1, delayS = 0, NS = S;

cobegin
egin P (S)
P (mutexs);
Ns : = Ns 1;
if Ns <= 1; then
begin
V(mutexs);
P (delays);
end
else V(mutexs);
End

egin V (S)
P(mutexs);
Ns : = Ns + 1;
if Ns < 0 then V(delays);
V(mutexs);
End

75

KEAAIO 3:

76

A 3.18
P V
.
; 0
1;

V(mutexs);
P (delays);
P;
:
P P, V V P V.
( !). 3.7.2.

P V; .

3.7.6 V hardware

1
. .
, , , 1
. To hardware / :
testandset, (
)
var X : shared boolean
X : true;
:
egin P(S)

3 . 7 ( )

77

L: if TS(S) then go to L ;
End

Begin V(S)
S: = false;
End

A 3.19
FA(m,r) m
r m
m.
FA .
:
procedure FA (var m: integer, r: integer)
var temp: integer;
begin
temp := m;
m := m + r;
return (temp);
end

FA :
var lock, key: shared integer;
noop .
procedure pi
begin
lock := 0;
key := 1;

KEAAIO 3:

78

repeat
while (FA (lock, key) > 0) noop;
;
lock := 0;

until false;
end
:
( 3.5);
:
. ,
, ,
, ,
.
FA .
:
var lock: shared integer;
var waiting: shared array[0..n1] of boolean; false.
noop .
procedure pi
var j: integer; (j: 0 .. n1)
key: integer;
begin
key := 1;
repeat

3 . 8

waiting[i] := true;
while (waiting[i] and (FA (lock, key) > 0)) do noop;
waiting[i] := false;
;
j := (i + 1) mod n;
while ((j != i) and (!waiting[j])) do
j := (j + 1) mod n;
if( j == i) then lock := 0;
else waiting[j] := false;

until false;
end

3.7.7

Monitor: ,
, .
(Event Queues)
:
var e : event u
( e u).
( u) e
: await (e).
( (e) Qu u, : cause (e).
monitors .
3.8

. () Block Wakeup.

79

KEAAIO 3:

80

A 3.20
;
;
:

. , ,
. , , . ,
,
.
PCB i boolean wakeup waiting
wws(i). block wakeup :
Block (i):
if (not ww(i) then Block process(i)
else wws(i) := false;
Wakeup(i):
If ready (i) then wws(i) := true
else Activate process (i);
Block process(i) i . Activate i
ready queue. ready(i) true i
running ready. false .
Block Wakeup , .

3.9

. ,
, . .

3 . 9

,
. , :
1. (local) , ,
2. (specific flags), /
,
.
, Pi : ()
()
. , flags, .
. ( flags)
(
testing),
.
O
. , , : , .. (breakdown)
.
3.9.1 (The Bakery Algorithm)

Lamport 1974. ( ) ,
.
P0, P1,, Pn1 , .
, ( ) .

81

KEAAIO 3:

82

:
var choice : array [0(n1)] of boolean;
number array [0(n1)] of integer ;
false 0 .

choice [i], number [i]
flags Pi. Pi
. j (j i) .

[(a,b) < (c,d)] [a < c (a = c b < d)]

Pi ( j
Pi).
choice [i] = true ;
number [i] = 1 + max(number [0]+number[n1]) ;
choice [i] = false ;
for j = 0 to n 1, i j
begin
wait until not choice [j] ;
wait until number [j] = 0 or
(number [j], i) < (number [j], j)
end ;
;
Number [i] = 0 ;
( n 1
). value [i]
. (;)

YNOH

, . , , .

.

, . , .
,


: () ,
, () ()
.
3.4
Dekker, .

. (
), .
:

.
:
,
, ,

83

84

KEAAIO 3:

. send(M, B) receive(M, B),

.
.
(var u: semaphore)
, .
[ : signal(u) V(u)] [
: wait(u) P(u)] .
( )
, . , ,
.
, : , , monitor
,
test and set . , .

B I B I O PA I A

85

Andrews and Schneider, Concepts and Notations for Concurrent Programming,

Computing Surveys, vol. 15, March 1983, pp. 343.
BenAri, Principles of Concurrent Programming, Englewood Cliffs, NJ: Prentice
Hall International, 1982.
Dubois et al., Synchronization, Coherence, and Event Ordering in Multiprocessors,
IEEE Computers, vol. 21, Feb. 1988, pp. 921.
Silberschatz et al., Operating System Concepts, 3rd edition, reading, MA:
AddisonWesley, 1991.

Breakdown:

Buffer:

Busy waiting:

By reference:

By value:

Concurrent:

Consumer:

Critical region/section:

Deadlock:

Fair:

False:

Indeterminism:

(

)

Infinite postponement:

Memory interlock,
storage arbiter:

KEAAIO 3:

86

store ,

Message:

Monitor:

Mutual exclusion:

New line:

Producer:

Reader:

Resource:

Semaphore:

True:

True parallelism:

Writer:

(Memory Management)

, ,
:

/
(nonvolatility).
(
).
,
CPU, .

, , ,
. , ,
CPU. , CPU . ,
. 1,
. timespace tradeoffs (
)
( ).
,
. , ,
. tradeoffs,
, .
.
,
. ,

.

[1] .

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

88

, / . , . , / . . . . .
. , ,

.
/
, , . ,
.

, :
. ,

.
.
: , ,
, , ,
.


.

.
.
.


.
.

( )
.
.
.
.

.
; ( ) ;
;
. ;
.
. ,
. ,
, , ;
.

.
.

89

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

90

2, .
,
.
.
.
;

,
, ,


()
()

: ,

Round robin, FCFS

, , ,
( )

:
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8

91

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

92

4.1 (Preliminaries)

.
4.1, /
(/) .
bytes, bytes . ,
bytes ,
.
, .
byte m bits,
o m 2m = . CPU
I/O /
/ . , CPU (fetches)
(stores) .
4.1

KME

MNHMH

YTHMA~
E/E

(
). , . 4.2
.
, . ,
(source program) .
. ,
. , , . , , . . / []
(bind)

4.1 (PRELIMINARIES)

(relocatable addresses).
(object module), . , , ,
, ..
01110 = 14 byte
. (linkage editor) (loader), ,
(absolute addresses) (.. 000010000100000 = 1056 byte
32768 bytes).
(address space) .
/ , , ,
.
.
( ) . (instruction cycle).
,
. .
/ (

,
).
. (
), ..
( 4.5).
.

CPU.
.

93

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

94

M~
~

(Source Program)

(Compiler or Assembler)

(Object Module)

X~

(Linkage Editor)

~
module

(Load Module)

(Loader)

4.2

X~
E

(In-core core Image)

4.1 (PRELIMINARIES)

1. [2] /
R.[3]
2. PC[4] .
3. .
4. , .
5. , , CPU.
6. .
7. ( ).
8. 1 .

(operands) ( )
. 3 4

.
. [5]
(opcode) x bits (.. x = 8) . , bits
. bits
(,
, ) CPU. : (1)
, (2) , (3) . .
[2] (control unit) .
[3] IR (instruction register) CPU .
[4] PC (program counter register)
CPU ,
, .
[5] (opcode) .
(instruction set). O
,
, , ,
.

95

96

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

,
. , , ,
.
.
,
, / , / /
( ). , . ,


( 4.5.4), ( 4.6). /
, .
, .
.
. / , . , , ,
,
, . , .
4.2 (Bare Machine)

, 4.3, 4.4 4.5,

. .
,

4.2 (BARE MACHINE)

97

. ( 4.3).
0

XPHTH

4.3

32 K

. ,
. .
.
: .
, [6] (resident monitor) ( 4.3)
[7] (system calls)
. , (dedicated
systems),
.
[6] (interrupts) . ,
I/O. I/O
. I/O , chip
I/O. ,
.
[7] (system calls) ().
.
.

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

98

4.3 (Resident Monitor)

, ( )
( 4.4).
, , , .
, (..
, , , ..
/, , .. .).

. , bytes , bytes (
010 110 ,
) , bytes
. .
0
EOTH

E-1

(Fence Register)
IAIKAIA

M
4.4

Fortran Monitoring System 7094,

.
, CP/M.
4.3.1 (Protection Hardware)

(0 1). 1.

4 . 3 ( R E S I D E N T M O N I T O R )

99

( ) ,
.

. 4.5. ( )
(fence address).
, , . , .
(trap or interrupt)
( ). (
(.. This program has
performed an illegal operation and will be shut down) (memory dump) .

KME

> =~

A
MNHMH

.
,
, 995ns 980ns.

,
(effective access time).
, (monitor mode), .
,

4.5

100

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

, .
. (fixed constant). , 2116
(basic binary loader) 777008
777778 ( 32 bytes).
777008, .
, ,
,
, . ,
. ( ) . .. (buffer space)
(device drivers)[8]. ( ) ,
,
. (transient monitor code),
.
( ).
, .

.

(special privilege instruction).
.
.
4.3.2 (Relocation)

. -

[8] (device drivers)

/. .

XXX

101

0, ,
. .

. ,
(absolute code). . , , , . ,
(relocatable code). ,
. ,
. , , . ,
() , . ,
.
. PDP 11 4.6. , , .
.

0
EOTH

K
4.6
IAIKAIA

64 K

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

102

CDC6600
.
(dynamic relocation) , 4.7.
(relocation or base register).
, . , 1400,
0 1400, 346 1746.

K B

1400

4.7

KME

0346

MNHMH

1746

.
346, , , ,
346. (
) .
. (memory mapping hardware) .
, (moving)
.
, .
, , : ( 0 max) ( R+0 R+max R).
0 max. ,

4 . 4 ( S WA P P I N G )

103

.
( )
. I/O.

. (logical address
space) .
4.4 (Swapping)

, .
: CTSS
Q32.
. ,
( ) . 4.8
( 4.8).

EOTH

XPO~
IAIKAIA

E M

4.4.1 (Backing Store)

. .
,
, . (ready queue) -

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

104

. . , (dispatcher).
, , (swaps out)
(swaps in) .

, , .
. .
4.4.2 (Swap Time)

A 4.1
34 .
2.

:
. , , ,
: CPU I/O
. , 20 bytes (fixedhead drum) (average latency)
8ms (transfer rate) 250.000 bytes .
, 20 bytes :
8ms + (20K bytes / 250.000 bytes/sec) = 8ms + (2/25) sec
= 8 ms + (2000/25)ms
= 88ms

4 . 4 ( S WA P P I N G )

, 176ms.
Q32 10ms
363.000 bytes/sec, 130ms 20 bytes.
CPU,
. , .. round robin ( 4.5) CPU (time
quantum) 0,176 .
(transfer time).
. 32, 12, 20. ,
4. 4 24ms
88ms 20. , . ,
. , (dynamic memory requirements)
(.. request memory / release memory), .
. , Large Storage (LCS)
IBM Extended Core Storage CDC. LCS
8ms 400.000 bytes/sec. 100ms
20. To ECS 3ms 10.000.000
bytres/sec. , 20K 4ms.
(.. mass core, mass semiconductor bubble ) . 27 .
4.4.3 (Overlapped Swapping)

. 4.9. . , CPU (idle) -

105

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

106

. ,
1 2.
4.9

E
X E

A 1
A 2
~

A 4.2

. ;
, : (buffer).

, CPU,
2 . ,
. , 2 ,
4.10. ( )
2. ,
(memorytomemory swap).

4 . 4 ( S WA P P I N G )

107

E
A 1
4.10

K
A 2
~

A 4.3
;
:
1 () 2. 2
( ) 1, CPU /
/ .

. ECS
, (memory cycles) CPU. , CPU ECS, CPU .
, CPU , .
CPU.
.
, . I/O . I/O,
. , , I/O,
, I/O, . I/O
I/O . 1

108

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

2, I/O .
: () I/O
(pending I/) () I/O . .
4.5 (Multiple Partitions)

(configuration) : CPU
.
; (regions)
(partitions), .
(..
).
, ,
. , , , . ()
( ) (
,
). , , () .
, (scheduler)
, .
. ,
II.
, .
(ROUND ROBIN)

O , . ,

4 . 5 ( M U LT I P L E PA R T I T I O N S )

109

(quantum), . , CPU .
, CPU .
(FIRST COME
FIRST SERVE FCFS)

/
. ,
, . , , CPU /.
4.5.1

:
, . ( 4.3.2).
( 4.10 4.11) . .
0
E
1

2
4.11

4
128 K

(bound registers).
(. = 174640). .

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

110

(base and limit registers). (range)

(.. = 100040 = 74600).
, 0 ( + ).
4.12,
.
(assembly time). .
, ,
. .
CDC 6600 .
4.12

()
() ()

NAI

>=

KME

NAI

<

OXI

MNHMH

OXI

KME

NAI

<

NAI

+
OXI

MNHMH

4 . 5 ( M U LT I P L E PA R T I T I O N S )

4.5.2 (Fixed Regions)

,
. , 32
:
10
4
6
12


, .
, , , .
, .
CPU. , , .
. , . ( ). , , .. (prepass)
(
, .
, , ).
( 4.13). (job
classification) ,
.

111

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

112

2K

1K

2K

Q2

E
2K

4.13

3K

4K

6K

Q6

12 K

7K

11 K

8K

Q12

A 4.4
.
2, 6 12, , Q2, Q6, Q12, , .
5, 10 2.
;
:
Q6,
Q12 , , Q2.
.
, , .
(
4.14).
. FCFS , 4.14
2, 6, 12.
4.14

4K

E
2K
1K

7K

7K

3K

2K

5K

6K

12 K

4 . 5 ( M U LT I P L E PA R T I T I O N S )

113

A 4.5
;
:
1 6 2
2. 3,
6, 1 ( 3 1). 4 3 ( FCFS),
4 ( 12).
.

. , ,

( ),
.

A 4.6
;
;
:

, .
()
.

: 3 3; 3 12. 3
6, . 3

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

114

12 ( ) , 4, (
12) ; 4, 3 , 4 ; 12
( )
;
(bestfitonly)
(bestavailablefit).
( )
, .

A 4.7
.
; ( )
.

. ,
. , 4 ,
round robin CPU. ,

. ,
CPU
. , ,
.
CPU CPU.

(priority base scheduling
algorithms). -

4 . 5 ( M U LT I P L E PA R T I T I O N S )

115

, , . , .

.
.
( ),
. ,
/ ,
.
2 , . .
A 4.8
.
:
4 6.
,
6 ( ) .

. 6 , 4. ; :
.

,
(runtime error).
(return control)
(status indicator) . ,
. -

116

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

: , ( ) .
: (1) , (2) , (3)
(4) .
, (: ;), , .
,
, . 12 8, 8 .

(Regions Size Selection)

. 32 10, 22 . .
(256) , , .
,
.
. ,
. , batch
I/O ( 1 3), 8
FORTRAN 4 :
10
4 I/O .
4 ,
10 14 4 8 4 6.

4 . 5 ( M U LT I P L E PA R T I T I O N S )

117

,
. .

. , , (multiprogramming level).
.
, CPU
( 100%).
.
, , .

A 4.9
2M Bytes , 512.
60% , 1byte;
:
2Mbyte. 512 , 3 ( 512). CPU
: 1 (0,6)3 = 78,4%.
1Mbyte,
5 CPU 1 (0,6)5 = 92,224%.
CPU
, :
78,4

100

= 13,824 * 100 / 78,4 = 17,632%

13,824

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

118

4.5.3 (Memory Fragmentation)

m n
bytes, n m. (n m)
(internal fragmentation),
. (external
fragmentation) ,
.
.
A 4.10
, 22,
10 4. 7, 3, 6 6, .
:
7 10 (
3 ) 3 4 ( 1 ). ,
4 , 8 . , , 12,
.
, , .

A 4.11

10, 8 4. 7, 3,
6 6 ,
.
:
7 8
3 4 , 2 .

4 . 5 ( M U LT I P L E PA R T I T I O N S )

, 6
( 10 )
10. , 4 , . , 4 , .

4.5.4 (Variable Partitions)

. , ,
, . , 120 20, 80
. 80
, , 20, 60 ( ) , .

. To
:
. , , (hole).
,
, .
, 256 40, 216 ( 4.15).
FCFS , 1, 2 3, (memory
map) 4.16 (). 26. round robin CPU , 2
14, [ 4.16 ()].

119

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

120

, 4, .
4.16 (). 1 28 [ 4.16 ()] 5 [ 4.16 ()].
. ,
, .
,
, .
, , . (adjacent)
, ,

.

O E
E

40 K

216 K

1~

60 K~

10~

2~

100 K~

5~

3~

30 K~

20~

4~

70 K~

8~

50 K

15

4.15

256 K

4 . 5 ( M U LT I P L E PA R T I T I O N S )

0
E

0
E

40 K

40 K
E 1

40 K
E 1

E 1

100 K

100 K
E 2
200 K

121

100 K

T~

K~

E 2

E 4
200 K

E 3

E 4
170 K
200 K

E 3

230 K

230 K

256 K

256 K
()

E 3

230 K
256 K
()

()

0
E

40 K

40 K
E 5
90 K
100 K

100 K
E 4

T~
E 1

200 K

E 3

230 K

E 4

K~
E 5

170 K

4.16

170 K
200 K

E 3

230 K

256 K

256 K
()

()

, 4.3.2. /
(firstfit) (bestfit).

A 3.20
;

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

122

( ), . ,
CPU
, .
.
.

4.17. 18.464 bytes. 18.462 bytes, ; , 2 bytes. (overhead)

.
. ,
,
. , CDC 6600
64 bytes, IBM 360 2 PDP11
8 bytes.

E 7

T 18.464 bytes

4.17

2
bytes

E 43
H 18.424 bytes

,
. , -

4 . 5 ( M U LT I P L E PA R T I T I O N S )

123

. .
,
()
.


.
CPU, .
(memory utilization)
.
.
A 4.13
;

. 4.16
. 4.16 () 26,
. 4.16 () 56 (= 30 + 26).
5 ( 50),
.
.
, . Knuth .
A 4.14
.

,
. -

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

124

A 4.15

;

, .

A 4.16

.

A 4.17
: 10, 4, 20, 18, 7, 9, 12 15. ,
: 12, 10, 8, , ,
;
:
: 10, 4, 20, 18, 7, 9, 12, 15
\

.
. . .
12

10

4 . 5 ( M U LT I P L E PA R T I T I O N S )

125

4.5.5 (Compaction)

,
, . , 4.16 ()
4.18. 10, 30 26
66.
0

0
E

40 K

40 K
E 5

90 K
100 K

E 5
90 K

10 K

E 4

E 4

160 K
170 K
200 K

30 K
E 3

230 K
256 K

E 3

190 K
66 K

26 K

4.18

256 K

. 4.18 4 3 . ,
.
A 4.18
;
:

.

( CDC 6600),
, .

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

126

, .

: ,
. .
4.19.
, 3 4, 600.
0

0
E

300 K

E
300 K

E 1
500 K
600 K

E 2

E
300 K

E 1
500 K
600 K

E 2

E
300 K

E 1
500 K
600 K

E 2

E 1
500 K
600 K

E 2

E 3
E 4

800 K
E 4

1000 K

1000 K

E 3
1200 K

900 K

E 3
1200 K

1200 K

1500 K

1500 K
900 K

E 4

900 K

1900 K

E 4
1900 K
E 3

2100 K

2100 K
A~
K

4.19

2100 K
M~
600 K

2100 K
M~
400 K

M~
200 K

.
, SCOPE CDC 6600 .

4 . 5 ( M U LT I P L E PA R T I T I O N S )

127

. , .
,
.

A 4.19
,
bytes ;

.
:
, 4
3, 400, 3 4, 200.

. , ,
450, 2 (..
4).
, .

, PDP1,
. PDP1
/ .
bit .[9] / / 0, / / 1. ,

( )
. Bits
( ) . ( )

[9] bit bit .

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

128

. .
Univac 1108 ,
. CPU , CPU
/ / .
CPU / . , Univac 1108 / : .
/
(automatically readonly),
.
,
, . , , ,
, , (editors) .
4.6 (Paging)

. . ,

A 4.20
;
, .
: (1) , , . (2)
. .
. ,
. .

4 . 6 ( PA G I N G )

129

4.6.1 (Hardware)

512 bytes, 0 512.

0 17777778. 1 bytes (.. 1
bytes). . , 512 .
0 17777778 (
19 ). , . ,
512 . 9 bits
. 1, 10 bits byte .

A 3.21
9 bits 512
10 bits byte 1;
:
29 = 512 210 = 1024 = 1 bytes.

19 bits byte 2 . 9 bits 10

.

A 4.22
13572468;
: 13572468 = 1 011 101 111 010 100 1102
= 101110111 1010100110
= 567 1246 , 5678 12468.

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

130

, 0
1777777, , , + 1777777,
512 , /, . , 512 ,
512 ,
()
512 ,
,
. .
, .
4.20.
CPU : (p) (page number) (d) (page offset).
(page table).
.

KME

p
4.20

.
4.21.
, (frames).
,
(pages). , .

4 . 6 ( PA G I N G )

131

0
1

4.21

3
M

.
, , , .
.
( ) . 2. , IBM 370 2048 4096 bytes/, o XDS940 2048 bytes/. Atlas Sigma
7, , 512 bytes ( 4.22). , , , U, ,
p, (offset), d, :
p U div P
d = U mod P
div mod . 2 .
2n (bytes), n bits

bits . , 2, .

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

132

4.22

bits

Bits

Atlas

20

11

DEC10

18

Sigma 7

17

Nova 3/D

15

10

XDS940

14

11

IBM 370

24

13 12

11 12

Vax

32

21

SPARC

32

20

12

68030

32

21

11

( , 256),
4.23. 4 bytes
32 bytes (8 ),

. 0 0, 0. 0 5. , 0 20 (= 5 4 + 0). 3 ( 0, 3) 23 (= 5 4 + 3). 4
1, 0: , 1 6. , 4 (6
4 + 0) = 24. 13 9.

(relacation).
.
4.6.2

, . , , n . n , .
( )
( 4.24).

4 . 6 ( PA G I N G )

133

0~
1~
2~
3
4~
5~
6~
7
8~
9~
10~
11
12~
13~
14~
15

a~
b~
c~
d
e~
f~
g~
h
i~
j~
k~
l
m~
n~
o~
p

i~
j~
k~
l
m~
n~
o~
p

12

16

20

24

a~
b~
c~
d
e~
f~
g~
h

28

4.23

32 bytes
4
bytes

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

134

13
E

14

14

15

13

16

18

17

20

18

15

19

N E
0~
1~
2~
3

20
21

()

13
E

14
15
15
N E

16

14

17

13

18

18

19

20

20

4.24

: ()
()

N E

21
()

0~
1~
2~
3

4 . 6 ( PA G I N G )

135

A 4.23

;

A 4.24
1. 8629 32 bits,
4 bytes.
512, 1, 2, 4, 8, 10;
;
2. bits P bytes.
;
3. k P bytes. () ; () (); ()
, , ; ()
,
; [ () . .]

4.6.3

, . CPU
, .
,
. XDS 940, 8
2048 bytes 8 . Nova 3/D
32 1024 bytes 32 . Sigma 7
8 bits, 256
. , 8 256 . -

136

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

, . K ,
.
. , DEC10 512 , 370
4096 , Multics 16.777.216 .

( ).
(Page Table Base Register PTBR) .
,
.
. i, PTBR i.
. , , .
, .
[10] (
). , , (;).
, , ,
, (assciative registers)
(cache) lookaside
(contact addressable memory). .
: . , .
, . , .

[10] bytes. , 4 8
bytes.

4 . 6 ( PA G I N G )

137

:

. CPU,
.
,
.
, . , . ,

, .

( ) . 8 16
85%, 0,85
. , 50ns
750ns
, ( ) 800ns . (50ns),
/ (750ns)
(750ns), 1550 ns.
A 4.25
; 90%
( );
:
(effective memory access
time), :
Effective access time = 0,80 800 + 0,20 1550 = 950 ns
26,6%
( 750 950ns). 90%
Effective access time = 0,90 800 + 0,10 1550 = 875 ns
16,6 %.

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

138

4.6.4

. 40 , . 30 5 , 1400
40 . , ,
(reentrant, pure code),
,
,
.
( ;).
4.25.
3 (3page editor)
. .

A 4.25
40
;
:
.
, . ,
40 (30), 40 5 . 230, 1400
.

4.6.5

, , , ,
. , ,
k , k ,

4 . 6 ( PA G I N G )

139

EK 1

EK 2

EK 3

DATA 1

~
E 1

DATA 1

DATA 3

E 1

EK 1

EK 1

EK 2

EK 2

EK 3

DATA 2

EK 3

~
E 2

DATA 2

E 2

8
EK 1

EK 2

10

EK 3

DATA 3

4.25

E 3

~
E 3

, ,
: ,
. 23 bits , . (J hardware
trap memory protection violation).
/ bit. bit , . ,
14 bits (0 16.383) 0 10.468. 2, 4.26.

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

140

0, 1, 2, 3, 4 5
. 6 7, / bit
( ).

/ bit
0

00000

12287
4.26

(v)
(i) bit

, 10.468,
. ,
5 , 12.287
. 12.288 16.383 . (2)
.
:
O XDS940 bit
.
0 . 0 , 0.

4 . 6 ( PA G I N G )

4.6.6 (Two Views of Memory)

. . ,
, .
.
.
.
.
, .
bits 2, 21 22.. 2,
. , , ( ),
.[11]
:
XDS 940, , 14 bits, 16 bits. 3 bits
5 bits. ,
4 . , 4 .
. mini 196070,
. , 15 16 bits.
mini . , 17 18 bits
, [11] , ,
2.

141

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

142

bits. ,
.
.
(15 16 bits) (17 18 bits)
.
.
, .
, Nova 3/D 5 bits
7 bits. HP 2100 . DEC10
9 bits 13 bits,
18 bits 22 bits.
To .
, :
, ,
. , , ,
. , ,
, .
,

. ,
. ( ) ,
. ,
CPU .

A 4.27
32 bits 8.
, 32 bits
. , , 100 nsec. 100 msec ( ), CPU -

4 . 7 ( S E G M E N TAT I O N )

143

;
:
,
bits ( ). , 8,
8 = 23*210 13 bits .
32 bits.
32 13 = 19 bits.
524.288 ().

(524288 * 100 nsec) = 52428800 nsec = 52.428800 msec.
100 msec 52.4288 msec
. CPU
52%.

4.7 (Segmentation)
4.7.1

, ( 4.27).

Stack
Symbol~
Table

SQRT
K~

Logical Address Space

4.27

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

144

.
, , . , , : , ,
(stacks), . . (symbol
table), Sqrt, ,
. Sqrt. ,
.
(offset) : , 17 , Sqrt .

. . .
. , : . ( ,
, ,
, .)
, . , ( ) ( ) ( ) , , .
Java, C++, visual basic, Pascal : (1)
(global) , (2) (procedure
call stack), , (3)
(4) . Fortran (common block).
(arrays) .
(loader) .
4.7.2

, ,

4 . 7 ( S E G M E N TAT I O N )

145

, , . , , ,
.
(segment table).
4.28.
: , s,
, d. .
(segment base)
(segment limit ). , d, 0 . ,
( ).
, . ,
, / .
4.28

KME

(s,d)

NAI

<

NAI

+
OXI

4.29. 5 0 4, .
, ( ) ( ).

MNHMH

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

146

Y~
T 0

SQRT~
T 1

Stack~
T 3

~
~
T 4

K~
~
T 2
1400
X

T 0
2400

1000

1400

3200
T 3

4.29

400

6300

400

4300

1100

3200

1000

4700

T 2

4300
4700

T 4
5700

T 1

6300
6700

A 4.28
( 2, 53),
( 3, 852), ( 0, 1222) 4.29;
:
2 400 , 4300. , 53 2 4300 + 53 = 4353.
3, 852 3200 (
3) + 852 = 4052. 1222 0 , 1000 .

4 . 7 ( S E G M E N TAT I O N )

147

4.7.3 (Implementation of Segment

Tables)

,
.
,
, . , PDP11/45 . 16 bits
3 bits 13 bits.
, 8 bytes ( 4.30).
,
bits , :
(noaccess), , .
15

13 12

A T

Burroughs B5500 32 , 1024 .

5 bits 10 bits.
,
( 1 ). , GE 645,
Multics, 256 , 64 .
,
, .
(STBR Segment Table Base Register) . , , (STLR Segment Table Length Register).
(s, d) , s, (s < STLR). STBR, (STBR + s) .
: -

4.30

PDP11/45

148

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

.
,
, , . . (8 16) .
4.7.4

.
, . , , . ,
,
.
(memorymapping hardware) bits
,
,
.
, , ,
. ,
.
. , (hardware segment table) CPU
. , ,
( 4.31).

4 . 7 ( S E G M E N TAT I O N )

149

E~
K
T 0

25286

43062

4425

68348

43062
E~
K

T~
(X 1)

T 1

68348
M (X 1)

72773

90003

E~
K
T 0

2
T 1

25286

43062

8550

90003

2
98553

M
T~
(X 2)
4.31

M (X 2)

. , .
,
.

A 4.29

. .
, .
.
. ,

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

150

,
, , . Fortran, , Sqrt, Sqrt .
, . , , .
, (conditional jump) (trasfer address). .
. , .
, Sqrt
4 17, Sgrt; Sqrt,
: .
,
.

A 4.30

;

( )
,
. ,

, ,
(direct reference) .
GE 645, Multics, 4 ,
, (stack

4 . 7 ( S E G M E N TAT I O N )

151

segment), (linkage segment) . , , . .

4.7.5 ( )

. , ,
. , ,
(dynamic storage allocation), .
,
.
, ( ), .
,
. CPU
, , (
) CPU , , .
;
;
. .
A 4.31
;
:
.
, -

152

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

. .
,
. ( , , . , , , .)
, .

4.8 (Combined Systems)

. . : IBM 360/67 ( 370) GE 645 Multics.

4.8.1 (Segmented Paging)

IBM 370/67 .
24 bits (1 byte) 12 bits (offset) 12 bits, / bit.
12 bits 4096 8 . , 32 bits
20 bits.
1.048.576 2.097.152 bytes.
, ,
. ,
. 4 bits . 268.435.456 bytes ,
4096 bytes. ,
( 4.32).

0.

4 . 8 ( C O M B I N E D S Y S T E M S )

153

p'
STBR

>=

OXI~

M~
~

B~
~

T~
~

MNHMH

T
4.32

, , , -
. 8 -
150ns , - IBM 360/67
(unmapped) (750ns) .

.
i
i + 1. .
4.8.2 (Paged Segmentation)

ultics . 18 bits (offset)

16 bits.
34 bits, , -

154

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

(STLR
Segment Table Length Register). (;)
.
, 64 , .
,
. ,
, .
. : . 4.33.

, (base
address) .
(segment affset) 6 bits
(page offset) 10 bits. . ,
.
. ,
, .
. , . , , , . , ,
.
.
Prime 500 12 bits (word offset) 6 bits 10 bits. RCA Spectra 70/46 5 bits
18 bits, 6 bits
12 bits .

4 . 8 ( C O M B I N E D S Y S T E M S )

155

4.33

>=
+

OXI

STBR

M~
T

GE 645
(Multics)

B~
~

d'

d'

T
~
s

MNHMH

Multics, , . 18 bits, 262.144 , . , Multics . , , Multics .

.
, .

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

156

/
.

.
CPU, ,
. .
( , , , , ,
, ) . :
. , , (mapping tables)
.
(Performance). ,
.
(;)
. . , , ,
. .
(Fragmentation). , . .
(allocation units),
, . , , .

YNOH

(Relocation). .
.
,
. , .
(Swapping). .
,
CPU,

.
.
(Sharing). . , ,
, ( ) . ,
.
(Protection). , ,
, . , , ,
.

157

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

158

Randell [1969]. To
(fixed partitions)
IBM OS/360, . (variable partitions) IBM OS/360,
.
Knight [1968], Madnick and Donovan [1974, Section (3. 3)], Hoare and McKeage
[1972]. Atlas [Kilburn et al. 1961, 1962]. XDS 940, Lichtenberger and Pirtle [1965]
Lampson et al. [1966].

Knuth, The art of computer programming vol. 1: fundamental algorithms, 2nd edition
reading, MA: AddisonWesley, 1973.
Silberschatz et al., Oretating system concepts, 3rd edition reading, MA:
AddisonWesley, 1991.

159

Absolute addresses:

Address space:

Affective access time:

Bare machine:

Base register:

Basic binary loader:

Bind:

Buffer space:

Control card:

CPU scheduling:

CPU

CPU utilization:

CPU

Dedicated system:

Device driver:

Dispatcher:

Dynamic relocation:

Fence address:

Fetch:

Indexing:

Interrupt vector:

Job sequencing:

Linkage editor:

Literal addresses:

Loader:

Logical address space:

Memory dump:

Memory mapping hardware:

K E A A I O 4 : ( M E M O RY M A N A G E M E N T )

160

Module:

Monitor mode:

Moving:

Operand:

Program counter:

Protection hardware:

Ready queue:

Relocatable addresses:

Relocatable code:

Relocation register:

Resident monitor:

Source program:

Special privilege instruction:

Store:

Stream:

Swap out:

Swap in:

Swap time:

System call:

Time quantum:

Transfer rate:

Transient monitor code:

Trap:

(Virtual Memory)

.
: ,
. , , , .
.
. ,
.
(demand paging) ( 5.2)
.

,
, . , . ,
.

, :
.
.
. ;
.

162

K E A A I O 5 : ( V I R T U A L M E M O R Y )

.
;

. ; ; ;


. ;


.
, .
. ;
Belady; ;
I/ .

.
;
( )
. .
. CPU
;
()
.

.

, ( ) : , , , , , , , ,
.

FIFO (First In First Out)

LRU (Least Recently Used)




Adhoc
elady

163

K E A A I O 5 : ( V I R T U A L M E M O R Y )

164

K
I

:
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9

5.1

165

5.1

. 4
,
,
,
0. :
( ) ( ) . : ,
() . : .

A 5.1

( 4) , , .
:
.
( ) ,
.
(array), (tables)
, .
100100, 1010. 3000 ,
200 .

, , ,
.
,
.

K E A A I O 5 : ( V I R T U A L M E M O R Y )

166

.

. ()
(virtual address space), .
, , (utilization) (throughput) CPU,
(response time)
(turnaround time).
I/O
, .
, .

:
(overlaying) . , (.. )
( , ).
: , ,
(,
.) .
5.2

(demand paging) ( 5.2). .

, ,
: ( ) . , , , .

5.2

167

14 K

K~
P

5K

O E

2K
5.1

~
A

E~

~
B

E~

10 K

10

11

12

13

14

15

16

17

18

19

20

21

22

23

K M

5.2

K E A A I O 5 : ( V I R T U A L M E M O R Y )

168

,
, , ( bit : [ 5.3]).
A

/ bit

0
1
2

0~
1~
2~
3~
4~
5~
6~
7

M
5.3

8
F

10
11
12
13

9
5

E M

14
15
16
M

A 5.2

;
:
, , . ,
, .

5.2

169

, (page fault).
,
4, :
. , (
)
, . , , , CPU.

A 5.3
5.4
bit .

1. H

4.

3. A

LoadM

2. E~


6. Reset~
Page~
Table

5. ~

5.4

K E A A I O 5 : ( V I R T U A L M E M O R Y )

170

:
() (PCB) , . ,
.
() , .
() , (..
).
() ,
().
() ,
.
() (illegal address trap).
.

(,
.) , ( ), ,
.
() .

:
,
/ bit bits .
, .

( cache
memory). , , -

5.2

.
. .
.
(instruction fetch), . , , .
, ADD
, C. :
() (ADD).
() .
()
() .
() C.
C (
C ), , . ,
,
. , (
) .
. , MVC ( ) 370, 256 bytes
( ) .
( ) ,
, . ,
, , .
,
. , .
, , .

171

172

K E A A I O 5 : ( V I R T U A L M E M O R Y )

,
,
.
. ,
. ,
.
PDP11,
,
(autodecrement) (autoincrement).
, .
(operand address),
. , : MOV ((R2) +,(R3)) 2
3. 2 ( ,
PDP11 bute ) , 3 ( ) .
3.
,
. PDP11/45
11/70 (SR1 Status Register 1)
.

.
, ,
.
: CPU
. ,
. , ,
(fatal error), -

5.3

.
5.3

. ,
(effective access time) .
(memory access time), ma, 100ns 2s. , ma. , ,
, .
p (0 p 1). p ,
. :
= (1p)x ma + p x
, .
:
1. .
2. ().
3. .
4.
.
5. :
.
(device
seek / latency time)1.
[1] latency seek time
.
.

173

K E A A I O 5 : ( V I R T U A L M E M O R Y )

174

.
6. CPU (cpu sheduling).
7. ( I/O).
8. .
9. .
10. ,
.
11. CPU .
12. , .
. , 5 CPU I/O. CPU,

I/O .
:
.
.
.
, , .
100 1000ns. 9ms. ,
8ms latency 1ms
(tranfer time). (
), (seek time).
30ms. ,
(device service time).
( ), (device queueing
time),

5.3

175

. , , .
. 1970
1msec 10msec, . 2000 100nsec 1000nsec .
, :

. ,
, ,
, .
A 5.4
1. : ,
, (
;), .
2. , p*N A
.
: ,
, . : p*N ( ), , .
, p , .
10ms
1s :
= (1 p) x (1 s) + p x (10 ms)
= ((1 p) + 10000 x p s
= (1+9999 x p) s

(page fault rate).
, 11s. 10 .

K E A A I O 5 : ( V I R T U A L M E M O R Y )

176

A 5.5

10%;
:
1,10 > 1 + 9999 x p
0,10 > 9999 x p
p < 0,00001
,
, 100.000
.

. , , .

A 5.6
/ 1sec. 2 . 90%
, . ,
, 0,5sec.
20msec. 1,2sec.
:
,
:
0,9 * 1sec + 0,1 * (1 + 0,5) sec
= (0,9 + 0,15) sec
= (1,05) sec
f . ,

5 . 4

:
1,05 sec * (1f) + (1,05 sec + 20 msec)f
= 1,05 sec 1,05f sec + 1,05f sec + 20000f sec
= 20000f sec + 1,05 sec
1,2sec.

20000f sec + 1,05 sec < 1,2 sec

f < (1,2 1,05) / 20000 sec
f < 0,15 / 20000 sec].

5.4

, , , ,
, .
. ,
, I/O . ,
.
, , ,
( )
.
,
( ). ,
, ,
CPU (throughput)
. ,
,
, ,
. ,
,

177

K E A A I O 5 : ( V I R T U A L M E M O R Y )

178

. ( ,
,
;)
:
, .
, .
,
( 5.5).
/~
bit

LoadM

M
M~
X 1

PC
3

1
i
~
X 1

LoadM

B
M

/~
bit

E M
6

v
i

E
M~
X 2

~
X 2

5.5

:
1) . , -

5 . 4

,
.
2) , . 5.8.1,
(page replacement).
3) : , .

( 5.6).
. , , :
1. .
2. .
() , .
() ,
(victim frame).
() , .
3. , .
4. .

179

K E A A I O 5 : ( V I R T U A L M E M O R Y )

180

/ bit

3. E~
~
-~

2. A ~

g 0

1. E~
~
~

4. E~
~
~

E M

M
5.6

, ,
( ).
, ,
.
bit
. ,
,
.

A 5.7
bit dirty bit.

5.5

. .
. -

5 . 5

181

. 20 10 ,
/
. ,
.
. , , .
. ( 5.7).
,
, . .

0
1

E M
5.7

n
I M

X M
M

182

K E A A I O 5 : ( V I R T U A L M E M O R Y )

.
, Multics, , (segments) .
, , . (demand
segmentation)
Burroughs .
.
:
.
5.6

,
() .

,
(reference string). (.. )
. (
sec). :
, ( )
.
, p, ( ) p . p , . , , :
0100, 0432, 0101, 0612, 0102, 0103, 0104, 0101, 0611, 0102, 0103,
0104, 0101, 0610, 0102, 0103, 0104, 0101, 0609, 0102, 0105
100 :
1,4,1,6,1,6,1,6,1,6,1

5 . 6

183

,
. , , . , ,
, , . , , , 11 . , 5.8.

A ~

5.8

,
:
7,0,1,1,0,3,0,4,2,3,0,3,2,1,2,0,1,7,0,1.
5.6.1 FIFO

FirstInFirstOut
(FIFO),
.

,
(. 5.9). (7,0,1)
. -

K E A A I O 5 : ( V I R T U A L M E M O R Y )

184

(2) 7, . 0
0 , .
3
0, (0,1 2) .
0
. , 1 0. 5.9. . 15 .
A A~
70120304230321201701

7
5.9

FIFO

FIFO
. .
. .

A 5.8
. () ; ()
; () ;
:
,
(
), .
, . ,
. ,

5 . 6

185

, .

A 5.9
FIFO ,
:
1,2,3,4,1,2,51,2,3,4,5
. 3 1;
:
5.10
.
(10) (9).
Belady (Beladys
anomaly). . ,
. Belady.
16
14
12

A~ 10
~
8

(9)

6
4

5.10

FIFO

K E A A I O 5 : ( V I R T U A L M E M O R Y )

186

5.6.2 (Optimal Replacement)

() ; , , Belady. (optimal algorihm) OPTIMAL .

:
. , , .

.
, ,
5.11.
. 2 7, 7
18, 0
5 1 14. 3 1,
1 .
,
FIFO, . (
, FIFO . , k , k ).
. (
.)
7

0
7

5.11

0 3

0 4

2 3 0

3 2 1

2 0 1 7

0 1

,
(
CPU
(ShortestJobFirst), ).
.

5 . 6

187

5.6.3 LRU (Least Recently Used)

, . FIFO OPTIMAL
( ) FIFO
, OPTIMAL
.
,
( 5.12).
(Least Recently
Used LRU).
LRU . , LRU
. .
A 5.10
. , , , LRU OPTIMAL .

LRU 5.12. LRU 12 .

7

0
7

0 3

0 4

3 2 1

2 0

1 7

0 1

7
5.12

. Least Recently
, , 4, LRU , - Used , 2 -
. 0

188

K E A A I O 5 : ( V I R T U A L M E M O R Y )

3. , LRU 2 . 2, LRU 3, 0,3,4

3 . , LRU 12 FIFO
15 .
LRU
. , . .
(Counters). , CPU .
, (clock register) , .
. .

. ,
( CPU). ,
.
(Stack). LRU Stack . ,
stack . ,
stack
stack
( 5.13). stack,
(head)
(tail).
stack , , . , ,
stack, .
LRU (microcode).

5 . 6

189

A~
4 7 0 7 1 0 1 2 1 2 7 1 2

T stack

T stack

LRU
Belady. ,
(stack algorithms),
Belady.
n
n+1 .
LRU, n . , n
, .
LRU
. . , 10,
.
.
5.6.4 LRU

LRU . ,
( FIFO).

5.13

stack

K E A A I O 5 : ( V I R T U A L M E M O R Y )

190

bit (reference bit). bit

( byte
). bits
bit . (clearing) bits.
bits .
, bit (
1) .
, bits .
, .

LRU .
5.6.5 Bits

bits
. byte 8 bits
. (.. 100ms),
(timer interrupt) .
(shifts) bit bit
byte 8 bits, bits bit
bits. 8 bits . 00000000,

11111111 .
11000100
01110111. bytes 8 bits
, . . (
) FIFO
.
bits (history bits) , .
, , bit
. .

5 . 6

191

5.6.6

(second chance replacement)

FIFO . ,
bit . 0, . bit
1, FIFO . ,
bit . (
). , bit 1, .

. .
, bit
. , bits
( 5.14). , bits 1, . bits . bits 1, FIFO.
Bit~
A

Bit~
A

5.14

()

()

5.6.7

(Least Frequently
Used LFU)

K E A A I O 5 : ( V I R T U A L M E M O R Y )

192

. .

. .
, ,
. bit
, .
5.6.8

(Most Frequently Used MFU),
. MFU LRU
. .

A 5.11
:
) FIFO (First In First Out) LRU (Least Recently Used).
) Random (
) LRU.
) LRU LIFO
(Last In First Out).
:
4 .
) 1:
1 = [ 0, 1, 7, 2, 3, 2, 7, 1, 0, 3]
FIFO 6 . .

5 . 6

1 :
0
0 0
1 1
2
3

193

1
0
1
7

7
0
1
7
2

2
0
1
7
2

3
3
1
7
2

2
3
1
7
2

7
3
1
7
2

1
3
0
7
2

0
3
0
7
2

3
3

LRU 7 . .
1:

0 0

7
2

7
2

7
2

7
2

7
2

7
2

7
2

2
3

) 2.
2 = [ 0, 1, 7, 2, 3, 2, 7, 1, 0, 3]
LRU 7
( , 1 = 2)
Random 6
. .
.
2 :
0
0 0
1
2
3

1
0
1

7
0
1
7

2
0
1
7
2

3
0
3
7
2

2
0
3
7
2

7
0
3
7
2

1
0
3
7
1

0
0
3
7
1

3
0
3
7
1

K E A A I O 5 : ( V I R T U A L M E M O R Y )

194

) 3.
3 = [ 0, 1, 2, 3, 2, 3, 2, 3, 2, 3, ]
LRU 5 ,
3,
2 3. LIFO
.

A 5.12
m (
). p, n
. (max) (min)
.
:
:
) m n, min = max = n. , n ,
.
) m < n, min = n,
. max = p,
.

A 5.13
. LRU
(Least Recently Used) OPTIMAL.
. ,
LRU (page faults),
LRU:

5 . 6

195

= 1 i [ (i+1) , , j ] , [ (j+1) p],

, j, j = min { t : O LRU
(i+1) ... t }.
O LRU .
OPTIMAL .
:

= 1, , i, [(i+1),, j], [j+1, ,1],

:
1:
( i) LRU , p;
:
k

p.

= 1, , i, [(i+1),p1,,p2, j],

~
p

~
p

p , .
-

K E A A I O 5 : ( V I R T U A L M E M O R Y )

196

LRU. , p,
k
p . ,
k+1 . ptimal
.
2:
O LRU k . , , .
2
i = p, [ i+1, , p, ,j]
1.
p, k . , k+1 . k+1 ,
OPTIMAL .
2
i = p, [ i+1, ,j]
p. p OPTIMAL . ,
k p. , o
OPTIMAL , p .

5.6.9

.
, bit dirty bit ( 5.4) 4 :
(0,0)
(0,1) ()
(1,0)

5 . 6

(1,1)
,
4 .
. , FIFO .
5.6.10 Ad Hoc

, . ,
(pool) . , , . , .
,
. ,
.
(dirty) .
, . dirty bit.

.
,
. ,
. I/O. , . ,
.
VAX/VMS FIFO . FIFO , (Free Frame Buffer), I/O.
, , FIFO.

197

K E A A I O 5 : ( V I R T U A L M E M O R Y )

198

5.7

,
.
.
.

(singleuser system).
128 bytes 1. 35
bytes, 93 .
(pure demand paging), 93 .
, . 93 .
, 93 (incore) 94 . , 93
.
. .
, .
. , , . ,
, ,
.
, : . . ( )
( , ,
.. 256MB).
. 93 2 , ;

5 . 7

5.7.1

, , . (
).
, . ,
( ), .

, .
. , , . ,

.
, PDP8.
. ,
. , . ,
16 0,
23. , PDP8 . .
.
PDP8 , PDP11 .
,
. ,
, .
IBM 370 .
, 6 bytes .
. 6 . ( ,
Execute
8 .)

199

200

K E A A I O 5 : ( V I R T U A L M E M O R Y )

Data General Nova 3 : 16 bits. , ( ), , , ( )

,
.
, ,
16 . ,
16
. , (excession
indirection). 17, .
,
. .
5.7.2

,
( )
(;). , ,
.

(global
replacement) (local replacement)
. global ,
:
.
.
.
.

5 . 7

201

A 5.14

;
:
( )
.

. ,
, ,
. , ( 0,5 sec 10,3 sec ),
.
. ,

.
5.7.3

m/n . ,
93 5 , 18 . 3
. .

.
10 interactive 127
62 , 31 . 10 ,
21 .
,
(proportional allocation). -

K E A A I O 5 : ( V I R T U A L M E M O R Y )

202

.
i si,
S=

si

, m, a
i, i
i =

si
m
S

,
, m.
62 ,
10 127 , 4 57 , 10/137 62 127/137 62 57

.
, . ,
,
. , ,
.
.

,
.

.

.
.

5.8 (THRASHING)

5.8 (Thrashing)

(
)
, .
, . / CPU
(intermediate cpu scheduling) ( ).
.

, () .
, .
. ,
. ,
.
.
.
. ,
.
CPU. CPU ,
. .
.
.
.
,
. CPU.
CPU
. , ,
. ,
CPU -

203

K E A A I O 5 : ( V I R T U A L M E M O R Y )

204

. ,
. . , . ,
.
5.15. , CPU , , .
, CPU
.

X CPU

5.15

. ,
,
. , , .
, . , .
5.8.1

,
. ; -

5.8 (THRASHING)

. ( 5.8.2) . (locality model) .

, ,
.
. , , . , , . ,
. , ,
. . ,

.
.

.
,
.
, ,
.
5.8.2 (Working Set Model)

.
. .
(
5.16). , .
, . , .

205

K E A A I O 5 : ( V I R T U A L M E M O R Y )

206

A ~
2615777751

6234123444343444

13234443444

5.16

t1~

t2~

WS(t1) = {1,2,5,6,7}

WS(t2) = {3,4}

, 5.16,
= 10 , t1
1,2,5,6,7. t2 3,4.
.
, .
, . ,
, .
Madnick Donovan [1974] 10.000 .
. , WSSi, ,
:
D=

WSSi

D . . , i WSSi . , ,
.
.
,
.
, .
,
, .
. .

5.8 (THRASHING)

207

. , CPU.

. .
, . .
(fixed interval timer interrupt) bit .
, 10.000 5.000 .
, bits . , , bit bits 10.000 15.000 . , bit .
bit 1 .
,
5.000 . bits
(.. 10 bits 1.000 ). , , , .
A 5.15
w = r1, r2, ... , rT
. :

w()

F()

w(t,)

F() w(+1) w(), F

.

K E A A I O 5 : ( V I R T U A L M E M O R Y )

208

:
w:

r1, r2, , ri, ri+1, ri+2, , ri+, ri++1, , rT

+1

w(t1, ), t
w(t, +1) =
w(t1, ) + 1,

w(t, +1) = (1 F())*(w(t1, ) + F()*(w(t1,) + 1)

w(t, +1) = w(t1, ) + F()
F() = w(t, +1) w(t1, )
w(+1) w() :
1/ (w(t, +1) = 1/ (w(t1, ) + F())
t = 0 t = T.
fi w(+1) = w() w(T, )/ + F()
, w(T, )/
fiF() @ w(+1) w()
5.8.3

(
5.9.1), .
(Page Fault Frequency PFF) .
. . , -

5 . 9

209

. ,
. , , .
( 5.17).
,
,
, . ,
.

A ~

K~

5.17

, .
, .
.
5.9

,
.
5.9.1

210

K E A A I O 5 : ( V I R T U A L M E M O R Y )

. . , ,
. (prepaging) . .
,
.
( I/O
), . ( I/O ),
.
, , .
. . s a s
( 0 < < 1). as
(1 )s . ,
, 1, .
5.9.2 I/O (/O Interlock)

, . I/O () . I/O
I/O . , (magnetic tape controller) ( bytes) ( 5.18).
, CPU .

5 . 9

211

5.18

M~
M T
A

: I/O I/O . , CPU .

. . , I/O
, I/O . ,

.
.
I/O . ,
I/O.
, .
.
. bit . , . , ,
. , .
. I/O, .
bit . : . ,
. , -

I/O

K E A A I O 5 : ( V I R T U A L M E M O R Y )

212

CPU. ,
CPU . ,
. , ,
. , ,
.
. ,

. ,
.
, bit
. ,
bit .
bit . ( ),
.
5.9.3

. , ,

.
. ,
256 (28) 4096 (212) bytes .
;
. , , , .
4 (222) 16.384 256
, 1024 4096 . -

5 . 9

,
.
, .
00000 ,
(page boundary).
, (
), ( ). ,
, ,
. 128 256 ,
2048 4096 . , .

. I/O ( )
latency .
( ), . latency . 256.000 /sec, 512 2msec. latency
8msec. 128
I/O 10 9msec. O I/O
12msec. , , 12msec
1024 , 36msec 4
256 . , I/O .
, I/O , . . , 20 , (10) . , . ,
10.000 , 10.000 .
, . , , ,

213

K E A A I O 5 : ( V I R T U A L M E M O R Y )

214

, . ,
I/O .
1
; 20
20, 10.000 1 .
, , .
, .
[ (sector) ],
. (
, ) ,
( , I/O) . , . Multics (GE 645) 64
1024 . IBM/370 2 4 bytes.
MVS IBM/370
4 , VS/1 2 .
5.9.4 ()

. ,
. , ,
.
, 128 . , Pascal 128128 . .
var A: array [1128] of array [1128] of integer;

for j := 1 to 128
do for i :=1 to 128
do A[i] [j] := 0;

5 . 9

, . : [1] [1], [1] [2], . [1]

[128], [2] [1], [2] [2], . , [125] [128]. 128 ,
. ,
, , 18128 =
16.384 .
:
var A : array [1128] of array [1128] of integer;

for i := 1 to 128
do for j := 1 to 128
do A[i] [j] := 0;
, 128.
,
. stack
, . ,
hash ,
.
(compiler) (loader)
.
(reeentrant)
, . . ,
.
. bin packing :
(load segments)
.
.

215

K E A A I O 5 : ( V I R T U A L M E M O R Y )

216

5.9.5

. cache .
, , , cache. ,
cache,
. cache, 80% .
, Atlas.
96. 1950 IBM 630. O Atlas
16 , , , (magentic core memory).
. cache .
cache.
, ,
, cache .
( )
()
() ( ). ,
.
,
.
(
demand transfer).
. ( ) ( ) .
,
, , ( )
.

5 . 9

217

( 5.19).
, . ,
bit , .
.
.
K

Cache

E M

5.19

B M T

Multics.
. . , I/O
.
. ( ),
.

K E A A I O 5 : ( V I R T U A L M E M O R Y )

218

. , , .
. , ,
CPU.
.
.

. . . (memory image).
, .

.
CPU. , . .
,
,
. .
FIFO ,
Belady. . LRU
, . , , LRU.
, . , , , .
. . ,

YNOH

, .
, . .
,
, I/O,
.
.
, .

219

K E A A I O 5 : ( V I R T U A L M E M O R Y )

220

Denning, Virtual Memory, Computing surveys, vol. 2, Sept. 1970, pp. 153189.
Denning, Working sets past and present, IEEE trans. On software engineering, vol.
SE6, Jan 1980, pp. 6484.
Knuth, The art of computer programming, vol. 1: Fundamental algorithms, 2nd
edition, reading, MA: AddisonWesley, 1973.
Silberschatz et al., Operating System Concepts, 3rd edition, reading, MA:
AddisonWesley, 1991.

221

Absolute memory image:

Array:

Autodecrement:

Autoincrement:

Belady anomaly:

Belady

Cache memory:

Clearing:

Clock register:

Compiler:

Counter:

Cpu scheduling:

CPU

Demand paging:

Demand segmentation:

Demand transfer:

Device seek:

Device queuing time:

Device service time:

Dirty bit:

bit

Dynamic loading:

Effective access time:

Fatal error:

FIFO (First In First Out):

Fixed interval timer interrupt:

Free frame buffer:

Global replacement:

Head:

Illegal address trap:

Incore:

Instruction fetch:

K E A A I O 5 : ( V I R T U A L M E M O R Y )

222

Intermediate cpu scheduling:

CPU

Invalid address error:

I/O interlock:

I/O

Latency time:

LFU (Least Frequently Used):

Loader:

Load segment:

Locality model:

Local replacement:

LRU (Least Recently Used):

Magnetic core memory:

Magnetic tape controller:

Memory access time:

Memory image:

MFU (Most Frequently Used):

Microcode:

Operand address:

OPTIMAL:

Overlays:

Overlay driver:

Page boundary:

Page fault:

PFF (Page Fault Frequency):

Page fault rate:

Page replacement:

Pool:

Prepaging:

Pure:

Reentrant:

Reference bit:

bit

Reference string:

223

Relocatable linking loader:

Response time:

Second chance replacement:

Sector:

Seek time:

Segment:

Shift:

Single user system:

Stack:

Stack algorithm:

Status register:

Swapping device:

Swapping overhead:

Table:

Tail:

Thrashing:

Throughput:

Timer interrupt:

Trap:

Turnaround time:

Utilization:

Virtual address space:

Working set model: