//Overall PADC simulation testbench file created through PADC

//---------------------------simulator lang = spectre

//---------------------------//--Simulator Setup-sim_options options
+
reltol=0.001
+
vabstol=1e-06
+
iabstol=1e-12
+
tnom=27
+
scalem=1.0
+
scale=1.0
+
gmin=1e-12
+
rforce=1
+
maxnotes=5
+
maxwarns=5
+
digits=5
+
cols=80
+
pivrel=0.00001
+
ckptclock=1800
+
temp=27
//----------------------//--Voltages to be Saved-opt1 options nodes = all
//-----------------------V0 (vdd 0) vsource dc=2.5 type=dc
V1 (vss 0) vsource dc=0 type=dc
V5 (vstimulus 0) Define Input Source
//--tran Analysis Setup-NewTest tran
+
start=0
+
stop=200u
+
outputstart=0
+
strobedelay=1e-12
+
strobeperiod=100e-09
+
errpreset=conservative
//--------------------ahdl_include "./SHVeriloga.va"
S0(vstimulus vin clk) Sample_hold clk_Hperiod =2e-08 enable=1 Rstd_devia
tion=0 trise=1p tfall=1p