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  • Chip Multicore Processors - Tutorial 4: Task 4.1: Counter Implementation

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    The document discusses tasks for implementing shared data structures across multiple threads. Task 4.1 involves implementing a counter with locks, compare-and-swap, and load-linked/store-conditional and comparing the characteristics of each. Task 4.2 involves implementing a first-in-first-out (FIFO) memory using a circular buffer with locks, condition variables, and exploring non-blocking and lock-free implementations using linked lists. The goal is to allow parallel access to the shared data structures from multiple reading and writing threads.

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    The document discusses tasks for implementing shared data structures across multiple threads. Task 4.1 involves implementing a counter with locks, compare-and-swap, and load-linked/store-conditional and comparing the characteristics of each. Task 4.2 involves implementing a first-in-first-out (FIFO) memory using a circular buffer with locks, condition variables, and exploring non-blocking and lock-free implementations using linked lists. The goal is to allow parallel access to the shared data structures from multiple reading and writing threads.

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    7 views1 page

    Chip Multicore Processors - Tutorial 4: Task 4.1: Counter Implementation

    Uploaded by

    Bobby Beaman
    The document discusses tasks for implementing shared data structures across multiple threads. Task 4.1 involves implementing a counter with locks, compare-and-swap, and load-linked/store-conditional and comparing the characteristics of each. Task 4.2 involves implementing a first-in-first-out (FIFO) memory using a circular buffer with locks, condition variables, and exploring non-blocking and lock-free implementations using linked lists. The goal is to allow parallel access to the shared data structures from multiple reading and writing threads.

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    MUNCHEN TECHNISCHE UNIVERSITAT Lehrstuhl f ur Integrierte Systeme

    Chip Multicore Processors Tutorial 4


    May 22, 2013

    Task 4.1: Counter Implementation


    You want to share a counter among several threads. Implement the counter with locks, compareand-swap and load-linked/store-conditional. How is each of the implementations characterized?

    Task 4.2: FiFo Implementation


    In this task you will implement a FiFo memory in software. a) Implement a (capacity bound) FiFo as circular buer by using an array. b) Allow the parallel access to the FiFo by multiple threads using locks. c) Is it possible to use two locks for parallel access by reading and writing threads? d) Use a (POSIX) condition variable for synchronization. e) Can you implement this data structure in a non-blocking fashion? If not, how can you change the data structure to allow for it? f) Is it possible to implement an (unbounded) FiFo by using a linked list and without locking?

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