1.

A 3-line to 8-line decoder is connected as shown. Where x, y and z are inputs (z is the least significant input digit) and F is an output. Which of the following expressions correctly describes F?

2. A circuit which translates n input lines into an m-bit code word , where n

<= 2^m is defined as a ----------------3. How many 3-line-to-8-line decoders are required for a 1-of-32 decoder?

4. 5.

Convert BCD 0001 0010 0110 to binary

Which of the following logic expressions represents the logic diagram shown?

6.

A half-adder does not have ________ 1. Carry in 2. Carry out 3. Two input

4. All of the above

7.
A Karnaugh map will ________. eliminate the need for tedious Boolean simplifications

A. B. C. D.

allow any circuit to be implemented with just AND and OR gates produce the simplest sum-of-products expression give an overall picture of how the signals flow through the logic circuit

8 . The final output of a POS circuit is generated by ________. A. B. an AND an OR

C. D.

a NOR a NAND