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Ηλεκτρονικό πακετάρισμα
Ηλεκτρονικό πακετάρισμα
,
VLSI
(off-chip interconnections)
. ,
RC interconnection delay, , cross talk,
, , .
A
2. Bakoglu H. B., Circuits, Interconnections, and Packaging for VLSI, AddisonWesley, 1990.
2. Young-Soo Shn,et al. Empirical Equations on Electrical Parameters of Coupled
Microstrip Lines for Crosstalk Estimation in Printed Circuit Board, IEEE
Transanctions on Advanced Packaging, Vol.24(4)2001.
2. Brian Young, Digital Signal Integrity:Modeling and simulation with
Interconnects and Packages, Prentice Hall Modern Semiconductor Design
Series, 2001.
..
2008
:
(off-chip interconnections)
(drivers)
,
.
1.
.:
1: chip
..
2008
( )
:
noise margin
.
.
..
2008
2. PCBs
(Printed Circuit Board)
,
lossless
transmission lines.
, ,
lumped capacitive inductive loads.
:
. ,
(LdI/dt).
2
&
:
3
, SPICE
PCB ,
..
2008
() lumped elements.
D ( MCM-D).
:
4
,
-
fringing fields. ,
,
, ,
.
PCB, TEM-mode (Transverse ElectroMagnetic) ,
Maxwell
, ,
( 1).
..
2008
l L, C
.
,
..
2008
lumped capacitance
mode.
PCB
(impedance) :
=r0
5
(ground plane)
.
,
PCBs ,
,
..
2008
vias,
.
5% W/h<1.25 ,
0.1<t/W<0.8 2.5<<6
3.
(propagation delay)
.
,
.
.
crosstalk
.
. ,
CMOS off-chip ,
(P~CV2 ).
.
,
:
(switching noise)
CMOS Bipolar Ics.
, :
crosstalk
.
, 60-100
.
..
2008
4. &
wire bonds, vias
,
.
CMOS
(. )
.
:
, , ,
(1+).
.
..
2008
,
motherboard, , .
6
.
:
..
2008
10
Vr
Vi
5.
ToF .
,
tr < 2.5 tf
, , lumped
elements
tr > 5 tf
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2008
11
.
10 cm, ,
1.5
nsec.
:
) .
.
)
.
.
.
6. Cm ,Cs
:
1mil=0.00245cm
..
2008
12
: !!!!!
I:
: &
: PCB
ORCAD (
PSPICE).
.
pads 150mm.
170mm X 170mm.
7
A) W=1mm
S=0.3mm
S=0.4mm
S=0.5mm
S=0.6mm
) W=2mm
S=0.4mm
S=0.6mm
) W=3mm
S=0.3mm
S=0.6mm
S=0.9mm
S=0.9mm ground plane
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2008
13
: photoresist
:
8: ground plane
.
ground plane.
H
.
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2008
14
pads
10
: pads
2mmX4mm .
..
2008
15
11
.
( ) laser printer
inkjet printer ( 600dpi)
.
.
PCB
.
..
2008
16
I:
: &
:
.
.
1.
(ground plane) PCB
( ). :
.
LCR meter HP :
) (mutual inductance)
(self-inductance)
.
12
paper. (Young-Soo Shn,et al. Empirical Equations on Electrical
Parameters of Coupled Microstrip Lines for Crosstalk Estimation in Printed
Circuit Board, IEEE Transanctions on Advanced Packaging, Vol.24(4)2001).
B) , , Rp RS
Zo .
.
2. () LCR
meter :
) (self
capacitance)
) (mutual capacitance)
..
2008
17
1.
epoxy glass.
2.
. .
3. .
4.
5.
5. 1-section lumped circuit model ( 3) PSPICE,
Zo
6.
PSPICE.
.
REPORT
.
L self
Zo
Ls
L mutual
Rs
Ls
Rs
C self
Cp
C mutual
Rp
Cp
Rp
W=1
S = 0.3
S = 0.4
S = 0.5
S = 0.6
W=2
S = 0.4
S = 0.6
W=3
S = 0.3
S = 0.6
S = 0.9
S = 0.9 no
ground
r
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2008
18
I:
: CROSSTALK
: crosstalk
.
PSPICE.
crosstalk:
S/W
Cm/Ct . Lm/Ls
.
.
1. ( )
5Volt.
0Volt 5Volt.
rise time 10 nsec
100Hz. .
,
, :
) (near end)
(
). :
.
) probe
(far end) ..
) rise
time 10 msec 100Hz.
2.
13 .
13
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2008
19
3.
14 .
14
4. ( )
5Volt.
0Volt 5Volt.
rise time 10 nsec
100Hz. .
( ) :
,
, :
) (near end)
Z0 100100 0
R2 R1.
:
.
) R1 crosstalk .
Young-Soo Shn,et al. Empirical Equations on
Electrical Parameters of Coupled Microstrip Lines for Crosstalk Estimation in
Printed Circuit Board, IEEE Transanctions on Advanced Packaging,
Vol.24(4)2001 crosstalk
:
..
2008
20
Vswing = 5Volt,
150 mm
.
1. crosstalk near end far
end epoxy glass
.
2. .
3. crosstalk
S/W .
4. .
5. R1 ,
crosstalk,
. .
6. 1-section lumped circuit model PSPICE,
3 crosstalk.
7. crosstalk.
REPORT
.
..
2008
21
I:
:
:
ToF
.
:
15
lumped RC
:
t<<RC t>>RC
..
2008
22
,
:
10% 90%
:
ToF
..
2008
23
(ringing)
(overshoots).
, buffer
settling time
.
,
.
far end .
1. ( ) W=1mm
& S=0.2mm, 5Volt p-p
1MHz, 2
0 Ohm.
50. (ground plane) PCB
.
2.
3.
4.
5.
6.
7.
(near end) (
) (
).
.
HP-IB interface.
. .
.
. .
1,2,3 & 4
far end
.
( 100)
..
2008
24
.
REPORT
.
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2008
25
II:
&
:
.
dI/dt
buffers
.
Faraday
, emf = -(d/dt). =LI emf=-L(dI/dt), L
.
:
16: IC ( mutual
inductance signal power/ground planes)
, ECL
(Emitter Coupled Logic)
..
2008
26
17: ECL
R1 R2
( ECL
)
.
group R2 Vx
switches over
R1 R2 .
2 off
I1 =(VDD/R1). A
2
, Lext chip V
VDD.
:
, group 2 turns on ,
R1 < 0.1 R2
10% .
..
2008
27
II:
:
(tr)
( nsec).
.
1.
:
18
2. 10V dc
.
3.
22222.
4. R4
.
5. R4 20kHz.
6. ( )
22222
( 50 60 nsec). ,
.
..
2008
28
II:
:
1.
R1
19
2. 1 22222
.
3. ( AC coupling) 2
.
.
4. A 180nF
R1.
5. ( AC coupling) 2
.
k
6. A
R1 100 R1 1.2
R2 ( 100).
7. ( AC coupling) 2
( 22222)
. .
.
REPORT
.
..
2008
29
ORCAD LAYOUT Plus Lite
1.
Orcad Layout-Lite edition File>New
. METRIC.TCH
..
2008
30
Cancel.
..
2008
31
layers
(. TOP, BOT, GND ..)
obstacle tool
,
.
..
2008
32
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2008
33
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34
grid.
grid spacing : Options->System Settings
..
2008
35
grid
spacing layout.
2. (MANUAL DESIGN)
,
0.3mm 0.6mm.
( ).
.
artwork. ,
200mm 150mm.
global layer obstacle type Board
outline.
..
2008
36
grid spacing
.
..
2008
37
board outline
, ..
( DISTANCE).
..
2008
38
To grid spacing .
. grid zoom in.
.
..
2008
39
obstacle type Free track
( 1mm) Layer.
..
2008
40
.
PageUp/PageDown.
..
2008
41
(. 0.3mm)
.
(0.3mm)
(1/2mm=0.5mm).
..
2008
42
PADS
.
..
2008
43
..
2008
44
4.
:
..
2008
45
5. ARTWORK
layout Options>Post Process Settings
Post process.
layers
.
layers layout
. . layer TOP
mouse Batch Enabled
..
2008
46
..
2008
47
Options
Enable for Post processing.
..
2008
48
:
1. PADS 2mm4mm
2. PADS 1mm
6.
(.. )
( Obstacle Tool,
, Obstacle Tool)
Edit -> Copy.
.
Home F5 Redraw
, Orcad
.
Page Up / Page Down
I / Z zoom in / zoom out
.
Text Tool
layer .
New
Text String Layer
( TOP)
7.
.
UV .
.
UV.
1) (steel)
.
.
.
2)
3) 15
4) 10
..
2008
49
5) UV 230.
6)
developer ()
.
To 0.20mm
: positive photoresist .
..
2008
50
Orcad 9.2 Lite Edition
Capture CIS project.
File>New>Project
project PCB Board Wizard
project.
.
.
,
project.
Analog, Discrete Transistor.
.
..
2008
51
, .
..
2008
52
..
2008
53
footprints
,
layout .
footprints .
Layout Plus Lite Edition,
. Tools Library Manager.
footprints.
PACKAGING_2004,
. , .rar
. , Library Manager
Add . Footprints
footprints .
footprints
. ,
PCB Footprint, Library
Manager. , PCB Footprint
22646 22646 (
).
..
2008
54
, .
Layout Plus .
Layout
,
Tools Create Netlist.
, Layout
*.MNL,
project.
User properties are in millimeters.
Layout Plus.
..
2008
55
..
2008
56
..
2008
57
, .L ,
.
.MAX , project
Layout .
, layout footprints
.
..
2008
58
Layout
Move Datum (Tool>Dimension>Move Datum).
,
.
Obstacle Tool Board Outline (
Global Layer, .. 0,5 mm) 5cmx5cm.
Outline
. Board Outline .
.
Track (Tool>Track>Select tool) ,
.
(2mm).
, pads ( Obstacle,
Copper area) ,
( Text tool)
.
:
..
2008
59
:
1) Bottom Layer
, pads.
2)
. ( pad)
.
..
2008
60