DCE

Ngn ng lp trnh Assembly

cho vi iu khin 8051
Microcontroller
Chapter 3
Ngo Nhu Khoa
Department of Computer Engineering
ThaiNguyen University of Technology
10/1/2005 2
DCE
Cc vn
M my - Machine code
Cc ch a ch ca 8051
Cc lnh Jump, Loop v Call
Thng trnh con - Subroutines
Cc vng tr n gin
10/1/2005 3
DCE
1. M i tng ca 8051
Assembler chuyn i m lnh assembly thnh m
my/i tng
S chuyn i t m assembly sang m i tng l
duy nht
Data sheet for 8051 lists the table of conversion
Manual assembly is cool !
M i tng l 1 chui cc lnh my
Mi lnh my c th c di 1 byte hoc nhiu hn
Cc lnh my l 1 gi tr nh phn v c vit h 16
10/1/2005 4
DCE
1. M i tng ca 8051 ()
Assemblers to ra 1 file .lst trong qu trnh dch.
Instruction to m/c code translation on a line by line
basis is listed
1
1
2
2
2
3
00
08
74 55
78 AA
A8 AA
90 55 AA
nop
inc R0
mov A, #55H
mov R0, #0AAH
mov R0, 0AAH
mov DPTR, #55AAH
#bytes Hex code Instruction
10/1/2005 5
DCE
1. M i tng ca 8051 ()
79
61
78
1A
E9
12
00
30
09
D8
F9
12
00
32
02
00
00
8000
8001
8002
8003
8004
8005
8006
8007
8008
8009
800A
800B
800C
800D
800E
800F
8010
Value Address
.equ cout, 0x0030
.equ cin, 0x0032
.equ esc, 0x004E
.org 0x8000
mov r1, #'a'
mov r0, #26
next_char:
mov A, r1
lcall cout
inc r1
djnz r0, next_char
lcall cin
ljmp 0x0000
0000:
0000:
0000:
8000:
8000: 79 61
8002: 78 1A
8004: E9
8005: 12 00 30
8008: 09
8009: D8 F9
800B: 12 00 32
800E: 02 00 00
Assembly Hex
10/1/2005 6
DCE
2. Cc ch a ch ca 8051
CPU c th truy xut d liu theo nhiu cch khc
nhau
Ch nh d liu trc tip trong lnh
S dng cc ch a ch khc nhau i vi d liu c
lu tr trong b nh m lnh v b nh d liu
5 ch a ch
Tc th - Immediate
Thanh ghi - Register
Trc tip - Direct
Gin tip thanh ghi - Register Indirect
Ch s - Indexed
10/1/2005 7
DCE
2.1. Ch a ch tc th
Ton hng (d liu) c ch nh trc tip trong lnh
(m lnh)
Ton hng l 1 hng, c bit trong thi gian dch
D liu tc th phi c tin t l du #
V d:
mov A, #25H ;A #0x25
mov DPTR, #1FFFH ;DPTR #0x1FFF
temp EQU 40 ;assembler directive
mov R1, #temp ;R1 28H (40 decimal)
10/1/2005 8
DCE
2.2. Ch a ch thanh ghi
Yu cu phi s dng cc thanh ghi lu gi d liu
t ton hng vo 1 thanh ghi v thao tc vi n bng
cch tham chiu n thanh ghi cha (theo tn) trong lnh
mov A, R0 ;A contents (R0)
mov R2, A ;R2 contents (A)
ADD A, R1 ;A contents (A) + contents (R1)
Cc thanh ghi ngun v ch phi cng kch thc
Cc lnh dch chuyn d liu gia cc thanh ghi khng
th p dng cho mi trng hp, cho mi thanh ghi:
mov R4, R7 ; invalid
Kim tra vi danh sch lnh trc khi s dng
10/1/2005 9
DCE
2.3. Ch a ch trc tip
i vi d liu c lu tr trn RAM v cc thanh ghi
Tt c cc vng nh u cc th truy xut bng a ch.
Nh truy xut n tt c cc thanh ghi, cc cng, cc thit b ngoi
vi trong 8051.
S dng a ch ca trc tip ton hng trong lnh.
mov A, 40H ; A mem[40H] (note no # sign before 40H)
Ch a ch thanh ghi tng t nh ch a ch trc
tip
mov A, 4H ; 4H is the address for R4
mov A, R4 ; tng t nh trn. C 2 lnh u nh nhau
;nhng c th c m khc nhau
Ngn xp trong 8051 ch s dng ch a ch trc tip
10/1/2005 10
DCE
2.4. Ch gin tip thanh ghi
1 thanh ghi c s dng nh 1 con tr
Thanh ghi lu gi a ch ca d liu
Ch c cc thanh ghi R0, R1 v DPTR c th c s
dng cho mc ch ny trong 8051
R0 v R1 c th c s dng i vi b nh ni (256
bytes bao gm c SFRs) hay t 00H n FFH ca b nh
ngoi
mov A, @R0 ;A internal_mem[R0]
mov @R1, A ;A internal_mem[R1]
movx A, @R0 ; A external_mem[R0]
Thanh ghi DPTR c th c s dng i vi b nh
ngoi, tr n nh bt k trong khong 64K
movx A, @DPTR ;A external_mem[DPTR]
movx @DPTR, A ;vice versa
10/1/2005 11
DCE
2.5. Ch a ch ch s
S dng 1 thanh ghi lu tr con tr (a ch c
s) v 1 thanh ghi khc lu gi tr lch
a ch kt qu l tng sum = base+offset
Chuyn byte m c quan h vi DPTR vo A. a ch kt
qu l: DPTR + A
movc A, @A+DPTR ;A ext_code_mem [(A + DPTR)]
Chuyn byte m c quan h vi PC vo A. a ch kt qu l
PC + A
movc A, @A+PC ;A ext_code_mem [(A + PC)]
c s dng rng ri trong thc hin cc bng tra,
cc mng d liu, to ra k t, trong b nh m
lnh (ROM)
10/1/2005 12
DCE
2.5. V d
Chng trnh c vo 1 gi tr x t P1 v a ra x
2

P2
ORG 0 ; assembler directive
mov DPTR, #LUT ; 300H is the LUT address
mov A, #0FFH
mov P1, A ; program the port P1 to input data
Again: mov A, P1 ; read x
movc A, @A+DPTR ; get x2 from LUT
mov P2, A ; output x2 to P2
sjmp again ; for (1) loop
ORG 300H ;Look-up Table starts at 0x0300
LUT: DB 0, 1, 4, 9, 16, 25, 36, 49, 64, 81
10/1/2005 13
DCE
3. Cc lnh iu khin chng trnh
R nhnh khng iu kin
ajmp addr11 ; absolute jump - nhy theo a ch tuyt i
ljmp addr16 ; long jump - nhy xa
sjmp rel ; nhy gn n a ch quan h
jmp @A+DPTR ; jump indirect - nhy gin tip
R nhnh c iu kin
jz, jnz rel ; nhy gn n a ch quan h nu iu kin tho mn
djnz rel ; gim ton hng ngun v nhy nu khc khng
cjne rel ; so snh v nhy nu khng bng
Gi thng trnh con (Subroutine)
acall addr11 ; gi tuyt i 1 thng trnh con
lcall addr16 ; gi 1 thng trnh con xa
ret ; tr v chng trnh chnh t 1 thng trnh con
reti ; tr v t 1 chng trnh phc v ngt (ISV)
10/1/2005 14
DCE
3.1. a ch ch
a ch ch c th l:
Tuyt i: Mt gi tr a ch vt l
addr16: a ch 16 bit, v tr bt k trong khng gian 64k
addr11: a ch 11 bit, v tr bt k trong khng gian 2k
rel: relative quan h (tin hay li) -128 bytes n +127 bytes t v tr
ca m lnh hin thi
a ch ch c tnh ton cho cc lnh nhy quan h
PC ca lnh k tip + a ch quan h
i vi nhy li, b i gi tr nh
PC = 15H, SJMP 0FEH
a ch l 15H + FEH = 13H
Nhy n v tr lnh k tip -2byte (lnh hin thi)
10/1/2005 15
DCE
3.2. Nhy c iu kin
jz, jnz : iu kin c xc lp trn thanh ghi cha
A==0
Kim tra nu A = 0
jz nhy nu A =0 v jnz nhy nu A # zero
Khng cn thc hin php ton s hc
djnz : gim i 1 v nhy nu khng bng 0
djnz Rn, rel
djnz direct, rel
jnc : iu kin c xc lp trn c nh CY
jc rel
jnc rel
Cjne : so snh v nhy nu khng bng
cjne A, direct, rel
cjne ARn, #data, rel
cjne @Rn, #data, rel
10/1/2005 16
DCE
Add 3 to A ten times
mov A, #0 ; clear A
mov R2, #10 ; R2 10, can also say 0AH
AGAIN: add A, #03 ; add 3 to A
djnz R2, AGAIN ; repeat until R2==0
mov R5, A ; save the result in R5
Loop within loop using djnz
mov R3, #100
loop1: mov R2, #10 ; trying for 1000 loop iterations
loop2: nop ; no operation
djnz R2, loop2 ; repeat loop2 until R2==0
djnz R3, loop1 ; repeat loop1 until R3==0
3.2. Nhy c iu kin ()
10/1/2005 17
DCE
LJMP addr16
Long jump. Nhy n 1 a ch ch 2 byte
Lnh c di 3 byte
SJMP rel
Nhy n 1 a ch quan h t PC+127 n PC-128
Nhy n PC + 127 (00H 7FH)
Nhy n PC 128 (80H FFH)
3.3. Nhy khng iu kin
10/1/2005 18
DCE
4. Cc lnh gi thng trnh
Thng trnh con:
Nhng on chng trnh c th dng li c
LCALL addr16
Long call. Lnh 3 byte. Gi bt k thng trnh con no trong
khng gian m 64Kb
Ct ni dung PC vo ngn xp - push PC
Nhy n a ch xc nh - jmp address
ACALL addr11
Lnh 2 byte. Gi bt k thng trnh con no trong khong 2k
khng gian b nh m lnh
Saves code ROM for devices with less than 64K ROM
RET
Tr v t 1 thng trnh con
Phc hi li PC t ngn xp - pop PC
10/1/2005 19
DCE
5. Chu k my
L s cc chu k ng h c s dng thc
hin 1 lnh
C gi tr khc nhau, ph thuc lnh. Lnh ngn nht
l 1 chu k my
Vi 8051, 12 chu k ng h l thi gian ti thiu cn
thit cho thc hin 1 lnh
Thi gian ca 1 chu k my:
Tmc = S Clocks trn chu k my/ tn s ng h
Vi 8051 tn s ng h l 11.0592MHz,
Tmc = 12 / 11.0592M = 1.085 micro seconds
Thi gian thc hin 1 lnh
Tinstr = s chu k my thc hin lnh * Tmc
Vi lnh NOP, s chu k my = 1. V vy, Tinstr = 1 * 1.085 =
1.085 micro seconds
10/1/2005 20
DCE
6. Cc vng tr n gin
Tm thi gian tr cho thng trnh con
DELAY: mov R3, #200 ; 1 machine cycle
HERE: djnz R3, HERE ; 2 machine cycles
RET ; 1 machine cycle
Tnh ton
Total machine cycles = 200*2 + 1 + 1 = 402
Time = 402 * 1.085us (gi thit: 11.0592 MHz clk) =
436.17us
Tng t, vi bt k thi gian tr no, u c th
c xc nh bng cc vng lp trong lp
Vi cc b tr ln hn, thng s dng cc b nh
thi.
10/1/2005 21
DCE
Chng 3 : n tp
How does 8051 machine code look ?
What are 8051 addressing modes ?
What are program control instructions ?
Conditional Vs Unconditional branches
Subroutines
What is Machine cycle ?
How to calculate exact time spent in executing
a program ? Or how to write exact time delay
loops ?