Switched Capacitor

Switched Capacitor (SC) circuits

Three switches control the operation of the circuit S1 and S3 connect left plate of C1 to Vin and ground S2 provides the unity feedback Assume the open loop gain is very large

 Consider 2 cases
i) S1 and S2 are on and S3 is off For VB=Vout0,voltage across C1 is Vin ii) At t=t0, s1 and s2 turn off and s3 turns on, pulling node A to ground VA changes from Vin0 to 0,output voltage must change from zero to VinoC1/C2

(a) Sampling mode

(b) Amplification mode

 1st, circuit devotes some time to sample the i/p, setting the o/p to zero and no amplification during this period 2nd, after sampling, for t>to, circuit ignores the i/p voltage, amplifying the sampled voltage 3rd, circuit configuration changes from one phase to another Feedback capacitor does not reduce the open loop gain of the amplifier if the o/p voltage is given enough time to settle

 SC amplifier leads to the implementation of CMOS technologies much more easily Discrete time operations require switches to perform sampling as well as a high i/p impedance to sense the stored quantities with no error CMOS is the dominant choice for sampled-data applications