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A

Compal Confidential
2

ISRAE LA-3711P Schematics Document


Intel Yonah/Merom with 945GM/943GML/940GML+ DDRII + ICH7M

2007-02-02

REV: 1.0

2006/10/31

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Cover Sheet
Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
E

of

39

Compal confidential

Yonah/Merom

Fan Control

Model : ISRAE
File Name : LA-3711P

page 4

Thermal Sensor
ADM1032ARM

uFCPGA-478 CPU

NAPA Platform

page 4,5,6

CRT & TV-out

page 16

NVIDIA NB7P-GS
NB7M-SE
with 128/256
MB VRAM

ICS9LPRS325AKLFT

page 4

page 14
1

H_A#(3..31)

FSB
LCD Conn.

Clock Generator

533/667MHz

H_D#(0..63)

page 16

Intel Calistoga GMCH


945PM/GM

VGA/B Conn.

PCI-E BUS

BANK 0, 1, 2, 3

page 12, 13

Dual Channel

PCBGA 1466

PCI-Express
x16

page 15

DDR2-SO-DIMM X2

DDR2-533/667

page 7,8,9,10,11

USB1.1
USB Bluetooth
Finger page
Print25
page 25

2.5GHz

DMI x 4

Carema
page 25

USB x 2
connpage
x 1 28

USB/B conn
page 25

(port 3)

USB port 7

10/100/1000 LAN
RTL8111B/RTL8101E

Intel ICH7-M

page 27

page 22

Azalia

mBGA-652

Mini Express Card


RJ45/11 CONN

USB port 6

USB 3.3V 480MHz

USB port 3

New Card Slot

page 25

PCI BUS

SATAI/II
PATA

3.3V 33 MHz

USB port 2,4

3.3V 24.576MHz/48Mhz

CardBus Controller

ALC861D

SATA 0

page 24

AMP & Audio Jack & Int-MIC

Audio Codec

3.3V ATA-100

USB port 0, 1

MDC1.5

1.5GHz/3G

page 16,17,18

page 22

USB port 5

SPK/JP-AMP: APA2056

page 23

page 24

SATA HDD Connector


page 16

TI PCI8412/8402
page 20,21

LPC BUS

3.3V 33 MHz

Slot 0

page 21

1394 port

SATA 1

5in1 Slot

page 20

page 20

PATA Master

SATA HDD Connector

SW/B
LS-3441P Rev1

PATA ODD Connector


page 16

ENE KB910

LED
page 28

CRT/B
LS-3448P Rev1

page 26

RTC CKT.

USB/B
LS-3444P Rev1

page 16

ISRAE Sub-board

page 16

Power On/Off CKT.

Touch Pad

page 28

page 25

Int.KBD

BIOS
Finger Printer/B
LS-3401P Rev1

page 27

page 28

DC/DC Interface CKT.


page 29

Power Circuit DC/DC

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Page 30~36
A

2006/10/31

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Title

Block Diagram
Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
E

of

39

Voltage Rails

Board ID / SKU ID Table for AD channel

Power Plane

Description

S1

S3

S5

VIN

Adapter power supply (19V)

N/A

N/A

N/A

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

+0.9VS

0.9V switched power rail for DDR terminator

ON

OFF

OFF

Vcc
Ra

3.3V +/- 5%
100K +/- 5%
Rb
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

Board ID

+VCCP

1.05V switched power rail

ON

OFF

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+1.8V

1.8V power rail for DDR

ON

ON

OFF

+1.8VS

1.8V switched power rail

ON

OFF

OFF

+2.5VS

2.5V switched power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5VS

5V switched power rail

ON

OFF

OFF

+VSB

+VSB always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

0
1
2
3
4
5
6
7

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

BOARD ID Table
Board ID
0
1
2
3
4
5
6
7

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

PCI Device ID

IDSEL #

REQ/GNT #

PIRQ

1394

D0

AD20

A ,B,C

CARD BUS

D4

AD20

A ,B,C

5IN1

D4

AD20

A ,B,C

SKU ID
0
1
2
3
4
5
6
7

KB910 I2C / SMBUS ADDRESSING


DEVICE

HEX

ADDRESS

SM1 24C16

A0H

1010000Xb

SM1 SMART BATTERY

16H

0001011Xb

SM2 ADM0132
CPU THERMAL MONITOR

98H

1001100Xb

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

BTO Option Table


PCB Revision
0.1

BTO Item
45 level
2ND HDD
LAN
WLAN
MDC
Blue tooth
Card ctrller
FINGER PRINT
5IN1
Express card
PCMCIA
Carema+MIC
VGA FAN
CHIPSET (R3)
change R3 to
R1 for FRU
CIR
Energy Star

SKU ID Table

External PCI Devices


DEVICE

SKU
10 (10E)(10M)
10C
10G(10MG)
10GC
10J(10EJ) (10MJ)
10CJ
10G(10MG)J
10GC(10MGC)J

BOM Structure
45@
2HDD@
100M@/1000M@
KS@
MDC@
BT@
8412@/8402@/4512@
FP@
5IN1@, NON5IN1@
NEWCARD@
PCMCIA@
CAREMA@
FAN2@
GMLR3@,GM@,ICH7R3@
GMR3@,GM@,ICH7R3@
PMR3@,PM@,ICH7R3@
CIR@
ENG@

ICH7-M SM Bus address


DEVICE

HEX

ADDRESS

DDR SO-DIMM 0

A0

10100000

DDR SO-DIMM 1

A4

10100100

CLOCK GENERATOR (EXT.)

D2

11010010

2006/10/31

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Notes
Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
E

of

39

+3VS

Thermal Sensor ADM1032ARM

H_RS#[0..2]

H_TRDY#

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

F3
F4
G3
G2

AD4
AD3
AD1
AC4

18
DBRESET#
7
H_DBSY#
17
H_DPSLP#
17,36 H_DPRSTP#
7
H_DPWR#
R98
1
2
56_0402_5%

+VCCP

17 H_PWRGOOD
7
H_CPUSLP#

1
1

R85 @ 1K_0402_5%
2
2
R103 51_0402_5%

7,17 H_THERMTRIP#

DBRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#

BPM0#
BPM1#
BPM2#
BPM3#
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

H_PW RGOOD D6
H_CPUSLP#
D7
XDP_TCK
AC5
XDP_TDI
AA6
AB3
TEST1
C26
TEST2
D25
XDP_TMS
AB5
XDP_TRST# AB6

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

H_THERMDA, H_THERMDC routing together.


Trace width / Spacing = 10 / 10 mil

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

MISC

H23
M24
W24
AD23
G22
N25
Y25
AE24

15,26 EC_SMB_CK2

SCLK

THERM#

15,26 EC_SMB_DA2

SDATA

GND

THERMAL

A6
A5
C4
B3
C6
B4

H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI

STPCLK#
SMI#

D5
A3

H_STPCLK#
H_SMI#

LEGACY CPU

THERMDA DIODE
THERMDC
THERMTRIP#

+5VS

C
R674 2
1
100_0402_5%

FAN1_ON 2
B

C820
1
2

Q50
FMMT619_SOT23
D36

0.1U_0402_16V4Z
@

P@
LM358DT_SO8
0

2
56_0402_5%
2
56_0402_5%
1 R102
2
56_0402_5%

+FAN1_VOUT
1

1 R439
2
8.2K_0402_5%

1N4148_SOT23

R594 2
1
10K_0402_5%

PU5B
5 +

D37

JP2

2 R440
10K_0402_5%

+3VS

26 FAN_SPEED1

C632
@1000P_0402_50V7K

1
2
3

1
2
3

4
5

GND
GND

ACES_85205-03001
C633
@1000P_0402_50V7K

VS
C1005
1
2

26

U41A
3 +

EN_DFAN2
R868 2
1
10K_0402_5%

+5VS

0.1U_0402_16V4Z
FAN2@
FAN2@
LM358DT_SO8

C
0

R867 2
1
100_0402_5%
FAN2@

FAN2@

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

C1000
1
2

FAN2_ON 2
B
E

Q83
D56
FMMT619_SOT23
FAN2@

FAN2@

+3VS

H_DSTBN#[0..3] 7
26 FAN_SPEED2
H_DSTBP#[0..3] 7

VS

U41B
5 +

FAN2@
LM358DT_SO8
0

FAN2@

+FAN2_VOUT

0.1U_0402_16V4Z
@

1 R869
2
8.2K_0402_5%

7
7
7
7

A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1

1 R90

XDP_TCK

D57

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

1 R83

XDP_TRST#

1SS355_SOD323

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

ALERT#

J26
M26
V23
AC20

RS0#
RS1#
RS2#
TRDY#

C20
E1
B5
E5
D24
AC2
XDP_BPM#5 AC1
H_PROCHOT# D21

H_THERMDA
A24
H_THERMDC
A25
H_THERMTRIP# C7

DINV0#
DINV1#
DINV2#
DINV3#

CONTROL

D-

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#

XDP_BPM#5

2
56_0402_5%
2
56_0402_5%

1SS355_SOD323

H1
E2
G5
F1
H5
F21
G6
E4
D20
H4
B1

HOST CLK

VDD1

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRD Y#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_RESET#

BCLK0
BCLK1

1 R84

CLK_CPU_BCLK A22
CLK_CPU_BCLK# A21

D+

H_THERMDC

ADSTB0#
ADSTB1#

EN_DFAN1

1 R88

U1
H_THERMDA

ADM1032ARM_RM8

26

XDP_TDI
XDP_TMS

H_LOCK#
H_RESET#

L2
V4

DATA GROUP

C2
2200P_0402_50V7K

C1
0.1U_0402_16V4Z

7
7

H_ADSTB#0
H_ADSTB#1

ADDR GROUP

R100
1
2
56_0402_5%

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

1N4148_SOT23

+VCCP

7
7
7
7
7
7
7
7

K3
H2
K2
J3
L5

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26

14 CLK_CPU_BCLK
14 CLK_CPU_BCLK#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

YONAH

H_ADSTB#0
H_ADSTB#1

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#

7
7

J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1

H_REQ#[0..4]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

+VCCP
1

JP41
FAN2@

2 R870
10K_0402_5%
FAN2@

1
2
3

1
2
3

4
5

GND
GND

ACES_85205-03001
FAN2@
1

C1001
@1000P_0402_50V7K

C1002
@1000P_0402_50V7K

Place close to CPU within 500mil

H_D#[0..63] 7

JP1A

Placement near to ICH7

H_A#[3..31]

H_FERR#

2
C341

1
@180P_0402_50V8J

H_SMI#

H_INIT#

H_NMI

H_A20M#

H_INTR

H_IGNNE#

H_STPCLK#

H_PW RGOOD

H_CPUSLP#

1 C403
@180P_0402_50V8J
1 C180
@180P_0402_50V8J
1 C387
@180P_0402_50V8J
1 C225
@180P_0402_50V8J
1 C394
@180P_0402_50V8J
1 C176
@180P_0402_50V8J
1 C397
@180P_0402_50V8J
1 C402
@180P_0402_50V8J
1 C178
@180P_0402_50V8J

H_A20M# 17
H_FERR# 17
H_IGNNE# 17
H_INIT# 17
H_INTR
17
H_NMI
17
H_STPCLK# 17
H_SMI#
17

FOX_PZ47903-2741-42_YONAH

Placement near to CPU side


Compal Secret Data

Security Classification
2006/10/31

Issued Date

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


Yonah CPU in mFCPGA479

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

of

39

+VCCP

R138
1K_0402_1%

+V_CPU_GTLREF

+CPU_CORE

VCCSENSE
VSSSENSE

JP1C

AF7
AE7

VCCSENSE
VSSSENSE

B26

VCCA

K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

H_PSI#

AE6

PSI#

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

AD6
AF5
AE5
AF4
AE3
AF2
AE2

VID0
VID1
VID2
VID3
VID4
VID5
VID6

+1.5VS
+VCCP

VSSSENSE
2
100_0402_1%

R135
2K_0402_1%

C408
0.01U_0402_16V7K

C406
10U_0805_10V4Z

Close to CPU pin AD26


within 500mils.

Close to CPU pin


within 500mils.

CPU_BSEL

CPU_BSEL2

CPU_BSEL1

CPU_BSEL0

133

36

H_PSI#

36
36
36
36
36
36
36

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

AD26

+V_CPU_GTLREF

166

14
14
14

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

R104
2

R105

1
R329
2

R328

B22
B23
C21

BSEL0
BSEL1
BSEL2

COMP0
COMP1
COMP2
COMP3

R26
U26
U1
V1

COMP0
COMP1
COMP2
COMP3

E7
AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17

Resistor placed within


0.5" of CPU pin.Trace
should be at least 25
mils away from any
other toggling signal.

27.4_0402_1%
27.4_0402_1%
54.9_0402_1%
54.9_0402_1%

GTLREF

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

+CPU_CORE

D2
F6
D3
C1
AF1
D22
C23
C24
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
T22
B25

YONAH

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

POWER, GROUNG, RESERVED SIGNALS AND NC

VCCSENSE
2
100_0402_1%
R136

JP1B

R137
1

+CPU_CORE

Length match within 25 mils


The trace width 18 mils space
36
VCCSENSE
7 mils
36
VSSSENSE

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB26
AA25
AD25
AE26
AB23
AC24
AF24
AE23
AA22
AD22
AC21
AF21
AB19
AA19
AD19
AC19
AF19
AE19
AB16
AA16
AD16
AC16
AF16
AE16
AB13
AA14
AD13
AC14
AF13
AE14
AB11
AA11
AD11
AC11
AF11
AE11
AB8
AA8
AD8
AC8
AF8
AE8
AA5
AD5
AC6
AF6
AB4
AC3
AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1

AE18
AE17
AB15
AA15
AD15
AC15
AF15
AE15
AB14
AA13
AD14
AC13
AF14
AE13
AB12
AA12
AD12
AC12
AF12
AE12
AB10
AB9
AA10
AA9
AD10
AD9
AC10
AC9
AF10
AF9
AE10
AE9
AB7
AA7
AD7
AC7
B20
A20
F20
E20
B18
B17
A18
A17
D18
D17
C18
C17
F18
F17
E18
E17
B15
A15
D15
C15
F15
E15
B14
A13
D14
C13
F14
E13
B12
A12
D12
C12
F12
E12
B10
B9
A10
A9
D10
D9
C10
C9
F10
F9
E10
E9
B7
A7
F7

FOX_PZ47903-2741-42_YONAH

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

YONAH

POWER, GROUND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21

FOX_PZ47903-2741-42_YONAH

Compal Secret Data

Security Classification
2006/10/31

Issued Date

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


Yonah CPU in mFCPGA479

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

of

39

+CPU_CORE

1
C18
10U_0805_6.3V6M

1
C19
10U_0805_6.3V6M

1
C20
10U_0805_6.3V6M

1
C21
10U_0805_6.3V6M

1
C22
10U_0805_6.3V6M

1
C23
10U_0805_6.3V6M

1
C24
10U_0805_6.3V6M

C25
10U_0805_6.3V6M

+CPU_CORE

1
C26
10U_0805_6.3V6M

1
C27
10U_0805_6.3V6M

1
C28
10U_0805_6.3V6M

1
C29
10U_0805_6.3V6M

1
C30
10U_0805_6.3V6M

1
C31
10U_0805_6.3V6M

1
C32
10U_0805_6.3V6M

C33
10U_0805_6.3V6M

+CPU_CORE

1
C34
10U_0805_6.3V6M

1
C35
10U_0805_6.3V6M

1
C36
10U_0805_6.3V6M

1
C37
10U_0805_6.3V6M

1
C38
10U_0805_6.3V6M

1
C39
10U_0805_6.3V6M

1
C40
10U_0805_6.3V6M

C41
10U_0805_6.3V6M

+CPU_CORE

1
C42
10U_0805_6.3V6M

1
C43
10U_0805_6.3V6M

1
C44
10U_0805_6.3V6M

1
C45
10U_0805_6.3V6M

1
C46
10U_0805_6.3V6M

1
C47
10U_0805_6.3V6M

1
C48
10U_0805_6.3V6M

C49
10U_0805_6.3V6M

Mid Frequence Decoupling


10uF X32 PCS

+CPU_CORE
@ 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

@ 330U_D2E_2.5VM_R9

South Side Secondary

North Side Secondary


1

C50

C51

1
C52

1
C53

+
2

1
C54

1
+

C55

ESR <= 1.5m ohm


Capacitor > 1980uF

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

330uF ESR 9m ohm X 6 PCS

330U_D2E_2.5VM_R9

1
C56

+
2

330U_D2E_2.5VM_R9

+VCCP

1
C57
0.1U_0402_16V4Z

1
C58
0.1U_0402_16V4Z

1
C59
0.1U_0402_16V4Z

1
C60
0.1U_0402_16V4Z

1
C61
0.1U_0402_16V4Z

C62
0.1U_0402_16V4Z

Place these inside socket


cavity on Bottom layer (North
side Secondary)

Compal Secret Data

Security Classification
2006/10/31

Issued Date

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


CPU Bypass capacitors

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

of

39

U6B

H_XSCOMP/H_YSCOMP trace
width and spacing is 5/20.

1
2

54.9_0402_1%

R691
54.9_0402_1%

12
12
13
13

B9
C13

H_ADSTB#0
H_ADSTB#1

HCLKN
HCLKP

AG1
AG2

CLK_MCH_BCLK#
CLK_MCH_BCLK

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

K4
T7
Y5
AC4
K3
T6
AA5
AC5

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

J7
W8
U3
AB10

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

HCPURST#
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#

B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3

H_RESET#
H_ADS#
H_TRDY#
H_DPWR#
H_DRD Y#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
H_CPUSLP#

R693

HRS0#
HRS1#
HRS2#

B4
E6
D6

H_RS#0
H_RS#1
H_RS#2

R694
24.9_0402_1%

12
12
13
13

H_ADSTB#0 4
H_ADSTB#1 4

18
18
18
18

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

AC35
AE39
AF35
AG39

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

18
18
18
18

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

AE37
AF41
AG37
AH41

DMITXN0
DMITXN1
DMITXN2
DMITXN3

18
18
18
18

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

AC37
AE41
AF37
AG41

DMITXP0
DMITXP1
DMITXP2
DMITXP3

12
12
13
13

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

AY35
AR1
AW7
AW40

SM_CK0
SM_CK1
SM_CK2
SM_CK3

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

AW35
AT1
AY7
AY40

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

AU20
AT20
BA29
AY29

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

DDR_CS0_DIMMA# AW13
DDR_CS1_DIMMA# AW12
DDR_CS2_DIMMB# AY21
DDR_CS3_DIMMB# AW21

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

12
12
13
13

+1.8V
H_DSTBP#[0..3] 4

1 R688
1
R689
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

M_ODT0
M_ODT1
M_ODT2
M_ODT3

M_ODT0
M_ODT1
M_ODT2
M_ODT3
2 80.6_0402_1%
2
80.6_0402_1%
+SM_VREF0
+SM_VREF1

4
4
4
4

18 PM_BMBUSY#
12,13 DDR_TS
18,36 DPRSLPVR
4,17 H_THERMTRIP#
18,26
PWROK
15,18,22,25,27 PLT_RST#

H_RESET# 4
H_ADS# 4
H_TRDY# 4
H_DPWR# 4
H_DRDY# 4
H_DEFER# 4
H_HITM# 4
H_HIT#
4
H_LOCK# 4
H_BR0# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 4
H_CPUSLP# 4

2 R692
1
100_0402_1%

SMRCOMPN
SMRCOMPP
+SM_VREF0

AL20
AF10

SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

AK1
AK41

PM_BMBUSY#
G28
DDR_TS
F25
DPRSLPVR
H26
H_THERMTRIP#
G6
PWROK
AH33
PLTRST_R#
AH34
K28

18 MCH_ICH_SYNC#

CALISTOGA_FCBGA1466~D
PMR3@

H_RS#[0..2] 4

CLK_MCH_DREFCLK# 14
CLK_MCH_DREFCLK 14

D_REF_SSCLKN
D_REF_SSCLKP

C40
D41

CLK_REQ#

H32

A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1

RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8
RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13

T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35

+VCCP

*1 = Mobile Yonah CPU (Default)

CFG9

*1 = Normal Operation

CFG11

*1 = Calistoga

0 = Reserved

0 = Lane Reversal Enable


(Default)

00
01
10
*11

1
2

H_SWNG1

100_0402_1%
2

C835
0.1U_0402_16V4Z

1
C836
0.1U_0402_16V4Z

CFG19

0 = Normal Operation

CFG19

Modified

SDVO_CTRLDATA

R705
1K_0402_1%

CFG20
Compal Secret Data

Security Classification
2006/11/05

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

(Default)

*1 = DMI Lane Reversal Enable


No SDVO Device Present
*0 = (Default)

1 = SDVO Device Present

(PCIE/SDVO select)
Issued Date

(Default)

SDVO is
*0 = Only PCIE or
(Default)
operational.

15mils

R704
C834
0.1U_0402_16V4Z

R701
2
1
1K_0402_5% @

(Default)

Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation
(Default)

*1 = Dynamic ODT Enabled


1.05V (Default)
*10 == 1.5V

CFG18

+SM_VREF0

R700
1K_0402_1%

=
=
=
=

0 = Dynamic ODT Disabled

CFG16

+3VS
R699
221_0603_1%

C833
0.1U_0402_16V4Z

R702
200_0402_1%

R703
100_0402_1%

CFG7

CFG[13:12]

1
1
2
1

1
1

= 667MT/s FSB
= 533MT/s FSB

1
2

H_VREF

CFG5

+1.8V

H_SWNG0

DDR_TS

0 = Reserved

R696
1K_0402_1%

+VCCP

R697
100_0402_1%

R687
1
2
10K_0402_5%

0 = DMI x 2
*1 = DMI x 4 (Default)

+VCCP

R698
221_0603_1%

MCH_CLKREQ# 14

+3VS

011
001

1
C832
0.1U_0402_16V4Z

CLK_PCIE_GMCH# 14
CLK_PCIE_GMCH 14
MCH_CLKREQ#

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

+SM_VREF1

Layout Note:
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /
H_SWNG1 trace width and spacing is 18/20.

CFG19

CLK_MCH_3GPLL 14
CLK_MCH_3GPLL# 14

CFG[2:0]

R695
1K_0402_1%

15mils

have internal pull up


Strap Pin Table CFG[3:17]
CFG[19:18] have internal pull down

Layout Note:
+SM_VREF0 & +SM_VREF1
trace width and
+1.8V
spacing is 20/20.

CALISTOGA_FCBGA1466~D
PMR3@

Refer Strap
Pin Table

A27
A26

SM_VREF0
SM_VREF1

ICH_SYNC#

MCH_CLKSEL0 14
MCH_CLKSEL1 14
MCH_CLKSEL2 14

D_REF_CLKN
D_REF_CLKP

SM_RCOMPN
SM_RCOMPP

PM_BMBUSY#
PM_EXTTS0#
PM_EXTTS1#
PM_THERMTRIP#
PWROK
RSTIN#

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26

AG33 CLK_MCH_3GPLL
AF33 CLK_MCH_3GPLL#

G_CLKP
G_CLKN

BA13
BA12
AY20
AU21
AV9
AT9

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

CFG

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

CLK

AE35
AF39
AG35
AH39

CLK_MCH_BCLK# 14
CLK_MCH_BCLK 14
H_DSTBN#[0..3] 4

24.9_0402_1%

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

12
12
13
13

H_REQ#[0..4] 4

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

D8
G8
B8
F8
A8

18
18
18
18

NC

Lane not Reversal


Polarity Reversal

HADSTB#0
HADSTB#1

HDINV#0
HDINV#1
HDINV#2
HDINV#3

HVREF0
HVREF1
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

J13
H_VREF
K13
H_XRCOMP E1
H_XSCOMP E2
H_YRCOMP Y1
H_YSCOMP U1
H_SWNG0
E4
H_SWNG1 W1

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

PM

R690

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

+VCCP

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

DDR MUXING

F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
W11
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA10
Y8
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8

DMI

H_A#[3..31] 4

U6A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

RESERVED

H_D#[0..63]

HOST

Title

1 = PCIE/SDVO are operating simu.

Compal Electronics, Inc.


Calistoga (1/5)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

of

39

12 DDR_A_DM[0..7]

12 DDR_A_DQS[0..7]

12 DDR_A_DQS#[0..7]

12 DDR_A_MA[0..13]

DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2

AU12
AV14
BA20

SA_BS0
SA_BS1
SA_BS2

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

AY13
AW14
AY14
AK23
AK24

SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#

U6E
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

DDR SYS MEMORY A

DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2

12
12
12

DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

DDR_A_D[0..63] 12
13
13
13

DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2

13 DDR_B_DM[0..7]

13 DDR_B_DQS[0..7]

13 DDR_B_DQS#[0..7]

13 DDR_B_MA[0..13]

13
13
13

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2

AT24
AV23
AY28

SB_BS0
SB_BS1
SB_BS2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#

AR24
AU23
AR27
AK16
AK18

SB_CAS#
SB_RAS#
SB_WE#
SB_RCVENIN#
SB_RCVENOUT#

CALISTOGA_FCBGA1466~D
PMR3@

DDR SYS MEMORY B

U6D
12
12
12

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

DDR_B_D[0..63] 13

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

CALISTOGA_FCBGA1466~D
PMR3@

Compal Secret Data

Security Classification
2006/11/05

Issued Date

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


Calistoga (2/5)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

of

39

PCIE_MTX_C_GRX_N[0..15]

15 PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]

15 PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

15 PCIE_GTX_C_MRX_N[0..15]
D

PCIE_GTX_C_MRX_P[0..15]

15 PCIE_GTX_C_MRX_P[0..15]

+3VS

R706 1 2.2K_0402_5%

GMCH_LCD_CLK

GM@ 2

R707 1 2.2K_0402_5%

GMCH_LCD_DATA

R710 2 2.2K_0402_5%

GMCH_CRT_CLK

R709 2 2.2K_0402_5%

GMCH_CRT_DATA

L
SDVOCTRL_DATA
SDVOCTRL_CLK

GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+

B37
B34
A36

LA_DATA0
LA_DATA1
LA_DATA2

GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-

C37
B35
A37

LA_DATA#0
LA_DATA#1
LA_DATA#2

15 GMCH_TZOUT0+
15 GMCH_TZOUT1+
15 GMCH_TZOUT2+

F30
D29
F28

LB_DATA0
LB_DATA1
LB_DATA2

15 GMCH_TZOUT015 GMCH_TZOUT115 GMCH_TZOUT2-

G30
D30
F29

LB_DATA#0
LB_DATA#1
LB_DATA#2

15
15
15
15

A32
A33
E26
E27

LA_CLK
LA_CLK#
LB_CLK
LB_CLK#

D32
J30
H30
H29
G26
G25
F32
B38
C35
C33
C32

LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

A16
C18
A19

TVDAC_A
TVDAC_B
TVDAC_C

15 GMCH_TXOUT015 GMCH_TXOUT115 GMCH_TXOUT2-

1.5K_0402_1%

LIBG

1 R712

75_0402_5%

GMCH_TV_COMPS

1 R713

150_0402_1%

GMCH_TV_LUMA

1 R714

150_0402_1%

GMCH_TV_CRMA

GMCH_TXCLK+
GMCH_TXCLKGMCH_TZCLK+
GMCH_TZCLKGMCH_ENBKL

26 GMCH_ENBKL

15 GMCH_LCD_CLK
15 GMCH_LCD_DATA
15 GMCH_ENVDD

GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
R715 1
2
4.99K_0402_1%

GMCH_CRT_CLK
GMCH_CRT_DATA

16 GMCH_CRT_VSYNC
16 GMCH_CRT_HSYNC
16 GMCH_CRT_B

R716 1
2
150_0402_1%
R717 1
2
150_0402_1%
R718 1
2
150_0402_1%

16 GMCH_CRT_G
16 GMCH_CRT_R

R719
1
2
255_0402_1%

J20

TV_IREF

B16
B18
B19

TV_IRTNA
TV_IRTNB
TV_IRTNC

J29
K30

TV_DCONSEL1
TV_DCONSEL0

C26
C25

DDCCLK
DDCDATA

H23
G23
E23
D23
C22
B22
A21
B21

VSYNC
HSYNC
BLUE
BLUE#
GREEN
GREEN#
RED
RED#

J22

CRT_IREF

CRT

16 GMCH_CRT_CLK
16 GMCH_CRT_DATA

TV_REFSET

TV

16 GMCH_TV_LUMA
16 GMCH_TV_CRMA

GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_ENVDD
LIBG

EXP_COMPI
EXP_COMPO

LVDS

H27
H28

15 GMCH_TXOUT0+
15 GMCH_TXOUT1+
15 GMCH_TXOUT2+

1 R711

PEGCOMP trace width


and spacing is 18/25 mils.

U6C

PCI-EXPRESS GRAPHICS

GM@ 2

PEGCOMP

D40
D38

+1.5VS_PCIE

R708
1
2
24.9_0402_1%

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38

PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15

EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38

PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15

EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

C568
C574
C567
C536
C575
C578
C550
C545
C552
C515
C517
C569
C547
C559
C541
C422

PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15

EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

C553
C461
C549
C548
C537
C579
C577
C516
C555
C426
C554
C518
C560
C551
C576
C570

PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@
PM@

0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15

Lane not Reversal


Polarity not Reversal

Lane not Reversal


Polarity not Reversal

CALISTOGA_FCBGA1466~D
PMR3@

Compal Secret Data

Security Classification
2006/11/05

Issued Date

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


Calistoga (3/5)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

of

39

+2.5VS

C838

C858
4.7U_0805_10V4Z

C859
2.2U_0805_16V4Z

MCH_A6

C866
0.47U_0402_6.3V6K

MCH_AB1

MCH_D2
C875
0.22U_0603_10V7K

C869
0.22U_0603_10V7K

C876
0.47U_0402_6.3V6K

+1.5VS

C839

C840

C841

2
+1.5VS_PCIE
R722

VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG

AC33
G41
H41

+1.5VS_3GPLL
+2.5VS

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2

E21
F21
G21

+2.5VS_CRTDAC

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL

B26
C39
AF1

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL

VCCA_LVDS
VSSA_LVDS

A38
B39

+2.5VS

VCCA_MPLL

AF2

+1.5VS_MPLL

VCCA_TVBG
VSSA_TVBG

H20
G20

+3VS_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

E19
F19
C20
D20
E20
F20

+3VS_TVDACA

VCCD_HMPLL0
VCCD_HMPLL1

AH1
AH2

+1.5VS

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

A28
B28
C28

VCCD_TVDAC
VCCDQ_TVDAC

D21
H19

2
1

C846+
2

C847

+1.5VS

C842
2200P_0402_50V7K

C843
0.1U_0402_16V4Z

+3VS
2 R720
1
0_0805_5%

C844
2200P_0402_50V7K

C845
0.1U_0402_16V4Z

+2.5VS
+3VS_TVBG

+3VS_TVDACA

C848
10U_0805_6.3V6M

2 L35
2.2_0603_5%

1
C850
1

1
0_0805_5%

+3VS

C851
0.1U_0402_16V4Z
1

+3VS_TVDACC

+3VS

2 R723
1
0.5_0805_1%

C853
2200P_0402_50V7K

AB41
AJ41
L41
N41
R41
V41
Y41

+3VS
R721
1
0_0805_5%

1
C854
0.1U_0402_16V4Z

R724
1
0_0805_5%

C857
0.1U_0402_16V4Z

W=40 mils

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

C849

P O W E R

+3VS_TVDACB

C856
2200P_0402_50V7K

+2.5VS

C855
22U_0805_6.3V6M

B30
C30
A30

10U_0805_6.3V6M

VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z

220U_D2_4VM

AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12

+2.5VS

C852
22U_0805_6.3V6M

VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
VTT52
VTT53
VTT54
VTT55
VTT56
VTT57
VTT58
VTT59
VTT60
VTT61
VTT62
VTT63
VTT64
VTT65
VTT66
VTT67
VTT68
VTT69
VTT70
VTT71
VTT72
VTT73
VTT74
VTT75
VTT76

H22

2200P_0402_50V7K

C837

AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1

VCC_SYNC

22U_0805_6.3V6M

330U_D2E_2.5VM_R9

U6H

+VCCP

+3VS_TVDACB

PCI-E/MEM/FSB PLL decoupling

+3VS_TVDACC

KC FBM-L11-201209-221LMAT_0805
KC FBM-L11-201209-221LMAT_0805

+1.5VS_3GPLL

+1.5VS

+1.5VS_TVDAC

+1.5VS

R726

VCCHV0
VCCHV1
VCCHV2
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31

1 R725
2
0.5_0805_1%
1

A23
B23
B25

+1.5VS_TVDAC
+3VS_VCCHV

1
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14

C860
0.1U_0402_16V4Z
1
L36

2
0_0603_5%

+3VS

R727
0.022U_0402_16V7K

1
C862
C865
0.1U_0402_16V4Z
@
2
2

C861
10U_0805_6.3V6M

1
C863
@10U_0805_6.3V6M

C864
0.022U_0402_16V7K

C867
0.1U_0402_16V4Z
2
2

C868
22U_0805_6.3V6M
+1.5VS_MPLL

+1.5VS

1
C870
0.1U_0402_16V4Z

C871
0.1U_0402_16V4Z

+1.5VS_HPLL

KC FBM-L11-201209-221LMAT_0805
R728
2
1
+1.5VS

45mA Max.

C872
10U_0805_6.3V6M

+1.5VS_DPLLB

KC FBM-L11-201209-221LMAT_0805
R729
2
1
+1.5VS

45mA Max.

C873
0.1U_0402_16V4Z

KC FBM-L11-201209-221LMAT_0805

C874
10U_0805_6.3V6M

+1.5VS_DPLLA
KC FBM-L11-201209-221LMAT_0805
R731
2
1
+1.5VS

R730

40mA Max.

+1.5VS

40mA Max.

CALISTOGA_FCBGA1466~D
PMR3@

1
C877
0.1U_0402_16V4Z

1
1

+
C878
330U_D2E_2.5VM_R9
2 GM@

C879
0.1U_0402_16V4Z

+
2

C880
330U_D2E_2.5VM_R9
GM@

Compal Secret Data

Security Classification
2006/11/05

Issued Date

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


Calistoga (4/5)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

10

of

39

POWER

GND

U6F

+VCCP

+1.5VS

+VCCP

+1.8V

U6G

+
B

+1.8V
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16

VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110

VCC_SM100
VCC_SM101
VCC_SM102
VCC_SM103
VCC_SM104
VCC_SM105
VCC_SM106
VCC_SM107

AR6
AP6
AN6
AL6
AK6
AJ6
AV1 VCCSM_LF2
AJ1 VCCSM_LF1

CALISTOGA_FCBGA1466~D
PMR3@

C719
0.47U_0402_6.3V6K

C718
0.47U_0402_6.3V6K

VCCSM_LF2
VCCSM_LF1

C723
0.47U_0402_6.3V6K

VCCSM_LF4
VCCSM_LF5
C722
0.47U_0402_6.3V6K

Place near pin


AT41 & AM41

Place near pin BA23

1
C717
2

Place near pin BA15

AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
AK34
AG34
AF34

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

U6J

P O W E R

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199

2006/11/05

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
J11
D11
B11
AV10
AP10
AL10
AJ10

VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279

P O W E R

VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360

AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

CALISTOGA_FCBGA1466~D
PMR3@

Compal Secret Data

Security Classification
Issued Date

AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21

CALISTOGA_FCBGA1466~D
PMR3@

CALISTOGA_FCBGA1466~D
PMR3@

Place near pin AV1 & AJ1

C710
0.1U_0402_16V4Z

C709
0.1U_0402_16V4Z

+1.8V

C707
0.1U_0402_16V4Z

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6

C706
0.1U_0402_16V4Z

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

P O W E R

VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8
VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99

C714

C705
0.22U_0603_10V7K

C704
0.22U_0603_10V7K
@

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99

C724
10U_0805_6.3V6M

C716

AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
M32
L32
J32
AA31
W31
V31
T31
R31
P31
N31
M31
AA30
Y30
W30
V30
U30
T30
R30
P30
N30
M30
L30
AA29
Y29
W29
V29
U29
R29
P29
M29
L29
AB28
AA28
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
AB23
AA23
Y23
P23
N23
M23
L23
AC22
AB22
Y22
W22
P22
N22
M22
L22
AC21
AA21
W21
N21
M21
L21
AC20
AB20
Y20
W20
P20
N20
M20
L20
AB19
AA19
Y19
N19

C715
10U_0805_6.3V6M

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

0.47U_0402_6.3V6K

330U_D2E_2.5VM_R9

1
C713

330U_D2E_2.5VM_R9

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

0.47U_0402_6.3V6K

C712
1U_0603_10V4Z

C711
10U_0805_6.3V6M

C708
10U_0805_6.3V6M

C703
0.22U_0603_10V7K

VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72

P O W E R

U6I
AD27
AC27
AB27
AA27
Y27
W27
V27
U27
T27
R27
AD26
AC26
AB26
AA26
Y26
W26
V26
U26
T26
R26
AD25
AC25
AB25
AA25
Y25
W25
V25
U25
T25
R25
AD24
AC24
AB24
AA24
Y24
W24
V24
U24
T24
R24
AD23
V23
U23
T23
R23
AD22
V22
U22
T22
R22
AD21
V21
U21
T21
R21
AD20
V20
U20
T20
R20
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18

Title

Compal Electronics, Inc.


Calistoga (5/5)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

11

of

39

+1.8V

+1.8V

+DDR_VREF

8 DDR_A_DQS#[0..7]
JP3

DDR_A_DQS#0
DDR_A_DQS0

8 DDR_A_MA[0..13]

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D14

Layout Note:
Place near JP27

DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11

+1.8V

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

C891
0.1U_0402_16V4Z

C890
0.1U_0402_16V4Z

C889
0.1U_0402_16V4Z

C888
0.1U_0402_16V4Z

C887
2.2U_0805_16V4Z

C886
2.2U_0805_16V4Z

C885
2.2U_0805_16V4Z

C884
2.2U_0805_16V4Z

C883
2.2U_0805_16V4Z

DDR_A_D21
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D22
DDR_A_D19
DDR_A_D25
DDR_A_D24
DDR_A_DM3
DDR_A_D27
DDR_A_D30
C

7 DDR_CKE0_DIMMA
8

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

DDR_A_BS#2

DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

8
8

+0.9VS

DDR_A_BS#0
DDR_A_WE#

C904
0.1U_0402_16V4Z

C903
0.1U_0402_16V4Z

C902
0.1U_0402_16V4Z

C901
0.1U_0402_16V4Z

C900
0.1U_0402_16V4Z

C899
0.1U_0402_16V4Z

C898
0.1U_0402_16V4Z

C897
0.1U_0402_16V4Z

C896
0.1U_0402_16V4Z

C895
0.1U_0402_16V4Z

C894
0.1U_0402_16V4Z

C893
0.1U_0402_16V4Z

C892
0.1U_0402_16V4Z

8 DDR_A_CAS#
7 DDR_CS1_DIMMA#
7

M_ODT1

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1
DDR_A_D35
DDR_A_D32
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D39
DDR_A_D33
DDR_A_D45
DDR_A_D41

DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D52
DDR_A_D53
+0.9VS

DDR_A_MA8
DDR_A_MA5

RP32
1
2

DDR_A_MA3
DDR_A_MA1

RP34 56_0404_4P2R_5% RP35 56_0404_4P2R_5%


1
4
4
1 DDR_A_MA6
2
3
3
2 DDR_A_MA7

4
3

Layout Note:
Pla ce these resistor
closely JP27,all
trace length Max=1.5"

RP33 56_0404_4P2R_5%
4
1 DDR_CKE0_DIMMA
3
2 DDR_A_BS#2

DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D51
DDR_A_D55
DDR_A_D56
DDR_A_D61
DDR_A_DM7

RP36 56_0404_4P2R_5% RP37 56_0404_4P2R_5%


DDR_CS0_DIMMA# 1
4
4
1 DDR_A_MA12
DDR_A_RAS#
2
3
3
2 DDR_A_MA9
DDR_A_MA10
DDR_A_BS#0

RP38 56_0404_4P2R_5% RP39 56_0404_4P2R_5%


1
4
4
1 DDR_A_MA2
2
3
3
2 DDR_A_MA4

DDR_A_WE#
DDR_A_CAS#

RP40 56_0404_4P2R_5% RP41 56_0404_4P2R_5%


1
4
4
1 DDR_A_BS#1
2
3
3
2 DDR_A_MA0

DDR_A_D58
DDR_A_D59
13,14 CLK_SMBDATA
13,14 CLK_SMBCLK

CLK_SMBDATA
CLK_SMBCLK
+3VS
1

RP42 56_0404_4P2R_5% RP43 56_0404_4P2R_5%


DDR_CS1_DIMMA# 1
4
4
1 DDR_A_MA13
M_ODT1
2
3
3
2 M_ODT0
56_0404_4P2R_5%
4
3

RP44 56_0404_4P2R_5%
1 DDR_A_MA11
2 DDR_CKE1_DIMMA

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_D7
DDR_A_D1
DDR_A_DM0

2006/11/05

R732
1K_0402_1%
D

+DDR_VREF

15mils

DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0

R733
1K_0402_1%

M_CLK_DDR0 7
M_CLK_DDR#0 7

DDR_A_D9
DDR_A_D15

DDR_A_D20
DDR_A_D16
DDR_TS
DDR_A_DM2

DDR_TS 7,13

DDR_A_D18
DDR_A_D23
DDR_A_D29
DDR_A_D28
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D26
DDR_A_D31
DDR_CKE1_DIMMA

DDR_CKE1_DIMMA 7

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

DDR_A_BS#1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 7

M_ODT0
DDR_A_MA13

M_ODT0

DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D34
DDR_A_D38
DDR_A_D40
DDR_A_D44
B

DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D47
DDR_A_D46
DDR_A_D48
DDR_A_D49
M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR1 7
M_CLK_DDR#1 7

DDR_A_DM6
DDR_A_D50
DDR_A_D54
DDR_A_D60
DDR_A_D57
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63

2009/11/05

C882
0.1U_0402_16V4Z

DDR_A_D12
DDR_A_D13

DIMM1 RVS H:9.2mm (BOT)

P-TWO_A5692B-A0G16-P
C905
0.1U_0402_16V4Z

Deciphered Date

+1.8V

DDR_A_D5
DDR_A_D6

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

1
C881
2.2U_0805_16V4Z
2

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

Compal Secret Data

Security Classification
Issued Date

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

DDR_A_D0
DDR_A_D4

8 DDR_A_DQS[0..7]

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

8 DDR_A_D[0..63]
8 DDR_A_DM[0..7]

Title

Compal Electronics, Inc.


DDRII-SODIMM SLOT1

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

12

of

39

+1.8V

8 DDR_B_DQS#[0..7]

+1.8V
+DDR_VREF

8 DDR_B_D[0..63]
8 DDR_B_DM[0..7]

JP4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

8 DDR_B_DQS[0..7]
DDR_B_D0
DDR_B_D5

8 DDR_B_MA[0..13]

DDR_B_DQS#0
DDR_B_DQS0
D

DDR_B_D7
DDR_B_D3

Layout Note:
Place near JP26

DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11

+
2

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DDR_B_D21
DDR_B_D17

1
C918

220U_D2_4VM

C917
220U_D2_4VM

C916
0.1U_0402_16V4Z

C915
0.1U_0402_16V4Z

C914
0.1U_0402_16V4Z

C913
0.1U_0402_16V4Z

C912
2.2U_0805_16V4Z

C911
2.2U_0805_16V4Z

C910
2.2U_0805_16V4Z

C909
2.2U_0805_16V4Z

C908
2.2U_0805_16V4Z

+1.8V

DDR_B_DQS#2
DDR_B_DQS2

DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D30
DDR_B_D31

7 DDR_CKE2_DIMMB

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

DDR_B_BS#2

DDR_CKE2_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

C931
0.1U_0402_16V4Z

C930
0.1U_0402_16V4Z

C929
0.1U_0402_16V4Z

C928
0.1U_0402_16V4Z

C927
0.1U_0402_16V4Z

C926
0.1U_0402_16V4Z

C925
0.1U_0402_16V4Z

C924
0.1U_0402_16V4Z

C923
0.1U_0402_16V4Z

C922
0.1U_0402_16V4Z

C921
0.1U_0402_16V4Z

8
8

C920
0.1U_0402_16V4Z

C919
0.1U_0402_16V4Z

+0.9VS

DDR_B_BS#0
DDR_B_WE#

8 DDR_B_CAS#
7 DDR_CS3_DIMMB#
7

M_ODT3

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
M_ODT3
DDR_B_D37
DDR_B_D36
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D35
DDR_B_D34

DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D47

+0.9VS

DDR_B_MA3
DDR_B_MA1

RP45
1
2

DDR_B_MA10
DDR_B_BS#0

RP47 56_0404_4P2R_5% RP48 56_0404_4P2R_5%


DDR_B_MA11
1
4
4
1
DDR_CKE3_DIMMB
2
3
3
2

DDR_B_BS#1
DDR_B_MA0

RP49 56_0404_4P2R_5% RP50 56_0404_4P2R_5%


DDR_B_MA8
1
4
4
1
DDR_B_MA5
2
3
3
2

4
3

4
3

RP46 56_0404_4P2R_5%
DDR_B_MA12
1
DDR_B_MA9
2

DDR_B_D48
DDR_B_D53

Layout Note:
Pla ce these resistor
closely JP26,all
trace length Max=1.5"

DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D51
DDR_B_D50
DDR_B_D60
DDR_B_D61
DDR_B_DM7

RP51 56_0404_4P2R_5% RP52 56_0404_4P2R_5%


DDR_CS2_DIMMB# 1
DDR_B_MA7
4
4
1
DDR_B_RAS#
DDR_B_MA6
2
3
3
2

DDR_B_D58
DDR_B_D59
12,14 CLK_SMBDATA
12,14 CLK_SMBCLK

RP53 56_0404_4P2R_5% RP54 56_0404_4P2R_5%


DDR_B_WE#
DDR_B_MA4
1
4
4
1
DDR_B_CAS#
DDR_B_MA2
2
3
3
2
A

CLK_SMBDATA
CLK_SMBCLK
+3VS
1

RP55 56_0404_4P2R_5% RP56 56_0404_4P2R_5%


DDR_CS3_DIMMB# 1
DDR_B_MA13
4
4
1
M_ODT3
M_ODT2
2
3
3
2
56_0404_4P2R_5% RP57
4
3

1
2

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_B_D4
DDR_B_D1

C907
0.1U_0402_16V4Z

DDR_B_D6
DDR_B_D2
D

DDR_B_D12
DDR_B_D13
DDR_B_DM1
M_CLK_DDR3
M_CLK_DDR#3

M_CLK_DDR3 7
M_CLK_DDR#3 7

DDR_B_D14
DDR_B_D15

DDR_B_D16
DDR_B_D20
DDR_TS
DDR_B_DM2

DDR_TS 7,12

DDR_B_D18
DDR_B_D19
DDR_B_D26
DDR_B_D28
DDR_B_DQS#3
DDR_B_DQS3
DDR_B_D29
DDR_B_D27
C

DDR_CKE3_DIMMB

DDR_CKE3_DIMMB 7

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
DDR_B_MA13

DDR_B_BS#1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 7
M_ODT2

DDR_B_D33
DDR_B_D32
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D43
DDR_B_D46
DDR_B_D49
DDR_B_D52
M_CLK_DDR2
M_CLK_DDR#2

M_CLK_DDR2 7
M_CLK_DDR#2 7

DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63

+3VS
A

PTI_A5652D-A0G16-P
C932
0.1U_0402_16V4Z

DIMM0 RVS H:5.2mm (BOT)

DDR_CKE2_DIMMB
DDR_B_BS#2

Compal Secret Data

Security Classification

56_0404_4P2R_5%

2006/11/05

Issued Date

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

1
C906
2.2U_0805_16V4Z
2

DDR_B_DM0

Title

Compal Electronics, Inc.


DDRII-SODIMM SLOT2

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Sheet

Thursday, March 22, 2007


1

13

of

39

+CK_VDD_MAIN1
+3VS
2
2
2
2
2

R876
R736
R737
R738
R739

+3VS

1 ROB_CLKREQF#
10K_0402_5%
1 PCIEC_CLKREQ#
10K_0402_5%
1 SATA_CLKREQ#
10K_0402_5%
1 MCH_CLKREQ#
10K_0402_5%
1 MINI_CLKREQ#
10K_0402_5%

R734
1

FSLA

CLKSEL2

CLKSEL1

1
C933
10U_0805_10V4Z

1
C934
0.1U_0402_16V4Z

1
C935
0.1U_0402_16V4Z

1
KC FBM-L11-201209-221LMAT_0805
C936
0.1U_0402_16V4Z

CLKSEL0

CPU
MHz

SRC
MHz

PCI
MHz

133

100

33.3

166

100

33.3

R745
2
1K_0402_5%

1
C941
10U_0805_10V4Z

1
C942
0.1U_0402_16V4Z

C943
0.1U_0402_16V4Z

MCH_CLKSEL0 7

1
1

22P_0402_50V8J
C946
1
2
18 CLK_48M_ICH
R747

1
2
1K_0402_5%

20
18

CLK_48M_CB

CLK_14M_ICH

CLK_14M_ICH

20 CLK_PCI_PCM

FSC
(Fixed at low)

CLK_XTAL_OUT

MCH_CLKSEL1 7

CPU_BSEL1

FSC

CLK_48M_CB

CLK_XTAL_IN
Y5
14.31818MHZ_20P_6X1430004201

CLK_48M_ICH

26 CLK_PCI_EC
29 CLK_PCI_SIO2

R753
2
1
8.2K_0402_5%

R754
2
1K_0402_5%

7 CLK_MCH_DREFCLK#
+3VS

VDDCPU

20

2
G

1:48M *0:CLKREQ7#
for Pin 38

2
G

PCI_PCM

34

PCICLK4/FCTSEL1

CLKREQ9#

72

PCI_EC

33

SEL_48M/PCICLK3

SRCCLKT8LP

70

PCI_DEBUG 32

SEL_24M/PCICLK2

SRCCLKC8LP

69

27

SEL_PCI6/PCICLK1

CLKREQ8#

71

22

SEL_PCI5/REF1

2 R757
1
33_0402_5%

PCI_ICH

37
39

R762 1
2.2K_0402_5%

Q76
3 2N7002_SOT23-3
S

CLK_CPU_BCLK# 4

2 R750
1
33_0402_5%
2 R751
1
33_0402_5%
2 R752
1
33_0402_5%

1:27M/SRC0 *0:DOT 96M/LCD100 PCI_PCM


for Pin 43,44/47,48

CLK_CPU_BCLK 4

13

REF0/FSLC/TEST_SEL

2
A

18,25,27 ICH_SMBDATA

R763 2
1
10K_0402_5%

CPUCLKT0LP
CPUCLKC0LP

X1

23

Q75
3 2N7002_SOT23-3

PCI_DEBUG

1:24M *0:test Mode


for Pin 45

CLK_MCH_BCLK# 7

14

FSC

1 R759
2
2.2K_0402_5%

CLK_MCH_BCLK 7

10

2 R749
1
39_0402_5%

CLK_SMBDATA

+3VS

CPUCLKT1LP
CPUCLKC1LP
VDD48

FSLB/TEST_MODE/24Mhz

PCI_ICH
R761 2
1
10K_0402_5%

H_STP_CPU# 18

11

45

CLK_SMBCLK

H_STP_PCI# 18

24

FSB

12,13 CLK_SMBDATA

18,25,27 ICH_SMBCLK

25

CPU_STOP#

USB_48MHz/FSLA

12,13 CLK_SMBCLK

1:CPU ITP *0:SRC 10


for Pin 6,5

CPUCLKT2_ITP/SRCCLKT10LP

CPUCLKC2_ITP/SRCCLKC10LP

16

3
2

SRCCLKT7LP

66

SRCCLKC7LP

67

DOTT_96MHz/27MHz_Nonspread
CLKREQ7#/48Mhz_1

38

DOTC_96MHz/27MHz_spread

SRCCLKT6LP

63

SRCCLKC6LP

64

CLKREQ6#

62

SRCCLKT5LP

60

ITP_EN/PCICLK_F0
VTT_PWRGD#/PD

CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15

Need BIOS to disable when GM SKU


CLK_PCIE_NAND 25
CLK_PCIE_NAND# 25
ROB_CLKREQF#

ROB_CLKREQF# 25

61
29

SRCCLKT4LP

58

CLK_PCIE_ICH 18

SRCCLKC4LP

59

CLK_PCIE_ICH# 18

CLKREQ4#

57

SMBCLK

CLK_PCIE_MCARD# 25
MINI_CLKREQ#

MINI_CLKREQ# 25

SMBDAT
SRCCLKT3LP

55

GNDSRC

SRCCLKC3LP

56

15

GNDCPU

CLKREQ3#/PCICLK5

28

21

GNDREF

SRCCLKT2LP

52

31

GNDPCI

SRCCLKC2LP

53

35

GNDPCI

CLKREQ2#

26

42

GND48

SRCCLKT1LP

50

CLK_PCIE_LAN 22

68

GNDSRC

SRCCLKC1LP

51

CLK_PCIE_LAN# 22

CLKREQ1#

46

THRM_PAD
THRM_PAD
THRM_PAD
THRM_PAD

CLK_PCIE_MCARD 25

SRCCLKC5LP

CLK_PCIE_SATA 17
CLK_PCIE_SATA# 17
SATA_CLKREQ#

SATA_CLKREQ# 18
CLK_PCIE_CARD 27
CLK_PCIE_CARD# 27

PCIEC_CLKREQ#

PCIEC_CLKREQ# 27

LCD100/96/SRC0_TLP

47

CLK_PCIE_GMCH 7

LCD100/96/SRC0_CLP

48

CLK_PCIE_GMCH# 7

Need BIOS to disable when PM SKU


Compal Secret Data

Security Classification

R766 2
1
10K_0402_5%

2006/11/05

Issued Date

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

MCH_CLKREQ# 7

ICS9LPRS325CKLFT_MLF72
<BOM Structure>

R765 2
1
10K_0402_5%
REF1

CLK_MCH_3GPLL# 7
MCH_CLKREQ#

CLKREQ5#/PCICLK6

GND

CLK_MCH_3GPLL 7

17

73
74
75
76

R764 2
1
10K_0402_5%

SRCCLKT9LP
SRCCLKC9LP

PCI_EC

*1:PCICLK3 0:CLKREQ5#
for Pin28

C940
0.1U_0402_16V4Z

C944
1
2
0.1U_0402_16V4Z
R743
+VDDAD
2
1
+3VS
KC FBM-L11-201209-221LMAT_0805

PCI_SRC_STOP#

X2

+3VS

VDDREF

CLK_ENABLE#

+3VS

41

CLK_ENABLE#

36 CLK_ENABLE#

12

MCH_DREFCLK 43
1
2
R755 GM@
33_0402_5%
CLK_MCH_DREFCLK# 1
MCH_DREFCLK# 44
2
R756 GM@
33_0402_5%

1
R758
10K_0402_5%

VDDPCI
VDDPCI

CLK_MCH_DREFCLK

CLK_PCI_ICH

18 CLK_PCI_ICH
B

30
36

VDDA
GNDA

19

REF1

7 CLK_MCH_DREFCLK

VDDSRC
VDDSRC
VDDSRC
VDDSRC

FSA

2 R746
1
12_0402_5%
2 R748
1
12_0402_5%

MCH_CLKSEL2 7

CPU_BSEL2

1
49
54
65

2 C947 +CK_VDD_REF 18
0.1U_0402_16V4Z
2 C948 +CK_VDD_48 40
0.1U_0402_16V4Z

FSB

FSB

2 +CK_VDD_REF
1_0805_1%
R742
1
2 +CK_VDD_48
2.2_0805_1%

U19

CPU_BSEL0
22P_0402_50V8J
C945
1
2

1
C939
0.1U_0402_16V4Z

+CK_VDD_MAIN1
R744
2
1
8.2K_0402_5%

1
C938
0.1U_0402_16V4Z

FSA
FSA

1
C937
10U_0805_10V4Z

R741
2

+CK_VDD_DP

+CK_VDD_MAIN2
R740
1

KC FBM-L11-201209-221LMAT_0805

FSLB

R735
1

+3VS

KC FBM-L11-201209-221LMAT_0805

+3VS

FSLC

+CK_VDD_DP

Title

Compal Electronics, Inc.


Clock generator

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

14

of

39

+LCDVDD

VGA BOARD Conn. VGA BOARD Conn.


+3VS

JP8

R77
2
G

1
2
100K_0402_5%

2
Q7
AOS 3401_SOT23

Q8
3

2
G

R78
2.2K_0402_5%

VGA_ENVDD
1
2
R281 GM@ 0_0402_5%

1
2
PM@ L28
FBM-L11-201209-121LMT_0805
1
2
PM@ L29
FBM-L11-201209-121LMT_0805

B+

W=80mils

D
Q6
2N7002_SOT23-3

+VGA_B+

R76
1M_0402_5%

1 2

R75
470_0805_5%

9 GMCH_ENVDD

LCD POWER CIRCUIT

+5VALW

+2.5VS

C164
@4.7U_0805_10V4Z

C165
0.1U_0402_16V4Z

+1.5VS

+LCDVDD

W=80mils

C163
1000P_0402_50V7K
1

S BSS138LT1G_SOT23-3 1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

0.1U_0603_25V7K

INVPWR_B+
L3
1
2
KC FBM-L11-201209-221LMAT_0805
1

C161

JP5

PCIE_MTX_C_GRX_N[0..15]

9 PCIE_MTX_C_GRX_N[0..15]
B+

C162
68P_0402_50V8K

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

LCD_DATA
LCD_CLK
DAC_BRIG
DISPOFF#
INVT_PWM

+3VS_LCD

+LCDVDD_B

INVPWR_B+

PCIE_MTX_C_GRX_P[0..15]

9 PCIE_MTX_C_GRX_P[0..15]

TZOUT1+

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14

PCIE_GTX_C_MRX_N[0..15]

9 PCIE_GTX_C_MRX_N[0..15]

TXCLK+
TXCLK-

PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15

PCIE_GTX_C_MRX_P[0..15]

9 PCIE_GTX_C_MRX_P[0..15]

PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13

TXOUT1+
TXOUT1TXOUT2+
TXOUT2TXOUT0+
TXOUT0-

PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10

INVPWR_B+

PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9

ACES_88242-3000
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7

LCD/PANEL BD. Conn.

PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6

JP9
26

DISPOFF#
2
RB751V_SOD323
1
2 R74
4.7K_0402_5%

1
D4

BKOFF#

+3VS

TZCLK+
TZCLK-

+3VS_LCD
+3VS

1
2 R79
FBMA-L11-201209-121LMT 0805
1
C168
0.1U_0402_16V4Z

LCD_DATA
LCD_CLK

26

DAC_BRIG

26

INVT_PWM

DAC_BRIG
DISPOFF#
INVT_PWM

L4
+LCDVDD_B

KC FBM-L11-201209-221LMAT_0805
1
C166
2
B

0.1U_0402_16V4Z

4.7U_0805_6.3V6K

+LCDVDD

1
INVPWR_B+
2

C167

42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

TZOUT0TZOUT0+
TZOUT2TZOUT2+
TZOUT1TZOUT1+

PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4

TXCLK+
TXCLK-

PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3

TXOUT1+
TXOUT1TXOUT2+
TXOUT2TXOUT0+
TXOUT0-

PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2

For EMI Request


LCD_CLK
LCD_DATA
DAC_BRIG
INVPWR_B+

INVT_PWM
DISPOFF#

ACES_88242-4001

1
C156
1
C157
1
C158
1
C159
1
C160

PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1

2
@ 47P_0402_50V8J
2
@ 47P_0402_50V8J
2
@220P_0402_50V7K
2
@220P_0402_50V7K
2
@220P_0402_50V7K

PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0

+3VS

ALL R CLOSE LVDS CONNECTOR


C177
LCD_CLK
LCD_DATA

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R837
R838

TXOUT0+
TXOUT0-

9 GMCH_TXOUT1+
9 GMCH_TXOUT1-

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R839
R835

TXOUT1+
TXOUT1-

9 GMCH_TXOUT2+
9 GMCH_TXOUT2-

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R840
R841

TXOUT2+
TXOUT2-

9 GMCH_TXCLK+
9 GMCH_TXCLK-

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R842
R843

TXCLK+
TXCLK-

2
2

PM@ 1 R830
PM@ 1 R834

TXOUT0+
TXOUT0-

VGA_TXOUT1+ 0_0402_5%
VGA_TXOUT1- 0_0402_5%

2
2

PM@ 1 R833
PM@ 1 R829

TXOUT1+
TXOUT1-

VGA_TXOUT2+ 0_0402_5%
VGA_TXOUT2- 0_0402_5%

2
2

PM@ 1 R832
PM@ 1 R828

TXOUT2+
TXOUT2-

VGA_TXCLK+
VGA_TXCLK-

2
2

PM@ 1 R831
PM@ 1 R827

TXCLK+
TXCLK-

7,18,22,25,27 PLT_RST#
TZOUT0+
TZOUT0-

9 GMCH_TZOUT0+
9 GMCH_TZOUT0-

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R850
R851

9 GMCH_TZOUT1+
9 GMCH_TZOUT1-

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R852
R853

TZOUT1+
TZOUT1-

9 GMCH_TZOUT2+
9 GMCH_TZOUT2-

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R854
R855

TZOUT2+
TZOUT2-

9 GMCH_TZCLK+
9 GMCH_TZCLK-

2
0_0402_5%2
0_0402_5%

GM@ 1
GM@ 1 R856
R857

TZCLK+
TZCLK-

2
2

PM@ 1 R858
PM@ 1 R859

TZOUT0+
TZOUT0-

VGA_TZOUT1+ 0_0402_5%
VGA_TZOUT1- 0_0402_5%

2
2

PM@ 1 R860
PM@ 1 R861

TZOUT1+
TZOUT1-

VGA_TZOUT2+ 0_0402_5%
VGA_TZOUT2- 0_0402_5%

2
2

PM@ 1 R862
PM@ 1 R863

TZOUT2+
TZOUT2-

VGA_TZCLK+
VGA_TZCLK-

2
2

PM@ 1 R864
PM@ 1 R865

TZCLK+
TZCLK-

0.1U_0402_16V4Z
PM@
2 I0
1

O
I1

9 GMCH_TXOUT0+
9 GMCH_TXOUT0-

GM@ 1
GM@ 1 R836
R844

2
0_0402_5%2
0_0402_5%

9 GMCH_LCD_CLK
9 GMCH_LCD_DATA

VGA_TXOUT0+ 0_0402_5%
VGA_TXOUT0- 0_0402_5%
A

0_0402_5%
0_0402_5%
5

VGA_TZOUT0+ 0_0402_5%
VGA_TZOUT0- 0_0402_5%

0_0402_5%
0_0402_5%
4

PLTRST_VGA#
VGA_TV_LUMA
VGA_TV_CRMA
VGA_ENVDD
VGA_ENBKL

TC7SH32FU_SSOP5
16 VGA_TV_LUMA
U28
16 VGA_TV_CRMA
PM@
26 VGA_ENBKL
26,27,29,34,35 SUSP#
16 VGA_CRT_VSYNC
16 VGA_CRT_HSYNC
16 VGA_DDC_CLK
16 VGA_DDC_DATA

PLTRST_VGA#
VGA_CRT_VSYNC
VGA_CRT_HSYNC
VGA_DDC_CLK
VGA_DDC_DATA
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

16 VGA_CRT_R
16 VGA_CRT_G
16 VGA_CRT_B

+1.8VS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

EC_SMB_CK2 4,26
EC_SMB_DA2 4,26
+3VS
+5VALW
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9

PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
CLK_PCIE_VGA
CLK_PCIE_VGA#

CLK_PCIE_VGA 14
CLK_PCIE_VGA# 14
B

LCD_DATA
LCD_CLK
VGA_TXCLKVGA_TXCLK+
VGA_TXOUT0VGA_TXOUT0+
VGA_TXOUT1VGA_TXOUT1+
VGA_TXOUT2VGA_TXOUT2+
VGA_TZOUT0VGA_TZOUT0+
VGA_TZOUT1VGA_TZOUT1+
VGA_TZOUT2VGA_TZOUT2+
VGA_TZCLKVGA_TZCLK+

ACES_88386-1K71

Compal Secret Data

Security Classification
2006/08/05

Issued Date

2007/08/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Title

Compal Electronics, Inc.


VGA CONN

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

15

of

39

CRT CONNECTOR
CRT Conn.

9 GMCH_CRT_B

R274

1
1
1

0_0402_5%

L33
1
2
BLM15AG121SN1D_0402

CRT_B
0_0402_5%
0_0402_5%

R431

R432

1
C561

R433

C562

C563

C564

JP39

W=40mils

CRT_G_L

CRT_B_L

1
C565
2

C566

1
2
3
4
5
6
7
8
9
10

CRT_R_L
CRT_G_L
CRT_B_L
CRT_HSYNC
CRT_VSYNC
CRT_DDC_DAT
CRT_DDC_CLK

6P_0402_50V8K

R273

CRT_G
0_0402_5%

6P_0402_50V8K

R276

2
PM@
2
GM@
2
PM@
2
GM@

CRT_R_L

6P_0402_50V8K

9 GMCH_CRT_G
15 VGA_CRT_B

22P_0402_25V8K

R275

CRT_R

22P_0402_25V8K

15 VGA_CRT_G

+5VS

L31
1
2
BLM15AG121SN1D_0402
L32
1
2
BLM15AG121SN1D_0402

22P_0402_25V8K

R278

2
PM@ 0_0402_5%
2
GM@ 0_0402_5%

150_0402_1%
2
1

9 GMCH_CRT_R

150_0402_1%
2
1

R277

150_0402_1%
2
1

15 VGA_CRT_R

1
2
3
4
5
6
7
8
9
10
ACES_87213-1000

9 GMCH_CRT_HSYNC

CRT_HSYNC
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%

+3VS

9 GMCH_CRT_DATA

2
R283

PM@
1
0_0402_5%

2
R280

GM@
1
0_0402_5%

1
R30
1
R32

15 VGA_CRT_HSYNC

15 VGA_DDC_DATA

Q9
1 2N7002_SOT23-3

CRT_DDC_DAT

CRT_VSYNC
0_0402_5%

GM@

9 GMCH_CRT_VSYNC

PM@

1
R29
1
R31

15 VGA_CRT_VSYNC

PM@

39_0402_5%

2
R282

GM@
1
0_0402_5%

2
R279

CRT_DDC_CLK

9 GMCH_CRT_CLK

1
0_0402_5%

15 VGA_DDC_CLK

Q10
1 2N7002_SOT23-3

1
C170
68P_0402_50V8K 2

1
C171
2 68P_0402_50V8K

15 VGA_TV_CRMA
9 GMCH_TV_CRMA

1
R42
1
R43

2
PM@
2
GM@

1
R38
1
R39

2
PM@
2
GM@

0_0402_5%

L8
1
2
BLM15AG121SN1D_0402
L7
1
2
BLM15AG121SN1D_0402

TV_LUMA
0_0402_5%
TV_CRMA
0_0402_5%
0_0402_5%
R91

150_0402_1%
2
1

9 GMCH_TV_LUMA

150_0402_1%
2
1

15 VGA_TV_LUMA

R92

D7
@

DAN217_SC59
3
1
2

TV-OUT Conn.

DAN217_SC59
3
1
2

+3VS

TV_LUMA_L
JP6
TV_CRMA_L

1
C181

C182
100P_0402_50V8J
C183
100P_0402_50V8J

D8
@

4
3
2
1

4
3
2
1

6
5

ALLTO_C10877-104A1-L_4P
C184
100P_0402_50V8J

100P_0402_50V8J
4

2006/10/31

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Display Interface Connector


Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
E

16

of

39

1st SATA HDD


CONN
JP25
1 C298
15P_0402_50V8J

Y6
2

SATA_TXP0_C

NC

IN

NC

OUT

2
C720
2
C721
2
C949
2
C950

SATA_TXN0_C
R767
10M_0402_5%

SATA_RXN0_C
SATA_RXP0_C

U2A

ICH_RTCX1
1

32.768KHZ_12.5P_1TJS125BJ2A251

1 R769
2
1M_0402_5%

+RTCVCC

C952
1U_0402_6.3V4Z
1
2
L37
BITCLK_MDC 1 R771
1
2
2
33_0402_5%
KC FBMA-11-100505-900T 0402 MDC@

25 ACZ_BITCLK_MDC

25 ACZ_SYNC_MDC
23 ICH_SYNC_AUDIO
25 ACZ_RST#_MDC
23 ICH_RST_AUDIO#

23 ICH_SDOUT_AUDIO
25 ACZ_SDOUT_MDC
26

PHDD_LED#

R781 2
R782 2
2
+3VS
R783

1 33_0402_5%
1 33_0402_5%
1 MDC@
20K_0402_5%

14 CLK_PCIE_SATA#
14 CLK_PCIE_SATA
R784
332K_0402_1%

V3

LAN_CLK
LAN_RSTSYNC

U5
V4
T5

LAN_RXD0
LAN_RXD1
LAN_RXD2

U1
R6

ACZ_BCLK
ACZ_SYNC

ACZ_RST#

R5

ACZ_RST#

T2
T3
T1

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

PHDD_LED#

T4
AF18

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C

AF7
AE7
AG6
AH6

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AE22
AH28

FERR#

AG26

H_FERR#

GPIO49 / CPUPWRGD

AG24

H_PW RGOOD

IGNNE#
INIT3_3V#
INIT#
INTR

AG22
AG21
AF22
AF25

H_IGNNE#

4.7K_0402_5%
2 R786
1
2
1
R787
8.2K_0402_5%

ICH_INTVRMEN
+3VS

PD _IORDY
PD_IRQ
PD_DACK#
PD_IOW#
PD_IOR#

AG16
AH16
AF16
AH15
AF15

RCIN#
SMI#
NMI

AF23
AH24

H_SMI#
H_NMI

STPCLK#

AH22

H_STPCLK#

THERMTRIP#

AF26

THRMTRIP_ICH#

IDE
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

1 10K_0402_5%
GATEA20 26
H_A20M# 4

1 R772
56_0402_5%
H_FERR# 4

4
4

PD_A0
PD_A1
PD_A2

DCS1#
DCS3#

AE16
AD16

PD_CS#1
PD_CS#3

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15

PD_D0
PD_D1
PD_D2
PD_D3
PD_D4
PD_D5
PD_D6
PD_D7
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15

DDREQ

AE15

PD_DREQ

SATA_RXN0
SATA_RXP0

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

C241
C242
C245
C244
+5VS
@10U_0805_10V4Z @0.1U_0402_16V4Z @0.1U_0402_16V4Z @0.1U_0402_16V4Z
2
2
2

+3VS

H_DPRSTP# 4,36
H_DPSLP# 4
+VCCP

Place components close to SATA CONN.

C246
10U_0805_10V4Z
2

C247
0.1U_0402_16V4Z
2

C248
0.1U_0402_16V4Z
2

V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12

GND
GND

24
23

OCTEK_SAT-22SO1G_RV
C249
0.1U_0402_16V4Z

2nd SATA HDD CONN

R779
56_0402_5%

4
4

H_STPCLK# 4

JP24

2HDD@
C

1 R780
2
24.9_0402_1%

SATA_TXP1_C

H_THERMTRIP# 4,7

***Must be placed close to AF26 pin within 2"

AH17
AE17
AF17

3900P_0402_50V7K
3900P_0402_50V7K

GND
A+
AGND
BB+
GND

+3VS +VCCP

1 10K_0402_5%
EC_KBRST# 26
H_SMI#
H_NMI

DA0
DA1
DA2

3900P_0402_50V7K

H_IGNNE# 4
H_INIT#
H_INTR

AG23

SATARBIASN
SATARBIASP

H_PWRGOOD 4

H_INIT#
H_INTR
R776
EC_KBRST#

SATA_CLKN
SATA_CLKP

LPC_FRAME# 26,29

1
2
3
4
5
6
7

SATA_TXP0
SATA_TXN0

+3VS

+5VS

AG27
AF24
AH25

3900P_0402_50V7K

+3VS

LPC_DRQ#1 29

R770 2

GATEA20
H_A20M#

26,29
26,29
26,29
26,29

CPUSLP#

AH10
AG10

A20GATE
A20M#

SATALED#

AF3
AE3
AG2
AH2

1 R785
2
24.9_0402_1%

LPC_FRAME#

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

TP1 / DPRSTP#
TP2 / DPSLP#

ACZ_SDOUT

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

CLK_PCIE_SATA# AF1
CLK_PCIE_SATA AE1

AB3

LAN_TXD0
LAN_TXD1
LAN_TXD2

ACZ_BITCLK
ACZ _SYNC

ACZ_SDOUT

LPC_DRQ#1

LFRAME#

SATA

+RTCVCC

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

U3

U7
V6
V7

23 ICH_AC_SDIN0
25 ACZ_SDIN1

INTVRMEN
INTRUDER#

AC-97/AZALIA

L38
BITCLK_AUDIO1 R773
1
2
2
33_0402_5%
KC FBMA-11-100505-900T 0402
1
2
R774
33_0402_5% MDC@
2
1
R775
33_0402_5%
1
2
R777
33_0402_5% MDC@
2
1
R778
33_0402_5%

23 ICH_BITCLK_AUDIO

LDRQ0#
LDRQ1# / GPIO23

AC3
AA5

LAN

W1
Y1
Y2
W3

JUMP_43X79

AA6
AB5
AC4
Y6

RTCRST#

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LAD0
LAD1
LAD2
LAD3

ICH_INTVRMEN W4
SM_INTRUDER# Y5

RTXC1
RTCX2

LPC

ICH_RTCRST# AA3

2
20K_0402_5%

J1
1

AB1
AB2

CPU

1
R768

+RTCVCC

ICH_RTCX2

RTC

1 C951
15P_0402_50V8J

2
D

2HDD@ 2

SATA_TXN1_C

2HDD@ 2

SATA_RXN1_C

2HDD@ 2

SATA_RXP1_C

2HDD@ 2

1 C955
3900P_0402_50V7K
1 C956
3900P_0402_50V7K
1 C957
3900P_0402_50V7K
1 C958
3900P_0402_50V7K

1
2
3
4
5
6
7

SATA_TXP1
SATA_TXN1
SATA_RXN1
SATA_RXP1

GND
A+
AGND
BB+
GND

+3VS
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

+3VS
1

C262
C263
C266
C265
10U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
2
2
2
@
@
@
@

+5VS

+5VS

Place components close to SATA CONN.

VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
GND
VCC12
GND
VCC12

C268
C269
C270
C271
10U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2HDD@
2 2HDD@
2 2HDD@
2 2HDD@

24
23

SUYIN_127043FB022G345ZR_NR

ICH7_BGA652~D
ICH7R3@
JP26

18

ODD_RST#

PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0

RTC Battery

Layout Note:
1. Under BATT1 battery Body, no Trace no Via
2. BATT1 + - PIN keep out 80mil from other component ,trace and via

+5VS

BATT1
2

+RTCBATT

1
C272
10U_0805_10V4Z

1
C273
0.1U_0402_16V4Z

C275
0.1U_0402_16V4Z
R211
+5VS

+RTCBATT

2
1
100K_0402_5%

2
D9

+5VS
+5VS

R212

Place components close to ODD CONN.

45@ RTCBATT

PD_IOW#
PD _IORDY
PD_IRQ
PD_A1
PD_A0
PD_CS#1

1
C274
0.1U_0402_16V4Z

SEC_CSEL

470_0402_5%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
53

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
54

PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15
PD_DREQ
PD_IOR#
PD_DACK#
PDIAG# 1 R210 2
PD_A2
100K_0402_5%
PD_CS#3
W=80mils

+5VS

+5VS
+5VS
+5VS

C276
0.1U_0402_16V4Z
A

SUYIN_800194MR050S110ZL

BAS40-04_SOT23

+CHGRTC

+RTCVCC

Compal Secret Data

Security Classification

C220
0.1U_0402_16V4Z

2006/11/05

Issued Date

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


ICH7-M(1/3)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 29, 2007

Sheet
1

17

of

39

+3V_SB

SIRQ

AF19
AH18
AH19
AE19

R792
R794
R796
R798

CLK14
CLK48

AC1
B2

CLK_14M_ICH
CLK_48M_ICH

SUSCLK

C20

SLP_S3#
SLP_S4#
SLP_S5#

B24
D23
F22

PM_SLP_S3#
SLP_S4#
SLP_S5#

PWROK

AA4

PWROK

AC22

DPRSLPVR

GPIO21 / SATA0GP
GPIO19 / SATA1GP
GPIO36 / SATA2GP
GPIO37 / SATA3GP

1
1
1
1

2
2
2
2

100_0402_5%
100_0402_5%
100_0402_5%
100_0402_5%

ACIN_D

AB18
OCP#

H_STP_PCI#
H_STP_CPU#

GPIO11 / SMBALERT#

AC20
AF21

GPIO18 / STPPCI#
GPIO20 / STPCPU#

A21

PM_CLKRUN#
17 ODD_RST#
26,27 ICH_PCIE_WAKE#

GPIO32 / CLKRUN#

AC19
U2

GPIO33 / AZ_DOCK_EN#
GPIO34 / AZ_DOCK_RST#

26,27 EC_SWI#
20,26,29
SIRQ
26 EC_THERM#

SIRQ
EC_THERM#

26,36

VGATE

AD22

VGATE

GPIO27
GPIO28

AG18

F20
AH21
AF20

26

GPIO26

B21
E23

27 SB_INT_FLASH_SEL#

AC21
AC18
E21

EC_SMI#

GPIO

14
14

H_STP_PCI#
H_STP_CPU#

GPIO0 / BM_BUSY#

B23

WAKE#
SERIRQ
THRM#
VRMPWRGD

GPIO

GPIO6
GPIO7
GPIO8

GPIO16 / DPRSLPVR
TP0 / BATLOW#

C21

PWRBTN#

C23

LAN_RST#

C19

RSMRST#

Y4

GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35 / SATAREQ#
GPIO38
GPIO39

100K_0402_5%
BT_DET# 1
2 R146

DPRSLPVR 7,36
1
@ 100K_0402_5%
PBTN_OUT# 26

EC_SCI# 26
EC_SCI#
ACIN_D
2
1
BT_DET# RB751V_SOD323
D54

EXP_CPPE# 27
EC_FLASH#
SATA_CLKREQ#

5
2

25
25
25
25

PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2

22
22
22
22

PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3

0.1U_0402_16V7K
0.1U_0402_16V7K

PCIE_PTX_C_IRX_N2 H26
KS@
PCIE_PTX_C_IRX_P2 H25
G28
2
1 C963 PCIE_ITX_PRX_N2
C964PCIE_ITX_PRX_P2
G27
2
1
KS@
PCIE_PTX_C_IRX_N3 K26
PCIE_PTX_C_IRX_P3 K25
J28
2
1 C360 PCIE_ITX_PRX_N3
C361PCIE_ITX_PRX_P3
J27
2
1

25
25
25
25

PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4

0.1U_0402_16V7K
0.1U_0402_16V7K

PCIE_PTX_C_IRX_N4 M26
ROBSON@
PCIE_PTX_C_IRX_P4 M25
L28
2
1 C1003PCIE_ITX_PRX_N4
C1004
PCIE_ITX_PRX_P4
L27
2
1

0.1U_0402_16V7K
0.1U_0402_16V7K

ROBSON@

PERn1
PERp1
PETn1
PETp1
PERn2
PERp2
PETn2
PETp2
PERn3
PERp3
PETn3
PETp3
PERn4
PERp4
PETn4
PETp4

P26
P25
N28
N27

PERn5
PERp5
PETn5
PETp5

T25
T24
R28
R27

PERn6
PERp6
PETn6
PETp6
SPI_CLK
SPI_CS#
SPI_ARB

P5
P2

SPI_MOSI
SPI_MISO

D3
C4
D5
D4
E5
C3
A2
B3

OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31

SPI

R2
P6
P1

R818
+3V_SB

2
1
10K_0402_5%

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

2
R847

1
10K_0402_5%

LINKALERT#

2
R800

1
10K_0402_5%

DBRESET#

2
R801

1
10K_0402_5%

OCP#

2
R803

1
10K_0402_5%

R I# 2
ACIN
26,28,30
R805
BT_DET# 25
EC_LID_OUT# 26
ICH_LOW_BAT# 1
R807

EC_FLASH# 27
SATA_CLKREQ# 14

EC_SWI#

U31
Y

3
F26
F25
E28
E27

USB

DIRECT MEDIA INTERFACE

PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P1

EC_SMI#

V26
V25
U28
U27

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y26
Y25
W28
W27

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA28
AA27

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD25
AD24
AC28
AC27

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

DMI_CLKN
DMI_CLKP

AE28
AE27

CLK_PCIE_ICH#
CLK_PCIE_ICH

C25
D25

DMI_IRCOMP

F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3

USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS#
USBRBIAS

ICH7_BGA652~D

D2
D1

USBRBIAS

1
R874
1
R875

1
CLK_PCI_ICH
R806
@ 10_0402_5%

C961
@ 15P_0402_50V8J

1
1K_0402_5%

+3VS

1 R812

ICH_GPIO48
2
8.2K_0402_5%
PCI_REQ4#
2
8.2K_0402_5%
PCI_REQ1#
1 R816
2
8.2K_0402_5%

8.2K_0804_8P4R_5%
RP62
PCI_REQ0#
1
8
PCI_PIRQE#
2
7
PCI_PIRQF#
3
6
PCI_PIRQH#
4
5

2
@ 1K_0402_5%
2
@ 100K_0402_5%

8.2K_0804_8P4R_5%
RP61
PCI_REQ2#
1
8
PCI_FRAME#
2
7
PCI_TRDY#
3
6
PCI_REQ3#
4
5

1 R815

8.2K_0804_8P4R_5%

TC7SH08FU_SSOP5

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

7
7
7
7

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

7
7
7
7

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

7
7
7
7

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

7
7
7
7

CLK_PCIE_ICH# 14
CLK_PCIE_ICH 14

Within 500 mils

R817 2
24.9_0402_1%
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7

+1.5VS

25
25
25
25
28
28
27
27
28
28
25
25
25
25
25
25

20
20
20

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#

U2B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

R819 22_0402_1%
1
2

Within 500 mils

ICH7R3@

E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4# / GPIO22
GNT4# / GPIO48
GPIO1 / REQ5#
GPIO17 / GNT5#

D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8

PCI_REQ0#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

B15
C12
D12
C15

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

A7
E10
B18
A12
C9
E11
B10
F15
F14
F16

PCI _IRDY#
PCI_PAR

PLTRST#
PCICLK
PME#

C26
A9
B19

PLT_RST#
CLK_PCI_ICH

G8
F7
F8
G7

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI

Interrupt

A3
B4
C5
B5

PIRQA#
PIRQB#
PIRQC#
PIRQD#

AE5
AD5
AG4
AH4
AD9

RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]

MISC
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

PCI_REQ1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#

PCI_REQ2# 20
PCI_GNT2# 20

PCI_REQ4#
ICH_GPIO48
PCI_REQ5#
B

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

20
20
20
20

PCI_IRDY# 20
PCI_PAR 20
PCI_RST# 20,26,29
PCI_DEVSEL# 20
PCI_PERR# 20

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCI_SERR# 20
PCI_STOP# 20
PCI_TRDY# 20
PCI_FRAME# 20
PLT_RST# 7,15,22,25,27
CLK_PCI_ICH 14

PCI_PIRQE# 20
PCI_PIRQF# 20
PCI_PIRQG# 20

AE9
AG8
AH8
F21
AH20

MCH_ICH_SYNC# 7

ICH7R3@

Compal Secret Data


2006/11/05

I/F

GPIO2 / PIRQE#
GPIO3 / PIRQF#
GPIO4 / PIRQG#
GPIO5 / PIRQH#

ICH7_BGA652~D

Issued Date

Place closely pin A9

8.2K_0804_8P4R_5%
RP60
PCI_PERR#
1
8
PCI_REQ5#
2
7
PCI _IRDY#
3
6
PCI_PIRQG#
4
5

2
8.2K_0402_5%

20 PCI_AD[0..31]

PCI_STOP#
PCI_DEVSEL#
PCI_SERR#
PCI_PLOCK#

8
7
6
5

PM_SLP_S5# 26

Security Classification

C960
@15P_0402_50V8J

8.2K_0804_8P4R_5%
RP59
PCI_PIRQD#
1
8
PCI_PIRQC#
2
7
PCI_PIRQB#
3
6
PCI_PIRQA#
4
5

1
8.2K_0402_5%

2
R811

DET_SAT_LED

0.1U_0402_16V4Z

SLP_S5#

1
C959
@15P_0402_50V8J

1
2
3
4

DET_SAT_LED

@ 10_0402_5%

+3VS

+3VS

For EMI

NEWCARD@
0.1U_0402_16V7K 2
1 C368
0.1U_0402_16V7K 2
1 C369
NEWCARD@

1
10K_0402_5%

+3V_SB

PCI-EXPRESS

PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1

2
R848

EC_RSMRST# 26

U2D
27
27
27
27

+3V_SB

EC_LID_OUT#

PLT_RST#

SLP_S4#

R795

@ 10_0402_5%

RP58
7,26

C962
2
1

EC need tri-state or set as GPI


when no driving above signal
680P_0402_50V7K

PWROK
2
10K_0402_5%

2
R804
ICH_LOW_BAT#

E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20

R793

CLK_14M_ICH 14
CLK_48M_ICH 14

1
R802

ICH7_BGA652~D
ICH7R3@

ODD_RST#C1007

2
332K_0402_1%

PM_SLP_S3# 26

CLK_14M_ICH

PM_BMBUSY#

SYS

DBRESET#

SPKR
SUS_STAT#
SYS_RST#

1
R846

1
8.2K_0402_5%

DBRESET#

RI#

A19
A27
A22

Clocks

SB_SPKR

SB_SPKR

A28

POWER MGT

R I#

2
R791

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

23

Place closely pin AC1

C22
B22
A26
B25
A25

SATA
GPIO

LINKALERT#
ICH_SMLINK0
ICH_SMLINK1

110K_0402_5%
1
10K_0402_5%

SMB

+3V_SB

ICH_SMBCLK
ICH_SMBDATA
2 R797
2
R799

Place closely pin B2

1
10K_0402_5%

PM_CLKRUN#
U2C

14,25,27 ICH_SMBCLK
14,25,27 ICH_SMBDATA

2
R788

CLK_48M_ICH

R790
2.2K_0402_5%

R789
2.2K_0402_5%

+3VS

Title

Compal Electronics, Inc.


ICH7-M(2/3)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

18

of

39

+VCCP
U2F

U2E
0.1U_0402_16V4Z

+ICH_V5REF_RUN

G10
AD17

+1.5VS
D

+ICH_V5REF_SUS
0.1U_0402_16V4Z

F6

0.1U_0402_16V4Z

AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23

1
C965
220U_D2_4VM

1
C966

1
C967

C971

0.1U_0402_16V4Z

Place closely pin


D28,T28,AD28.

For Energy Star


+5VALW

G
1

Q59
ENG@
AO3413_SOT23

C531
1000P_0402_50V7K
1
ENG@

PJ9
JUMP_43X39
@

1
R304

STB_SB#

29

100K_0402_5%
2
2
ENG@

+5VALW

+5V_SB
+5V_SB

C11
0.1U_0402_16V4Z
ENG@

+3VS

1
C982
0.1U_0402_16V4Z

Place closely pin AG28 within 100mlis.


+1.5VS

+1.5VS_DMIPLLR
R823
R824
1
2
1
2
0.5_0805_1%
0_0805_5%

+1.5VS_DMIPLL

1
C989
10U_0805_10V4Z

B27
+1.5VS_DMIPLL

+1.5VS
C990
0.01U_0402_16V7K

C991
0.1U_0402_16V4Z

L39
1
2
MBK1608301YZF_0603

+1.5VS

+SATAPLL

+3VS

C992
0.1U_0402_16V4Z

+1.5VS
C993
0.1U_0402_16V4Z

C995

1U_0603_10V4Z

D52
RB751V_SOD323

R825
100_0402_5%
2

Place closely pin AG5.

+3VS

1
+5VS

+ICH_V5REF_RUN
1

1
C996
0.1U_0402_16V4Z

+3V_SB
C997
0.1U_0402_16V4Z

Place closely pin AG9.

+1.5VS
C998
0.1U_0402_16V4Z

+USBPLL
2
L40
1
MBK1608301YZF_0603
1

V5REF[1]
V5REF[2]
V5REF_Sus
Vcc1_5_B[1]
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]

VccDMIPLL

AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5

Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]

AD2

VccSATAPLL

AH11

Vcc3_3[2]

AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9

Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]

E3

VccSus3_3[19]

C1

VccUSBPLL

L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

Vcc3_3 / VccHDA

U6

VccSus3_3/VccSusHDA

R7

Vcc3_3[1]

AG28

AA2
C700
Y7
0.1U_0402_16V4Z
V5
V1
W2
W7
+3V_SB

Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]

VccSus1_05/VccLAN1_05[1]
VccSus1_05/VccLAN1_05[2]

1
C968

AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19

Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]

A5
B13
B16
B7
C10
D15
F9
G11
G12
G16

P7

VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]

A24
C24
D19
D22
G19

VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]

K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7

+3VS

1
C979

C975
0.1U_0402_16V4Z

1
C976

2
4.7U_0805_10V4Z

C980

C981
0.1U_0402_16V4Z

Vcc1_5_A[24]
Vcc1_5_A[25]

AB8
AC8

+3V_SB

1
C983
0.1U_0402_16V4Z

Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]

VccSus1_05[2]
VccSus1_05[3]

2
0.1U_0402_16V4Z

+RTCVCC

T7
F17
G17

C28
G20

1
C974

+3VS

2
2
2
0.1U_0402_16V4Z

AB17
AC17

K7

2
2
0.1U_0402_16V4Z

C972
0.1U_0402_16V4Z

VccSus1_05[1]

+VCCP

1
C973

0.1U_0402_16V4Z

Vcc1_5_A[19]
Vcc1_5_A[20]

Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]

+ C970
330U_D2E_2.5VM_R9
2

+3VS

Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]

W5

+3V_SB

AE23
AE26
AH26

VccRTC

1
C969

1U_0603_10V4Z

V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]

VccSus3_3[1]

C984
C985
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2

C986
0.1U_0402_16V4Z

+3V_SB

1
C987
0.1U_0402_16V4Z

C988
0.1U_0402_16V4Z

+1.5VS

C994
1
2
0.1U_0402_16V4Z

A1
H6
H7
J6
J7

+1.5VS
1

C999
0.1U_0402_16V4Z

+5V_SB +3V_SB
2

1
A

R826

D53
RB751V_SOD323
1

10_0402_5%

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]

VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27

ICH7_BGA652~D
ICH7R3@

ICH7_BGA652~D
ICH7R3@
A

C701
0.1U_0402_16V4Z

+ICH_V5REF_SUS

VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]

A4
A23
B1
B8
B11
B14
B17
B20
B26
B28
C2
C6
C27
D10
D13
D18
D21
D24
E1
E2
E4
E8
E15
F3
F4
F5
F12
F27
F28
G1
G2
G5
G6
G9
G14
G18
G21
G24
G25
G26
H3
H4
H5
H24
H27
H28
J1
J2
J5
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M3
M4
M5
M12
M13
M14
M15
M16
M17
M24
M27
M28
N1
N2
N5
N6
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P3
P4
P12
P13
P14
P15
P16
P17
P24
P27

Compal Secret Data

Security Classification
C702
0.1U_0402_16V4Z

2006/11/05

Issued Date

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


ICH7-M(3/3)

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

19

of

39

+3VS

C311
10U_0805_10V4Z

+3VS
MBK1608301YZF_0603
2
1

A7
E8
B6
A6
C7
B7

MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
MS_SDIO(DATA0)/SD_DAT0/SM_D0

A4
C5
C6
A5
B5
E6
E7

SD_CLK/SM_RE#
SD_CMD/SM_ALE
SD_DAT0/SM_D4
SD_DAT1/SM_D5
SD_DAT2/SM_D6
SD_DAT3/SM_D7
SD_WP/SM_CE#

SMRE
SDCMD_SMALE
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7
SDWP#_SMCE#

CLK_48M_CB
R243

@ 10_0402_5%
1

SC_PWR_CTRL

B4
A3

SM_CLE
XD_CD#/SM_PHYS_WP#

R245 2
1K_0402_5%
R246 2
4.7K_0402_5%

P12
F1
P17

C329
@10P_0402_50V8J
1
14

CLK_48M_CB

AMP_440168-2

1
R249
56.2_0402_1%
2

R252

R251

R257

2
2

C335
220P_0402_50V7K

5.1K_0402_1%

56.2_0402_1%

56.2_0402_1%
2
1

4
3
2
1

5
6
7
8

1
R248
56.2_0402_1%

1
JP10

C333
1U_0603_10V4Z

+3VS

R250 2
T18
1
6.34K_0402_1% T19
XTPBIAS0
R13
XTPA0+
V14
XTPA0W14
XTPB0+
V13
XTPB0W13
W17
1
2
C334
1U_0603_10V4Z
V16
W16
V15
1 R254
2 1K_0402_5%
W15
1 R255
2
1K_0402_5%
CPS
R12
X_OUT R18
X_IN
R19

R0
R1
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
TPBIAS1
TPA1P
TPA1N
TPB1P
TPB1N
CPS

1 R259
2
4.7K_0402_5%

L1
K3
K5
L5

SUSPEND#

J5

CPS

AGND
AGND
AGND
R14
U13
U14

X_OUT
1 C336
18P_0402_50V8J
2

PCLK
PRST#
GRST#
RI_OUT#/PME#

XO
XI

8412@

X2
24.576MHz_16P_3XG-24576-43E1

SPKROUT

H3

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

G1
H5
H2
H1
J1
J2
J3

SCL
SDA

G2
G3

VR_EN#

K2

PCI8412ZHK_PBGA216

2 2

SMRE

1
2
5IN1@ R237 100K_0402_5%

SDWP#_SMCE#

1
2
5IN1@ R238 100K_0402_5%

SM_RB

1
2
5IN1@ R240 22K_0402_5%

R235
10K_0402_5%
5IN1@

Q22
2N7002_SOT23-3
5IN1@

R242
@ 10_0402_5%

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

+VCC_5IN1
+3VS

2 R247
1 PCI_AD20
100_0402_5%

CLK_PCI_PCM
PCI_RST#

4 In 1 Card Power Switch

+3VS
C328
@15P_0402_50V8J

PCI_PAR 18
PCI_FRAME# 18
PCI_TRDY# 18
PCI_IRDY# 18
PCI_STOP# 18
PCI_DEVSEL# 18
PCI_PERR#
PCI_SERR#
PCI_REQ2#
PCI_GNT2#

18
18
18
18

R244
10K_0402_5%
5IN1@
1

C339
0.1U_0402_16V4Z
5IN1@ 2

MC_PWRON#

U9
1
2
3
4

C340
4.7U_0805_10V4Z
5IN1@

GND
IN
IN
EN#

OUT
OUT
OUT
FLG

G528P1UF_SO8
5IN1@

8
7
6
5

C330
0.1U_0402_16V4Z
5IN1@ 2

1U_0603_10V4Z
5IN1@ 1
1
C331
2

C332
4.7U_0805_10V4Z
5IN1@

4 in 1 CardReader Conn.

CLK_PCI_PCM 14
PCI_RST# 18,26,29

JP11
R253 2
1
43K_0402_5%

+3VS

R256 1
PIRQA R569 2
PIRQB R570 2
PIRQC R571 2

PCM_SPK 23

43K_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

2
1
1
1

PCI_PIRQA# 18
PCI_PIRQB# 18
PCI_PIRQC# 18
SIRQ
18,26,29

DEVICE_ID
5IN1_LED

+5VS
2

R258 1
10K_0402_5%

+3VS

R260 2 300_0402_5%
2
R261
300_0402_5%

1
1

DEVICE_ID
1

C337
0.1U_0402_16V4Z

+VCC_5IN1

41

XD-VCC

MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
SDD0_SMD4
SDD1_SMD5
SDD2_SMD6
SDD3_SMD7

33
34
35
36
37
38
39
40

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

30
31
29
23
25
26
27
28

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

32
24

XD-GND
XD-GND

42
18
47
48

N.C.
N.C.
SHIELD
SHIELD

MSBS_SDCMD_SMWE#
SMELWP#
SDCMD_SMALE
R601
10K_0402_5% XD_CD#
SM_RB
8412@
SMRE
SDWP#_SMCE#
SMCLE
R602
100_0402_5%
8402@

1
1 2

2
G

CLK_PCI_PCM

PIRQA R580 2
PIRQB R581 2
PIRQC R582 2

R263

1 1
5IN1_LED

MSBS_SDCMD_SMWE#
1
2
5IN1@ R236 100K_0402_5%

R262
1K_0402_5%
+VCC_5IN1

X_IN
1 C338
18P_0402_50V8J

C327
1U_0603_10V4Z

+VCC_5IN1

VSSPLL
1

U7
R6
W5
V5
V6
U6
N5
R7
W6
L3
L2

+3VS

P2
U5
V7
W10

PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#

TEST0
CLK_48
PHY_TEST_MA

CLOSE TO CHIP
2

PCI8412

VSSPLL

G5
SMCLE
XD_CD#

2
0.01U_0402_16V7K

C/BE3#
C/BE2#
C/BE1#
C/BE0#

place near Chip 8412

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

C326

P1
W8

M1
M2
M3
M6
M5
N1
N2
N3
P3
R1
R2
P5
R3
T1
T2
W4
W7
R8
U8
V8
W9
V9
U9
R9
V10
U10
R10
W11
V11
U11
P11
R11

C325

HT-191NB_BLUE_0603
5IN1@

SD_CD#
MS_CD#
SM_CD#

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C324

D15

0.01U_0402_16V7K
1

E9
A8
B8

C323

SD_CD#
MS_CD#

0.1U_0402_16V4Z

VCCP
VCCP

AVDD_33
AVDD_33
AVDD_33
MC_PWR_CTRL_0
MC_PWR_CTRL_1/SM_R/B#

R17

1 R241
33_0402_5%

2
5IN1@

0.1U_0402_16V4Z
1

C8
F8

MSCLK_SDCLK_SMELWP#
MSBS_SDCMD_SMWE#
MSD3_SDD3_SMD3
MSD2_SDD2_SMD2
MSD1_SDD1_SMD1
MSD0_SDD0_SMD0

+3VS

SMELWP#

R234
120_0402_5%
5IN1@

2
1U_0603_10V4Z

0.01U_0402_16V7K

MC_PWRON#
SM_RB

1 R872
33_0402_5%
1 R239
33_0402_5%

1
C322

PCI_CBE#[0..3]

MSCLK_SDCLK1 2
5IN1@

0.01U_0402_16V7K 0.1U_0402_16V4Z
2 VSSPLL
0.1U_0402_16V4Z

C321
2

PCI_AD[0..31]

MSCLK_SDCLK2 2
5IN1@

C315
0.1U_0402_16V4Z

1
C320

U8B

18 PCI_CBE#[0..3]

+5VS

1
C319

0.1U_0402_16V4Z

18 PCI_AD[0..31]

1
C314

1
C318

K1
K19

VR_PORT
VR_PORT

U19
P15

1
C316

VDDPLL_33
VDDPLL_15

C317
0.1U_0402_16V4Z

1
C313

0.01U_0402_16V7K 10U_0805_10V4Z

P13
P14
U15

L13

1
C312

1
+AVDD_7412

4 IN 1 LED

L12
1
2
MBK1608301YZF_0603

0.01U_0402_16V7K

470_0805_5%
5IN1@

@
@
@

1 0_0402_5%
1 0_0402_5%
1 0_0402_5%

PCI_PIRQE# 18
PCI_PIRQF# 18
PCI_PIRQG# 18

4 IN 1 CONN

TAITW_R007-530-L3

SD-VCC
MS-VCC

15
9

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-CD-COM
SD-WP-SW
SD-WP-COM

16
19
20
11
12
13
21
22
43
44

MSCLK_SDCLK1
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MSBS_SDCMD_SMWE#
SD_CD#

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
SD-GND
SD-GND
MS-GND
MS-GND

8
4
3
5
7
6
2
14
17
1
10

MSCLK_SDCLK2
MSD0_SDD0_SMD0
MSD1_SDD1_SMD1
MSD2_SDD2_SMD2
MSD3_SDD3_SMD3
MS_CD#
MSBS_SDCMD_SMWE#

+VCC_5IN1

SDWP#_SMCE#

5IN1@

Bottom Side, Normal Insertion

Q23
MC_PWRON#
2
2N7002_SOT23-3
G
5IN1@

Compal Secret Data

Security Classification
2006/10/31

Issued Date

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.

PCI8412/PCI/1394 CONN/CARD SLOT


Size Document Number
Custom ISRAE M/B LA-3711P
Date:

Rev
1.0
Sheet

Thursday, March 22, 2007


1

20

of

39

CardBus Power Switch


+S1_VCC

U10

9
+S1_VCC

VCC
VCC
VCC

13
12
11

VPP

10

VCCD0
VCCD1
VPPD0
VPPD1

1
2
15
14

12V

40mil

1
1

+3VS
+S1_VPP

CC/BE3#/REG#
CC/BE2#/A12
CC/BE1#/A8
CC/BE0#/CE1#

H14
E19
G15
F17
G18
F19
H15
G19
C12
C14
G17
A12
A11
F18
E12

CPAR/A13
CFRAME#/A23
CTRDY#/A22
CIRDY#/A15
CSTOP#/A20
CDEVSEL#/A21
CBLOCK#/A19
CPERR#/A14
CSERR#/WAIT#
CREQ#/INPACK#
CGNT#/WE#
CSTSCHG/BVD1(STSCHG#/RI#)
CCLKRUN#/WP(IOIS16#)
CCLK/A16
CINT#/READY(IREQ#)

S1_A16_C

PCMCIA@ S1_RST

1 C358 S1_CD1#
100P_0402_50V8J

C15

CRST#/RESET

S1_BVD2

B12

CAUDIO/BVD2(SPKR#)

S1_CD1#
S1_CD2#
S1_VS1
S1_VS2

N15
B11
A13
B16

CCD1#/CD1#
CCD2#/CD2#
CVS1/VS1#
CVS2/VS2#

E10

A_USB_EN#

VPPD1
VCCD0#
VPPD0

B9
A9
C9

3.3V
3.3V

R264
10K_0402_5%
PCMCIA@

OC

VCCD0#
VCCD1#
VPPD0
VPPD1

TPS2211AIDBR_SSOP16
PCMCIA@

PCI 8412

F7
F10
F13
G14
H6
K6
K14
M14
N6
P7
P9

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

1 C359 S1_CD2#
100P_0402_50V8J
PCMCIA@

3
4

JP12

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

B10 S1_D2
C4
D1
E1
E2
E3
F2
F3
F5
G6
H17 S1_A18
M19 S1_D14

VCCD1#
2

RSVD/D2
RSVD/VD0/VCCD1#
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

PCMCIA@
2

0.1U_0402_16V4Z +3VS
C352 1
2
PCMCIA@
C353 1
2<>
PCMCIA@
4.7U_0805_10V4Z

20mil

5V
5V

SHDN

E13
E18
H18
L17

DATA/VD2/VPPD1
CLOCK/VD1/VCCD0#
LATCH/VD3/VPPD0

5
6

GND

S1_REG#
S1_A12
S1_A8
S1_CE1#

C350
0.1U_0402_16V4Z

CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

C10
A10
F11
E11
C11
B13
C13
A14
B14
B15
E14
A16
D19
E17
F15
H19
J17
J15
J18
K15
K17
K18
L15
L18
L19
M17
M18
N19
M15
N17
N18
P19

S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
R267
S1_WP
1
2 S1_A16
33_0402_5% S1_RDY#

A15
J19

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

C349
1

R265
43K_0402_5%
PCMCIA@

+3VS
1

VCCB
VCCB

U8A

C348
0.1U_0402_16V4Z
1

F6
F9
F12
F14
J6
J14
L6
L14
P6
P8
P10

C347
0.1U_0402_16V4Z
1
PCMCIA@

0.1U_0402_16V4Z +5VS
C346 1
2
PCMCIA@
C351 1
2
PCMCIA@
4.7U_0805_10V4Z

16

0.1U_0402_16V4Z
2

2 C342 PCMCIA@
0.1U_0402_16V4Z
2 C343 PCMCIA@
10U_0805_10V4Z
2 C344 PCMCIA@
0.01U_0402_16V7K
2 C345 PCMCIA@
1U_0603_10V4Z

A2
A17
A18
B1
B2
B3
B17
B18
B19
C1
C2
C3
C16
C17
C18
C19
D2
D3
D17
D18
E5
N14
P18
T3
T17
U1
U2
U3
U4
U12
U16
U17
U18
V1
V2
V3
V4
V12
V17
V18
V19
W2
W3
W12
W18

Near to PCMCIA slot.


+S1_VCC

C354
10U_0805_10V4Z
2
PCMCIA@

C355
0.1U_0402_16V4Z
PCMCIA@

+S1_VPP

C356
10U_0805_10V4Z
2
PCMCIA@

C357
0.1U_0402_16V4Z
PCMCIA@

85
86
87
88

PCI8412ZHK_PBGA216
8412@

69
70

GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
GND
ADD1
GND
BVD2
GND
ADD0
GND
BVD1
DATA0
DATA8
DATA1
GND DATA9
GND DATA2
DATA10
WP
CD2#
GND
GND

1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68

S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
+S1_VCC

+S1_VCC

+S1_VPP
S1_A16_C
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#

+S1_VPP
B

SANTA_130606-1_LT
PCMCIA@

Compal Secret Data

Security Classification
2006/10/31

Issued Date

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.


PCI7412/CB/CB SLOT

Size Document Number


Custom ISRAE M/B LA-3711P
Date:

Rev
1.0
Sheet

Thursday, March 22, 2007


1

21

of

39

+LAN_VDD18
1
R33

2
+3V_LAN
3.6K_0402_5%

L14
1
0_0603_5%

+AVDD18
U7
U5
18 PCIE_PTX_C_IRX_P3

C85 1

2 0.1U_0402_16V7K

PCIE_PTX_IRX_P3

29

HSOP

18 PCIE_PTX_C_IRX_N3

C86 1

2 0.1U_0402_16V7K

PCIE_PTX_IRX_N3

30

HSON

18 PCIE_ITX_C_PRX_P3

23

HSIP

18 PCIE_ITX_C_PRX_N3

24

HSIN

14 CLK_PCIE_LAN

26

REFCLK_P

14 CLK_PCIE_LAN#

27

REFCLK_N

7,15,18,25,27 PLT_RST#

20

PERSTB

C71
27P_0402_50V8J

CKXTAL1

LAN_X2

61

CKXTAL2

62

GVDD

65

EXPOSE_PAD

C64
27P_0402_50V8J

MDIP0
MDIN0
MDIP1
MDIN1

3
4
6
7

LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-

MDIP2
MDIN2
MDIP3
MDIN3

9
10
12
13

LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-

VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15
VDD15

15
21
32
33
38
41
43
49
52
58

+LAN_VDD15

16
37
53
46

+3V_LAN

25

EGND

VDD33
VDD33
VDD33
VDD33

31

EGND

AVDD33

AVDD33

59

AVDD18
AVDD18
AVDD18
AVDD18

5
8
11
14

EVDD18

22

EVDD18

28

NC
NC
NC
NC
NC
NC
NC
NC
NC

RTL8111B_QFN64

C76
0.1U_0402_16V4Z

C66
0.1U_0402_16V4Z

C512
0.1U_0402_16V4Z

C87

C82
0.1U_0402_16V4Z

C469
0.1U_0402_16V4Z

LAN_CTRL18

Q4
MMJT9435T1G_SOT223
1000M@

40mil

L9
0_0603_5%
1
C102
10U_0805_10V4Z
100M@ 2

+AVDD33
1

10U_0805_10V4Z
+AVDD18 2

100M@
L15
1
2
0_0603_5%
C100

LAN_CTRL15

22U_0805_6.3V6M

C106
0.1U_0402_16V4Z

0.1U_0402_16V4Z

Mount for 8101E


+3V_LAN

For Energy Start

+LAN_VDD18

R302
470_0805_5%
ENG@

100M@
R10
0_0402_5%

C81

2
G

1
R288
ENG@

+LAN_VDD15
2
1000P_0402_50V7K
C72
2

26

2
100K_0402_5%

Q52
2N7002_SOT23-3
ENG@

@ JUMP_43X79
Q36

2
ENG@
AOS 3401_SOT23

2
G

STB_LAN

+3V_LAN
PJ23

W=80mils

1
LAN_MDI0LAN_MDI0+

0.1U_0402_16V4Z

W=60mils

C452
1000P_0402_50V7K
1
ENG@
C460
4.7U_0805_10V4Z
2
ENG@

C453
0.1U_0402_16V4Z
ENG@

LAN_MDI1LAN_MDI1+

LAN Conn.

100M@

Place Close to Chip

100M@
R11
0_0402_5%

40mil
1

22U_0805_6.3V6M

+3VALW
R305
1M_0402_5%
ENG@

1
3

C513

+5VALW

100M@
1 49.9_0402_1%
1 49.9_0402_1%

Mount for 8101E

100M@
R17 2
R16 2

C78
0.1U_0402_16V4Z

Q3
MMJT9435T1G_SOT223
1000M@

100M@
L11
1
2
0_0603_5%
C84

C67
10U_0805_10V4Z
100M@ 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C65

1000M@

1 49.9_0402_1%
1 49.9_0402_1%

C73

40mil

+LAN_VDD18
2

Q51
2N7002_SOT23-3
ENG@
S

R15 2
R14 2

0.1U_0402_16V4Z

40mil
1

100M@
1

C514

+3V_LAN

Place Close to Chip


2

Mount for 8111B & 8100E

+3V_LAN

C75

0.1U_0402_16V4Z
2

+3V_LAN

Mount for 8101E

C74

+LAN_VDD15

+LAN_VDD18

60

17
18
35
34
39
40
42
50
51

C93
0.1U_0402_16V4Z

2
4

ISOLATEB

LAN_X1

LAN_X2

25MHZ_20P_6X25000017

0.1U_0402_16V4Z

+3V_LAN

LAN_X1

LAN_LINK#
LAN_ACTIVITY#

LANWAKEB

36

Y2

0.1U_0402_16V4Z

19

0.1U_0402_16V4Z

RSET

C63
@ 1000P_0402_50V7K
2

0.1U_0402_16V4Z

2
4

VCTRL15

C70
0.1U_0402_16V4Z
2
1

+3V_LAN

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z

C409
1U_0402_6.3V4Z

VCTRL18

64

C510

C69

1 2

C511

0.1U_0402_16V4Z

1
2
R290 100M@ 2K_0402_1%
2
1
R638 1000M@ 2.49K_0402_1%

15K_0402_5%

54
55
56
57

LED3
LED2
LED1
LED0

63

R301

5
6
7
8

C83

AT93C46-10SI-2.7_SO8

LAN_CTRL15

2 1K_0402_1%

GND
NC
NC
VCC

R303 1

DO
DI
SK
CS

25,26 LAN_WAKE#
+3VS

4
3
2
1

C506

LAN_CTRL18

45
47
48
44

C509

EEDO
EDDI/AUX
EESK
EECS

JP13
+3V_LAN
LAN_ACTIVITY# 2
R268

U34
MCT1
MX1+
MX1-

24
23
22

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

21
20
19

RJ45_MIDI2RJ45_MIDI2+

7
8
9

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

RJ45_MIDI1RJ45_MIDI1+

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

RJ45_MIDI0RJ45_MIDI0+

NS892402
1000M@

C79
0.1U_0402_16V4Z

C68
0.1U_0402_16V4Z

75_0402_1%
R266

R269

75_0402_1%

Amber LED-

RJ45_MIDI3-

RJ45_MIDI3+

PR4+

RJ45_MIDI1-

PR2-

RJ45_MIDI2-

PR3-

RJ45_MIDI2+

PR3+

RJ45_MIDI1+

PR2+

RJ45_MIDI0-

PR1-

RJ45_MIDI0+

PR1+

300_0402_5%

+3V_LAN
C3
1

15

SHLD2

14

SHLD1

13

Green LED+
TYCO_3-440470-4
LANGND

2
1

C4

C5

0.1U_0402_16V4Z

4.7U_0805_10V4Z

Compal Secret Data


2006/10/31

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C

16

SHLD1

Green LED-

C185
RJ45_GND
68P_0402_50V8K

SHLD2
PR4-

10

RJ45_GND

Issued Date

Amber LED+

11

75_0402_1%

Security Classification

2
R271

12

1000P_1206_2KV7K
2

C90
0.1U_0402_16V4Z

R270

75_0402_1%
1

R272

C89
0.1U_0402_16V4Z

C179
68P_0402_50V8K

LAN_LINK#

LAN_MDI0LAN_MDI0+

LAN_MDI1LAN_MDI1+

RJ45_MIDI3RJ45_MIDI3+

LAN_MDI2LAN_MDI2+

4
5
6

TCT1
TD1+
TD1-

1
2
3

LAN_MDI3LAN_MDI3+

1 300_0402_5%

Title

RTL8100CL

Size Document Number


CustomISRAE M/B LA-3711P

Thursday, March 22, 2007

Date:
G

Rev
1.0
Sheet

22
H

of

39

HD Audio Codec
+AVDD_HD

20mil

C390
100P_0402_50V8J

C392
0.1U_0402_16V4Z
2

1
C410
1
C412

24

MIC1_L

24

MIC1_R

1
C414
1
C415
1
C417
1
C418
1
C419

MIC1_L
MIC1_R

2
1U_0402_6.3V4Z
2
100P_0402_50V8J

2
268_HP_R

23

LINE1_L

NC

45

24

LINE1_R

DMIC_CLK

46

18

CD_L

NC

43

20

CD_R

NC

44

MIC1_C_R

22

MIC1_R

MONO_IN

12

PCBEEP

11

RESET#

10
5

26 SPK_SEL_CODEC

2
3
13
34

GPIO0
GPIO3
SENSE A
SENSE B

47

EAPD

48

SPDIFO

SDATA_IN

MONO_OUT

37

LINE1_VREFO

29

GPIO1

31

AMP_LHPIN 24

18

2
C

C405 1
1U_0402_6.3V4Z

SB_SPKR

1 R289
2
560_0402_5%

Q25

2
B
E

AMP_RHPIN 24

MONO_IN

1U_0402_6.3V4Z
1
2
R287
2.4K_0402_5%

MMST3904-7-F_SOT323-3

CardBus Beep
PCM_SPK
2

1
2
R293
22_0402_5%
2 R294
1 C416 1
@ 10_0402_5%
@
R295
1
2
33_0402_5%

C411 1
1U_0402_6.3V4Z
PCMCIA@

ICH_BITCLK_AUDIO 17
2
10P_0402_50V8J
ICH_AC_SDIN0 17

26

1 R291
2
560_0402_5%
PCMCIA@

R292
@ 10K_0402_5%

C413
0.01U_0402_16V7K
PCMCIA@

2
G

NSE_DPR

D13
RB751V_SOD323
@

Q26
2N7002_SOT23-3
@
2

Q27 C
MMST3904-7-F_SOT323-3
2
2
B
@
@
E
2.2K_0402_5%
R296

10mil
10mil
10mil

+S1_VCC

28
32

MIC2_VREFO

30

VREF

27

ACZ_VREF

JDREF

40

ACZ_JDREF

NC

33

AVSS1
AVSS2

26
42

+MIC1_VREFO_L

+MIC1_VREFO_R
+MIC2_VREFO

10mil

1
C420

2
20K_0402_1%

C421
100P_0402_50V8J

R297
10U_0805_10V4Z

ALC861-GR_LQFP48

DGND

C401
1
2

PCI Beep

20

MIC1_VREFO_L

DVSS1
DVSS2

1 R286
2
560_0402_5%

4
7

C400 1
1U_0402_6.3V4Z

BEEP#

AMP_LEFT 24

AMP_LHPIN
2
@ 2.2U_0603_6.3V6K
AMP_RHPIN
2
@ 2.2U_0603_6.3V6K

1
C404
1
C407

MIC1_VREFO_R

SDATA_OUT

26

@ 10P_0402_50V8J

AMP_RIGHT 24

EAPD

SYNC

17 ICH_SDOUT_AUDIO

26

BIT_CLK

EC Beep

C399

268_HP_L

41

2 1U_0402_6.3V4Z

SENSE_A
SENSE_B

9
39

HP_OUT_R

MIC1_L

HIGH: HARMAN
LOW: NO-BRAND

DVDD

HP_OUT_L

MIC2_R

CD_GND

100P_0402_50V8J
17 ICH_RST_AUDIO#

DVDD_IO

MIC2_L

NC

21

100P_0402_50V8J

25

38
AVDD2

AMP_RIGHT

19

17 ICH_SYNC_AUDIO

SPK_SEL

LINE_OUT_R

36

MIC1_C_L

35

NC

100P_0402_50V8J
2 1U_0402_6.3V4Z

LINE_OUT_L

15
CAMERA@
16
CAMERA@
17

220P_0402_50V7K
CAMERA@

ACES_85204-0200
CAMERA@

C505
2

C398

10P_0402_50V8J @
2
AMP_LEFT

14

R285
20K_0402_5%

INT_MIC
1

+VDDA
R284
10K_0402_5%

R459
1
2
JP40CAMERA@ 4.7K_0402_5%
1
2

861_HP_L
2
2.2U_0603_6.3V6K
861_HP_R
2
2.2U_0603_6.3V6K
MIC2_L
2
100P_0402_50V8J
2
1U_0402_6.3V4Z
MIC2_R
2
1U_0402_6.3V4Z
2
100P_0402_50V8J

1
C529
1
C454
1
C503
1
C504
1
C507
1
C508

AVDD1

AMP_LHPIN

C396
100P_0402_50V8J

680P_0402_50V7K
U14

AMP_RHPIN

C395

0.1U_0402_16V4Z

+MIC2_VREFO

+3VS

1
C393

C389

C388
2

L18
1
2
+3VS
FBMA-L11-160808-800LMT_0603

10U_0805_10V4Z

C386
10U_0805_10V4Z

+3VS_DVDD

40mil

680P_0402_50V7K

1
2
FBMA-L11-160808-800LMT_0603

+VDDA

L17

AGND

Regulator for CODEC


3

Fix 4.75V Output


+5VALW

Sense Pin
1
R298

24 MIC_SENSE

24

NBA_PLUG

2
20K_0402_1%

SENSE_A

2
R300

1
@ 39.2K_0402_1%

2
R306

SENSE_B
1
39.2K_0402_1%

SENSE A

SENSE FOR Int. Mic.


R460
1

2
20K_0402_1%
CAMERA@

SENSE_B

SENSE B

Impedance

U15

Codec Signals

39.2K

PORT-A (PIN 39, 41)

20K

PORT-B (PIN 21, 22)

10K

PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-G (PIN 43, 44)

5.1K

PORT-H (PIN 45, 46)

1
C423
4.7U_0805_10V4Z

VIN

GND

SHDN#

BP

+VDDA

2
APL5151-475BC-TRL_SOT23-5
1

C596
0.22U_0402_6.3V6K

C425
@ 4.7U_0805_10V4Z

26,27,28,34 SYSON

Moat Bridge
1
R332
1
R331
1
R307
1
R308
1
R309

2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%
2
0_0805_5%

Compal Electronics, Inc.

Compal Secret Data


2006/10/31

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

0.1U_0402_16V4Z

Security Classification

VOUT

C424

Issued Date

+VDDA

Title

HD Audio Codec ALC268


Size Document Number
Custom

Rev
1.0

ISRAE M/B LA-3711P

Date:

Thursday, March 22, 2007


G

Sheet

23
H

of

39

2
0_0603_5%
2
0_0603_5%

+MIC1_VREFO_L +MIC1_VREFO_R

+5VS

23 AMP_RHPIN
23 AMP_LHPIN

LOUT+
LOUT-

HP EN

/SD
BEEP

12
14

CP+
CP-

25

BIAS

1
2

MIC1_R

L20
1
2
KC FBM-L11-160808-121LMT 0603
L21
1
2
KC FBM-L11-160808-121LMT 0603

MIC1_L

HP_R
HP_L

22
21

INTSPK_R1
INTSPK_R2

8
9

INTSPK_L1
INTSPK_L2

17
18

HP_R
HP_L

C432
220P_0402_50V7K

MIC1_R_1

3
6
2
1

MIC1_L_1
1

SINGA_2SJ-T8201ND3

C433
220P_0402_50V7K
2
2

D22
@

SM05_SOT23

CVSS

15

VSS

16

GND
PGND
PGND
CGND
GND

2
23
7
13
29

C438
2.2U_0603_6.3V6K

HEADPHONE
OUT JACK
JP15
5

HPR

2 20_0402_5%

HPL

3
6
2
1

1
C441

Reserve for Test

1
C442

R319
R321
0_0402_5%
@

D21

7
SINGA_2SJ-T8201ND3
AGND

@
1

2N7002_SOT23-3

20_0402_5%

23

10P_0402_50V8J

10P_0402_50V8J

Q28

R320
0_0402_5%
@

L22 1
2
1
KC FBM-L11-160808-121LMT 0603
L23 1
2
1
KC FBM-L11-160808-121LMT 0603

2
G

C440
@0.1U_0402_16V4Z

HP_L

NBA_PLUG

R317
HP_R

AGND
PJ25
JUMP_43X39
@

IN_A Gain = 10dB (Internal Speaker)


IN_H Gain = 0dB (Headphone)

HP_EN

PJ24
JUMP_43X39
@

CVSS

APA2056A_TSSOP28

2 R318
@ 0_0402_5%

/AMP EN

24

28

MIC1_L

27

INR_H
INL_H

MIC1_R

23

ROUT+
ROUT-

4
6

MIC_SENSE

23

INR_A
INL_A

26

23

1
VDD

19

20
10
PVDD
PVDD

11

U16

AMP_LEFT

3
5

JP14
5

2 AMPR
0.22U_0402_6.3V6K
2 AMPL
0.22U_0402_6.3V6K
AMP_EN#
1
2
R312
100K_0402_5%
HP_EN
1
2
+5VS
R313
100K_0402_5%
AMP_RHPIN
INR _H
1
2
AMP_LHPIN
R314 24K_0402_5%1
INL_H
2
R315
24K_0402_5%
AMP_SD#
1
2
+5VS
R316
100K_0402_5%
1
2 AMP_BEEP
C435 1U_0402_6.3V4Z
AMP_CP+
AMP_CP1
2
C436
2.2U_0603_6.3V6K
AMP_BIAS
2
1
C437
2.2U_0603_6.3V6K
2
1
0.1U_0402_16V4Z
C439

1
C431
1
C434

AMP_RIGHT

HVDD

CVDD

1
C430

10U_0805_10V4Z

R311
4.7K_0402_5%

23

C429

MICROPHONE
IN JACK

10mil

R310
4.7K_0402_5%

23

1U_0402_6.3V4Z

C533
C428

0.1U_0402_16V4Z

C427

680P_0402_50V7K

W=40mil

1U_0402_6.3V4Z

10mil

+5VS

1
R158
1
R159

+3VS

APA2056 SPK/HP Amplifier

SM05_SOT23
26

2 R322
@ 0_0402_5%

EC_EAPD

AMP_SD#

1
1

C443
@0.1U_0402_16V4Z

Volume Control
+3VS

P
B

U17

1
R327

2
10K_0402_5%
1

C446
0.01U_0402_16V7K

SW_XRE094_3P

2
10K_0402_5%

A
G

COM

1
R326

SM05_SOT23 D16
2
1

C445
0.1U_0402_16V4Z

74LVC1G14GW_SOT353-5

DIP

Right Speaker Connector

+3VS

+3VS

R325
10K_0402_5%

0.1U_0402_16V4Z
2

C444

NC

R324
10K_0402_5%

DIP

SW1

R323
100K_0402_5%

+3VS

C447
0.01U_0402_16V7K

INTSPK_R1
INTSPK_R2

@
0_0603_5%
0_0603_5%

L24
L25

CD1#
D1
CP1
SD1#
Q1
Q1#
GND

VCC
CD2#
D2
CP2
SD2#
Q2
Q2#

14
13
12
11
10
09
08

C448

1
2
3
4
5
6

1
2
3
4
G5
G6

ACES_85205-04001

Left Speaker Connector


JP17

74LCX74MTC_TSSOP14

INTSPK_L1
INTSPK_L2

L26
L27

0.1U_0402_16V4Z

1
@
SM05_SOT23 D17

2006/10/31

1
2
3
4
5
6

1
2
3
4
G5
G6

ACES_85205-04001

Compal Electronics, Inc.


2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C

Compal Secret Data

Security Classification
Issued Date

SPK_L1
SPK_L2

0_0603_5%
0_0603_5%
3

MP need to change P/N DEB00000600

JP16
SPK_R1
SPK_R2

U18
1
2
3
4
5
6
7

ENCODER_DIR 26
ENCODER_PULSE 26

Title

AMP/Volume Encoder/Audio Jack/MIC


Size Document Number
Custom

Rev
1.0

ISRAE M/B LA-3711P

Date:

Sheet

Thursday, March 22, 2007


E

24

of

39

+3VS

+5VS

R506
1M_0402_5%
BT@
1
1

Q17
BT@AO3413_SOT23

1000P_0402_50V7K
BT@

+5VS
0.1U_0402_16V4Z
2
1
C449

+BT_VCC
26
26

Q18
2N7002_SOT23-3
BT@

2
G

BT_PWR

26

TP CONN.

1
2
BT@ 100K_0402_5%
2
C631

R507

C634
0.1U_0402_16V4Z
BT@

TP_DATA
TP_CLK
C450
68P_0402_50V8K

Blue Tooth
NAND mini Card(Robson support)

GND1

GND2

54

SWR
@ SM05_SOT23
D18
3
1
2

BT_DET#
BT_RST#

26

+BT_VCC
BT_DETACH

WLAN_BT_CLK
WLAN_BT_DATA
(MAX=200mA)

C635
BT@
10U_0603_6.3V6M~D

C636
BT@
0.1U_0402_16V4Z

1
2
3
4
5
6
7
8
9
10

SWL
1
2

SW4
SMT1-05_4P

Right

ACES_87213-1000
BT@

12 G2
11
10
9
8
7
6
5
4
3
2
1 G1
JP36

14
1

13

3
4
6
5

53

18
26

1
2
3
4
5
6
7
8
9
10

SW3
SMT1-05_4P

Left

PLT_RST#
+3V_SB

Fingerprint Conn
1

C627

JP28
1
2
3
4
5

FP@
18
18

USB20_N6
USB20_P6

FOX_AS0B226-S40N-7F
ROBSON@

17 ACZ_SYNC_MDC
17
ACZ_SDIN1
17 ACZ_RST#_MDC

JP38
ACZ_SDOUT_MDC

17 ACZ_SDOUT_MDC

0.1U_0402_16V4Z

MDC Conn.

MDC

+3VS

ACZ_SYNC_MDC
1
2ACZ_SDIN1_MDC
R357
33_0402_5% MDC@

1
3
5
7
9
11

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK

ACES_85201-0505

D25
@ SM05_SOT23

2
4
6
8
10
12

FP@

MDC@ C519
1000P_0402_50V7K

20mil

+3V_SB

1 1

C520
2

C521
4.7U_0805_10V4Z
MDC@

0.1U_0402_16V4Z
MDC@

ACZ_BITCLK_MDC 17
R358
C522

GND
GND
GND
GND
GND
GND

18 PCIE_ITX_C_PRX_N4
18 PCIE_ITX_C_PRX_P4

@ 10_0402_5%
@ 22P_0402_50V8J

ACES_88018-124G
MDC@

13
14
15
16
17
18

18 PCIE_PTX_C_IRX_N4
18 PCIE_PTX_C_IRX_P4

USB20_P7
USB20_N7

14 CLK_PCIE_NAND#
14 CLK_PCIE_NAND

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

18
18

14 ROB_CLKREQF#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

C451
68P_0402_50V8K

6
5

JP29
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

JP30

+3VS +1.5VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

E&T_6701-Q12N-00R
12
11
10
9
8
7
6
5
4
3
2
1

Connector for MDC Rev1.5

MINI CARD
22,26 PCIE_WAKE#

+3VS_MINI

60mil

1
2
R339 0_1206_5%

14 MINI_CLKREQ#
1

C523
1U_0402_6.3V4Z
KS@

C524
0.1U_0402_16V4Z
2
KS@

14 CLK_PCIE_MCARD#
14 CLK_PCIE_MCARD

CLK_PCIE_MCARD#
CLK_PCIE_MCARD

C525
10U_0805_10V4Z
KS@

18 PCIE_PTX_C_IRX_N2
18 PCIE_PTX_C_IRX_P2

+1.5VS

18 PCIE_ITX_C_PRX_N2
18 PCIE_ITX_C_PRX_P2
1

C526
4.7U_0805_10V4Z
2
KS@

1
C527
0.1U_0402_16V4Z
2
KS@

C528
0.01U_0402_16V7K
KS@

For MINICARD Port80 Debug


2
R360 2
R362

26,29 E51TXD_P80DATA
26,29 E51RXD_P80CLK

1
1 0_0402_5%
0_0402_5%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

GND1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

54

26,28

XMIT_OFF#

+1.5VS

+5VALW
+1.5VS

2
1
3

2
G

1
Q58
2N7002_SOT23-3
ENG@

C572
1000P_0402_50V7K
ENG@
1

WL_OFF#

26,28

KILL_SW#

WL_OFF#
KILL_SW#

1
2

U30

OUT
OUT
OUT
FLG

@ 0_0805_5%
R502

Y
A

KS@

C654

USB20_P1
USB20_N1

18

USB20_P0

18

USB20_N0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

Aces_88242-2001_20P

Int. Camera Conn

1
2
3
4
5
6
7

USB20_N5 18
USB20_P5 18
D38
@
SM05_SOT23

ACES_88266-05001
CAMERA@

2 XMIT_OFF#
KS@

1
RB751V_SOD323
TC7SH08FU_SSOP5

Compal Secret Data

Security Classification
2006/10/31

Issued Date

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

18
18

C626
CAMERA@ 0.1U_0402_16V4Z

+3V_WLAN
C571
0.1U_0402_16V4Z
ENG@

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

4.7U_0805_10V4Z
2

W=20mils

JP34

+CAM_VDD

+3VS_MINI

1
2
3
4
5
GND1
GND2

+USB_VCCC

8
7
6
5

Close to JP34

CAMERA@ 0_0805_5%

KS@ 0.1U_0402_16V4Z
D31
4

26

Q57
ENG@
AO3413_SOT23

3
2

R422 2
1
100K_0402_5%

GND
IN
IN
EN#

C653 G528P1UF_SO8

R877

+5VS

C573

R421
1M_0402_5%
ENG@

ICH_SMBCLK 14,18,27
ICH_SMBDATA 14,18,27

FOX_AS0B226-S40N-7F~D
KS@

+3VALW

ENG@

STB_WLAN

4.7U_0805_10V4Z

+3V_WLAN

+3V_WLAN

26

USB_EN#

PLT_RST# 7,15,18,22,27
+3V_WLAN

+5VALW
PJ22
JUMP_43X39
@

+USB_VCCC

U40
1
2
3
4

JP27

+3VALW

1.4A

+5VALW

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

KS@

USB Board Connector

+1.5VS

***
JP23

+3VS

+3VS_MINI
KS@
R359 0_0402_5%
2
1 MINI_WAKE#
WLAN_BT_DATA
WLAN_BT_CLK
MINI_CLKREQ#

Title

Compal Electronics, Inc.


New Card & MDC & Mini-Card

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
E

25

of

39

+3VALW

KSI[0..7]

C254

IE_BTN#
1
@ 10K_0402_5%

4.7K_0804_8P4R_5%

+5VS

BATT_IN

2
R363
2
R364

1 TP_CLK
4.7K_0402_5%
1 TP_DATA
4.7K_0402_5%

25
25
27,31
27,31
4,15
4,15

+5VALW
RP28

1
2
3
4
B

8
7
6
5

EC_SMB_DA1
EC_SMB_CK1
EC_SMB_CK2
EC_SMB_DA2

9 GMCH_ENBKL

R151 1

PM@
2

0_0402_5%

R167 1

GM@
2

0_0402_5%

R299

1
R401
1
R402

2 SYS ON
100K_0402_5%
2 SUSP#
100K_0402_5%

1
R384
1
R398
1
R399

2 STB_WLAN
100K_0402_5% ENG@
2 STB_LAN
100K_0402_5% ENG@
2 STB_SB
100K_0402_5% ENG@

SKU_ID 0:10(10E)
1:10C
2:10G
3:10GC

15
BKOFF#
32
FSTCHG
18
EC_SMI#
24 ENCODER_DIR
25
W L_OFF#
18,27 EC_SW I#

ENBKL

2.2K_0402_5%

4:10J(10EJ)
5:10CJ
6:10GJ
7:10GCJ

BUTTON_ID ID0:0 BUTTON


ID2:2 BUTTON
ID4:6 BUTTON
AD_BID0: Board ID
ID = 4 (PCB REV 1)

23
28
28
23,27,28,34
15,27,29,34,35
36
25
18
C284
2

+3VALW

0.1U_0402_16V4Z
1

2
R177

1
47K_0402_5%

EAPD
LID_SW #
MODE#
SYSON
SUSP#
VR_ON

BT_DETACH
PBTN_OUT#

28
28
17

CAPS_LED#
NUM_LED#
PHDD_LED#

17
17

KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EC_SCI#
BT_RST#
2FAN_DET#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
EC_SW I#

MODE#
SYS ON
SUSP#
BT_DETACH

CAPS_LED#
NUM_LED#

GATEA20
EC_KBRST#

+3VALW
SKU_ID

2
1
R345
100K_0402_5%
1
2
R349 GM@ 0_0402_5%

BUTTON_ID

2
R346

1
100K_0402_5%

AD_BID0

2
R141
1
R142

1
100K_0402_5%
2
0_0402_5%

55
54
23
41
19
5
6
31

GPIO

FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#

2
26
29
30
44
76
172
176

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

81
82
83
84
87
88
89
90

GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7

99
100
101
102
1
42
47
174

* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
*GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#

Ra
Rb

1 2

85
86
91
92
93
94
97
98

EC_LID_OUT#

+3VALW

R173
332K_0402_1%

R420
10K_0402_5%
D14

ON/OFFBTN# 28
KILL_SW#
PM_SLP_S3#
PM_SLP_S5#

KILL_SW# 25,28
PM_SLP_S3# 18
PM_SLP_S5# 18

EC_PME#

ACIN

95

Digital To Analog

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

SMBus

8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168

Analog To Digital

SCL1
SDA1
SCL2
SDA2

163
164
169
170

Interface

PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3

VCCA

110
111
114
115
116
117

INVT_PWM 15
BEEP#
23
PW R_SUSP_LED 28
ACOFF 32
USB_EN# 25,28
EC_ON 28
EC_LID_OUT# 18
SATELLITE_LED# 28

LAN_WAKE# 22,25

18,28,30
PCIE_WAKE# 22,25

RB751V_SOD323

EC_PME#
FAN_SPEED2 4
BUTTON_ID

SKU_ID
AD_BID0

ECAGND
2
1
C240 0.01U_0402_16V7K

+3VALW

ALI/MH# 31,32

1
R347
DAC_BRIG
BT_PWR
IREF
EN_DFAN1
EC_EAPD
POW ER_LED#
WL_BT_LED#
HDD_LED#
BATT_CHG_LOW_LED#
BATT_FULL_LED#
CB_PW R_OK

GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
FANTEST_TP/GPIO05/FAN3PWM

171
12
11

Timer PinTOUT2/GPIO2F

175

E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

3
4
106
107

RSMRST# 1
R181
E51RXD_P80CLK
E51TXD_P80DATA

XCLKI
XCLKO

158
160

C R Y2
C R Y1

R365 1
R403 1

BATT_TEMPA 31

BUTTON_ID 28
BATT_OVP 32

DAC_BRIG 15
BT_PWR 25
IREF
32
EN_DFAN1 4
PW ROK 7,18
EN_DFAN2 4
EC_EAPD 24

2
100K_0402_5%
2
0.22U_0603_10V7K

1
C250
@

EN_DFAN1
R512
1M_0402_5%

POW ER_LED# 28
WL_BT_LED# 28
HDD_LED# 28
BATT_CHG_LOW_LED# 28
BATT_FULL_LED# 28
VGATE 18,36
R527
NSE_DPR 23
2
1
10K_0402_5%

R871
1M_0402_5%
PM@

SPK_SEL_CODEC 23

2
100K_0402_5%

EN_DFAN2

+S1_VCC
FAN_SPEED1 4
ENCODER_PULSE 24

2 4.7K_0402_5%
2 4.7K_0402_5%

C R Y1

1 R204
2C R Y2
@ 20M_0603_5%

EC_THERM# 18
STB_WLAN 25

E51RXD_P80CLK 25,29
E51TXD_P80DATA 25,29

1 C366

KB910Q B4_LQFP176

X3

1 C367

32.768KHZ_12.5P_1TJS125BJ2A251

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

*
5

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

29
STB_SB
18
EC_SCI#
25
BT_RST#
2
1
R873 10K_0402_5%

4.7K_0804_8P4R_5%

15 VGA_ENBKL

TP_CLK
TP_DATA

EC_TINIT#

+3VALW

10P_0402_50V8J

+3VALW

28

@ 2.2K_0402_5%

2
R171

Wake Up

GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7

R676

KB_CLK
KB_DATA
PS_CLK
PS_DATA

D55A
@ BAV99DW-7_SOT363

8
7
6
5

Pulse

D55B
@

RP27

1
2
3
4

32
33
36
37
38
39
40
43

R677
@ 2.2K_0402_5%

IN

+5VS

GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7

EC_RSMRST# 18

OUT

IE_BTN#
10K_0402_5%

@ MMBT3906_SOT23

NC

Q47

BAV99DW-7_SOT363

NC

1
R172

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

1
RSMRST#

+3VALW

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

71
72
73
74
77
78
79
80

0_0402_5%
2

X-BUS Interface

KBA1
1
R185
KBA4
1
R187
KBA5
1
R194

2
@ 10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

28

10P_0402_50V8J

+3VALW

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

KSO0

10K_0804_8P4R_5%

FRD#
FW R#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

R760
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

FREAD#
FW R#
FSEL#

RSMRST circuit
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

27
27
27

MODE#
FRD#
SELIO#
FSEL#

ENE-KB910-B4

8
7
6
5

17
35
46
122
137
167

1
2
3
4

C363
1U_0603_10V4Z

RP29

STB_LAN

@ ACES_85205-04001
0.1U_0402_16V4Z

18,20,29 SIRQ
22
STB_LAN

+3VALW

LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *

+5VALW

E51RXD_P80CLK
E51TXD_P80DATA

14 CLK_PCI_EC

15
14
13
10
9
165
18
7
25
24

VCC
VCC
VCC
VCC
VCC
VCC
VCC

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

0.1U_0402_16V4Z

GND
GND
GND
GND
GND
GND

R179 2

17,29 LPC_AD0
17,29 LPC_AD1
17,29 LPC_AD2
17,29 LPC_AD3
17,29 LPC_FRAME#
18,20,29 PCI_RST#

16
34
45
123
136
157
166

U23
@ 33_0402_5%
1

C364

1
2
3
4

1
2
3
4

C299
1000P_0402_50V7K

C291
@ 22P_0402_50V8J
2
1

JP18

KSO[0..17] 28

2
2
0.1U_0402_16V4Z

C264
1000P_0402_50V7K
1
1

For EC Tools

KSI[0..7] 28

KSO[0..17]

+3VALW

159

2
2
0.1U_0402_16V4Z

L16
ECAGND
1
2
FBMA-L11-160808-800LMT_0603

C243

to 0 ohm

Internal Keyboard

C303

R157 Change
1
2
0_0603_5%

BATGND

0.1U_0402_16V4Z
1
2

E CAGND

0.1U_0402_16V4Z
1 C362
1
C365

161

96

ADB[0..7] 27

VCCBAT

KBA[0..19] 27

ADB[0..7]

AGND

KBA[0..19]

2006/10/31

Deciphered Date

2009/11/13

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

ENE-KB910
Size

Document Number

R ev
1.0

ISRAE M/B LA-3711P


Date:

Sheet

Thursday, March 22, 2007


1

26

of

39

New Card
+3V_SB

NEWCARD@
1
2 CP_USB#
R566 100K_0402_5%

+3VS

+3V_SB

+1.5VS

+3VALW_CARD

+3VS_CARD

Imax = 0.275A

1
2EXP_CPPE#
R490 100K_0402_5%
NEWCARD@
C583

C584

C591

@ 10U_0805_6.3V6M
2 0.1U_0402_16V4Z 2

NEWCARD@

C580

C590

C589

C586

@ 10U_0805_6.3V6M
2

@ 10U_0805_6.3V6M
2 0.1U_0402_16V4Z 2

NEWCARD@

C587

4.7U_0805_6.3V6K

18
18

I1

+3V_SB

21

3.3Vaux_in

18
19

1.5Vin1
1.5Vin2

14
15
4
3
2

CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#

3.3Vin1
3.3Vin2

15,26,29,34,35 SUSP#
23,26,28,34 SYSON
7,15,18,22,25 PLT_RST#

TC7SH32FU_SSOP5
NEWCARD@

11

CP_USB#
EXP_CPPE#

PCIEC_CLKREQ# 14

GND

Q16
2N7002_SOT23-3
NEWCARD@

+1.5VS

RCLKEN 2
G
3

5
6

3.3Vout1
3.3Vout2

7
8

Aux_out

20

1.5Vout1
1.5Vout2

16
17

OC#

23

RCLKEN
PERST#

22
9

60mils

USB20_N3
USB20_P3

CP_USB#

+3VS_CARD
14,18,25 ICH_SMBCLK
14,18,25 ICH_SMBDATA
+1.5VS_CARD

40mil
+3VALW_CARD

18,26 ICH_PCIE_WAKE#
+3VALW_CARD

40mil

PERST#

+1.5VS_CARD
+3VS_CARD

CLKREQ#
EXP_CPPE#

18 EXP_CPPE#
14 CLK_PCIE_CARD#
14 CLK_PCIE_CARD

RCLKEN
PERST#

18 PCIE_PTX_C_IRX_N1
18 PCIE_PTX_C_IRX_P1

NC1
NC2
NC3
NC4
NC5

I0

C581
10U_0805_6.3V6M

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

18 PCIE_ITX_C_PRX_N1
18 PCIE_ITX_C_PRX_P1

NEWCARD@ TPS2231PWPR_PWP24

1
10
12
13
24

C592
0.1U_0402_16V4Z
NEWCARD@

NEWCARD@
0.1U_0402_16V4Z

JP19

+3VS

U38

CLKREQ#

C585
NEWCARD@
0.1U_0402_16V4Z

R491
10K_0402_5%
NEWCARD@

R492
NEWCARD@ 10K_0402_5%

NEWCARD@

+3VS

C582
10U_0805_6.3V6M

Imax = 0.75A

2 0.1U_0402_16V4Z 2

+3VS

C588
NEWCARD@
0.1U_0402_16V4Z

U29

+3VS

+1.5VS_CARD

Imax = 1.35A

27
28

GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLK- GND
REFCLK+ GND
GND
PERn0
PERp0
GND
GND
PETn0
GND
PETp0
GND

31
32

29
30

GND
GND
TYCO_1759056-1 NEWCARD@

KBA[0..19]
ADB[0..7]

1MBU25Flash ROM

1
R220

2
100K_0402_5%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

U26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

KBA19
KBA10
ADB7
ADB6
ADB5
ADB4

2
0_0402_5%

1
8
7
6
5

VCC
WP
SCL
SDA

A0
A1
A2
GND

I1

INT_FLASH_EN#
FSEL#

R845

+3VALW
+3VALW
C376

FSEL#
KBA0

FWE#

R233

0.1U_0402_16V4Z
4

I0

I1

O
U27

SUSP#

EC_FLASH# 18
A

Q11

2N7002_SOT23-3

TC7SH32FU_SSOP5

FWR#

1
2
3
4

2006/11/05

Issued Date

2
100K_0402_5%

2009/11/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

26

Compal Electronics, Inc.

Compal Secret Data

Security Classification
R224
1

26

TC7SH32FU_SSOP5

+3VALW
ADB3
ADB2
ADB1
ADB0
FREAD#

U21

I0

KBA17

@ SUYIN_80065AR-040G2T

AT24C16N-10SI-2.7_SO8

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
SB_INT_FLASH_SEL#
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

R223
100K_0402_5%

1
0.1U_0402_16V4Z

26,31 EC_SMB_CK1
26,31 EC_SMB_DA1

+3VALW

18 SB_INT_FLASH_SEL#

+3VALW

C378
2

JP31

SST39VF080-70_TSOP40

+3VALW

INT_FSEL#

1MB ROM Socket

2
1 R404
100K_0402_5%

2
G

23
39

0.1U_0402_16V4Z

GND0
GND1

RESET#

C377
0.1U_0402_16V4Z

10
11
12
29
38

RP#
NC
READY/BUSY#
NC0
NC1

1
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

CE#
OE#
WE#

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

+3VALW
C1006
1
2

22
24
9

31
30

INT_FSEL#
FREAD#
FWE#

FREAD#

VCC0
VCC1

2
1
20K_0402_5%

26

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

+3VALW

KBA[0..19]
ADB[0..7]

26
26

Title

BIOS/TP-PAD/BT
Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

27

of

39

2
ON/OFF

2
1

SW6

SMT1-05_4P

SMT1-05_4P
@

EC_ON

47K

SAT@ DTA114YKA_SOT23

D47
2

30

1
R335

+3V_WLAN

2
100K_0402_5%
KILL_SW# 25,26

2
Q30
2N7002_SOT23-3

1BS003-1211L_3P

D20
C457
RLZ20A_LL34
0.01U_0402_25V7K

+3V_WLAN

1
2
D34
@ DAN217_SC59

SAT@ 12-21-BHC-ZL1M2RY-2C_BLUE
1

change SC70 size

KS@
1
HT-191UD_AMBER_0603

SW/LED Connector

+5VALW

SAT@ 12-21-BHC-ZL1M2RY-2C_BLUE

D23
SYSON

47K

WL_BT_LED# 26

2
G

D40
1
2
2
R337 KS@ 300_0402_5%

2
D48

10K

POWER/SUSPEND LED

SYSON

MODEBTN#

23,26,27,34

D24
2

1
3

Q32
2N7002_SOT23-3
S

2 100_0402_5% SATELLITE_LED_1#

SAT@

SAT@

WL&BT LED
+5VALW

51_ON#

2 100_0402_5%

SATELLITE_LED_0#

R411 1

KS@
3

SATELLITE_LED# 26

2
G

R336
10K_0402_5%

Q48

R410 1

DAN202UT106_SC70-3

26

ON/OFFBTN# 26

SW5

+5VS

10K

51_ON#

C456

Kill SWITCH
SW2

NC

6
5

NC

LID_SW# 26

D19

2
4

C455

LID_SW#

10P_0402_50V8J

VDD OUTPUT

GND

0.1U_0402_16V4Z

R333
100K_0402_5%

for debug only


BTN
TOP

ON/OFF BUTTON
R334
47K_0402_5%

+3VALW

U35
A3212EEH_MLP6

+3VALW

6
5

Lid SW

+3VALW

MODE#

26

IEBTN#

51_ON#

DAN202UT106_SC70-3

IE_BTN#

26

51_ON#

DAN202UT106_SC70-3

PWR_SUSP_LED 26

D41
PWR_SUSPLED1#

PWR_LED_0#

1
HT-191UD_AMBER_0603

Q31
DTA114YKA_SOT23
1
2
R338
300_0402_5%

D42
1
HT-191NB_BLUE_0603

KSO0
JP37
PWR_SUSPLED1#

1
2
3
4
5
6
7
8
9
10
GND
GND

BATT CHARGE/FULL LED


D43
+5VALW

1
R340

2
2
300_0402_5%

1
R341

2
2
120_0402_5%

BATT_CHG_LOW_LED#
1
HT-191UD_AMBER_0603

+5VALW

BATT_CHG_LOW_LED# 26

D44

SYSON

47K

BATT_FULL_LED#

BATT_FULL_LED# 26

2
G

Q34
2N7002_SOT23-3

1
R342

2
2
120_0402_5%

AC IN LED

POWER_LED# 26

1
Q35

ON/OFF

3
2N7002_SOT23-3

Q33
DTA114YKA_SOT23
1
2
R343
120_0402_5%

IEBTN#
MODEBTN#
EC_REVBTN#
EC_FRDBTN#

EC_STOPBTN#
PWR_LED_0#
BUTTON_ID

HT-191NB_BLUE_0603
2
G

Place close to USB connector

1.4A

25,26

USB_EN#

USB_EN#

JP35

GND
IN
IN
EN#

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

8
7
6
5

OUT
OUT
OUT
FLG

G528P1UF_SO8
C502
@4.7U_0805_10V4Z

Close to JP12
+USB_VCCA

+USB_VCCA

W=80mils
1

1
1

C484 +
150U_D2_6.3VM

1
C487

2
0.1U_0402_16V4Z

C481 +
@ 150U_D2_6.3VM

C488
1000P_0402_50V7K

C485
2

0.1U_0402_16V4Z
2

C486
1000P_0402_50V7K

JP33
18
18

USB20_N4
USB20_P4

1
2
3
4
10
12

2
@220P_0402_50V7K
2
@220P_0402_50V7K
2
@220P_0402_50V7K
2
@220P_0402_50V7K
2
@220P_0402_50V7K
2
@220P_0402_50V7K
2
@220P_0402_50V7K

KEYBOARD CONN.

+USB_VCCA

U24
+5VALW

1
C462
1
C463
1
C464
1
C465
1
C466
1
C467
1
C468

18,26,30

USB CONN. 2 (In Left From Side)


1
2
3
4

2
@220P_0402_50V7K
2
@220P_0402_50V7K

For EMI Request


ACIN

1
C458
1
C459

26

EC_PLAYBTN#

2
2
120_0402_5%

1
R344

ON/OFF
IEBTN#
KSO0
KSO0
MODEBTN#
EC_PLAYBTN#
KSI1
26
EC_STOPBTN#
KSI2
26
EC_FRDBTN#
KSI3
26
EC_REVBTN#
KSI5
26
BUTTON_ID
BUTTON_ID 26

ACES_85201-1005N

D30
+5VALW

HDD_LED# 26

HT-191NB_BLUE_0603
1

+5VS

10K
D45

HT-191NB_BLUE_0603

HDD LED

1
2
3
4
5
6
7
8
9
10
11
12

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G2
G4

9
11

G1
G3

USB20_N2 18
USB20_P2 18

SUYIN_020122MR008S506ZL_8P

1 R352
2
300_0402_5%

KSO16

KSI[0..7]

+3VS

KSO[0..17]
KSO17
KSO2
KSO1
KSO0
KSO4
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
CAPS_LED#

2
1 KSO17
C557 100P_0402_50V8J

2
1
R866 300_0402_5%

NUM_LED#

2
C471
2
C473
2
C475
2
C477
2
C479
2
C482
2
C489
2
C491
2
C493
2
C495
2
C497
2
C499

+3VS
CAPS_LED# 26
NUM_LED# 26

1 KSO14
100P_0402_50V8J
1 KSO11
100P_0402_50V8J
1 KSO9
100P_0402_50V8J
KSI7
1
100P_0402_50V8J
1 KSO7
100P_0402_50V8J
KSI4
1
100P_0402_50V8J
KSI5
1
100P_0402_50V8J
1 KSO5
100P_0402_50V8J
KSI0
1
100P_0402_50V8J
1 KSO1
100P_0402_50V8J
KSI2
1
100P_0402_50V8J
1 KSO4
100P_0402_50V8J

ACES_88170-3400

KSI[0..7]

26

KSO[0..17] 26

KSO16

1
C558
NUM_LED# 1
C470
CAPS_LED# 1
C472
KSO15
1
C474
KSO10
1
C476
KSO8
1
C478
KSO13
1
C480
KSO3
1
C483
KSO12
1
C490
KSI6
1
C492
KSO6
1
C494
KSI3
1
C496
KSO0
1
C498
KSI1
1
C500
KSO2
1
C501

2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J

For EMI Request


2006/10/31

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

USB/LID/KS/KB/LED/SW-B Conn
Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

28

of

39

Screw Hole

LPC_AD2

LPC_AD2 17,26

FD2

H10
H_C315D118

H11
H_C315D118

H12
H_C315D118

H13
H_C315D118

FD7
1
@

FD8
1
@

FD9
1
@

FD5

LPC_AD0

LPC_AD0 17,26

CLK_PCI_SIO2

CLK_PCI_SIO2 14

H21
H_C276D126

H22
H_C276D126

H23
H_C236D87

H24
H_C236D87

H25
H_C236D87

H26
H_C236D87

H27
H_C236D87

@
1

H32
H_C197D118

H33
H_C197D118

H34
H_C197D118

@
2

@
1

@
1

@
1

H40
H_C236D87

M1
H_C79D79N

M2
H_C79D79N

M3
H_C79D79N

M4
H_C79D79N

M5
H_C79D79N

M6
H_C79D79N

M7
H_C150D150N

M8
H_C339D339N

M11
H_O256X150D256X150N

+1.8V to +1.8VS Transfer (Place close to VGA-Connector)

+5VALW to +5VS Transfer


3

M10
H_O256X150D256X150N

@
1

M9
H_C106D106N

26

STB_SB# 19

Q82
2
STB_SB
G
2N7002_SOT23-3
ENG@

Q80
2 STB_SB#
G
2N7002_SOT23-3
ENG@

2
1

C830
ENG@

STB_SB#

2
1

2
3

0.033U_0603_25V7K

1
R808
10M_0402_5%
ENG@
2

1
3

Q81
2N7002_SOT23-3
ENG@

H39
H_C236D87

R849
10K_0402_5%
ENG@

470_0805_5%

D
D

H38
H_C276D157

AO4422_SO8
ENG@

+5VALW
R809 ENG@

C831
C953
10U_0805_10V4Z
2 ENG@
2

H37
H_C276D157

0.1U_0402_16V4Z
ENG@
1

R810
ENG@

STB_SB# 2
G

FD16
1
@

1
2
3
4

S
S
S
G

D
D
D
D

H36
H_R197X102D118X24

FD15
1
@

H31
H_C236D138

H30
H_C236D126

H29
H_C236D126

H35
H_R197X102D118X24

340K_0402_1%
2
1

8
7
6
5

FD13
1
@

+3V_SB
U39

+VSB
C954
10U_0805_10V4Z
ENG@

FD14
1
@

H28
H_C315D157

+3V_SB

+3VALW

FD12
1
@

JUMP_43X79
@

FD11
1
@

H20
H_C276D126

H19
H_C276D126

2 1

10_0402_5% 10P_0402_50V8J

PJ20
1

H18
H_C315D157

C544

Keep Resistor near Debug Pad and in the same side


Reverse side DIMM ---- Pin 1 keep away DIMM
+3VALW

H17
H_C315D157

@
1

DEBUG_PAD

H16
H_C315D157

Under DDR ME Assigment Area

H15
H_C315D118

R395

H14
H_C315D118

@
1

9
10

LPC_FRAME#

LPC_AD1

17,26 LPC_FRAME#

FD10
1
@

FD6

@
17,26 LPC_AD1

H9
H_C315D118

@
1

H8
H_C315D118

FD4

@
1

H7
H_C315D118

FD3

PCI_RST# 18,20,26

1
2 LPC_DRQ#1
R393
0_0402_5%
PCI_RST#

LPC_DRQ#1 17

FD1
@

LPC_AD3

17,26 LPC_AD3

H6
H_S394D118

@
1

H5
H_S394D118

1
R394
0_0402_5%

SIRQ

18,20,26 SIRQ

H4
H_S394D118

+3VALW
R392
@ 0_0402_5%
1
2

25,26 E51RXD_P80CLK

E51TXD_P80DATA 25,26

D_PAD1

H3
H_S394D118

R391
@ 0_0402_5%
1
2

H2
H_S394D126

New LPC Debug Pad ---- MB side

+3VALW to +3VS Transfer


3

+1.8V
+1.8VS
U20

SUSP

SUSP

C827
10U_0805_10V4Z

8
7
6
5

D
D
D
D

AO4422_SO8

Q2
2N7002_SOT23-3
PM@

1.8VS_ON
D

2
G

Q66
2N7002_SOT23-3
PM@

R615
10M_0402_5%
PM@

1
2
3
4

S
S
S
G

0.1U_0402_16V4Z

U37

470_0805_5%
PM@

2
G
3

+3VS
R26

C826
C828
10U_0805_10V4Z
2

R680
470_0805_5%
2

AO4456_SO8
PM@

C829

Q69
2 SUSP
G
2N7002_SOT23-3

+3VALW

C88
C80
10U_0805_10V4Z
2 PM@
PM@ 2

R613
910K_0402_5%

Q68
2N7002_SOT23-3

2
3

R681
10M_0402_5%

RUNON

SUSP

Q67
2N7002_SOT23-3

2
G

2
1

D
0.033U_0603_25V7K

0.1U_0402_16V4Z

1
2
3
4

470_0805_5%

S
S
S
G

0.033U_0603_25V7K

D
D
D
D

R678

RUNON
1

C824
C825
10U_0805_10V4Z

C77
10U_0805_10V4Z
PM@ 2
+VSB
1

AO4422_SO8

R679

2
G
3

SUSP

8
7
6
5

0.1U_0402_16V4Z

1
2
3
4

340K_0402_1%
2
1

C823
10U_0805_10V4Z
2

S
S
S
G

+VSB

D
D
D
D

U36
8
7
6
5

+5VS

+5VALW

C813
PM@

Discharge Circuit
+2.5VS

+1.5VS

+VCCP

+0.9VS

+5VALW
1

470_0805_5%

470_0805_5%

470_0805_5%

D
Q72
2 SUSP
G
2N7002_SOT23-3 S

Q73
SUSP
2
G
2N7002_SOT23-3

D
Q71
2 SUSP
2N7002_SOT23-3
G
S

Q70
2 SUSP
G
2N7002_SOT23-3

R686
10K_0402_5%
2

470_0805_5%

1
R685

R684

R683

R682

2
1

SUSP

SUSP

Q74
2
SUSP#
G
2N7002_SOT23-3

35

Compal Secret Data

Security Classification
15,26,27,34,35

2006/10/31

Issued Date

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C

Title

Compal Electronics, Inc.


DC/DC I/F_Debug I/F_Screw

Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
E

29

of

39

VS
VIN

DC_IN_S2

PR2
5.6K_0402_5%
2

LM393DG_SO8

PC6
0.1U_0402_16V7K

2
2

1
PR8
10K_0402_1%

VIN

High 18.384 17.901 17.430


Low 17.728 17.257 16.976

1
N1

1
2
PR11
1K_1206_5%

PR12
200_0603_5%
1
2

VS

PD4
2

VIN

PC8
0.1U_0603_25V7K

N3

RLS4148_LLDS2

1
2
PR13
1K_1206_5%

B+

PC7
0.22U_1206_25V7K

PR14
100K_0402_1%

2
PR15
22K_0402_1%

51_ON#

PR10
68_1206_5%
2

PR9
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23-3

28

32,33

Vin Detector

RTCVREF

3.3V

PD2
RLS4148_LLDS2

1
RLS4148_LLDS2

CHGRTCP

PACIN

PD3
2

BATT+

18,26,28

PR7
10K_0402_1%

PD1
RLZ4.3B_LL34

PC5
0.068U_0402_10V6K

PACIN

1
1

PR6
20K_0402_1%

ACIN

PU1A

@ SINGA_2DW-0005-B03

PR4
10K_0402_1%
1
2

PC4
100P_0402_50V8J

PC3
1000P_0402_50V7K

PR5
22K_0402_1%
1
2

PC2
100P_0402_50V8J

PC1
1000P_0402_50V7K

VS
PR3
84.5K_0402_1%

1
1

7A_24VDC_429007.WRML

PJP1

DC_IN_S1

DC301001N00

PR1
1M_0402_1%
1
2

VIN

PL1
FBMA-L18-453215-900LMA90T_1812
1
2

PF1

1
2
PR16
1K_1206_5%

2
6

LM393DG_SO8

PC13
1000P_0402_50V7K

1 VL

PR23
34K_0402_1%
PR25
66.5K_0402_1%

PC12
1000P_0402_50V7K

PR24
499K_0402_1%
PR26
191K_0402_1%

RB715F_SOT323-3

PC11
1000P_0402_50V7K

ACON

32

PU1B

31,33 MAINPWON

PD6
PD5
@ RLZ16B_LL34

PC10
1U_0805_25V4Z

1
2

1
2

GND
PC9
10U_0805_10V4Z

PR20
499K_0402_1%

N2

IN

OUT

PR19
2.2M_0402_5%
2
1

3.3V

PR18
100K_0402_1%
1
2

VL

PR17
200_0603_5%

+CHGRTC

PR22
560_0603_5%
1
2

PU2
G920AT24U_SOT89-3
PR21
560_0603_5%
1
2

RTCVREF

PJ2
2

+3VALW

PJ3
2
@

Precharge detector
15.97V/14.84V FOR
ADAPTOR

+VSB

PACIN

PQ3
DTC115EUA_SC70-3
2

+2.5VS

+5VALWP

@ JUMP_43X39

(0.35A,40mils ,Via NO.=2)


3

@ JUMP_43X39

2
G

PJ4
+2.5VSP

PJ5

PR27
47K_0402_1%
2
1

D
PQ2
RHU002N06_SOT323-3

(8A,320mils ,Via NO.= 16)

+5VALW

JUMP_43X118

+1.8V

@ JUMP_43X118

(5A,200mils ,Via NO.= 10)


+VSBP

@ JUMP_43X118
PJ15
2 2
1 1

(5A,200mils ,Via NO.= 10)


+5VALWP

+1.8VP

JUMP_43X118

PJ1
2

+3VALWP

PJ6

(120mA,40mils ,Via NO.= 2)


+0.9VSP

+0.9VS

@ JUMP_43X79
PJ7
+1.05VSP

(2A,80mils ,Via NO.= 4)


1

+VCCP
PJ8

@JUMP_43X118

(5A,200mils ,Via NO.= 10)

+1.5VSP

+1.5VS

@ JUMP_43X118

(4.5A,180mils ,Via NO.= 9)

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/06/06

Deciphered Date

2009/06/05

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

DCIN & DETECTOR


Size
Date:

Document Number

R ev
1.0

Thursday, March 22, 2007


D

Sheet

30

of

39

PH1 under CPU botten side :


CPU thermal protection at 92 degree C
Recovery at 56 degree C
VS

VL
2

VL

2
PR30
47K_0402_1%

PR28
47K_0402_1%

1
PC14
0.1U_0603_25V7K

PR31
47K_0402_1%
1
2

+3VALWP
8

PR32
13.7K_0402_1%
1
2

TM_REF1

1SS355_SOD323-2

VL

PR37
100K_0402_1%
1

LM393DG_SO8

PR39
100K_0402_1%
2

+3VALWP

PC18
1000P_0402_50V7K

1
2

PR36
15.4K_0402_1%

ALI/MH# 26,32
PR38
6.49K_0402_1%
2
1

PC17
0.22U_0805_16V7K

PR35
100_0402_5%

PR34
100_0402_5%

PD7
2

OCTEK_BTJ-09HA1G

PQ4
DTC115EUA_SC70-3

PU3A

PC16
0.01U_0402_25V7K

PR33
1K_0402_1%

PC15
1000P_0402_50V7K

MAINPWON 30,33
1

PH1
100K_0603_1%_TH11-4H104FT

BATT+

TS_A
EC_SMDA
EC_SMCA

PF2 12A_65V_451012MRL
2

PR29
1
1K_0402_1%
1
2

BATT_S1

GND
GND
GND
GND

1
2
3
4
5
6
7
8
9

12
13
10
11

1
2
3
4
5
6
7
8
9

PJP2

PL2
FBMA-L18-453215-900LMA90T_1812
1
2

VMB

PR40
1K_0402_1%

PH2 near main Battery CONN :


BAT. thermal protection at 79 degree C
Recovery at 45 degree C

BATT_TEMPA 26
EC_SMB_DA1 26,27
EC_SMB_CK1 26,27

VL

VL

PR42
47K_0402_1%
1
2

PR48
0_0402_5%
2

PD8
2

O
4

PR44
22K_0402_1%

PU3B

1
3

1SS355_SOD323-2
LM393DG_SO8

PC19
0.22U_0805_16V7K

1
2
2

1
2

PC20
@ 0.22U_1206_25V7K

PQ6
RHU002N06_SOT323-3

2
G
1

POK

PC22
@ 0.1U_0402_16V7K

1
2
PR47
100K_0402_1%
33

2
1
PR45
100K_0402_1%

PR46
22K_0402_1%
1
2

VL

+VSBP
PC21
@ 0.1U_0603_25V7K

B+

TM_REF1

PR43
10.7K_0402_1%
1
2

PQ5
TP0610K-T1-E3_SOT23-3

PR41
47K_0402_1%

PH2
100K_0603_1%_TH11-4H104FT

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/06/06

Deciphered Date

2009/06/05

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

BATTERY CONN / OTP


Size
Date:

Document Number

R ev
1.0

Thursday, March 22, 2007


D

Sheet

31

of

39

65W/75W Iadp=0~3.125A PR49=0.02_2512_1% PR55=30K_0402_1%


90W Iadp=0~4.2A PR49=0.015_2512_1% PR55=29.4K_0402_1%

ACOK

OUT

20

VREF

VH

19

ACIN XACOK

18

-INE1

RT

17

+INE1

-INE3

16

OUTC1 FB123

15

11

SEL

CTL

14

12

-INC1

+INC1

13

4
2

PQ13
DTC115EUA_SC70-3

PC28
0.1U_0603_25V7K

1
2
PC31
0.1U_0603_25V7K

VIN

1
2
PR60
47K_0402_1%
PR65
33K_0402_1%
MB39A126 1
2

PC35
1500P_0603_50V7K
1
2

PL3
16UH_LF919AS-160M=P3_3.7A_20%
PR70
1
2
47K_0402_5%

VL

PR71
100K_0402_1%

PC34
10P_0402_50V8J

1
1

ACOFF

26

CC=0.6~3A
CV=12.6V(6 CELLS LI-ION)

10

PD14
@ EC31QS04

PR63
0.02_2512_1%
PD10
EC31QS04

PR67
47K_0402_5%

BATT+

PC37
4.7U_1206_25V6K

21

VCC

PC39
4.7U_1206_25V6K

PC38
4.7U_1206_25V6K

IREF=1.31*Icharge
IREF=0.6V~3.144V

-INE2

ACOFF#

ACON

CS

IREF
S
PQ15
RHU002N06_SOT323-3

22

30

ACON

PR64
10K_0402_1%
2
1

PR61
162K_0402_1%
1
2

26

2
G

1
PR66
100K_0402_1%

PACIN 1
2
PR62
3K_0402_1%

PACIN

PC36
0.01U_0402_25V7K

CS

PC33
2200P_0402_50V7K
1
2

+INE2

PC32
0.22U_0603_16V7K
PR59
1K_0402_1%
MB39A126 1
2

PQ11
AO4407_SO8
PC27
0.22U_0603_16V7K
1
2

23

GND

VIN

PR53
10K_0402_1%

5
6
7
8

OUTC2

3
2
1

PR55
30K_0402_1%

PR56
10K_0402_1%
2
1

PD9
1SS355_SOD323-2

30,33

PR52
47K_0402_1%
1
2

ACOFF#1

PR58
150K_0402_1%
2

PC29

PQ14
RHU002N06_SOT323-3

2
G

0.01U_0402_25V7K
2
1

D
3

PQ12
DTC115EUA_SC70-3

LX_CHG

PC30
PR54
4700P_0402_25V7K
100K_0402_1%
1
2
2
1

MB39A126

PR57
10K_0402_1%
1
2

1
PR68
0_0603_5%

2
PC26
0.1U_0603_25V7K

PQ10
DTA144EUA_SC70-3

PC25
4.7U_1206_25V6K

P2
PU4
MB39A126PFV-ER_SSOP24
1 -INC2 +INC2 24

PR51
47K_0402_1%
2

PC24
4.7U_1206_25V6K

8
7
6
5

PC138
330P_0402_50V7K

PR50
200K_0402_1%

B++
PC23
4.7U_1206_25V6K

PC137
330P_0402_50V7K

PR49
0.02_2512_1%

8
7
6
5

PL12
FBMA-L18-453215-900LMA90T_1812
1
2
1

1
2
3

1
2
3

8
7
6
5

PQ7
AO4407_SO8
1
2
3

PQ9
AO4407_SO8

B+

P3

PQ8
AO4407_SO8

Iadp=0~3.125A

P2

VIN

ISE_CHG+

+3VALWP
CS

ALI/MH#

PQ19
DTC115EUA_SC70-3
3

PR69
47K_0402_1%

26,31

PC145
47P_0402_50V8J

PQ16
DTC115EUA_SC70-3

26

FSTCHG

PQ18
DTC115EUA_SC70-3
3

BATT Type

ALI/MH#

Charge Current

IREF

VMB

0V

3A

3.144V

6 CELL

3.3V

3A

3.144V

9 CELL
OVP voltage : LI
PR72
340K_0402_1%

(BAT_OVP=0.1111 *VMB)

1 2

3S2P : 13.5V--> BATT_OVP= 1.5V


VS

PR74
2.2K_0402_5%

LM358DT_SO8

26 BATT_OVP

PR73
499K_0402_1%
PU5A
+ 3

PC40
0.01U_0402_25V7K

PR75
105K_0402_1%
2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/06/06

Deciphered Date

2009/06/05

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

CHARGER
Size
Date:

Document Number

R ev
1.0

Thursday, March 22, 2007


D

Sheet

32

of

39

+3.3VALWP/+5VALWP

BST_3V

BST_5V

PD11
DAP202U_SOT323-3
B+++

5
6
7
8
D
D
D
D
5
6
7
8

4
3
2
1
D
D
D
D
4
3
2
1

2
PC52
0.1U_0603_25V7K
2
1

BST_3V-1 2 PR86
1
DH_3V-1 0_0603_5%

PR81
200K_0402_1%

1
2

PR84
340K_0402_1%

1
2

PR80
200K_0402_1%

DL_3V
PL5
4.7U_LF919AS-4R7M-P3_5.2A_20%

LX_3V
FB3

2
31

MAX8734AEEI+_QSOP28

1
+

PR93
0_0402_5%

PR91
6.81K_0402_1%

+3VALWP

PC55
150U_V_6.3VM_R18

PR94
10K_0402_1%

7
2

PC144
@ 680P_0603_50V8J

PR85
0_0603_5%

PC57
1

PC42
4.7U_1206_25V6K
2
1

PC41
4.7U_1206_25V6K
2
1

1
2

ILIM5

28
26
24
27
22

PR83
340K_0402_1%

17
VCC

TON

PC50
1U_0603_6.3V6M

PR76
47_0402_5%

PC48
0.1U_0603_25V7K 1

1
2

13

20

LD05

11

POK
4.7U_0805_6.3V6K
1
2 10

ILIM5
BST3
DH3
DL3
LX3
OUT3

1
REF

PR188
0_0402_5%

806K_0603_1%

PR95

ILIM3

PR190
@ 4.7_1206_5%

PQ22
SI4810BDY-T1-E3_SO8

PC58
0.047U_0603_16V7K

ILIM3

FB3
PGOOD

PR96
0_0402_5%
2
1

2
SKIP#

DH_3V

2VREF_8734

1
12

PQ20
SI4800BDY-T1-E3_SO8

PRO#

SHDN#
ON5
ON3

2VREF_8734

V+

18

6
4
3

VL

30,31 MAINPWON

LX5
DL5
OUT5
FB5
N.C.

23

2
2

PR89
1
2
@ 10K_0402_1%

PACIN

PC56
2
1

1
PR90
100K_0402_1%

30,32

15
19
21
9
1

LDO3

47K_0402_1%
RLZ5.1B_LL34

PC54
2.2U_0805_25V6K

2
2

PR87

PR92
6.81K_0402_1%

150U_V_6.3VM_R18

PC53

PR88
10.5K_0402_1%

FB5
PD12

PC46
0.1U_0402_16V7K

DH5

25

LX_5V

BST5

GND

PR82 1 BST_5V-1
14
0_0603_5%
16

DL_5V

VS

PC49
4.7U_0805_6.3V6K
2
1

8
7
6
5
1
2
3
4

S
S
S
G

PU6

0.22U_0603_10V7K

PL4
4.7U_LF919AS-4R7M-P3_5.2A_20%

+5VALWP

PC51
0.1U_0603_25V7K
2
1

PC143
@ 680P_0603_50V8J

PQ23
SI4810BDY-T1-E3_SO8
DH_5V-1

2 1

D
D
D
D

PR189
@ 4.7_1206_5%

PC47
4.7U_1206_25V6K
2
1

VL

1
2
3
4

PR79
0_0603_5%
DH_5V 1
2

PR78
10_1206_5%

PR77
10_1206_5%
2
1

PQ21
SI4800BDY-T1-E3_SO8

S
S
S
G

D
D
D
D

8
7
6
5

PC45
2200P_0402_50V7K
2
1

PC44
4.7U_1206_25V6K
2
1

PC43
4.7U_1206_25V6K
2
1

B+++

2 1

@ JUMP_43X118

G
S
S
S

G
S
S
S

B+

B+++

VL

PJ10

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/06/06

Issued Date

Deciphered Date

2009/06/05

+5V/+3V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number


Custom
IAKAA M/B LA-3401P
Date:

Thursday, March 22, 2007

Sheet
1

Rev
1.0
33

of

39

1
2

5
6
7
8
D
D
D
D

ISEN1

ISEN2

22

LGATE1

LGATE2

27

PGND1

PGND2

26

9
10
8
15

VOUT1
VSEN1
EN1
PG1

VOUT2
VSEN2
EN2
PG2/REF

20
19
21
16

11

OCSET1

OCSET2

18

PR107
2K_0402_1%
1
2

G
S
S
S

PR105
@ 4.7_1206_5%

PQ27
SI4810BDY-T1-E3_SO8

PC74
0.01U_0402_25V7K

SUSP#

PR110
6.81K_0402_1%
2

PC73
220U_D2_4VM_R15

15,26,27,29,35
2

2
PR112
24K_0402_1%

ISL6227CAZ-T_SSOP28

PR114
@ 0_0402_5%

13

VSE_1.5V
1

PC77
0.1U_0402_16V7K

PR115
10K_0402_1%

PR117
100K_0402_1%

PR109
0_0402_5%
PC75
@ 680P_0603_50V8J

4
3
2
1
DL_1.5V

PR118
100K_0402_1%

PC76
@ 0.1U_0402_16V7K

DDR

2
PR111
0_0402_5%

GND

+1.5VSP

ISE_1.5V

LX_1.5V

PR103
0_0603_5%

25

+1.5V
PL7
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2

PHASE2

DH_1.5V-2

PHASE1

UGATE2

UGATE1

24

PQ25
SI4800BDY-T1-E3_SO8

4
3
2
1

28
VCC

14

DH_1.5V-1

PC69
0.1U_0402_16V7K
2
1

DL_1.8V

BST_1.5V-2
1
PR100
0_0603_5%

ISE_1.8V

23

PR102
0_0603_5%
PQ26
SI4810BDY-T1-E3_SO8
PR106
2K_0402_1%
1
2

DH_1.8V-1

BOOT2

2 1

BOOT1

5
6
7
8

PR99
0_0603_5%

SOFT2

PC67
0.01U_0402_25V7K
1
17 2

D
D
D
D

1
2

PR116
@ 0_0402_5%

PC65
2.2U_0805_10V6K

G
S
S
S

2BST_1.8V-2 6

VSE_1.8V

PR113
10K_0402_1%

2
1

PC66
0.01U_0402_25V7K PU7
2
1
12 SOFT1

PR108
0_0402_5%

23,26,27,28 SYSON

2
PC72
@ 680P_0603_50V8J

1
2
3
4

2
2

PC71
0.01U_0402_25V7K

PR104
10.2K_0402_1%

PR98
2.2_0603_5%

VIN

BST_1.8V-1

8
7
6
5

PR101
@ 4.7_1206_5%

D
D
D
D

PC70
220U_D2_4VM_R15

4.7U_1206_25V6K

PC139
330P_0402_50V7K

8
7
6
5
D
D
D
D
S
S
S
G

PC68
0.1U_0402_16V7K
2
1

S
S
S
G

DH_1.8V-2

1
2
3
4

PL6
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2 LX_1.8V

PC62

BST_1.5V-1

PQ24
SI4800BDY-T1-E3_SO8

+1.8VP

+5VALWP

1
2

PC64
0.1U_0603_25V7K
PD13
DAP202U_SOT323-3

+1.8V

PC61
4.7U_1206_25V6K

PC63
4.7U_0805_6.3V6K

PR97
0_1206_5%

PC60
4.7U_1206_25V6K

PC59
4.7U_1206_25V6K

PL13
FBMA-L18-453215-900LMA90T_1812
B+
1
2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2006/06/06

Deciphered Date

2009/06/05

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

1.8V / 1.5V
Size
Date:

Document Number

R ev
1.0

Thursday, March 22, 2007


D

Sheet

34

of

39

PL14
6269_B+

2
6269_VCC

PHASE_VCCPP
UG_VCCPP_1

PR119
1K_0402_1%
PR120

PC79
10U_1206_25VAK

1
36

PGD_IN

PC80
1
2

0_0603_5%

0.1U_0603_25V7K

PR121
0_0603_5%

+5VALW
BOOT_VCCPP

FCCM

11

PGND

10

ISEN

D
D
D
D
G
S
S
S
4
3
2
1

BOOT
LG

PC81
2.2U_0603_6.3V6K
LG_VCCPP

UG_VCCPP_2
PL8
1.8U_D104C-919AS-1R8N_9.5A_30%
1
2

+1.05V

5
6
7
8

PQ28
SI4800BDY-T1-E3_SO8

PC83
220U_D2_4VM_R15

2
1

4
3
2
1

VO
8

PQ29
SI4810BDY-T1-E3_SO8

G
S
S
S

PR127
ISEN_VCCPP
1

8.25K_0402_1%

FSET

ISL6269ACRZ-T_QFN16_4X4

FB

PC84
0.1U_0402_16V7K

PR126
24K_0402_1%

EN
COMP

15,26,27,29,34 SUSP#

SUSP#

+1.05VSP
1

PR187
@4.7_1206_5%

D
D
D
D

VCC

5
6
7
8

14

1
2

1 PR123 2 6269_VCC
4.7_0603_5%

12

PVCC

6269_VCC
PC82
PR124
2.2U_0603_6.3V6K
@ 0_0402_5%
PR125
0_0402_5%
1
2

13

UG

PHASE

VIN

PGOOD

GND
1

15

PU8

16

17

PR122
0_0603_5%

PC78
@ 10U_1206_25VAK

PC140
680P_0402_50V7K

FBMA-L18-453215-900LMA90T_1812

B+

PC136
@680P_0603_50V8J

1
2

57.6K_0402_1%

PC85
0.01U_0402_25V7K

PC87
6800P_0402_25V7K

PR130
2.26K_0402_1%
1
2

PR128
49.9K_0402_1%

PR129

1
2

PC86
22P_0402_50V8J

PR131
3K_0402_1%

PJ13
@ JUMP_43X79

+1.8V

VIN

VCNTL

GND

NC

VREF

NC

VOUT

NC

TP

PC89
1U_0603_6.3V6M

2
1

VIN

PC132
0.1U_0402_16V7K

PC95
2

2
1

1
2

0.01U_0402_25V7K

PC96
@ 150U_D_6.3VM

2006/06/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/05

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

PC92
10U_1206_6.3V7K

PQ37
RHU002N06_SOT323-3

2
G
1

SUSP

PQ30
RHU002N06_SOT323-3

PR137
1K_0402_1%

29

PC97
2.15K_0402_1%

APL5912-KAC-TRL_SO8

PR186
11K_0402_1%
1
2

+0.9VSP

+2.5VSP
PR136

FB

22U_1206_6.3V6M

VOUT

PC93
@ 0.1U_0402_16V7K

PC94
4.7U_0805_6.3V6K

PC91
0.1U_0402_16V7K

6
VOUT

EN

GND

PC98
@ 0.01U_0402_25V7K

@ 0_0402_5%
1
2
1

SUSP#

VIN

PR133
1K_0402_1%

POK

PR135

VCNTL

PU10
7

2
G

PR134
0_0402_5%
1
2

SUSP

29

1U_0603_6.3V6M

APL5331KAC-TRL_SO8

PC90

PJ14
@ JUMP_43X79

PR132
1K_0402_1%

+5VALW

+3VALW

1
PC88
4.7U_0805_6.3V6K

+3VALW

PU9

Title

2.5V / 0.9V / 1.05V


Size
Date:

Document Number

R ev
1.0
Sheet

Thursday, March 22, 2007


1

35

of

39

5
PHASE_CPU1

PGND1

33

UGATE2

27

BOOT2

26

NC

25

1
2
1

VCC_PRM
PC130
0.22U_0603_10V7K

PC141
3300P_0402_50V7K

1
2

PC135
680P_0603_50V8J
2
1

1
2

PR157
10K_0402_1%
2
1

1
2

PR156

3.65K_0805_1%

1
PR155
1 2
1

PR168

1 2
2

VSUM

IRF8113PBF_SO8

1_0402_5%
PR170
10K_0603_1%
1
2
PC120
1
2

0.22U_0603_10V7K

+CPU_B+

1
2

2.61K_0402_1%

PR185 3.57K_0402_1%
PC129 0.1U_0402_16V7K
1
2
2

ISEN2

PH4
10KB_0603_5%_ERTJ1VR103J
1

PR184 1K_0402_1%

11K_0402_1%

@ 20_0402_5%

PC118
680P_0603_50V8J

PR169

PR180

1
2
PR181 0_0402_5%
PC128 180P_0402_50V8J
1
2

PR182

PC102
220U_25V_M

PC101
10U_1206_25VAK
2
1

5
5
6
7
8

3
2
1
3
2
1

VSSSENSE

VSUM
PC127
0.018U_0603_50V7J

PR183

+5VS

2
2

2
@ 20_0402_5%
1

PR179

PC126
0.018U_0603_50V7J

+CPU_CORE 1

PC125 0.018U_0603_50V7J
1
2

0_0402_5%

3
2
1
4

PL11

PC124
0.1U_0603_25V7K

PR178

PQ36

IRF8113PBF_SO8

VCCSENSE

5
6
7
8

PQ35

PR165
6.8_1206_5%

VCC_PRM

PR177 1.82K_0402_1%
5

PU11
ISEN1
ISEN2
2

0.36UH_MPC1040LR36_24A_20%

PR171 1_0603_5%
PC121
1U_0402_6.3V6K

PR176
10_0603_5%
1
2

PC123 470P_0402_50V7K
1
2

PR1751

4
UGATE_CPU2-2

5
6
7
8

PHASE_CPU2
PR162
UGATE_CPU2-1 1
2
1_0603_5%
BOOT_CPU2
1
2
1
2
PR164
0_0603_5%
PC115
0.22U_0603_10V7K

3
2
1

ISEN1
24

ISEN2

LGATE_CPU2

+CPU_B+

28

PQ34
SI7840DP-T1-E3_SO8

PHASE2

LGATE_CPU1

29

VCC_PRM

PC112
10U_1206_25VAK

30

PGND2

PR159
10K_0603_1%
1
2
PC110
1
2

PR167
10K_0402_1%
2
1

LGATE2

+CPU_CORE
PR158
1_0402_5%

ISEN1
0.22U_0603_10V7K

3.65K_0805_1%

31

@ 0_0402_5%

390P_0402_50V7K

3.4K_0402_1%
1
2

IRF8113PBF_SO8

32

PVCC

PR173
@ 0_0402_5%
PR174

PC142
0.01U_0402_25V7K

PL10

VSUM

LGATE1

IRF8113PBF_SO8

PC117 47P_0402_50V8J
PR172 61.9K_0402_1% PC119 0.033U_0402_16V7K
1
2
2
1

34

23

22

VDD

GND
21

VIN
20

VSUM

FB2

19

12

VO

FB

13

COMP

11

18

1
2
1000P_0402_50V7K PC116
PR166 4.42K_0402_1%
1
2

PC122

PC100
10U_1206_25VAK
2
1

37
VID0

38

39
VID2

40
VID3

41
VID4

42
VID5

43
VID6

45

46

44
VR_ON

VID1

35

PHASE1

ISL6262CRZ-T_QFN48

PC111
10U_1206_25VAK
2
1

VW

10

DFB

13K_0402_1%
1
2

B+

0.36UH_MPC1040LR36_24A_20%
2
1

6.8_1206_5%
680P_0603_50V8J

UGATE1

UGATE_CPU1-1

PC109

OCSET

36

SOFT

PQ32

PQ33

BOOT1

3
2
1

1
2
1_0603_5%
PR154

5
NTC

17

@ 100K_0603_1%_TH11-4H104FT
1
2
PC113
0.022U_0603_25V7K PC114
1
2

PC106
1U_0603_6.3V6M
2
1

PC105
0.01U_0402_25V7K
2
1

PR148

PR147

PR146

PR145

PC104
1U_0603_6.3V6M
2
1

0.22U_0603_10V7K
PC108
2 1
2
5
6
7
8

VR_TT#

DROOP

PQ31
SI7840DP-T1-E3_SO8

3
2
1

DPRSTP#

47

48

RBIAS

PL9
FBMA-L18-453215-900LMA90T_1812
1
2
PC99
220U_25V_M

26
CPU_VID3

CPU_VID4

CPU_VID5

5
CPU_VID2
5
CPU_VID1
5
CPU_VID0
5

PC103
0.01U_0402_25V7K
2
1

0_0603_5%
PR151
1

2
49
4

RTN

2 1

PR163

PGD_IN

16

@ 0.015U_0402_16V7K

PH3

PSI#

15

VR_TT#
@ 4.22K_0402_1%
1

VSEN

PR161

PR160 147K_0402_1%
1
2

VDIFF

PGD_IN

DPRSLPVR

H_PSI#

35

PGOOD

14

VGATE

PR144

PC107
1U_0603_6.3V6M

1
18,26

+CPU_B+

UGATE_CPU1-2 4

BOOT_CPU1

499_0402_1%

1.91K_0402_1%

PR152

PR153

0_0402_5%
2

3V3

PR150
1

+3VS
+3VS

GND

14 CLK_ENABLE#

0_0402_5%
2

0_0402_5%
2

1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%
2
1
0_0402_5%

PR141
1

PR143

PR140
1

4,17 H_DPRSTP#

PR142

7,18 DPRSLPVR

PR138
1_0603_5%

499_0402_1%
1
2
PR149

PR139

CLK_EN#

CPU_VID6

VR_ON

+5VS

PC131 0.22U_0402_6.3V6K
2
1

2006/06/06

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2009/06/05

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

+CPU_CORE
Size Document Number
Custom
Date:

R ev
1.0
Sheet

Thursday, March 22, 2007


1

36

of

39

HW4 Product Improvement Record (P.I.R.)


Phase: B to C
Page# Action Plan
(add; del; change)
P17

Date: 2007/01/24
Location or
Net_List

Writer: Timo Teng

Before value
(Attached file)

After value
(Attached file)

SUYIN_06802-TK102

SUYIN_127043FB
022G345ZR_NR

Change layout footprint

100K_0402_5%

NC

All sku keep 5 in 1 and 1394 functions

Detail Discretion and Root Cause

Rev. DL/DM Check

Change Connector

JP24

P18

Delete Component

R873 R874

P22

Delete Component

R820

10K_0402_5%

NC

No need more than one pull-high resistor on the net

P25

Delete Component

R195

10K_0402_5%

NC

No need more than one pull-high resistor on the net

P26

Delete Component

P20

Change net

P24

Modify footprint

P25

Delete Component

P26

Add Component

P28

Modify component

P28

Modify BOM SelectQ48/R410/R411/D47/D48

P29

Modify R Value

P22

Change Value

Q65/Q77 R821/R822
R234
JP14/JP15
U38/R503/C630
R873/2FAN_DET#
R410/R411

R613
C89, C79, C90
C68, C74, C81

Phase: C to PreMP
Page# Action Plan
(add; del; change)

MMBT3904/10K_0402_5%
Connects to +3VS
SINGA_2SJ-S351
CIR/100_0805/4.7U

NC

No engine start, so follow Dallas project.


Blue LED needs to connect 5V

SINGA_2SJ-T820

For solving SMT soldering poor issue

NC

No CIR support on spec.

NC

10K_0402/2FAN_DET#

For separate ISRAE&ISKAE EC BIOS

200_0402_5%

100_0402_5%

Emonoto-san request, the LEDs increase brigtness

NC

SAT@

Reserve Satelliate LED BOM select

820K_0402_1%

910K_0402_5%

For delaying and adjusting 1.8VS power sequence

0.01uF_0402

0.1uF_0402

For solving EMI noise

Date: 2007/02/02
Location or
Net_List
R874/R875

0.2

Connects to +5VS

Before value
(Attached file)

Writer: Timo Teng


After value
(Attached file)

Detail Discretion and Root Cause

P18

Add Component

P27

Modify component

C584/C580/C587

10uF_0805_6.3V

@10uF_0805_6.3V

For Cost reduce (PVT cut-in)

P11

Modify component

C716

330uF_D2E_2.5V

@330uF_D2E_2.5V

For Cost reduce (PVT cut-in)

P23

Modify component

C425

4.7uF_0805_10V

@4.7uF_0805_10V

For Cost reduce (PVT cut-in)

NC

@1K_0402/@100K_0402

Reserve Satellite LDE detected

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

1.0

2005/06/23

Deciphered Date

2006/10/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

PIR
Size Document Number
Custom
Date:

Thursday, March 22, 2007

R ev
1.0
Sheet

37

of

39

PIR (Product Improve Record)

FOR ISPD
U7

LAN
RTL8101E
100M@
U34
D

TRANSFORMER
NS892404
100M@
ZZZ1

PCB
PCB ZKU LA-3711P REV0

U8

Card BUS
8402
8402@
U2

SB
C

ICH7
ICH7R1@

U6

U6

945GM
GMR3@

943GML
GMLR3@

U6

U6

U6

945GM
GMR1@

943GML
GMLR1@

945PM
PMR1@

NB

R349

SKU ID
18K_0402_5%
PM@

2006/10/03

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/11/13

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

ISPD
Size

Document Number

Rev
1.0

ISRAE M/B LA-3711P


Date:

Thursday, March 22, 2007

Sheet
1

38

of

39

POWER PIR LIST


page

DVT

Modify list

35

Change +1.05V PWM IC

36

For EMI team request to add snubber and gate resistor

Add snuber PR155,PR165(6.8ohm_SD011680B80), PC109,PC118(680p_SE024681J80) and gate resistor PR154,PR162(1ohm_SD013100B80)

Modify the CUP CORE load line and compensation

Change PC103 to 0.022u(SE076223K80), PC104 to 2.2u(SE107225K80), PR185 to 4.42K(SD000004J80),


PC129 to 0.1u(SE076104K80, add PC126 (0.018U_SE025183J80), delete PC105 and PC106

Modify the CPU OTP point from 84 degC to 87 degC


for thermal team request

Change PR36 from 22K to 20K(SD034200280)

32,34,
35,36

For EMI team request to add bead to reduce board band

Add PL12,PL13,PL14(SM010020720);PC137,PC138,PC139(330p_SE074331K80);PC140(680p_SE074681K80);PC141(3300p_SE074332K80)

33

Reduce the power consumption on S3/S4

Add PR188(0_0402_5%) and unpop PR89

36

Solve the high frequency noise.

Change PC99 from 100U to 220U(SF22004M210)

36

For EMI solution

Add PC142 (0.01u_0402)

36

PC99 was interfere with logic low so change to small size

Change PC99 from 220U to 100U and add PC143,PC144(68U_25V).

31

PVT

Reason for change

Change PU8 to ISL6269A(SA00000GU80), add PR122 (0ohm, SD013000080)

Pre-MP

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/23

Deciphered Date

2006/10/22

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

PIR
Size Document Number
Custom
Date:

Thursday, March 22, 2007

R ev
1.0
Sheet

39

of

39

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