Ti liu tham kho cho pic16f877a

(c vit bi o trng ngha- tvt 3a)

Gii thiu tng quan v h vi iu khin pic

Chng1

Hin nay trong cc my mc cng nghip v cc thit b phc v sinh hot cho cuc Sng hu ht u ng dng rng r i cc thit b in t ,m b x l trung tm l cc con Chip vi iu khin ht sc thng minh c bit cc Chip ny c th lp trnh c Bi con ngi! V vy chng ta cn phi nghin cu v pht trin n. Trn th trng hin nay ph bin rt nhiu loi vi iu khin phong ph v chng loi v gi c th tng i r ph hp vi iu khin Vit Nam trong ph bin c cc loi nh : MCS51 ; AVR ca ATMEL , PIC ca MICROCHIP , PSOC ca CYPRESS MICRO SYSTEM Hin nay vi s a dng v nhiu chng loi khc nhau ca PIC c bit l tnh n nh ca chng lm cho nhiu ngi thch th v a chung v vy chng c ng dng rng r i trn ton th gii. Cm t PIC c vit tt t cm t : peripheral interface controller (B iu Khin giao tip cc thit b ngoi vi).Khc vi cc b vi x ,b vi iu khin c tch hp ton b nh RAM , ROM , cc PORTS truy xut ,giao tip ngoi vi trc tip trn mt con chp ht sc nh gn. PIC16F877A l mt vi iu khin c kin trc HARVARD (b nh chng trnh v b nh d liu c truy xut c lp vi nhau) s dng 14 bit cho cc lnh , v tp lnh ca n ch hu ht ch c mt WORD.

Cu trc phn cng ca PIC16f877a i)b nh chng trnh ca pic Khng gian b nh chng trnh ca PIC khc nhau tu thuc vo tng loi Sau y l mt s v d: -16C711,16F84 c 1024(1K) -16F877A c 8192(8K) -17C766 c 16384(16K) II)b nh d liu ca pic Cc thanh ghi a mc ch cho ngi dng ca PIC l cc nh RAM . Mi thanh ghi ny c rng 8 bt cho tt c cc PIC Sau y l mt vi v d: -12C508 c 25 Bytes RAM -16C71C c 36 Bytes RAM -16F877A c 368 Bytes(plus 256 Bytes of nonvolatile EEPROM) III)CC CHN CA PIC 16F877A

Chng2

1)cc chn ngun Trong cc s ca mch 8051 thng k hiu chn cp ngun l VCC , cn chn ni mass l GND . Cn i vi PIC th ngc li thay VCC = VDD cn chn GND = VSS Trong PIC 16F877A trn hnh v ta c th thy c tt c 4 chn cp ngun nh sau: - Chn 11 , 32 l cc chn VDD (+5v) - Chn 12 , 31 l cc chn VSS (0v) 2)chn reset Trn hnh ta thy chn s 1(MCLR) chnh l chn RESET ca PIC , chn ny c nhim v khi ng li chip khi chn ny c tch cc.

Chn RESET ca PIC tch cc mc thp u ny tri ngc hon ton vi h 8051

3)mch dao ng Trn hnh v ta thy 2 chn 13(OSC1) v chn 14(OSC2) l 2 chn dao ng. Tc dao ng c xc nh thng qua tn s dao ng ca b to dao ng S mch dao ng nh hnh v sau:

4)cng xut nhp +PORT A v thanh ghi TRIS A: Cng A c 6 bit thc hin chc nng vo ra theo 2 chiu vic xc nh hng xut nhp dc thc hin thng qua thanh ghi TRIS A. Vic a 1 bit trong thanh ghi TRIS A ln 1 cng ng ngha vi vic t chn tng ng ca cng A l chn nhp d liu. Vic xo 1 bit trong thanh ghi TRIS A xung 0 cng ng ngha vi vic t chn tng ng ca cng A l chn xut d liu. Chn RA4/TOCKI l chn a mc ch vi vic va l chn xut nhp va l u vo ca b m TIMER0 .u vo ca chn RA4 l mt trigger schmitt nn c cc mng h trong ch nhp chng ta cn gn thm in tr ko dng cho n. Cc chn khc trong PORT A cn l u vo ca tn hiu tng t trong b chuyn i ADC . S hot ng ca cc chn trong ch ny l vic iu kin thch hp cc bt trong thanh ghi ADCON1 v CMCON.

+port b v thanh ghi tris b: Cng B c 8 bt xut nhp theo 2 chiu ,vic chn chc nng xut hoc nhp c iu khin thng qua thanh ghi TRIS B cng tng t nh vi PORTS A Ba chn ca PORT B l cc chn a chc nng(RB3/PGM,RB6/PGC/RB7/PGD) vi cc ng dng nh trong mch g ri v chng trnh in p thp Mi chn ca PORT B u c cc in tr ko dng bn trong c gi tr khong 47K c th cho php hot ng ch ny thng qua vic set bit RBPU trong thanh ghi OPTION Vic in tr ko s b kho ngay khi PORT B chuyn sang ch xut d liu hoc khi VK mi khi ng Bn chn ca PORT B l cc chn t RB4 n RB7 cn l cc chn phc v ngt, nu 1 trong cc chn c nh hnh l u vo th n c th l nguyn nhn cho 1 ngt pht sinh Khi mt ngt c to ra cng ng thi c RBIF(INTCON.0) c set ln 1, v n c th nh thc VK ang ch ng(SLEEP)

+ PORT C v thanh ghi TRIS C:

PORTC c tt c 8 chn a mc ch vi cc chc nng nh : xut nhp d liu, c bit 2 chn 18(SCL) v 23(SDA) l 2 chn thc hin chc nng giao tip vi ngoi vi thng qua chun I2C Thanh ghi TRISC cng tng t nh trn lm nhim v nh ngha cc chn tng ng l cng vo hay cng ra

+PORT D v thanh ghi TRIS D - PORT E v thanh ghi TRIS E: Hai PORT ny u c 8 chn a mc ch nhng ch yu vn l xut nhp liu cn cc ng dng khc chung ta s khng xt y Cc bn c th tham kho thm trong cc hnh di y:

Cc thanh ghi c chc nng c bit

Chng 3

Cc thanh ghi ny c chc nng iu khin cc hot ng v cc khi giao tip ngoi vi ca vi iu khin i) thanh ghi Status

Bit 0 : l mt c bo trn mi khi c nh t bit 7 trong php cng hoc c mn trong php tr Bit 1 : l c nh ph b tc ng khi thc hin php ton vt qu 4 bt thp Bit 2 : Z=1 nu kt qu php ton bng 0 Z=0 nu kt qu php ton khc 0 Bit 3 : PD=1 sau khi bt ngun hoc bi lnh CLRWDT PD=0 khi lnh SLEEP c thc thi Bit 4 : TO=1 nu c lnh SLEEP thc thi hoc lnh CLRWDT hoc sau khi bt ngun T0=0 nu b WDT b chn Bit 6-5: 00: chn bank 0 01: chn bank 1 10: chn bank 2 11: chn bank 3 Bit 7: 1: chn bank 2,3 0: chn bank 0,1 ii) thanh ghi option_reg:

Bit 0-1-2 : dng chn gi tr cho b chia tn cho TIMER0 hoc WDT

Bit 3 : PSA =1: b chia tn dng cho WDT PSA =0: b chia tn dng cho TIMER0 Bit 4 : TOSE =1: chn sng xung l sng tc ng ln chn RA4 TOSE =0: chn sng ln l sng tc ng ln chn RA4 Bit 5 : TOCS =1: chn xung m trong TIMER0 l xung trn chn RA4 TOCS =0: chn xung m trong TIMER0 l xung ni Bit 6 : INTEDG =1: xy ra ngt khi chn RB0 c sn ln INTEDG =0: xy ra ngt khi chn RB0 c sn xung Bit 7 : RBPU =1: cm cho php in tr ko dng PORTB RBPU =0: cho php in tr ko dng PORTB III) thanh ghi intcon:

Bit 0: C bo ngt cho cc chn RB4-RB7 RBIF =1: xut hin t nht mt trong cc ngt ti cc chn RB4-RB7 RBIF =0: khng xut hin ngt ti cc chn RB4-RB7 Bit 1: C ngt cho chn RB0 INTF =1: xut hin ngt trn chn ngt ngoi RB0 INTF =0: khng xut hin ngt trn chn ngt ngoi RB0 Bit 2: C ngt cho b TIMER0 TMR0IF =1: xy ra trn trong thanh ghi TMR0 TMR0IF =0: cha xy ra trn trong thanh ghi TMR0

Bit 3: RBIE =1: cho php ngt trn cc chn RB4-RB7 RBIE =0: cm ngt trn cc chn RB4-RB7 Bit 4: INTE =1: cho php ngt trn chn RB0 INTE =0: cm ngt trn chn RB0 Bit 5: TMR0IE =1: cho php ngt bng b TIMER0 TMR0IE =0: cm ngt bng b TIMER0 Bit 6: PEIE =1: cho php ngt phc v cho thit b ngoi vi PEIE =0: cm cc ngt phc v cho thit b ngoi vi Bit 7: GIE =1: cho php tt c cc ngt c thc hin GIE =0: cm tt c cc ngt khng c thc hin

Ch : V tr ca b nh d liu c chia thnh 4 BANK thanh ghi(cc khi , cc vng) mi thi im , chng ta ch c th truy xut trn 1 BANK thanh ghi no m thi .Vic chn BANK no thng qua vic iu khin cc bit 5-6-7 ca thanh ghi STATUS Chng ta thy rng trong PIC cn rt nhiu cc thanh ghi chc nng khc nhng chng ta s khng bn n n y.Nu cc bn cn m rng kin thc th c th tham kho thm trong DATASHEET ca 16F877A

Cc ng dng c bn ca pic 16F877a I) m v nh thi: 1)B nh thi TIMER0 Timer0 l mt trong 3 b nh thi ca PIC16F877A , mi mt nh thi th s dng cc thanh ghi chc nng khc nhau vi nhim v v cch thc hot ng cng khc nhau +cc thanh ghi dng trong timer0

Chng 4

Thanh ghi option: L thanh ghi cho php c ghi dng iu khin thit lp Thanh ghi intcon:L thanh ghi cha c ngt ca Timer0 Thanh ghi tmr0: L thanh ghi 8 bit ,mi ln c xung tc ng th gi tr ca

cu hnh cho Timer0

thanh ghi s tng ln 1 n v cho n khi trn th thanh ghi s ch v 0 +hot ng ca b nh thi timer0:

Nhn s khi ca TIMER0 ta c th thy n hot ng 2 ch - Ch nh thi: ch ny chng ta cn chn xung tc ng l xung ni(TOCS =0) lc ny xung to ra bi b giao ng sau khi c chia 4 s i qua b chia tn cung cp cho Timer0 m .Sau khi mt xung c m gi tr ca thanh ghi TMR0 s tng ln 1 n v , khi xy ra trn th c TMR0IF s c set ln 1. - Ch m: ch ny chng ta cn chn xung tc ng l xung ngoi(TOCS =1) Timer0 s ly xung t bn ngoi thng qua chn RA4 thng qua b chia tn s cung cp cho Timer0 tng t nh trn.Vic chn kiu xung tc ng thng qua vic iu khin bit T0SE. - Ch WDT: chng ta s khng tm hiu vn ny.

2)b nh thi timer1: B nh thi Timer1 l b nh thi 16 bit cng vi 2 chc nng c bn nh Timer0
+cc thanh ghi dng trong timer1:

Thanh ghi t1con: L thanh ghi thit lp cu hnh hot ng cho Timer1

Bit 0: Bit 1: dng) Bit 2:

TMR1ON =1: cho php Timer1 hot ng TMR1ON =0: khng cho php Timer1 hot ng Tmr1cs =1: dng ngun xung t bn ngoi thng qua chn RC0 (sng Tmr1cs =0: dng ngun xung t b to dao ng

khi Tmr1cs =1: t1sync=1: khng s dng xung ngoi l xung ng b t1sync=0: cho php s dng xung ngoi l xung ng b khi Tmr1cs =0: Bit ny khng c s dng

Bit 3:

T1oscen=1: cho php b to dao ng hot ng T1oscen=0: khng cho php b to dao ng hot ng

Bit 5 -4 : Thit lp gi tr cho b chia tn

THANH GHI TMR1: L thanh ghi lu tr gi tr nh thi 16 bit c to thnh t 2 thanh ghi 8 bit tmr1l tmr1h Thanh ghi pir1: L thanh ghi cha c trn TMR1IF ca Timer1 Thanh ghi pie1: L thanh ghi cha bit TMR1IE cho php ngt Timer1 hot ng +hot ng ca b nh thi timer1

Nhn vo s khi ta thy Timer1 c 2 chc nng c bn sau: Ch nh thi: trc ht cn phi cho Timer1 hot ng bng cch set bit TMR1ON sau chn ch s dng xung ni(TMR1CS =1).Xung t b to dao ng s c chia 4 sau a qua b chia tn cung cp cho Timer1 m ng thi gi tr ca thanh ghi TMR1 s tng ln 1 n v cho n khi trn v c trn TMR1IF=1. Ch m: khi s dng ch ny chung ta cn phi set bit TMR1CS =1, ngun xung t bn ngoi c th ly t 2 chn RC0 - RC1 thng qua vic thit lp bit T1OSCEN , nu bit T1SYNC=0 th xung tc ng t bn ngoi s ng b vi xung dao ng bn trong , qu trnh ng b xy ra sau khi xung i qua b chia tn

3)b nh thi timer2: Timer2 l b nh thi 8 bit tng t nh Timer1 nhng li c ti 2 b chia tn c th c dng trong ng dng iu ch rng xung (PWM)
Cc thanh ghi dng trong timer2:

Thanh ghi t2con: L thanh ghi thit lp cu hnh cho Timer2

Bit 1- 0: thit lp gia tr cho b chia tn Prescale 00 = 1:1 01 = 1:4 1x = 1:16 Bit 2: TMR2ON=1: cho php s dng Timer2 TMR2ON=0: khng cho php s dng Timer2 Bit 6- 3: thit lp gi tr cho b chia tn Postcale

Thanh ghi pir1: cha c trn TMR2IF ca Timer2 Thanh ghi Pie1: cha c cho php ngt TMR2IE ca Timer2 Thanh ghi Pr2: ng dng trong PWM Thanh ghi tmr2: lu tr gi tr nh thi 8 bit cho Timer2

+hot ng ca b nh thi timer2

Ch nh thi: ngun xung t b to dao ng sau khi c chia 4 s c a b chia tn Prescale np vo thanh ghi TMR2 , khi xy ra trn bit TMR2IF=1. Ch PWM: trc ht chng ta np gi tr cho thanh ghi PR2 sau khi gi tr ca thanh ghi TMR2 s c so snh vi gi tr ca thanh ghi PR2 nu chng bng nhau th thanh ghi TMR2 s c Reset ng thi gi tr cc chn PWM s thay i chng ta s cp n vn ny phn sau.

II) cc ngt thng dng: Nh chng ta bit, vi iu khin ti mi thi im n ch c th lm mt cng vic nht nh. Nhng trong thc t th li khc, ngi lp trnh li mun vi iu khin ang lm cng vic ny li t ng chuyn sang lm cng vic khc ,vy lm th no vi iu khin lm c ? n gin l n s s dng c ch gi l : Ngt 1)cc ngt ca pic 16f877a +Ngt trn Timer0 +Ngt do c thay i trng thi trn cc chn t RB4- RB7 +Ngt ngoi trn chn RB0 +Ngt chuyn i ADC hon tt +Ngt b chuyn m RS 232 chng +Ngt do d liu nhn t RS232 sn sng +Ngt trn Timer1 +Ngt trn Timer2 +Ngt do c capture hay compare trn chn CCP1 +Ngt do c capture hay compare trn chn CCP2 +Ngt do c hot ng SPI hay I2C +Ngt do c d liu vo cng parallel slave +Ngt do ghi vo EPROM hon tt +Ngt do xung t BUS +Ngt do kim tra bng nhau comparator

Ta thy rng Pic c rt nhiu ngt ng dng trong nhiu chc nng khc nhau nhng y chng ta ch cp n mt s ngt c bn sau: +Ngt do cc timer hoc ngt ngoi : V c bn hot ng ca cc ngt Timer hoc ngt ngoi hot ng nh sau: - Xung to ra do b to dao ng hocngun xung bn ngoi s c cung cp cho cc thanh ghi nh thi tng ng ca cc b nh thi , khi cc b nh thi xy ra trn c ngt tong ng c bt v mt yu cu ngt c phc v lc ny vi iu khin s tm ngng cng vic hin ti, hon thnh lnh hin thi ngay tc khc nhy vo chng trnh phc v ngt ISR. Khi b m chng trnh PC s c y vo ngn xp STACK v ng thi bit GIE =0 chng trnh r nhnh n a ch vect ngt 0x04 ,ti y vi iu khin s thc hin cc yu cu m ngt i hi . - Vic thit lp cu hnh cho cc ngt s thng qua cc bit ca cc thanh ghi chc nng nh sau: +i vi Timer0 : Bt iu khin l bit TMR0IE(INTCON.5) +i vi Timer1 : Bt iu khin l bit TMR1IE(PIE.0) +i vi Timer2 : Bt iu khin l bit TMR2IE(PIE.1) +i vi ngt ngoi: Bt iu khin l bit INTE(INTCON.4) +i vi ngt do cc chn RB4 RB7: Bt iu khin l bit RBIE(INTCON.3) Ch : Trc khi thit lp cc ngt chng ta cn phi cho php ngt ton cc thng qua vit cho bit GIE =1(INTCON.7) III) iu ch rng xung( PWM) Mt trong nhng tnh nng quan trng ca PIC c ng dng rt nhiu l iu ch rng xung PWM(Pulse Width Modulation)

Thanh ghi iu khin ccp1con/ccp2con:

Bit 3- 0: chn ch lm vic

Bit 5 - 4:????

Qu trnh hot ng ca chc nng PWM nh sau: - Vi PIC 16F877A chng ta c 2 chn iu ch rng xung l CCP1 v CCP2 ,sau chn chc nng PWM bng cch iu khin 4 bt thp ca thanh ghi CCPxCON , chng ta s np gi tr cho thanh ghi PR2 v thanh ghi CCPRx . Khi Timer2 hot ng gi tr ca thanh TMR2 s tng cho n khi bng gi tr ca thanh ghi PR2 lc ny chn CCPx tng ng s ln mc 1 ng thi thanh ghi TMR2 s b xo v gi tr ban u.Mc 1 ti chn CCPx s c d cho n khi gi tr thanh ghi TMR2 bng gi tri thanh ghi CCPRx sau chn CCPx li tr v 0 cho n khi gi tr thanh ghi TMR2=PR2 c nh vy qu trnh s lp li nh ban u.. - Nh vy chng ta c th rt ra nh sau: Chu k xung l khong thi gian gi tr thanh ghi TMR2 tng n gi tr thanh ghi PR2 Khong xung dng l khong thi gian thanh ghi TMR2 tng n gi tr thanh ghi CCPRx hiu r hn chng ta c th xem trong s sau:

Tp lnh CCS c cho PIC 16f877a I) gii thiu v trnh dch CCS c: - CCs l trnh bin dch dng ngn ng C lp trnh cho VK . y l ngn ng lp trnh y sc mnh , gip bn nhanh chng trong vic vit chng trnh hn l Assembly - CCS cha rt nhiu hm phc v cho mi mc ch v c rt nhiu cch lp trnh m cho cng 1 vn vi tc thc thi v di chng trnh khc nhau .S ti u l do k nng lp trnh ca mi ngi - CCS cung cp cc cng c tin ch gim st hot ng chng trnh nh: + C/ASM list: cho php m ASM ca file bn bin dch , gip bn qun l v nm r cch thc n c sinh ra , l cng c rt quan trng gip bn c th g ri chng trnh + SYMBOL: hin th b nh cp pht cho tng bin , gip bn qun l b nh cc bin ca ca chng trnh + CALLTREE: hin th phn b b nh II) Ch th tin x l : 1) #include : - C php: #include<filename> Filename: tn file cho thit b *.h, *.c . Ch nh ng dn cho trnh bin ch , lun phi c khai bo chng trnh vit cho VK no v phI lun t dng u tin VD: #include<16F877A.H> 2) #bit : - C php: #bit name = x.y Name: tn bin X: bin C(8,16,32bit) hay hng s a ch thanh ghi Y: v tr ca bit trong x To bin 1bit t byte x v tr y tin dng kim tra hay gn gi tr cho thanh ghi VD : #Bit TMR1IF = 0x0B.2; 3) #byte : - C php: #byte name = x Name: tn bin X:a ch Gn tn bin name cho a ch x , name thng dng gn cho cc thanh ghi VD : #Byte portb = 0x06; 4) #define : - C php: #define name text Name: tn bin Text : chui hay s VD : #Define A 12345 5) #use : - C php: #use delay(clock = speed)

Chng 5:

Speed: tc dao ng ca thch anh C ch th ny chng ta mi dng c hm delay_ms hoc delay_us VD: #use delay(clock = 4000000); 6) #use fast_io : - C php: #use fast_io(port) Port : cc cng vo ra ca PIC( t A-G) Dng ci ny chng ta c th iu chnh cc port vi ch 1 lnh VD: # use fast_io(a); III) Cc hm delay : 1) delay_ms(time) Time: gi tr thi gian cn to tr VD : delay_ms(1000); // tr 1s 2) delay_us(time) Time: gi tr thi gian cn to tr VD : delay_us(1000); // tr 1ms Hm delay ny khng s dng bt c Timer no c m ch l 1 nhm lnh v ngha thc hin trong khong thi gian bn nh sn Trc khi s dng cc hm ny cn phI khai bo tin nh #use_delay(.) IV) cc hm vo ra trong CCS c 1) Output_low(pin) Output_high(pin) Thit lp mc 0v(low) hoc 5v(high) cho cc chn ca PIC VD : output_low(pin_D0) ; 2) Output_bit(pin,value) Pin: tn chn ca PIC Value: gi tr 0 hay 1 VD: output_bit(pin_C0,1); 3) Output_X(value) X: tn cc port trn chp Value: gi tr 1 byte VD: output_B(255); 4) Input_X( ) X: tn cc port trn chip Hm ny tr gi tr 8 bit l gi tr hin hu ca port VD: n = input_A( ); 5) Set_tris_X(value) X: tn chn (A G) Value: l gi tr 8 bt iu khin vo ra cho cc chn ca chip 1: nhp d liu 0: xut d liu VD: set_tris_B(0); // tt c cc chn ca portb l ng ra V) hm s dng trong cc timer: 1)timer0: - SETUP_TIMER_0(mode);

Mode: l mt trong 2 constant (nu dng 2 th chn du | gia) c nh ngha trong file <16F877A.h> +RTCC_INTERNAL: chn xung dao ng ni +RTCC_EXT_H_TO_L: chn kiu tc ng l cch xung ca xung +RTCC_EXT_L_TO_H: chn kiu tc ng l cch ln ca xung +RTCC_DIV_2 : S dng b chia tn vi t l 1:2 +RTCC_DIV_4 : S dng b chia tn vi t l 1:4 +RTCC_DIV_8 : S dng b chia tn vi t l 1:8 +RTCC_DIV_16 : S dng b chia tn vi t l 1:16 +RTCC_DIV_32 : S dng b chia tn vi t l 1:32 +RTCC_DIV_64 : S dng b chia tn vi t l 1:64 +RTCC_DIV_128 : S dng b chia tn vi t l 1:128 +RTCC_DIV_256 : S dng b chia tn vi t l 1:256 - setup_COUNTER_0( rtcc_state , ps_state) Rtcc_state: +RTCC_INTERNAL: chn xung dao ng ni +RTCC_EXT_H_TO_L: chn kiu tc ng l cch xung ca xung +RTCC_EXT_L_TO_H: chn kiu tc ng l cch ln ca xung Ps_state: +RTCC_DIV_2 : S dng b chia tn vi t l 1:2 +RTCC_DIV_4 : S dng b chia tn vi t l 1:4 +RTCC_DIV_8 : S dng b chia tn vi t l 1:8 +RTCC_DIV_16 : S dng b chia tn vi t l 1:16 +RTCC_DIV_32 : S dng b chia tn vi t l 1:32 +RTCC_DIV_64 : S dng b chia tn vi t l 1:64 +RTCC_DIV_128 : S dng b chia tn vi t l 1:128 +RTCC_DIV_256 : S dng b chia tn vi t l 1:256 - set_timer0(value) : xc nh gi tr 8 bit ban u ca Timer0(value=TMR0) - GET_TIMER0( ) : tr li gi tr 8 bit cho Timer0 2)timer1: - SETUP_TIMER_1(mode); Mode: c th kt hp vi nhau bng u | +T1_DISABLED : tt hot ng ca Timer1 +T1_INTERNAL : s dng giao ng ni +T1_EXTERNAL : chn xung clock trn chn RC0 +T1_EXTERNAL_SYNC : chn xung lock ngoi ng b +T1_DIV_BY_1 : S dng b chia tn vi t l 1:1 +T1_DIV_BY_2 : S dng b chia tn vi t l 1:2

+T1_DIV_BY_4 : S dng b chia tn vi t l 1:4 +T1_DIV_BY_8 : S dng b chia tn vi t l 1:8 - set_timer0(value) : xc nh gi tr 8 bit ban u ca Timer1(value=TMR1) - GET_TIMER0( ) : tr li gi tr 8 bit cho Timer1 3) TIMER2: - SETUP_TIMER_1(mode , period , postcale); Mode: c th kt hp vi nhau bng u | +T2_DISABLED : tt hot ng ca Timer2 +T2_DIV_BY_1 : S dng b chia tn vi t l 1:1 +T2_DIV_BY_4 : S dng b chia tn vi t l 1:4 +T2_DIV_BY_16 : S dng b chia tn vi t l 1:16 Period : s nguyn t 0 255 xc nh gi tr xung reset Postcale : xc nh s reset trc khi ngt - set_timer2(value) : xc nh gi tr 8 bit ban u ca Timer2(value=TMR2) - GET_TIMER2( ) : tr li gi tr 8 bit cho Timer2 VI) cc hm phc v ngt - enable_interrupts( level) Level: +GLOBAL : cho php ngt ton cc +INT_TIMER0 : ngt do trn Timer0 +INT_TIMER1 : ngt do trn Timer1 +INT_TIMER2 : ngt do trn Timer2 +INT_RB : c thay i 1 trong cc chn RB4 +INT_EXT : ngt ngoi trn chn RB0

RB7

Ch : sau khi khai bo trn th vo chng trnh ngt cn khai bo #INT_..... VD: #INT_TIMER1 Void ngt_Timer1( ) { //chng trnh ngt vit y }

VII) cc hm iu ch rng xung

- SETUP_CCPx(mode): Dng trc ht thit lp ch hot ng hay v hiu ho tnh nng CCP X: tn chn CCP trn chip (vi PIC 16F877A l cc chn RC1-CCP2 ; RC2-CCP1) Mode: CCP_PWM (bt ch PWM) - SET_CCPx_DUTY(value) X: tn chn CCP trn chip Value: gi tr 8 hay 16 bit N ghi 10 bit gi tr vo thanh ghi CCPx , nu value ch c 8 bit th n s dch thm 2 bit na 10 bit np vo CCPx Tu phn gi m gi tr ca value khng phI lc no cng t ti gi tr 1023

Cc v d c bn dng pic 16f877a 1) xut 0-1 ra cc chn:

Chng6

#INCLUDE<16F877A.h> //KHAI BAO DEVICE CHO PIC #FUSES XT,NOWDT,PUT,NOPROTECT,NOBROWNOUT,NOLVP /* XT: SU DUNG THACH ANH TAN SO THAP (=4MHZ) NOWDT:KHONG SU DUNG CHE DO WATCH DOG TIMER PUT(POWER UP TIMER): CHON CHE DO LAM VIEC CHO PIC KHI DIEN AP DA ON DINH NOPROTECT : KHONG CHO PHEP DOC LAI MA CHUONG TRINH TRONG CHIP NOBROWNOUT : KHONG RESET LAI PIC KHI BI SUT AP NOLVP(LOW VOLTAGE PROGRAMMING) : ?? */ #USE DELAY(CLOCK=4000000) //GIA TRI OSC MA BAN DUNG #USE FAST_IO(B) VOID MAIN() { SET_TRIS_B(0); //THIET LAP CAC CHAN CUA PORTA LA CAC CHAN XUAT DU LIEU WHILE(TRUE) //TAO VONG LAP VO TAN { OUTPUT_HIGH(PIN_B0); //XUAT GIA TRI 1 RA CHAN RB0 DELAY_MS(500); //TAO TRE 0,5s OUTPUT_LOW(PIN_B0); //XUAT GIA TRI 0 RA CHAN RB0 DELAY_MS(500); OUTPUT_B(255); //DUA GIA TRI 1 RA CAC CHAN CUA PORTB DELAY_MS(500); OUTPUT_B(0); //DUA GIA TRI 0 RA CAC CHAN CUA PORTB DELAY_MS(500); } }

2)GIAO TIP VI PHM BM

#INCLUDE<16F877A.H> #FUSES XT,NOWDT,PUT,NOPROTECT,NOBROWNOUT,NOLVP #USE DELAY(CLOCK=4000000) #USE FAST_IO(B) #BYTE PORTB=0x06 #BIT BUTTON=PORTB.7 #BIT LED=PORTB.6 VOID MAIN() { SET_TRIS_B(0b10111111); //LAP CHE CHO PIN_B6 LA XUAT CON CAC CHAN KHAC LA NHAP WHILE(TRUE) { IF(BUTTON==0) //KIEM TRA NUT BAM { LED=1; //BAT DEN DELAY_MS(1000); LED=0; //TAT DEN } } }

3)delay dng vng lp

#INCLUDE<16F877A.H> #FUSES XT,NOWDT,PUT,NOPROTECT,NOBROWNOUT,NOLVP #USE DELAY(CLOCK=4000000) #BYTE INTCON=0x0B #BYTE PIR1=0x0C #BYTE T1CON=0x10 #BIT TMR1ON=T1CON.0 //KHOI DONG TIMER1 #BIT TMR1IF=PIR1.0 //CO TRAN TIMER1 #BIT INTF=INTCON.1 //CO NGAT

VOID DELAY(INT8 TIMER) { WHILE(TIMER--) { TMR1ON=1; WHILE(TMR1IF==0); TMR1ON=0; TMR1IF=0; } }

VOID MAIN() { WHILE(TRUE) { OUTPUT_HIGH(PIN_C4); DELAY(100); OUTPUT_LOW(PIN_C4); DELAY(100); } }

//TUONG TU VOI CAC TIMER0 VA TIMER2 CAC BAN CO THE XEM DATASHEET DE BIET THEM VE DIA CHI // CAC THANH GHI CHUC NANG CUA CHUNG

4)delay dng timer khng dng ngt

#INCLUDE<16F877A.H> #FUSES XT,NOWDT,PUT,NOPROTECT,NOBROWNOUT,NOLVP #USE DELAY(CLOCK=4000000) #BYTE INTCON=0x0B #BYTE PIR1=0x0C #BYTE T1CON=0x10 #BYTE T2CON=0x12 #BIT TMR1ON=T1CON.0 //KHOI DONG TIMER1 #BIT TMR1IF=PIR1.0 //CO TRAN TIMER1 #BIT TMR0IF=INTCON.2 //CO TRAN TIMER0 #BIT TMR2ON=T2CON.2 //KHOI DONG TIMER2 #BIT TMR2IF=PIR1.1 //CO TRAN TIMER2

VOID MAIN() { SET_TRIS_E(0); SETUP_TIMER_0(RTCC_INTERNAL|RTCC_DIV_2); //SU DUNG TAN SO DAO DONG NOI VA BO CHIA TAN 1:2 SET_TIMER0(0); //DAT GIA TRI THANH GHI DINH THOI TMR0=0 SETUP_TIMER_1(T1_INTERNAL|T1_DIV_BY_4); //SU DUNG TAN SO DAO DONG NOI VA BO CHIA TAN 1:4 SET_TIMER1(0); //DAT GIA TRI THANH GHI DINH THOI TMR1=0 SETUP_TIMER_2(T2_DIV_BY_16,255,1); //SU DUNG TAN SO DAO DONG NOI VA BO CHIA TAN 1:16 SET_TIMER2(0); //DAT GIA TRI THANH GHI DINH THOI TMR2=0 TMR0IF=TMR1IF=TMR2IF=0; //XOA CAC CO TRAN WHILE(TRUE) { IF(TMR0IF==1) //KIEM TRA CO TRAN TIMER0 { OUTPUT_HIGH(PIN_E0); DELAY_MS(50); OUTPUT_LOW(PIN_E0); TMR0IF=0; } ELSE IF(TMR1IF==1) //KIEM TRA CO TRAN TIMER1 { OUTPUT_HIGH(PIN_E1); DELAY_MS(50); OUTPUT_LOW(PIN_E1); TMR1IF=0; } ELSE IF(TMR2IF==1) //KIEM TRA CO TRAN TIMER2 { OUTPUT_HIGH(PIN_E2); DELAY_MS(50); OUTPUT_LOW(PIN_E2); TMR2IF=0; } }

5)delay dng timer c dng ngt

#INCLUDE<16F877A.H> #FUSES XT,NOWDT,PUT,NOPROTECT,NOBROWNOUT,NOLVP #USE DELAY(CLOCK=4000000) #BYTE PORTB=0x06 #BYTE PORTC=0x07 #BYTE PORTD=0x08 #INT_TIMER0 //CHUONG TRINH NGAT TIMER0 VOID NGAT_TIMER0() { PORTB=0b10101010; DELAY_MS(200); PORTB=0b01010101; }

#INT_TIMER1 //CHUONG TRINH NGAT TIMER1 VOID NGAT_TIMER1() { PORTC=0b11110000; DELAY_MS(200); PORTC=0b00001111; } #INT_TIMER2 //CHUONG TRINH NGAT TIMER2 VOID NGAT_TIMER2() { PORTD=0b11001100; DELAY_MS(200); PORTD=0b00001111; }

VOID MAIN() { SET_TRIS_B(0); SET_TRIS_C(0); SET_TRIS_D(0); ENABLE_INTERRUPTS(GLOBAL); //CHO PHEP TAT CA CAC NGAT HOAT DONG ENABLE_INTERRUPTS(INT_TIMER0); //CHO PHET NGAT BANG TIMER0 ENABLE_INTERRUPTS(INT_TIMER1); //CHO PHET NGAT BANG TIMER1 ENABLE_INTERRUPTS(INT_TIMER2); //CHO PHET NGAT BANG TIMER2 SETUP_TIMER_0(RTCC_INTERNAL|RTCC_DIV_1); SET_TIMER0(0); SETUP_TIMER_1(T1_INTERNAL|T1_DIV_BY_4); SET_TIMER1(0); SETUP_TIMER_2(T2_DIV_BY_16,255,1); SET_TIMER2(0); WHILE(TRUE); //KHONG LAM GI CA CHO NGAT }

6) dng ch counter

#INCLUDE<16F877A.H> #FUSES XT,NOWDT,PUT,NOPROTECT,NOBROWNOUT,NOLVP #USE DELAY(CLOCK=4000000) #USE FAST_IO(C) #BIT TMR0IF=0x0B.2 #BYTE PORTC=0x07 CONST CHAR FONT[]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x98}; INT8 I;

VOID MAIN() { SET_TRIS_C(0); PORTC=255; SETUP_COUNTERS(RTCC_EXT_H_TO_L,RTCC_DIV_1); SET_TIMER0(255); WHILE(TRUE) { IF(TMR0IF==1) { IF(I<=9) { PORTC=FONT[I++]; } ELSE { I=0; PORTC=FONT[I]; } TMR0IF=0; SET_TIMER0(255); } } }

7) dng ch pwm
#INCLUDE<16F877A.h> #FUSES NOWDT,PUT,XT,NOPROTECT,NOBROWNOUT,NOLVP #USE DELAY(CLOCK=4000000) #USE FAST_IO(B) #USE FAST_IO(C) #BYTE PORTB=0x06 #BIT RB1=PORTB.1 #BIT RB2=PORTB.2 INT16 U; VOID MAIN() { SET_TRIS_B(255); SET_TRIS_C(0); U=200; SETUP_TIMER_2(T2_DIV_BY_16,255,1); //THIET LAP CAU HINH CHO TIMER0 SET_TIMER2(0); SETUP_CCP1(CCP_PWM); //CHON CHE DO PWM SET_PWM1_DUTY(U); //XAC DINH SO XUNG DE CHAN PWM1 O MUC 1 WHILE(TRUE) { IF(RB1==0) //TANG DO SANG LED { U=U+10; IF(U>255) { U=255; SET_PWM1_DUTY(U);//TANG TOC PHAI } ELSE { SET_PWM1_DUTY(U); } } ELSE IF(RB2==0) { U=U-10; IF(U>145) SET_PWM1_DUTY(U);// GIAM TOC PHAI ELSE { U=145; SET_PWM1_DUTY(U); } }

} }

8) DNG NGT NGOI

#INCLUDE<16F877A.h> #FUSES NOWDT,PUT,XT,NOPROTECT,NOBROWNOUT,NOLVP #USE DELAY(CLOCK=4000000) #USE FAST_IO(B) #USE FAST_IO(D) #BYTE PORTB=0x06 #BYTE PORTD=0x08 #BIT RB0=PORTB.0 #BIT RB4=PORTB.4 #BIT RB5=PORTB.5 #BIT RB6=PORTB.6 #BIT RB7=PORTB.7

#INT_EXT //CHUONG TRINH NGAT TREN CHAN RB0 VOID NGATNGOAI_RB0() { OUTPUT_HIGH(PIN_D0); DELAY_MS(1000); OUTPUT_LOW(PIN_D0); }

#INT_RB VOID NGATNGOAI_RB() //CHUONG TRINH NGAT NGOAI TREN CHAN RB4-->RB7 { IF(RB4==0) //KIEM TRA CHAN RB4 { OUTPUT_HIGH(PIN_D0);

DELAY_MS(1000); OUTPUT_LOW(PIN_D0); } ELSE IF(RB5==0) //KIEM TRA CHAN RB5 { OUTPUT_HIGH(PIN_D1); DELAY_MS(1000); OUTPUT_LOW(PIN_D1); } ELSE IF(RB6==0) //KIEM TRA CHAN RB6 { OUTPUT_HIGH(PIN_D2); DELAY_MS(1000); OUTPUT_LOW(PIN_D2); } ELSE IF(RB7==0) //KIEM TRA CHAN RB7 { OUTPUT_HIGH(PIN_D3); DELAY_MS(1000); OUTPUT_LOW(PIN_D3); } } VOID MAIN() { SET_TRIS_B(255); SET_TRIS_D(0); PORTD=0; ENABLE_INTERRUPTS(GLOBAL); //CHO PHEP TAT CA CAC NGAT HOAT DONG ENABLE_INTERRUPTS(INT_RB); //CHO PHEP NGAT NGOAI TU CAC CHAN RB4-->RB7 ENABLE_INTERRUPTS(INT_EXT); //CHO PHEP NGAT NGOAI TREN CHAN RB0 EXT_INT_EDGE(H_TO_L); //KIEU TAC DONG LA KIEU SUONG AM WHILE(TRUE) { OUTPUT_HIGH(PIN_D7); DELAY_MS(1000); OUTPUT_LOW(PIN_D7); DELAY_MS(1000); } }

Cch s dng chng trnh m phng proteus Giao din ca chng trnh Proteus nh sau:

Chng 7

tm cc linh kin cn dng bn n phm P hay click chut vo nt P bn tri mn hnh Mt ca s s hin ra: -Trong c cc th mc gip bn d dng trong vic tm cc linh kin cn dng -Vi d nh diodes (cc loi diot),microcontrollers(cc loi vi iu khin)

Sau khi sp xp cc linh kin ta c s hon chnh nh sau:

 chy m phng mch in ta lm nh sau: - Nhy chut phi vo con vi iu khin ta cn khi thy n i mu th ta nhy chut tri v mt ca s s hin ra nh sau:

Ti program file chng ta ch ng dn n file HEX cn phi np cho chip Ti processor clock frequency chng ta chn tn s giao ng ca thch anh Sau n ok hon tt - chy m phng chng ta s dng cc nt: Qu trnh chy m phng c minh ho hnh di:

Hng dn s dng trnh bin dch ccs c Sau khi ci t phn mm chng trnh s c giao din nh sau:

CHNG 8

to mt project mi bn h y chn Project/ New /Pic Winzard . Sau khi nh tn file mun t mt ca s s hin ra nh sau:

Ti mc Device bn chn tn Pic ang dng Ti mc oscilator Frequency bn chn tn s giao ng ca thch anh Sau n ok hon tt Sau khi hon tt vic lp trnh bn n F9 chng trnh dch sang file HEX Vi file Hex c to ra bn c th np c cho vi iu khin