VI iU KHIN ARM

NI DUNG:
Gii thiu chung v h vi iu khin ARM Cu trc bn trong M phng trn phn mm Th d trn board SAM7S256-Amtel

C iM H VI iU KHIN ARM
L vi iu khin tin tin x l 32 bt c s dng rng ri trn cc in thoi di ng Tn s hot ng ln n 60MHz Kh nng tnh ton cao, tiu th ngun nng lng thp C phn cng ring bit h tr c ch x l pipeline

C iM H VI iU KHIN ARM
C ch pipeline:

Tp lnh kiu RISC

CU TRC BN TRONG
Gm 15 thanh ghi 32 bt:

CU TRC BN TRONG
H tr x l 2 kiu tp lnh Tp lnh ARM 32 bt Tp lnh Thumb 16 bt

CU TRC BN TRONG
u im ca tp lnh thunb
Tp lnh THUMB cho gi tr kt qu thp hn tp lnh ARM nhng m cc kt qu ny chim mt t l ln hn. Tp lnh THUMB tit kim c khng gian nh 30% v chy nhanh hn 40% so vi tp lnh ARM. Tp lnh THUMB khng c iu kin thc thi tr cc lnh r nhnh.

CU TRC BN TRONG
Khi s dng tp lnh thumb cc thanh ghi cao t R8-R12 b gii hn truy cp:

CU TRC BN TRONG
Cch vit chng trnh C vi tp lnh ARM v tp lnh THUMB:
#pragma ARM // khai bo cc lnh ARM int main(void) { while(1){ THUMB_function(); //gi n hm THUMB }} #pragma THUMB void THUMB_function(void) { unsigned long i,delay; for (i = 0x00010000;i < 0x01000000 ;i = i<<1){ for (delay = 0;delay<0x000100000;delay++){} //to vng lp IOSET1 = i; //chuyn n led tip theo }}

CU TRC BN TRONG
Cch vit chng trnh C vi tp lnh ARM v tp lnh THUMB: Hoc: int ARM_FUNCTION ( int my_var) __ARM {} int THUMB_FUNCTION ( int my_var) __THUMB {}

LP TRNH THANH GHI

Mt thanh ghi chc nng c iu khin bi 3 thanh ghi ngi dng:

MEMORY ACELARATER MODULE (MAM)

L b nh nm gia b nh Flash v CPU ARM, c tc thc thi cao:

MEMORY ACELARATER MODULE (MAM)

MAM c to ra nh l mt cache y cho php CPU d dng truy cp trc tip vo FLASH:

MEMORY ACELARATER MODULE (MAM)

#include "LPC21xx.h" void ChangeGPIOPinState(unsigned int state); int main(void){ unsigned int delay,val; unsigned int FLASHer = 0x00010000; // Khai bo cc b IODIR0 = 0x00FF0000; // Thit lp cc chn ra VPBDIV = 0x02; MAMTIM = 0x03; MAMCR = 0x02; for(delay = 0;delay<0x100000;delay++) //to vng lp {;} ChangeGPIOPinState(FLASHer); //i trng thi cc chn ra cng FLASHer = FLASHer <<1; //Dch n n led tip if(FLASHer&0x01000000) { FLASHer = 0x00010000; //Lp li n u tin }}} void ChangeGPIOPinState(unsigned int state) { IOSET0 = state; //set output pins IOCLR0 = ~state; //clear output pins }

PLL- Phase Locked Loop

To ra mt tn s dao ng ngoi t 1025MHz t mch dao ng c bn v c th tng ln 60 MHz cung cp cho CPU ARM v thit b ngoi vi. Tn s u ra ca PLL c th thay i t ng, cho php thit b iu chnh theo tc thc thi duy tr ngun nng lng khi trng thi rnh ri.

PLL- Phase Locked Loop

PLL- Phase Locked Loop

Tn s ra ca PLL l: Cclk=M x Osc Ngc li PLL li c iu khin bi mt dao ng hot ng hin hnh (CCO) di tn 156MHz-320MHz. Hng s th 2 P phi c lp trnh m bo sao cho CCO c gi mt gi tr c th: Fcco = Cclk x 2 x P Thc nghim th P=2.

PLL- Phase Locked Loop

Khi cp nht gi tr thanh ghi PLLCON v PLLCFG th phi ghi lin tip hai gi tr 0x000000AA v 0x00000055 cho thanh ghi PLLFEED trong cc chu k lin tip. ci t PLL phi ghi cc gi tr cho P v M ti thanh ghi PLLCFG, sau set D0 ca thanh ghi PLLCON cho php PLL khi ng

PLL- Phase Locked Loop

Thanh ghi PLLCFG:

PLL- Phase Locked Loop

Thut ton khi ng PLL

B chia tn (VLSI Peripheral Bus Divider)

Thanh ghi VPBDIV c lp trnh cha s ln gim tc

TH D PLL
void init_PLL(void) { PLLCFG = 0x00000024; // Thit lp h s nhn v b chia cho PLL // give 60.00 MHz PLLCON = 0x00000001; // Kch hot PLL PLLFEED = 0x000000AA; // Cp nht thanh ghi PLLFEED PLLFEED = 0x00000055; while (!(PLLSTAT & 0x00000400)); // kim tra bt Lock PLLCON = 0x00000003; // Kt ni ti PLL PLLFEED = 0x000000AA; //Cp nht cc thanh ghi PLL PLLFEED = 0x00000055; VPBDIV = 0x00000002; //Thit lp bus VLSI vi tn s 30.000MHz }

KH A CHC NNG

TH D CU HNH PINSEL CHO NGT

STT 1 2 3 4 5 Chn 3:2 7:6 15:14 19:18 29:28 K hiu P0.1 P0.3 P0.7 P0.9 P0.14 Gi tr 11 11 11 11 10 Loi ngt EINT0 EINT1 EINT2 EINT3 EINT1

31:30

P0.15

10

EINT2

M PHNG TRN PHN MM

Keil ARM Proteus

KIT AT91SAM7S256

KIT AT91SAM7S256