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Lab 6
Lab 6
HAMDARD UNIVERSITY
DEPARTMENT OF ELECTRICAL ENGINEERING
EXPERIMENT 6#: Implementation of 2x1 MUX and 4x1 MUX Using Data Flow Modeling
Date of Experiment
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Report Submitted on
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Marks Obtained
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OBJECT: Implementation of 2x1 MUX and 4x1 MUX Using Data Flow Modeling.
DESCRIPTION:
In this lab we will implement different types of multiplexers using data flow modeling. Prior to
the explanation of the code, a multiplexer is a logic circuit that has several inputs and one output
and based on the select inputs any one of the input will be selected as the output.
The number of inputs is generally a multiple of 2 (2, 4, 8, 16, etc.), the number of outputs is
either 1 or relatively small multiple of 2, and the number of control signals is related to the
combined number of inputs and outputs. For example, a 2-input, 1-output MUX requires only 1
control signal to select the input, while a 16-input, 4-output MUX requires 4 control signals to
select the input and 2 to select the output.
Multiplexer, simply called MUX, is a data selector and is capable of selecting one of many
input lines (usually 2n) and display its input status on the only output line available.
A MUX has
1.
Select lines
2.
Data input lines
3.
Output line.
Block diagram of 2x1 MUX
I0
2X1 MUX
output
I1
select line
I0
I1 s
I1 s + I0 s' = Y
To LED
s'
I0 s'
o/p
Y
Io
I1
I1
I2
I3
4X1 MUX
Y
output
S1
S0
select lines