Led LCD TV: Service Manual

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Internal Use Only

http://biz.lgservice.com

LED LCD TV
SERVICE MANUAL
CHASSIS : LC01U

MODEL: 42/47/55LW4500

CAUTION

BEFORE SERVICING THE CHASSIS,


READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL62864833(1104-REV00)

CONTENTS

CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 9
BLOCK DIAGRAM....................................................................................13
EXPLODED VIEW .................................................................................. 15
SCHEMATIC CIRCUIT DIAGRAM ..............................................................

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

Leakage Current Hot Check (See below Figure)

General Guidance

Plug the AC cord directly into the AC outlet.


An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1 W), keep the resistor 10 mm away from PCB.

Do not use a line Isolation Transformer during this check.


Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5 mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

Leakage Current Hot Check circuit


Keep wires away from high voltage or high temperature parts.

AC Volt-meter

Before returning the receiver to the customer,


always perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

-3-

To Instrument's
exposed
METALLIC PARTS

0.15 uF

Good Earth Ground


such as WATER PIPE,
CONDUIT etc.

1.5 Kohm/10W

When 25A is impressed between Earth and 2nd Ground


for 1 second, Resistance must be less than 0.1
*Base on Adjustment standard

LGE Internal Use Only

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10 % (by volume) Acetone and 90 %
(by volume) isopropyl alcohol (90 % - 99 % strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
Copyright 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

2. After removing an electrical assembly equipped with ES


devices, place the assembly on a conductive surface such as
aluminum foil, to prevent electrostatic charge buildup or
exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES
devices.
4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
electrical charges sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate
electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective
package until immediately before you are ready to install it.
(Most replacement ES devices are packaged with leads
electrically shorted together by conductive foam, aluminum foil
or comparable conductive material).
7. Immediately before removing the protective material from the
leads of a replacement ES device, touch the protective material
to the chassis or circuit assembly into which the device will be
installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged
replacement ES devices. (Otherwise harmless motion such as
the brushing together of your clothes fabric or the lifting of your
foot from a carpeted floor can generate static electricity
sufficient to damage an ES device.)
General Soldering Guidelines
1. Use a grounded-tip, low-wattage soldering iron and appropriate
tip size and shape that will maintain tip temperature within the
range or 500 F to 600 F.
2. Use an appropriate gauge of RMA resin-core solder composed
of 60 parts tin/40 parts lead.
3. Keep the soldering iron tip clean and well tinned.
4. Thoroughly clean the surfaces to be soldered. Use a mall wirebristle (0.5 inch, or 1.25 cm) brush with a metal handle.
Do not use freon-propelled spray-on cleaners.
5. Use the following unsoldering technique
a. Allow the soldering iron tip to reach normal temperature.
(500 F to 600 F)
b. Heat the component lead until the solder melts.
c. Quickly draw the melted solder with an anti-static, suctiontype solder removal device or with solder braid.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
(500 F to 600 F)
b. First, hold the soldering iron tip and solder the strand against
the component lead until the solder melts.
c. Quickly move the soldering iron tip to the junction of the
component lead and the printed circuit foil, and hold it there
only until the solder flows onto and around both the
component lead and the foil.
CAUTION: Work quickly to avoid overheating the circuit
board printed foil.
d. Closely inspect the solder area and remove any excess or
splashed solder with a small wire-bristle brush.

-4-

LGE Internal Use Only

IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.

Circuit Board Foil Repair


Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
board causing the foil to separate from or "lift-off" the board. The
following guidelines and procedures should be followed whenever
this condition is encountered.
At IC Connections
To repair a defective copper pattern at IC connections use the
following procedure to install a jumper wire on the copper pattern
side of the circuit board. (Use this technique only on IC
connections).
1. Carefully remove the damaged copper pattern with a sharp
knife. (Remove only as much copper as absolutely necessary).
2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
3. Bend a small "U" in one end of a small gauge jumper wire and
carefully crimp it around the IC pin. Solder the IC connection.
4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
excess jumper wire.
At Other Connections
Use the following technique to repair the defective copper pattern
at connections other than IC Pins. This technique involves the
installation of a jumper wire on the component side of the circuit
board.
1. Remove the defective copper pattern with a sharp knife.
Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
break and locate the nearest component that is directly
connected to the affected copper pattern.
3. Connect insulated 20-gauge jumper wire from the lead of the
nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Carefully crimp and solder the connections.
CAUTION: Be sure the insulated jumper wire is dressed so the
it does not touch components or sharp edges.

Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright 2011 LG Electronics. Inc. All rights reserved.
Only for training and service purposes

-5-

LGE Internal Use Only

SPECIFICATION
.

3. Test method

1. Application range

This
is applied to the LCD/ LED LCD TV used
LC01U chassis.

1) Performance: LGE TV test method followed

2. Requirement for Test

- EMC:CE, IEC

Each part is tested as below without special appointment.

1) Temperature
: 25 C 5 C (77 F 9 F), CST : 40 C 5 C
2) Relative Humidity : 65 % 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~ 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4)
and performance of each parts are followed
each drawing and
by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.

4. Model General Specification


No

Item

Meas
urem
ent

Specification

Result

Remark

1
2
3

Display Screen Device


Aspect Ratio
LCD Module

42/47/55Wide color display module


16:9

CCFL/EEFL LCD

42 TFT LCD FHD 47 TFT LCD FHD 55 TFT LCD FHD

LGD : 42/47/55LW4500

Storage Environment

Temp. : -20 ~ 60 deg, Humidity : 10 ~ 90 %

Input Voltage

100-240V~ 50/60Hz

Power Consumption

Power on (Blue)
42LGD(FHD,100Hz)3DA

Typ:80W

42LGD(FHD,100Hz) Edge Typ:91.3W


47LGD(FHD,100Hz)3D

Typ:90.5W

47LGD(FHD,100Hz) Edge Typ: 80.2 W


55LGD(FHD,100Hz)3D

Typ:108.5W

55LGD(FHD,100Hz) Edge Typ:108.5W


42LGD(FHD,100Hz)
42LGD(FHD) Edge
47LGD(FHD,100Hz)3D

Module Size

968.4(H) x 564.0 (V) x 10.8(B) / 22.9 mm


968.4(H) 564(V) X 10.8(B)/18.3 mm(D)
1078.6(H) x 626.0 (V) x 10.8(B) / 22.9 mm (D)

47LGD(FHD,100Hz) Edge 968.4(H) x 564.0 (V) x 10.8(B) / 22.9 mm


55LGD(FHD,100Hz)3D

1255.6(H) 726.4(V) X 19.0(B)/10.8 mm(D)

55LGD(FHD,100Hz) Edge 1255.6(H) 726.4(V) X 19.0(B)/10.8 mm(D)


Pixel Pitch

42LGD(FHD,100Hz)

0.4845 mm x 0.4845 mm

42LGD(FHD) Edge

0.4845 mm x 0.4845 mm

47LGD(FHD,100Hz)3D

0.5415 mm x 0.5415 mm

47LGD(FHD,100Hz) Edge 0.5415 mm x 0.5415 mm


55LGD(FHD,100Hz)3D

0.630 mm x 0.630 mm
55LGD(FHD,100Hz) Edge 0.630 mm x 0.630 mm

42LGD(FHD,100Hz)

Edge

42LGD(FHD) Edge

Edge

47LGD(FHD,100Hz)3D

Edge

47LGD(FHD,100Hz) Edge

Edge

55LGD(FHD,100Hz)3D

Edge

55LGD(FHD,100Hz) Edge

Back Light

Edge

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

-6-

LGE Internal Use Only

No

Item
Display Colors
Coating

Meas
urem
ent

Specification

Result

Remark

1.06 Billion, 16.7 Milion


3H, AG

5. Component Video Input (Y, CB/PB, CR/PR)


Specification

No.

Remark

Resolution
1.

H-freq(kHz)

V-freq(Hz)

720x480

15.73

60.00

SDTV,DVD 480i

2.

720x480

15.63

59.94

SDTV,DVD 480i

3.

720x480

31.47

59.94

480p

4.

720x480

31.50

60.00

480p

5.

720x576

15.625

50.00

SDTV,DVD 625 Line

6.

720x576

31.25

50.00

HDTV 576p

7.

1280x720

45.00

50.00

HDTV 720p

8.

1280x720

44.96

59.94

HDTV 720p

9.

1280x720

45.00

60.00

HDTV 720p

10.

1920x1080

31.25

50.00

HDTV 1080i

11.

1920x1080

33.75

60.00

HDTV 1080i

12.

1920x1080

33.72

59.94

HDTV 1080i

13.

1920x1080

56.250

50

HDTV 1080p

14.

1920x1080

67.5

60

HDTV 1080p

6. RGB (PC)
Specification

No.
Resolution

Proposed

H-freq(kHz)

V-freq(Hz)

Remark

Pixel Clock(MHz)

1.

720*400

31.468

70.08

28.321

2.

640*480

31.469

59.94

25.17

VESA

For only DOS mode

3.

800*600

37.879

60.31

40.00

VESA

4.

1024*768

48.363

60.00

65.00

VESA(XGA)

5.

1280*768

47.78

59.87

79.5

WXGA

6.

1360*768

47.72

59.8

84.75

WXGA

FHD Model

7.

1366*768

47.56

59.6

84.75

WXGA

WXGA Model

8.

1200*1024

63.901

60.02

100.075

SXGA

FHD model

9.

1280*720

45

60

74.25

720p

DTV Standard

10.

1920*1080

67.5

60

148.5

WUXGA

Input 848*480 60 Hz, 852*480 60 Hz


-> 640*480 60 Hz Display

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

-7-

FHD model

LGE Internal Use Only

7. HDMI Input
(1) DTV Mode
No.

Resolution

H-freq(kHz)

V-freq.(Hz)

Pixel clock(MHz)

Proposed

1.

720*480

31.469/31.5

59.94/60

27.00/27.03

SDTV 480P

2.

720*576

31.25

50

54

SDTV 576P

3.

1280*720

37.500

50

74.25

HDTV 720P

4.

1280*720

44.96/45

59.94/60

74.17/74.25

HDTV 720P

5.

1920*1080

33.72/33.75

59.94/60

74.17/74.25

HDTV 1080I

6.

1920*1080

28.125

50.00

74.25

HDTV 1080I

7.

1920*1080

26.97/27

23.97/24

74.17/74.25

HDTV 1080P

8.

1920*1080

33.716/33.75

29.976 /30.00

74.25

HDTV 1080P

9.

1920*1080

56.250

50

148.5

HDTV 1080P

10.

1920*1080

67.43/67.5

59.94/60

148.35/148.50

Remark

HDTV 1080P

(2) PC Mode
No.
1.

Resolution
720*400

H-freq(kHz)
31.468

V-freq.(Hz)
70.08

Pixel clock(MHz)

Proposed

28.321

Remark
HDCP

2.

640*480

31.469

59.94

25.17

VESA

HDCP

3.

800*600

37.879

60.31

40.00

VESA

HDCP

4.

1024*768

48.363

60.00

65.00

VESA(XGA)

HDCP

5.

1280*768

47.78

59.87

79.5

WXGA

HDCP

6.

1360*768

47.72

59.8

84.75

WXGA

7.

1280*720

45

60

74.25

8.

1920*1080

67.5

60

148.5

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

-8-

HDCP
HDCP

WUXGA

HDCP/FHD model

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range

(2)

This specification sheet is applied to all of the LCD/ LED LCD


TV with LC01U chassis.

(3)

2. Designation

1) The adjustment is according to the order which is


designated and which must be followed, according to the
plan which can be changed only on agreeing.
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
4) Input signal Unit: Product Specification Standard
5) Reserve after operation: Above 5 Minutes (Heat Run)
Temperature : at 25 C 5 C
Relative humidity : 65 % 10 %
Input voltage : 220 V, 60 Hz
6) Adjustment equipments: Color Analyzer(CA-210 or CA-110),
Pattern Generator (MSPG-925L or Equivalent),
DDC Adjustment Jig equipment, Factory SVC remocon.

Please Check the Speed :


To use speed between
from 200KHz to 400KHz

5) Click Auto tab and set as below.


6) Click Run.
7) After downloading, check OK message.
(4)

filexxx.bin
(5)

(7) .OK

7) Push the IN STOP key - For memory initialization.

(6)

Case1 : Software version up


1. After downloading S/W by USB, TV set will reboot
automatically
2. Push In-stop key
3. Push Power on key
4. Function inspection
5. After function inspection, Push In-stop key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push
In-stop key at first.
2. Push Power on key for turning it on.
-> If you push Power on key, TV set will recover
channel information by itself.
3. After function inspection, Push In-stop key.

* USB DOWNLOAD

1) Put the USB Stick to the USB socket.


2) Automatically detecting update file in USB Stick.
- If your downloaded program version in USB Stick is Low,
it didnt work. But your downloaded version is High, USB
data is automatically detecting.
3) Show the message Copying files from memory.

3. Main PCB check process

* APC - After Manual-Insult, executing APC

* Boot file Download

1) Execute ISP program Mstar ISP Utility and then click


Config tab.
(1)
fi lexxx.bin

2) Set as below, and then click Auto Detect and check OK


message.
If Error is displayed, check connection between computer,
jig, and set.
3) Click Read tab, and then load download file(XXXX.bin) by
clicking Read
4) Click Connect tab. If Cant is displayed, check connection
between computer, jig, and set.

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

-9-

LGE Internal Use Only

3.1. ADC Process

4) Updating is starting.

(1) ADC
- Enter Service Mode by pushing ADJ key,
- Enter Internal ADC mode by pushing key at 6. ADC
Calibration
EZ ADJUT
0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Tool Option5
5. Country Group
6. ADC Calibration
7. WHITE Balance
8. 10Point WB
9. Test Pattern
10. V-Com
11. Sub B/C
12. V-Com
13. P-Gamma

ADC Calibration
ADC Comp 480i

NG

ADC Comp 1080p

NG

ADC RGB

NG

Start

Reset

<Caution> Using power on key of the Adjustment remote


control, power on TV.
* ADC Calibration Protocol (RS232)
Adjust Sequence
aa 00 00 [Enter Adjust Mode]
Item
CMD1 CMD2 Data0
Adjust Mode In A
A
0 0 When transfer the Mode In,
Carry the command.
ADC Adjust
A
D
1 0 Automatically adjustment
(The use of a internal pattern)

5) Uploading completed, the TV will restart automatically.


6) If your TV is turned on, check your updated version and
Tool option.(explain the Tool option, next stage)
* If downloading version is more high than your TV have,
TV can lost al l chann el da ta . In this case,you have to
channel recover. if all channel data is cleared, you didnt
have a DTV/ATV test on production line.

xb 00 40 [Component1 Input (480i)]


ad 00 10 [Adjust 480i Comp1]
xb 00 60 [RGB Input (1024*768)]
ad 00 10 [Adjust 1024*768 RGB]
aa 00 90 End Adjust mode
* Required equipment : Adjustment R/C.

3.2. Function Check

* After downloading, have to adjust Tool Option again.


1) Push "IN-START" key in service remote control.
2) Select Tool Option 1 and push OK key.
3) Punch in the number. (Each model has their number)

Module

Tool option1 Tool option2 Tool option3 Tool option4 Tool option5

42LW4500

26528

19478

55337

31228(HK)

8480

47LW4500

34720

19478

55337

31228(HK)

8480

55LW4500

47008

19478

55337

31228(HK)

* Check display and sound.


- Check Input and Signal items. (cf. work instructions)
1) TV
2) AV (SCART1/SCART2/CVBS)
3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60 Hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by factory SVC remocon.

8480

4) Completed selecting Tool option.

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

- 10 -

LGE Internal Use Only

4. Total Assembly line process

4.4. EDID DATA

4.1. Adjustment Preparation

W/B Equipment condition


CA210
: CCFL/EEFL -> CH9, Test signal: Inner pattern(80IRE)
LED -> CH14, Test signal: Inner pattern(80IRE)
Above 5 minutes H/run in the inner pattern. (power on key
of adjust remote control)
Edge LED W/B Table is process of time (Only LGD Module)
CA210: CH14, Test signal : Inner pattern(80IRE)
Aging Time

GP2R

(Min.)

Cool

Medium

Warm

273

285

293

313

- Auto Download

After enter Service Mode by pushing ADJ key,


Enter EDID D/L mode.
Enter START by pushing OK key.

269

1) All Data : HEXA Value


2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum

329

0-2

279

288

295

308

319

3-5

278

286

294

306

318

336

6-9

277

285

293

305

317

335

10-19

276

283

292

303

316

333

20-35

274

280

290

300

314

330

36-49

272

277

288

297

312

327

50-79

271

275

287

295

311

325

80-149

270

274

286

294

310

324

Over 150

269

273

285

293

309

323

NG
NG
NG
NG

HDMI1
HDMI2
HDMI3
RGB

0. Tool Option1
1. Tool Option2
2. Tool Option3
3. Tool Option4
4. Tool Option5
5. Country Group
6. ADC Calibration
7. White Balance
8. 10 Point WB
9. Test Pattern
10. EDID D/L
11. P-Gamma
12. V-Com
13. P-Gamma

338

EDID D/L

EZ ADJUT

Start

EDID D/L
OK
OK
OK
OK

HDMI1
HDMI2
HDMI3
RGB
Start

Reset

* Caution : Never connect HDMI & D-sub Cable when EDID


download

4.2. DDC EDID Write (RGB 128Byte )

Connect D-sub Signal Cable to D-sub Jack.


Write EDID Data to EEPROM(24C0 2)byu si n g DDC2B
protocol.
Check whether written EDID data is correct or not.
* For Servicemain Assembly, EDID have to be downloaded to
Insert Process in advance.

4.3. DDC EDID Write (HDMI 256Byte)

* Edid data and Model option download (RS232)


Item
Download

- 11 -

CMD1 CMD2 Data0


A

00 10 Automatically Download

Mode In
Download

Connect HDMI Signal Cable to HDMI Jack.


Write EDID Data to EEPROM(24C02) by u s i n g DDC2
B
protocol.
Check whether written EDID data is correct or not.
* For Servicemain Assembly, EDID have to be downloaded to
Insert Process in advance.

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

Reset

0 When transfer the Mode In,


Carry the command.
(The use of a internal pattern)

LGE Internal Use Only

4.4. EDID DATA


1) All Data : HEXA Value
2) Changeable Data :
*: Serial No : Controlled / Data:01
**: Month : Controlled / Data:00
***:Year : Controlled
****:Check sum

2) After automatically display 3D OSD, push the OK Key.

- Auto Download
After enter Service Mode by pushing
ADJ key
Enter EDID D/L mode.
Enter START by pushing OK key.
For Analog EDID

For HDMI EDID

D-sub to D-sub

DVI-D to HDMI or HDMI to HDMI

3) Check the pattern such as in the following Fig2 without


having to wear glasses.

4.5 Outgoing condition Configuration


Push IN STOP key, then in-stop processing
will start. If processing is complete, TV will
turn off automatically.
*Must not AC power OFF during processing.
4.6 Internal pressure
Confirm whether is normal or not when between
power board's ac block and GND is impacted on
1.5kV(dc) or 2.2kV(dc) for one second.
4.7. 3D Function test
(Pattern Generator MSHG-600 or MSPG-6100 HDMI
1.4 Supported Equipment , HDMI mode No. 872 ,
pattern No. 83)
1) Input 3D test pattern.
(HDMI mode No. 872, Pattern No. 83)

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

- 12 -

LGE Internal Use Only

BLOCK DIAGRAM

Inner Demod:
LG3911

(JK1601/3)

JK1604

JK9903

(JK1104)

3 : RF_SWITCH_CTL , FE_BOOSTER_CTL, Tuner Reset

1: PCM_IRQA

3: CE,OE,WE

6: CI_DATA[0-7]

15: PCM_A[0-14]

11:CI_TS_DATA[0-7]

(DTV)

4 : TU_SCL/SDA , Demod_SCL /SDA


2 : TU_CVBS/SIF (ATV)
11 : TS_Sync/data[0..7]

CI Slot
CI Slot
P1901
P1901
P1901

7:Comp_DET,Y+/-,Pb+/-,Pr+/2: Comp _R/L _IN


2:CVBS_DET,CVBS IN
2: CVBS _R/L _IN
2:SideAV_DET/CVBS IN
2: CVBS _R/L _IN

9: R+/-,G+/-, B+/-,H/V sync, DET, ISP_RXD/TXD


2: PC _R/L _IN

2 : USB_CTL, USB_OCD

EEPROM
EEPROM
(2K, IC1105)
(2K, IC1105)

2: RGB_DDC_SCL/SDA

2 : HP_L/R OUT

1 : SPDIF_OUT

AP2191DSG
AP2191DSG
(IC1450)
(IC1450)

2 : SIDE_USB_DM/DP
1 : 5V_USB

(Option: TU3702
(Option: TU3702
HNIM tuner)
HNIM tuner)

NIM TUNER
NIM TUNER
TU3701
TU3701

HK :ALTO BEAM TUNER

COMP1&
COMP2

AV1

AV2
(Side)

RGB In

(JK1450)

PC Audio (JK1102)

USB
(Side)
SPDIF (Digital)
JK1103
HP (Analog)

Saturn7R
Saturn7R
Saturn7R
LGE101RC-R
LGE101RCLGE101RC-R
(IC101)
(IC101)
(IC101)
Option:S7MR
S7M+

8:HDMI1_D0+/-,D1+/-,D2+/-,CK+/2: DDC_SCL1/SDA1

EEPROM
EEPROM
(2K,IC801)
(2K,IC801)

8:HDMI2_D0+/-,D1+/-,D2+/-,CK+/2: DDC_SCL2/SDA2

EEPROM
EEPROM
(2K,IC802)
(2K,IC802)

8:HDMI3_D0+/-,D1+/-,D2+/-,CK+/2: DDC_SCL3/SDA3

EEPROM
EEPROM
(2K,IC804)
(2K,IC804)

2:S7_RXD1/TXD1

(IC1101)
(IC1101)
(IC1101)

MAX3232
MAX3232
MAX3232

(JK802)

(JK801)

(JK803)

RS232

HDMI3 In

HDMI2 In

HDMI1 In

(JK1101)

LGE Internal Use Only

- 13 -

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

P1001
P1001

Debugger
Debugger

NEC_Micom
NEC_Micom

6: NEC_ISP_TX/RX.

3: KEY1/2 ,IR

Power B/D 2: INV_CTL,RL_ON


Power B/D
P403
P403
Control&
Control&
IC1002
IC1002

1: SOC_ Reset
2: NEC_SCL/SDA

2 : NEC_RXD/TXD.

14 : PCM_A[0:7]

7:NAND_WEb/ALE/CLE

5 : SCK,SDI,SDO,/CS,/WP

2 : I2C_SCL/SDA

45 : DDR_D[0:15],DDR_A[0:13]

45 : DDR_D[0:15],DDR_A[0:13]

SOFt touch
SOFt touch 2: LED_R/B
P2401
P2401
2: NEC_EEPROM_SCL/SDA

EEPROM
EEPROM
(16K, IC1001)
(16K, IC1001)

DDR3
DDR3
DDR3
(1G, IC1201)
(1G, IC1201)
(1G, IC1201)
DDR3
DDR3
DDR3
(1G, IC1202)
(1G, IC1202)
(1G, IC1202)

EEPROM
EEPROM
(512K, IC104)
(512K, IC104)

Address:10101--(8K, IC103)
(8K, IC103)

HDCP EEPROM
HDCP EEPROM

Address: A0(10100000)
SPI Flash
SPI Flash
((8MIC1401)
8M IC1401)
IC1401)
NAND FLASH
NAND FLASH
(2G, IC102)
(2G, IC102)

Saturn7R
Saturn7R
LGE101RC-R
LGE101RCLGE101RC-R
(IC101))
(IC101))
(IC101))
Option:S7MR
S7M+

46 : C-MA[0:12],.

30PIN, Channel a

51PIN, Channel a&b


41PIN, Channel c&d

FRC DDR
FRC DDR
FRC DDR
(1G, IC301)
(1G, IC3 01)
(1G, IC301)

IC501
IC501

NTP7100
NTP71 00
NTP7100

Audio AMP
Audio AMP

P703&P704
P703&P704

FHD 120Hz
FHD 120Hz
FHD 120Hz

P705
P705

HD 60Hz
HD 60Hz
HD 60Hz

CCFL LCD module


CCFL LCD module

2D/3D

Only LW4500

2AMP_SCL/SDA
4:AUD_LRCH/LRCK/SCK,AMP_Mute

LPF SPK_R+/-

SPK_L+/-

S7MR/ S7M+ option

PWM

Speaker

LGE Internal Use Only

- 14 -

Copyright 2011 LG Electronics. Inc. All rights reserved.


Only for training and service purposes

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

300

120 511
500

510

200

A2
A5

530 540 401

830

A10

911

400

710
910

900
Copyright
LG Electronics. Inc. All rights reserved.
Only for training and service purposes

- 15 -

LGE Internal Use Only

IC102
NAND01GW3B2CN6E

NAND FLASH MEMORY

S7M-PLUS_DivX_MS10

+3.3V_Normal

+3.3V_Normal

LGE107DC-RP [S7M+ DIVX/MS10]

NC_8

OPT

R108 1K

NC_7
C101
0.1uF

+3.3V_Normal

VDD_1
VSS_1
NC_9

R105
1K

NC_10

OPT

CL
OPT
R104
10K

/PF_CE1
AL
PF_ALE
W
/PF_WE
WP

Q101
KRC103S
OPT

3.3K

R102

NC_11

R106
1K

C
B

/PF_WP

NC_12
NC_13

NC_14
NC_15

32

18

31

19

30

20

29

21

28

22

as
as
as
as
as

host.
host.
host.
host.
host.

AC20

PCM_D[7]

No EJ PAD. Byte mode NAND flash.)


EJ use PAD1. Byte mode NAND flash.)
EJ use PAD2. Byte mode NAND flash.)
Internal SPI flash secure boot, no scramble)
Internal SPI flash secure boot with scarmble)

AC21

V21

PCM_A[2]

Y22

PCM_A[3]

AA22
R22

PCM_A[5]

R21

PCM_A[6]

T23

PCM_A[7]

T24

PCM_A[8]

AA23

AUD_LRCH

PCM_A[9]

AUD_SCK

PCM_A[10]

AB17

PCM_A[11]

AA21

PCM_A[12]

U23

PCM_A[13]

Y23

PCM_A[14]

W23

PCM_A[3]

I/O3
I/O2

AUD_MASTER_CLK

PCM_A[2]

I/O1

R148

PCM_A[1]
PCM_A[0]

I/O0

PWM1

C112
100pF
50V

22

NC_19

AUD_MASTER_CLK_0

56

Y20

NC_16

+5V_Normal

V22
W21

V23
P23

/PCM_CD

R23

/PCM_WAIT

P22

PCM_RST

NAND_FLASH_1G_TOSHIBA

NC_5
NC_6
R/B
RE
CE
NC_7
NC_8
VCC_1
VSS_1
NC_9
NC_10
CLE
ALE
WE
WP
NC_11
NC_12
NC_13
NC_14
NC_15

46

45

44
43

6
7

42

41

40
39

10
11

38

12

37

13

36

14

35

15

34

16

33

17

32

18

31

19

30

20

29

21

28

22

27

23

26

24

25

NC_3
NC_27
NC_4
NC_26
NC_5
I/O7
NC_6
I/O6
R/B
I/O5
RE
I/O4
CE
NC_25
NC_7
NC_24
NC_8
NC_23
VCC_1
VCC_2
VSS_1
VSS_2
NC_9
NC_22
NC_10
NC_21
CLE
NC_20
ALE
I/O3
WE
I/O2
WP
I/O1
NC_11
I/O0
NC_12
NC_19
NC_13
NC_18
NC_14
NC_17
NC_15
NC_16

48

47

46

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32
31

18
19

30

20

29

21

28

22

27

23

26

24

25

NC_29

NC_1

NC_28

NC_2

NC_27

NC_3

NC_26

NC_4

I/O7

NC_5

I/O6

NC_6

I/O5

RY/BY

I/O4

RE

NC_25

CE

NC_24

NC_7

NC_23

NC_8

VCC_2
VSS_2

VCC_1
VSS_1

NC_22

NC_9

NC_21

NC_10

NC_20

CLE

I/O3

ALE

I/O2

WE

I/O1

WP

I/O0

NC_11

NC_19

NC_12

NC_18

NC_13

NC_17

NC_14

NC_16

NC_15

48

47

46

45

44

43

42

41

40

10

39

11

38

12

37

13

36

14

35

15

34

16

33

17

32
31

18
19

30

20

29

21

28

22

27

23

26

24

25

NC_29

/PF_WP
/F_RB
22

I/O7
I/O6

for SYSTEM/HDCP
EEPROM&URSA3

I/O5

I/O2

LVACLKP/LLV6P/BLUE[3]

NC_78

LVACLKN/LLV6N/BLUE[2]

NC_64

LVA0P/LLV3P/BLUE[9]

NC_50

LVA0N/LLV3N/BLUE[8]

NC_45

LVA1P/LLV4P/BLUE[7]

NC_34

LVA1N/LLV4N/BLUE[6]

NC_77

LVA2P/LLV5P/BLUE[5]

NC_65

LVA2N/LLV5N/BLUE[4]

NC_62

LVA3P/LLV7P/BLUE[1]

NC_33

LVA3N/LLV7N/BLUE[0]

NC_47

LVA4P/LLV8P

NC_46

AF16

IC101-*3
LGE101DC-R-1 [S7R DIVX]

AE1

W25
U26

AF1

U25

AE3

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26

AD2

Y25

LVA4N/LLV8N

Y24

AD16
AD15
AE16

W26
NC_48

LVACLKP/LLV6P/BLUE[3]

NC_78

LVACLKN/LLV6N/BLUE[2]

NC_64

LVA0P/LLV3P/BLUE[9]

NC_50

LVA0N/LLV3N/BLUE[8]

NC_45

LVA1P/LLV4P/BLUE[7]

NC_34

LVA1N/LLV4N/BLUE[6]

NC_77

LVA2P/LLV5P/BLUE[5]

NC_65

LVA2N/LLV5N/BLUE[4]

NC_62

LVA3P/LLV7P/BLUE[1]

NC_33

LVA3N/LLV7N/BLUE[0]

NC_47

LVA4P/LLV8P

NC_46

NC_76

LVB0N/RLV6N/RED[0]
LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]

NC_44

LVB2N/RLV8N/GREEN[6]

NC_61

LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]

RLV0N/LHSYNC

RLV0P/LVSYNC
RLV1N/LCK
RLV2P/RED[9]
NC_71

RLV1P/LDE
RLV2N/RED[8]
RLV4P/RED[5]

NC_56

RLV4N/RED[4]

NC_72

AF6

RLV5P/RED[3]

AD6
AD12
AE5

EEPROM_1MBIT_ATMEL

AF12
AF5
AE12

NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59

AF7
AD11
AD7

TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST

AE10

AD10

NC_57

AF10
AD8

AE14
AE13

TCON5/TP/SOE

NC_70

NC_41

TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON

RLV0P/LVSYNC
RLV1N/LCK
RLV2P/RED[9]

AF8
AD9

AF23

NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8]
RLV4P/RED[5]

AE9
NC_56

RLV4N/RED[4]

NC_72

AF9

AF22

RLV5P/RED[3]

AE21

AD6

AF21

AD12
AE5
AF12

AF20

AF5

AF19

AE12

NC_53
NC_74
NC_37
NC_43
NC_52
NC_75
NC_68
NC_59

AD18
AE18

AF7

AD10

AD11

TCON18/CS7/GCLK5
TCON19/CS8/GCLK6
TCON11/CS5/HCON
TCON10/CS4/OPT_N
TCON9/CS3/OPT_P
TCON16/WPWM
TCON12/DPM
TCON1/STV/GSP/VST

AE10

AF18

NC_57

TCON5/TP/SOE

NC_70

Y19

AE7
AF10
AD8

NC_41

TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON

LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]

NC_66

LVB1P/RLV7P/GREEN[9]

NC_76

LVB1N/RLV7N/GREEN[8]

NC_32

LVB2P/RLV8P/GREEN[7]

AC24

AE14

AD26

AE13

LVB2N/RLV8N/GREEN[6]

NC_44
NC_61

LVB3P/LLV1P/GREEN[3]

NC_60

AD25

LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]

AD24

AC14

AE8

Y19

NC_31

Y11

AA15

AF4
AD4

AA11

AD3
AF2
AE15
AD2

Y25

AD16

Y24

AD15
AE16

RLV0N/LHSYNC

RLV0P/LVSYNC

AE2

AF26

RLV1N/LCK

AF25
AE24

AD9

RLV2P/RED[9]

AF8

AF24

NC_71

RLV1P/LDE

NC_40

AF23
AD22
AE22

RLV2N/RED[8]
RLV4P/RED[5]

AE9
NC_56

RLV4N/RED[4]

NC_72

AF9

AF22

RLV5P/RED[3]

AE21

AD6

AF21

AD12
AE5
AF12

AF20

AF5

AF19

AE12

TCON15/SCAN_BLK1
TCON18/CS7/GCLK5

NC_74

TCON19/CS8/GCLK6

NC_37

TCON11/CS5/HCON

NC_43

TCON10/CS4/OPT_N

NC_52

TCON9/CS3/OPT_P

NC_75

TCON16/WPWM

NC_68

TCON12/DPM
TCON1/STV/GSP/VST

AE10
AF7

AD10

AD11

NC_57

AE7
AF10
AD8

TCON5/TP/SOE

NC_70

LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]

NC_33

LVA3N/LLV7N/BLUE[0]

NC_47

LVA4P/LLV8P

NC_46

AD1

AC24

AE14

AD26

AE13

NC_41

TCON21/CS10/VGH_ODD

NC_54

TCON20/CS9/VGH_EVEN

NC_73

TCON13/LEDON

LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]

NC_66

LVB1P/RLV7P/GREEN[9]

NC_76

LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]
LVB2N/RLV8N/GREEN[6]

NC_44
NC_61

LVB3P/LLV1P/GREEN[3]

NC_60

AD25

LVB3N/LLV1N/GREEN[2]
LVB4P/LLV0P/GREEN[1]

AD24

AF4
AD4

AD14
AD3
AF15

V24

AF2

W24

AE15

Y26

AD2

Y25

AD16

Y24

AD15
AE16

NC_49

AE26
AE25

RLV0N/LHSYNC

RLV0P/LVSYNC

AE2

AF26

RLV1N/LCK

AF25
AE24

AD9

RLV2P/RED[9]

AF8

AF24
AF23
AD22

NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8]
RLV4P/RED[5]

AE9
AF9

AF22

NC_56

RLV4N/RED[4]

NC_72

AE22

RLV5P/RED[3]

NC_31

AE8
Y11

AE21

AD6

AF21

AD12

AD20

AE5

AE20

AF12

AF20

AF5

AF19

AE12

TCON15/SCAN_BLK1
TCON18/CS7/GCLK5

NC_74

TCON19/CS8/GCLK6

NC_37

TCON11/CS5/HCON

NC_43

TCON10/CS4/OPT_N

NC_52

TCON9/CS3/OPT_P

NC_75

TCON16/WPWM

NC_68

TCON12/DPM
TCON1/STV/GSP/VST

AE10
AF7

AD10

AD11

NC_57

TCON5/TP/SOE

NC_70

AE7
AF10
AD8

AA11

AB14

AC24

AE14

AD26

AE13

NC_41

TCON21/CS10/VGH_ODD

NC_54

TCON20/CS9/VGH_EVEN

NC_73

TCON13/LEDON

NC_19

AE8

Y19

NC_31

Y11

AA15

NC_21

LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]

NC_11

AA11

A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0

VCC

AF16
AE3
AD14
AD3
AF15
AF2

EEPROM

RLV0N/LHSYNC

RLV0P/LVSYNC

AE2

RLV1N/LCK

AF25
AE24

AD9

RLV2P/RED[9]

AF8

AF24
AF23
AD22

NC_71

RLV1P/LDE

NC_40

RLV2N/RED[8]
RLV4P/RED[5]

AE9
AF9

AF22

NC_56

RLV4N/RED[4]

NC_72

AE22

RLV5P/RED[3]

A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]

FRC_DDR3_A9/DDR2_A9

AD16

AE15
AD2
AD16

FRC_DDR3_A1/DDR2_A6

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

A0P/RLV0P/RED[9]

FRC_DDR3_A3/DDR2_A1

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4

A4P/RLV5P/GREEN[9]

A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]

AD1

FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12

AE14

B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]

AD13
FRC_DDR3_MCLK/DDR2_MCLK

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

B3P/TCON11/BLUE[9]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AE13

B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

AD5
AF4

AE21

AD6

AF21

AD12

AD20

AE5

AE20

AF12

AF20

AF5

AF19

AE12

TCON15/SCAN_BLK1

NC_53

TCON18/CS7/GCLK5

NC_74

TCON19/CS8/GCLK6

NC_37

TCON11/CS5/HCON

NC_43

TCON10/CS4/OPT_N

NC_52

TCON9/CS3/OPT_P

NC_75

TCON16/WPWM

NC_68

TCON12/DPM

NC_59

AD18
AE18

TCON1/STV/GSP/VST

AE10

AF18

AF7

AD10

AD11

NC_57

AE7
AF10
AD8

B0P/RLV6P/GREEN[7]

AF3
AF14

AB26

FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT

AD1

FRC_DDR3_BA2/DDR2_A12

AB25
AB24
AC24

FRC_DDR3_MCLK/DDR2_MCLK

AE14

AD26

TCON5/TP/SOE

NC_70

AE13

TCON21/CS10/VGH_ODD
TCON20/CS9/VGH_EVEN
TCON13/LEDON

B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

W25

AF16
AF1
AE3

U24

AD14

V26

AD3

V25

AF15

V24

AF2

W24

AE15

Y26
Y25
Y24

NC_19

AE26
AE25

C0P/LLV0P/BLUE[5]

AE2
FRC_DDR3_RESETB/DDR2_A3

AF26

NC_31

AE8
Y11

C1M/LLV1N/BLUE[2]

AF8
AD9

FRC_DDR3_DQSL/DDR2_DQS0

AF23
AD22

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9
FRC_DDR3_DQSU/DDR2_DQS1

AF9

AF22

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AE22

C4P/LLV5P

AD2
AD16
AD15
AE16

C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P

AF6

AD6

A0h

AF12

SCL

R111

22

AF5

I2C_SCL

AE12

NC_21

FRC_DDR3_DMU/DDR2_DQ11

AE19

I2C_SDA

AD11
AD7

AD10

SDA

R112
C104
8pF
OPT

AF11

AE21

FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0

AD6

AF21

AD12

AD20

DCKM/TCON4
D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

AE5

AE20

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

AF12

AF20

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

AE12

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

AF5

AF19

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

AD18
AE18

A6

GPIO9/PM3

PCM_A13

GPIO10/PM4
GPIO11/PM5/PM_UART_RX/INT1
PM_SPI_CS1/GPIO12/PM6
PM_SPI_WP1/GPIO13/PM7
PM_SPI_WP2/GPIO14/PM8/INT2

PCM_OE_N

GPIO15/PM9

PCM_WE_N

PM_SPI_CS2/GPIO16/PM10

PCM_IORD_N

GPIO17/PM11/INT3

3D SG

DD_MREMOTE

USB1_CTL

E11

HP_DET

G9

CONTROL_ATTEN

F9

MODEL_OPT_6

C5
E8

3D SG

USB1_OCD

D7

33

MODEL_OPT_1

R146

E9
/FLASH_WP
MODEL_OPT_2

F7
F6

TUNER_RESET

D8

DEMOD_RESET
AV_CVBS_DET

G12

GPIO18/PM12/INT4

F10
D9

PCM_CE_N

PM_SPI_CK/GPIO1

PCM_IRQA_N

GPIO0/PM_SPI_CZ

PCM_CD_N

PM_SPI_DI/GPIO2

PCM_WAIT_N

33

R147

SPI_SCK

PM_SPI_DO/GPIO3

TS0_CLK
PCM_PF_CE0Z

TS0_VLD

PCM_PF_CE1Z

D11
E10
D10

33

R151

/SPI_CS
SPI_SDI

for SERIAL FLASH

SPI_SDO

AA5

CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC

AA10

CI_TS_DATA[0-7]

from CI SLOT

TS0_SYNC

PCM_PF_OEZ

AB5

PCM_PF_WEZ

TS0_D0

PCM_PF_ALE

TS0_D1

PCM_PF_AD[15]

TS0_D2
TS0_D3
TS0_D5

UART_TX2/GPIO65

TS0_D6

CI_TS_DATA[0]

AC4

CI_TS_DATA[1]

Y6

CI_TS_DATA[2]

AA6

CI_TS_DATA[3]

W6

CI_TS_DATA[4]

AA7

CI_TS_DATA[5]

Y9

CI_TS_DATA[6]

AA8

CI_TS_DATA[7]

TS0_D7

FE_TS_CLK
FE_TS_VAL_ERR
FE_TS_SYNC

AC5
DDCR_DA/GPIO71

TS1_CLK
TS1_VLD

AC6

Internal demod out


/External demod in

FE_TS_DATA[0-7]

AB6

TS1_SYNC
DDCA_DA/UART0_TX

AC10
TS1_D0
TS1_D2

PWM0/GPIO66

TS1_D3

PWM1/GPIO67

TS1_D4

PWM2/GPIO68

TS1_D5

PWM3/GPIO69

TS1_D6

FE_TS_DATA[0]

AB10

FE_TS_DATA[1]

AC9

FE_TS_DATA[2]

AB9

FE_TS_DATA[3]

AC8

FE_TS_DATA[4]

AB8

FE_TS_DATA[5]

AC7

FE_TS_DATA[6]

AB7

FE_TS_DATA[7]

TS1_D7

D12
SAR0/GPIO31

MPIF_CLK

SAR1/GPIO32

MPIF_CS_N

SAR2/GPIO33

D14
E14

SAR3/GPIO34

Delete /PIF_SPI_CS
R160
1K

MPIF_BUSY

SAR4/GPIO35

E12

AF7

AD10

AD11

AB23

FRC_DDR3_DQU4/DDR2_DQ15

AF10
AD8

A0P/RLV0P/RED[9]

FRC_DDR3_A3/DDR2_A1

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0

A2P/RLV2P/RED[5]

FRC_DDR3_A7/DDR2_A5

A2M/RLV2N/RED[4]

FRC_DDR3_A8/DDR2_A2

A3P/RLV4P/RED[1]

FRC_DDR3_A9/DDR2_A9

A3M/RLV4N/RED[0]

FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

FRC_DDR3_DQU5/DDR2_DQ9

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

B0P/RLV6P/GREEN[7]

AB26

AD1

FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12

AB25
AB24

FRC_DDR3_BA0/DDR2_BA2

AC24

AE14
AE13

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

AD24

AF4
AD4

FRC_GPIO1

FRC_GPIO9/UART_TX

AE8
Y11

AA15

Y19

AE26

C0P/LLV0P/BLUE[5]
FRC_DDR3_RESETB/DDR2_A3

C1M/LLV1N/BLUE[2]

AF8
AD9

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

AF23
AD22

C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9
FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AF9

AF22

C4P/LLV5P

AE21

AD6

AF21

AD12

AE20

AE5
AF12

AF20

AF5

AF19

AE12

FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0

DCKM/TCON4
D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

AD18
AE18

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

AF7

AD10

AD11

FRC_PWM1

A0P/RLV0P/RED[9]

FRC_DDR3_A3/DDR2_A1

AB23

AE7

AC23

AF10

AC22

AD8

A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0

A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]

FRC_DDR3_A9/DDR2_A9

A3M/RLV4N/RED[0]

FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN
GPIO2/TCON7/LDE/GCLK4

AB26

AD1

FRC_DDR3_BA1/DDR2_ODT

AC24

AE14
AE13

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

AD24

AF4
AD4

FRC_GPIO1

Y11
Y19

FRC_GPIO9/UART_TX

AE8

AE26

FRC_TESTPIN

AD3
AF2
AE15
AD2

Y25

AD16

Y24

AD15
AE16

F12
D13
E13

C0P/LLV0P/BLUE[5]
FRC_DDR3_RESETB/DDR2_A3

C1M/LLV1N/BLUE[2]

AF8
AD9

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

AF23
AD22

C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9
FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AF9

AF22

C4P/LLV5P

AE21

AD6

AF21

AD12
AE5
AF12

AF20

AF5

AF19

AE12

FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0

D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N
D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

AF7

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

AB26

AD1

A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]

FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

AC24

AE14

AD26

AE13

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU7/DDR2_DQM1

B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]

FRC_DDR3_BA0/DDR2_BA2

B1P/RLV7P/GREEN[5]

FRC_DDR3_BA1/DDR2_ODT

B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]

FRC_DDR3_MCLK/DDR2_MCLK
FRC_DDR3_CKE/DDR2_RASZ

B3P/TCON11/BLUE[9]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD25

B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

AD24

AF4
AD4

FRC_GPIO1

AE26
AE25

C0P/LLV0P/BLUE[5]

AE2

C0M/LLV0N/BLUE[4]

FRC_DDR3_RESETB/DDR2_A3

AF26

C1P/LLV1P/BLUE[3]

AF25
AE24

AD9

C1M/LLV1N/BLUE[2]

AF8

AF24
AF23
AD22

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9
AF9

AF22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AE22

C4P/LLV5P

Y11
Y19

AE21

AD6

AF21

AD12

AD20

AE5

AE20

AF12

AF20

AF5

AF19

AE12

D0P/LLV6P

FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P
D1M/LLV7N

FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N
D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

AA11

AF7

AD10

AD11

AB14

A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
A2P/RLV2P/RED[5]

FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5

A2M/RLV2N/RED[4]

FRC_DDR3_A8/DDR2_A2

A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]

FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

AB23

AE7

AC23

AF10

AC22

AD8

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_DQU7/DDR2_DQM1

AB26

AD1

B0P/RLV6P/GREEN[7]
B0M/RLV6N/GREEN[6]

FRC_DDR3_BA0/DDR2_BA2

B1P/RLV7P/GREEN[5]

FRC_DDR3_BA1/DDR2_ODT

B1M/RLV7N/GREEN[4]

FRC_DDR3_BA2/DDR2_A12

AB25
AB24

B2P/RLV8P/GREEN[3]

AD13

AC24

AE14

AD26

AE13

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

AD24

AF4
AD4

FRC_DDR3_RASZ/DDR2_WEZ

URSA_DEBUG
P3904

AE26

CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]

AE2
FRC_DDR3_RESETB/DDR2_A3

AF26

C1M/LLV1N/BLUE[2]

AF8
AD9

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

AF23
AD22

C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9
FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AF9

AF22

C4P/LLV5P

AE21

AD6

AF21

AD12

AE20

AE5
AF12

AF20

AF5

AF19

AE12

DCKM/TCON4

FRC_DDR3_DQL0/DDR2_DQ6

D0P/LLV6P

FRC_DDR3_DQL1/DDR2_DQ0
FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P
D1M/LLV7N

FRC_DDR3_DQL4/DDR2_DQ4
FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

AD18
AE18

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

AF7

AD10

AD11

AB23

AE7

AC23

AF10

AC22

AD8

FRC_GPIO1

FRC_GPIO9/UART_TX

AE8
Y11

FRC_DDR3_DQU4/DDR2_DQ15

GPIO2/TCON7/LDE/GCLK4

FRC_GPIO1

AC14

AE8
Y11

AA15

Y19

FRC_GPIO9/UART_TX
FRC_DDR3_NC/DDR2_DQM0

AB14

FRC_PWM1

AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18
AF18

AB23
AC23
AC22

AA14
AC15

FRC_TESTPIN

AA11

AC16
AC14

FRC_GPIO10
AA16

FRC_REXT

FRC_I2CM_DA

AA15

FRC_I2CM_CK
Y10
FRC_I2CS_DA

AA11

FRC_I2CS_CK
AB15

FRC_PWM1

AE19
AD21

Y16
FRC_GPIO8

AC16

FRC_I2CS_CK
FRC_PWM0

AF22

FRC_GPIO3

Y10

AA11

AF23
AD22
AE22

AB16
FRC_GPIO0/UART_RX

AA14

FRC_I2CM_CK
FRC_I2CS_DA

AF25
AE24
AF24

GPIO3/TCON6/LCK/GCLK2

AC15

AA16
FRC_I2CM_DA

FRC_TESTPIN

AE26
AE25
AF26

AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU5/DDR2_DQ9
FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1

FRC_GPIO10

FRC_DDR3_NC/DDR2_DQM0
FRC_REXT

FRC_SDA

AE23

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

Y16
FRC_GPIO8

AC16

FRC_SCL

AD24

D4M/TCON0

D3M/TCON2

AE10

AF18

AC24
AD26
AD25

AD19
DCKP/TCON5

AE6
AF11

AB26
AB25
AB24

FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11

AE19
AD21

AA26
AA25
AA24

C4M/LLV5N

AE11

AD20

C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]

AF25
AE24
AF24

AE22

12505WS-03A00

AC25

AD23

FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0

FRC_GPIO3

Y19

Y25
Y24

FRC_DDR3_ODT/DDR2_BA1

AB16
FRC_GPIO0/UART_RX

AA14

AA15

V24
W24
Y26

B4M/TCON8/BLUE[6]

AE4

AE23
AE25

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD25

GPIO3/TCON6/LCK/GCLK2

AC15

AC14

U24
V26
V25

AC26
BCKM/TCON12/GREEN[0]

AD7

FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

W25
U26
U25

A4M/RLV5N/GREEN[8]

AF3
AF14

AB22

AB15

FRC_PWM1

ACKM/RLV3N/RED[2]

FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10

AA26
AA25

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

FRC_I2CS_CK
FRC_PWM0

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7

BCKP/TCON13/GREEN[1]

AA24

D4M/TCON0

D3M/TCON2

AE10

Y10

AB15

W26
FRC_DDR3_A0/DDR2_NC

AC25

AD19
DCKP/TCON5
DCKM/TCON4

FRC_DDR3_DQL0/DDR2_DQ6

FRC_DDR3_DQL7/DDR2_DQ5

AD18
AE18
AF18

FRC_I2CM_CK
FRC_I2CS_DA

FRC_I2CS_CK

AD16
AD15
AE16

AF6

AE6
AF11

FRC_GPIO10
FRC_I2CM_DA

FRC_TESTPIN

Y25
Y24

FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11

AE19
AD21

AA16

FRC_DDR3_NC/DDR2_DQM0
FRC_REXT

AF2
AD2

C4M/LLV5N

AE11

Y16
FRC_GPIO8
FRC_GPIO9/UART_TX

AE8

AD3

AE15

AD23
CCKP/LLV3P
CCKM/LLV3N

FRC_GPIO3

AA15

AD14
AF15

V24
W24
Y26

AD5

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE

AB16
FRC_GPIO0/UART_RX

AC14

U24
V26
V25

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

GPIO3/TCON6/LCK/GCLK2

AC16

AF1
AE3

B4M/TCON8/BLUE[6]

AE4

AE23

AD7

GPIO2/TCON7/LDE/GCLK4

AA14

AF16

FRC_DDR3_A12/DDR2_A8

AD13

AB22

FRC_DDR3_DQU6/DDR2_DQ10

AC15

AE1

W25
U26
U25

A4M/RLV5N/GREEN[8]

FRC_DDR3_BA2/DDR2_A12

AB25
AB24

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

Y10

FRC_PWM0

A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2

BCKM/TCON12/GREEN[0]

D4M/TCON0

D3M/TCON2

AE10

FRC_I2CM_CK
FRC_I2CS_DA

A0M/RLV0N/RED[8]

FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10

AF3
AF14

AD19
DCKM/TCON4

FRC_DDR3_DQL7/DDR2_DQ5

AD18
AF18

FRC_GPIO10
FRC_I2CM_DA

A0P/RLV0P/RED[9]

AA26
AA25
AA24

AF6
DCKP/TCON5

AE6
AF11

AE18

ACKM/RLV3N/RED[2]

AC26

FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11

AE19
AD21

AE20

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7

BCKP/TCON13/GREEN[1]

C4M/LLV5N

AE11

AD20

C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]

AF25
AE24
AF24

S7MR_RM
IC101-*10
LGE107RC-R [S7MR RM]

W26
FRC_DDR3_A0/DDR2_NC

AC25

AD23
CCKP/LLV3P
CCKM/LLV3N

AE2

AF26

AA16

FRC_DDR3_NC/DDR2_DQM0
FRC_REXT

AD14
AF15

V24
W24
Y26

AD5

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0

Y16
FRC_GPIO8

AA15

U24
V26
V25

FRC_DDR3_ODT/DDR2_BA1

FRC_GPIO3

AC14

AF1
AE3

B4M/TCON8/BLUE[6]

AE4

AE23

AE22

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD25

AE25

B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]

AD13

AD26

B0M/RLV6N/GREEN[6]

AB16
FRC_GPIO0/UART_RX

AC16

AF16

FRC_DDR3_A12/DDR2_A8

B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA2/DDR2_A12

AB25
AB24

GPIO3/TCON6/LCK/GCLK2

AA14

AE1

W25
U26
U25

A4M/RLV5N/GREEN[8]

BCKM/TCON12/GREEN[0]

AD7

FRC_DDR3_DQU6/DDR2_DQ10

AC15

AB14

A2P/RLV2P/RED[5]

FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2

AF3
AF14

AB22

FRC_DDR3_DQU7/DDR2_DQM1

AA11

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10

AA26
AA25

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

AB15

AB14

ACKM/RLV3N/RED[2]

AC26

AA24

D4M/TCON0

D3M/TCON2

AE10

AF18

FRC_I2CS_CK
FRC_PWM0

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7

BCKP/TCON13/GREEN[1]

AD19
DCKP/TCON5

AE6
AF11

S7MR_DivX_MS10
W26

FRC_DDR3_A0/DDR2_NC

AC25

AF6

Y10

NC_24

AD16
AD15
AE16

FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11

AE19
AD21

FRC_I2CM_CK
FRC_I2CS_DA

AA11

Y25
Y24

C4M/LLV5N

AE11

AD20

C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]

AF25
AE24
AF24

FRC_GPIO10
FRC_I2CM_DA

FRC_TESTPIN

AF2
AD2

AD23
CCKP/LLV3P
CCKM/LLV3N

AE2

AF26

AA16

FRC_DDR3_NC/DDR2_DQM0
FRC_REXT

AD3

AE15

AD5

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0

Y16
FRC_GPIO8

AC14

AD14
AF15

V24
W24
Y26

FRC_DDR3_ODT/DDR2_BA1

FRC_GPIO3

AC16

U24
V26
V25

B4M/TCON8/BLUE[6]

AE4

AE23

AE22

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD25

AE25

B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]

AD13

AD26

B0M/RLV6N/GREEN[6]

AB16
FRC_GPIO0/UART_RX

AA14

AF1
AE3

FRC_DDR3_A12/DDR2_A8

BCKM/TCON12/GREEN[0]
AF3
AF14

GPIO3/TCON6/LCK/GCLK2

AC15

AF16

IC101-*9
LGE107DC-R [S7MR DIVX/MS10]

AE1

W25
U26
U25

A4M/RLV5N/GREEN[8]

AA26
AA25

AD7

AB15

AB14

ACKM/RLV3N/RED[2]

AC26

AB22

FRC_DDR3_DQU6/DDR2_DQ10

NC_17
NC_25

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7

BCKP/TCON13/GREEN[1]

AA24

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

AE7

AC23
AC22

S7MR_DivX
IC101-*8
LGE107DC-R-1 [S7MR DIVX]
W26

FRC_DDR3_A0/DDR2_NC

AC25

D4M/TCON0

D3M/TCON2

AE10

AF18

FRC_DDR3_DQL1/DDR2_DQ0

C106
8pF
OPT

22

AE7

I2C_SDA

DCKM/TCON4
D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

AF10

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N
D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2

AB14

AB15
FRC_PWM0

AB14

FRC_PWM1

FRC_DDR3_A1/DDR2_A6

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4

A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
A4P/RLV5P/GREEN[9]

FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

AD1

AC24

AE14
AE13

FRC_DDR3_BA1/DDR2_ODT

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

AF4

AE23

AD4

AD14
AD3
AF15

V24

AF2

W24

AE15

Y26
Y25
Y24

AD2
AD16
AD15
AE16

C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]

FRC_DDR3_DQSLB/DDR2_DQSB0

C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9
AF9

AF22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

C4P/LLV5P

FRC_SPI_CZ
FRC_GPIO1

AE19

AF11

AE21

AD6

AF21

AD12
AE5
AF12

AF20

AF5

AF19

AE12

FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0

D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

AF7

D2M/LLV8N

AD10

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2

AE10
AD11

AB23

AE7

AC23

AF10

AC22

AD8

FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4

FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

AD1

AC24

AE14
AE13

FRC_DDR3_MCLK/DDR2_MCLK

B4P/TCON9/BLUE[7]

AF4

AE23

AD4

FRC_GPIO1

FRC_TESTPIN

C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P
FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AF22

C4P/LLV5P

AF2
AE15

Y25
Y24

FRC_SPI_CK

AD2
AD16
AD15
AE16

AE19
AE21

AD6

AF21

AD12
AE5
AF12

AF20

AF5

AF19

AE12

FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0

DCKM/TCON4
D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

AD18
AE18

AF7

AD10

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2

AE10

AF18

AD11

AB23

AE7

AC23

AF10

AC22

AD8

FRC_DDR3_A4/DDR2_CASZ

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

A1M/RLV1N/RED[6]

FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4

FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

AB26

FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12

AC24

AE14

AD26

AE13

FRC_DDR3_MCLK/DDR2_MCLK

B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
B4P/TCON9/BLUE[7]

AF4

AE23

AD4

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE

FRC_DDR3_RESETB/DDR2_A3

C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]
C1M/LLV1N/BLUE[2]

AF8
AD9

C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9
AF9

FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0

AF23
AD22
AE22

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AF22

C4P/LLV5P

AE21

AD6

AF21

AD12
AE5
AF12

AF20

AF5

AF19

AE12

FRC_DDR3_DQL0/DDR2_DQ6
FRC_DDR3_DQL1/DDR2_DQ0

DCKM/TCON4
D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N

FRC_DDR3_DQL7/DDR2_DQ5

AD18
AE18

AF7

AD10

D3P/TCON3

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

D3M/TCON2

AE10

AF18

AD11
AD7
AB23

AE7

AC23

AF10

AC22

AD8

FRC_SPI_CZ
FRC_GPIO1

FRC_DDR3_DQU1/DDR2_DQ14

FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

FRC_TESTPIN

FRC_SPI_CK

AF23
AD22
AE22
AF22

C111
2.2uF

I2C_SDA
I2C_SCL

R155
0
OPT

LD650 Scan

AE19
AD21
AE21
AF21
AD20
AE20
AF20
AF19
AD18
AE18

NEC_SDA
NEC_SCL

SCAN_BLK2

R158

AF18

R159

AB23
AC23

100
OPT
100

FRC_PWM1
FRC_PWM0

GPIO3/TCON6/LCK/GCLK2

FRC_SPI_CZ

AA14

AC22

FRC_GPIO1

AA14

SCAN_BLK1/OPC_OUT

OPT

AC15

FRC_SPI1_CK
Y16
FRC_GPIO8

AC16
AC14

Y19

FRC_SPI_DO

AE8
Y11

AA15

FRC_DDR3_NC/DDR2_DQM0

FRC_TESTPIN

AA11

FRC_I2CS_CK

AC16
AC14

FRC_SPI1_DI
AA16

FRC_VSYNC_LIKE

FRC_SPI_CK

AA15

FRC_SPI_DI

Y10

Y10
FRC_I2CS_DA

AA11

FRC_I2CS_CK
AB15

FRC_PWM1

AMP_SDA
AMP_SCL

AF25
AE24
AF24

AB22

GPIO2/TCON7/LDE/GCLK4

AC15

FRC_SPI_DI

FRC_PWM0

AE26
AE25
AF26

AB16

FRC_SPI1_DI

FRC_I2CS_DA

AE23

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1

AA16

FRC_DDR3_NC/DDR2_DQM0
FRC_VSYNC_LIKE

PWM_DIM

AD24

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

Y16
FRC_GPIO8

Y19

FRC_SPI_DO

AE8
Y11

AA15

AC24
AD26
AD25

AD19
DCKP/TCON5

AE6
AF11

PWM0
PWM2

AB26
AB25
AB24

FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11

AE19

10K
100

A_DIM

AA26
AA25
AA24

C4M/LLV5N

AE11

AD21

R156
R157

AC25

AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]

AE2

AF25
AE24
AF24

FRC_SPI1_CK

AC14

Y25
Y24

B4M/TCON8/BLUE[6]

AB16

AC16

V24
W24
Y26

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

AE26
AF26

AE20

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

AE4

AD20

B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]

AD24

AE25

B0M/RLV6N/GREEN[6]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

GPIO3/TCON6/LCK/GCLK2

AA14

U24
V26
V25

AC26

AD1

AB22

GPIO2/TCON7/LDE/GCLK4

AC15

AB14

A3M/RLV4N/RED[0]

B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2

AD13

AD25

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10
FRC_DDR3_DQU7/DDR2_DQM1

AA11

A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A4P/RLV5P/GREEN[9]

W25
U26
U25

A4M/RLV5N/GREEN[8]

BCKM/TCON12/GREEN[0]

AB25
AB24

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

AB15
FRC_PWM1

A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]

BCKP/TCON13/GREEN[1]

AD19
DCKP/TCON5

AE6
AF11

FRC_I2CS_CK
FRC_PWM0

ACKM/RLV3N/RED[2]

AF3
AF14

AF6

Y10

AB15

FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1

AA26
AA25
AA24

FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11

AD21

FRC_SPI_DI
FRC_I2CS_DA

DIMMING

ACKP/RLV3P/RED[3]

AC25

C4M/LLV5N

AE11

AE20

C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]

FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0

AE9
AF9

FRC_SPI1_DI

Y10

AB14

V24
W24
Y26

AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]

FRC_DDR3_RESETB/DDR2_A3

AF8
AD9

AA16

FRC_DDR3_NC/DDR2_DQM0
FRC_VSYNC_LIKE

AD3

AD5

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE

AE2

AF23
AD22
AE22

Y16
FRC_GPIO8

Y19

FRC_SPI_DO

AE8
Y11

AA15

AD14
AF15

B4M/TCON8/BLUE[6]

AF25
AE24
AF24

AD7

FRC_SPI_CZ

AC14

U24
V26
V25

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

AE26
AF26

AD20

B2M/RLV8N/GREEN[2]
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]

AE4

AE25

B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]

FRC_DDR3_CKE/DDR2_RASZ

FRC_SPI1_CK

AC16

AF1
AE3

FRC_DDR3_A0/DDR2_NC

FRC_DDR3_A12/DDR2_A8

B2P/RLV8P/GREEN[3]

AD24

GPIO3/TCON6/LCK/GCLK2

AA14

AA11

A3M/RLV4N/RED[0]

B0M/RLV6N/GREEN[6]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AB22

GPIO2/TCON7/LDE/GCLK4

FRC_DDR3_BA1/DDR2_ODT
FRC_DDR3_BA2/DDR2_A12

AD26

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

AC15

FRC_I2CS_CK

A2P/RLV2P/RED[5]
A2M/RLV2N/RED[4]
A3P/RLV4P/RED[1]
A4P/RLV5P/GREEN[9]

AF16

U26
U25

A4M/RLV5N/GREEN[8]

B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2

AB16

AA16

FRC_PWM1

FRC_DDR3_A6/DDR2_A0
FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2

AD13

AD25

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

FRC_DDR3_DQU7/DDR2_DQM1

FRC_SPI_DI

FRC_PWM0

A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]

W25

W26

AE1

AC26

AD19
DCKM/TCON4

FRC_DDR3_DQL7/DDR2_DQ5

AD18
AE18
AF18

FRC_SPI1_DI
FRC_SPI_CK

FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10

BCKM/TCON12/GREEN[0]

AF6
DCKP/TCON5

AE6

AD21

AB26

FRC_DDR3_DML/DDR2_DQ7
FRC_DDR3_DMU/DDR2_DQ11

Y16
FRC_GPIO8
FRC_SPI_DO

A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]

BCKP/TCON13/GREEN[1]

AB25
AB24

C4M/LLV5N

AE11

FRC_SPI1_CK

FRC_I2CS_DA

ACKM/RLV3N/RED[2]

AF3
AF14

AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]

FRC_DDR3_RESETB/DDR2_A3

AF8
AD9

AF23
AD22
AE22

AD7

Y11

FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1

AA26
AA25
AA24

AD5

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE

AE2

AF25
AE24
AF24

AE20

ACKP/RLV3P/RED[3]

AC25

FRC_DDR3_ODT/DDR2_BA1

FRC_DDR3_WEZ/DDR2_BA0

AE26
AF26

GPIO3/TCON6/LCK/GCLK2

FRC_DDR3_NC/DDR2_DQM0

U24
V26
V25

B4M/TCON8/BLUE[6]

AE4

AD20

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

AD24

AE25

B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]
B2P/RLV8P/GREEN[3]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AB22

GPIO2/TCON7/LDE/GCLK4

FRC_VSYNC_LIKE

AF1

FRC_DDR3_A0/DDR2_NC

FRC_DDR3_A12/DDR2_A8

B0M/RLV6N/GREEN[6]

AB16

Y19

AF16
AE3

A4M/RLV5N/GREEN[8]

B0P/RLV6P/GREEN[7]
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA2/DDR2_A12

AD26

D4M/TCON0

GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

AE8

W25
U26
U25

IC101-*14
LGE107RC-RP [S7M+ RM]
W26

AE1

+3.3V_Normal

S7M-PLUS_RM

IC101-*13
LGE107DC-RP-1 [S7M+ DIVX]

FRC_DDR3_A3/DDR2_A1

AD13

AD25

FRC_DDR3_DQU2/DDR2_DQ13
FRC_DDR3_DQU3/DDR2_DQ12

FRC_DDR3_DQU7/DDR2_DQM1

AD8

I2C
S7M-PLUS_DivX

AC26

AD19
DCKP/TCON5

FRC_DDR3_DQL0/DDR2_DQ6

FRC_TESTPIN

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

AD16
AD15
AE16

AD19
DCKP/TCON5

AE6

AD21

NC_20
NC_11

AA11

BCKM/TCON12/GREEN[0]

AF6

FRC_DDR3_DQL7/DDR2_DQ5

AF7

AB26

C4M/LLV5N

AE10

VSS

Y25
Y24

AF6

Y10

BCKP/TCON13/GREEN[1]

AB25
AB24

FRC_DDR3_DML/DDR2_DQ7

AE6

AE5

22

C3M/LLV4N
C4P/LLV5P

FRC_DDR3_DMU/DDR2_DQ11

AD12

E2

R129

FRC_DDR3_DQSU/DDR2_DQS1

AE11

WP

AF11

SDA

AF2
AD2

FRC_DDR3_DML/DDR2_DQ7

NC_29

NC_12
GND_105

W26

AF3
AF14

AD23
CCKP/LLV3P
CCKM/LLV3N
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]

FRC_DDR3_DQSL/DDR2_DQS0
FRC_DDR3_DQSLB/DDR2_DQSB0

22

AD3

AE15

C4M/LLV5N

AE11

AA16

NC_55

ACKP/RLV3P/RED[3]

AA26
AA25
AA24

AD5

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0

AF8
AD9
AE9

R128

C0M/LLV0N/BLUE[4]
C1P/LLV1P/BLUE[3]

AF25
AE24
AF24

Y16
NC_15

AC16

FRC_DDR3_A0/DDR2_NC

AC25

B4M/TCON8/BLUE[6]

FRC_DDR3_RESETB/DDR2_A3

SCL

AD14
AF15

V24
W24
Y26

AD23
CCKP/LLV3P
CCKM/LLV3N

NC_30

Y19

U24
V26
V25

AD5

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0

AB16
NC_26

AA14

AA15

AF1
AE3

FRC_DDR3_ODT/DDR2_BA1

AF4
AD4

TCON17/CS6/GCLK4

AC15

AC14

AF16

B4M/TCON8/BLUE[6]

AE4

AE23

AD7

NC_41

B2M/RLV8N/GREEN[2]

FRC_DDR3_CKE/DDR2_RASZ

AD24

AB22

NC_54

B1P/RLV7P/GREEN[5]
B1M/RLV7N/GREEN[4]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AD25

TCON14/SACN_BLK

NC_73

B0M/RLV6N/GREEN[6]

B2P/RLV8P/GREEN[3]

AD13

NC_42
NC_38

NC_39

AB23
AC23
AC22

S7M-PLUS_MS10

U26

FRC_DDR3_ODT/DDR2_BA1

VCC
AF9

E1

C7

FRC_DDR3_A12/DDR2_A8

BCKM/TCON12/GREEN[0]

AA26
AA25
AA24

AD19
TCON3/OE/GOE/GCLK2

AE6
AF11

FRC_DDR3_A12/DDR2_A8

B0P/RLV6P/GREEN[7]

AF3
AF14

4.7K
I2C_SCL

C8

AC26
BCKP/TCON13/GREEN[1]

AF6

NC_69

AE19
AD21

AE1

U25

A4M/RLV5N/GREEN[8]

BCKM/TCON12/GREEN[0]

C105
0.1uF

AD4

B6

AE1

W25
U26
U25

A4M/RLV5N/GREEN[8]

AC25

NC_58

IC101-*12
LGE107C-RP [S7M+ MS10]
W26

ACKP/RLV3P/RED[3]

AE2

R127

A3M/RLV4N/RED[0]

FRC_DDR3_A10/DDR2_A11
FRC_DDR3_A11/DDR2_A4

AD15
AE16

RLV5N/RED[2]

AE11

NC_24

FRC_DDR3_A0/DDR2_NC

AE4

NC

WP

A2P/RLV2P/RED[5]

FRC_DDR3_A7/DDR2_A5
FRC_DDR3_A8/DDR2_A2

AD5

AB15

AB14

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

AF2
AD2

AD23
RLV3P/RED[7]
RLV3N/RED[6]

NC_17
NC_25

A0P/RLV0P/RED[9]

FRC_DDR3_A5/DDR2_A10

AD3

AE15

Y25

ACKM/RLV3N/RED[2]

FRC_DDR3_A3/DDR2_A1

AD14

Y24

ACKP/RLV3P/RED[3]

FRC_DDR3_A1/DDR2_A6
FRC_DDR3_A2/DDR2_A7

AF15

V24
W24
Y26

LVB4N/LLV0N/GREEN[0]
NC_36
NC_67

Y10

FRC_DDR3_DQSUB/DDR2_DQSB1

U24
V26
V25

NC_51

NC_49

AE26
AE25
AF26

AC26

VSS

LVB2N/RLV8N/GREEN[6]

NC_44
NC_61

NC_35

NC_20

GND_105

BCKP/TCON13/GREEN[1]

LVB1N/RLV7N/GREEN[8]
LVB2P/RLV8P/GREEN[7]

LVB4P/LLV0P/GREEN[1]

AF4
AD4

NC_29

NC_12

FRC_DDR3_A12/DDR2_A8

LVB1P/RLV7P/GREEN[9]

NC_76

AE4

AE23

AA16

NC_55

AE1

AD15

A2

LVB0P/RLV6P/RED[1]
LVB0N/RLV6N/RED[0]

NC_66

Y16
NC_15

AC16

S7M-PLUS_BASIC

+3.3V_Normal

GPIO8/PM2

PCM_A12

C6

S7MR_MS10
W26

FRC_DDR3_A0/DDR2_NC

AF1
AE3

FRC_DDR3_A12/DDR2_A8

NC_30

AC14

AF16

S7MR-PLUS
AF1

LVA4P/LLV8P

AB16
NC_26

AA14
AC15

NC_24

AE16

G21

IC101-*7
LGE107C-R [S7MR MS10]

AE1

W25
U26
U25

LVA4N/LLV8N

AD24

TCON17/CS6/GCLK4

IC101-*11
LGE107C-RP-1 [S7M+ BASIC]

DC_MREMOTE

F19

SDA

+3.3V_Normal

$0.199

MODEL_OPT_0

SCL

HDCP_EEPROM_ON_SEMI_NEW

A1

LVA3N/LLV7N/BLUE[0]

NC_60

AD25

AD7

AB15

NC_24

NC_33
NC_47
NC_46

NC_32

AB22

NC_17
NC_25

AD1

TCON14/SACN_BLK

Y10

AB15

LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]

AD13

NC_42
NC_38

NC_39

AB23
AC23
AC22

AB26
AB25
AB24

AD19
TCON3/OE/GOE/GCLK2

NC_53

NC_59

AD18
AE18
AF18

NC_20
NC_11

LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]

NC_77
NC_65
NC_62

LVBCLKN/LLV0N/GREEN[4]

AF6

AE6
AF11

NC_29
NC_21

GND_105

LVA0N/LLV3N/BLUE[8]

NC_50
NC_45
NC_34

AF3
AF14

NC_58
NC_69

AE19
AD21

AA16

NC_55
NC_12

LVA0P/LLV3P/BLUE[9]

AA26
AA25
AA24

RLV5N/RED[2]

AE11

Y16
NC_15

AC16

LVACLKN/LLV6N/BLUE[2]

AC26

AD23
RLV3P/RED[7]
RLV3N/RED[6]

AB16
NC_26

LVACLKP/LLV6P/BLUE[3]

NC_78
NC_64

LVBCLKP/LLV0P/GREEN[5]

AD5

NC_36
NC_67
NC_35

TCON17/CS6/GCLK4

NC_19

S7MR_BASIC
W26

NC_48

AC25

NC_51

NC_30

Y19

U24
V26
V25

LVB4N/LLV0N/GREEN[0]

AE4

AE23

AD7

AA14

AA15

AF1
AE3

NC_63

NC_32

AB22

AC15

AC14

AF16

IC101-*6
LGE107C-R-1 [S7MR BASIC]

AE1

W25
U26
U25

LVA4N/LLV8N

AD13

TCON14/SACN_BLK

Y10

NC_25

AB26
AB25
AB24

NC_42
NC_38

NC_39

AB23
AC23
AC22

NC_20
NC_11

LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]

NC_77
NC_65
NC_62

LVBCLKN/LLV0N/GREEN[4]

AD19
TCON3/OE/GOE/GCLK2

NC_53

NC_59

AD18
AF18

NC_29
NC_21

LVA0N/LLV3N/BLUE[8]

NC_50
NC_45
NC_34

AF3
AF14

AF6

AE6
AF11

AE18

LVA0P/LLV3P/BLUE[9]

AA26
AA25
AA24

NC_58
NC_69

AE19
AD21

AE20

LVACLKN/LLV6N/BLUE[2]

AC26

RLV5N/RED[2]

AE11

AD20

LVACLKP/LLV6P/BLUE[3]

NC_78
NC_64

LVBCLKP/LLV0P/GREEN[5]

AD23
RLV3P/RED[7]
RLV3N/RED[6]

NC_49

AE26
AE25

W26
NC_48

AC25

AD5

NC_36
NC_67

NC_17

AB14

AD14
AF15

V24
W24
Y26

NC_51

NC_35

AA16

NC_55
NC_12
GND_105

U24
V26
V25

LVB4N/LLV0N/GREEN[0]

AE4

AE23

Y16
NC_15

AC16

AF1
AE3

NC_63

AB16
NC_26
NC_19

AB15
NC_24

LVA4P/LLV8P

AF16

U26
U25

LVA4N/LLV8N

NC_30

NC_17
NC_25

AD1

TCON17/CS6/GCLK4

Y10

WP

LVA3N/LLV7N/BLUE[0]

AD13

AD7

NC_54

AA14

NC_20
NC_11

AB26

AB22

NC_73

AC15

NC_29
NC_21

GND_105

NC_33
NC_47
NC_46

LVBCLKN/LLV0N/GREEN[4]

AB25
AB24

TCON14/SACN_BLK

NC_39

AB23
AC23
AC22

AA16

NC_55
NC_12

Y11

LVA2P/LLV5P/BLUE[5]
LVA2N/LLV5N/BLUE[4]
LVA3P/LLV7P/BLUE[1]

AF3
AF14

NC_42
NC_38

Y16
NC_15
NC_31

LVA1P/LLV4P/BLUE[7]
LVA1N/LLV4N/BLUE[6]

NC_77
NC_65
NC_62

AA26
AA25

AD19
TCON15/SCAN_BLK1

AB16
NC_26

LVA0N/LLV3N/BLUE[8]

NC_50
NC_45
NC_34

AE1

W25

IC101-*5
LGE101RC-R [S7R RM]

AC26

AF6
TCON3/OE/GOE/GCLK2

AE6
AF11

AE20

LVA0P/LLV3P/BLUE[9]

LVBCLKP/LLV0P/GREEN[5]

AA24

NC_58
NC_69

AE19
AD21

AD20

LVACLKN/LLV6N/BLUE[2]

AC25

RLV5N/RED[2]

AE11

TCON17/CS6/GCLK4

AE8

AD16
AD15
AE16

AD5

RLV0N/LHSYNC

AE2

AD7

NC_19

WP

Y25
Y24

AD23
RLV3P/RED[7]
RLV3N/RED[6]

NC_30

VCC

AF2
AD2

LVB4N/LLV0N/GREEN[0]

AF25
AE24
AF24
AD22

LVB2N/RLV8N/GREEN[6]
LVB3P/LLV1P/GREEN[3]
LVB3N/LLV1N/GREEN[2]

NC_36
NC_67

NC_49

AE26

AB22

NC_54

VCC

AD3

AE15

NC_51

NC_35

AF26

TCON14/SACN_BLK

NC_73

NC_44
NC_61

LVB4P/LLV0P/GREEN[1]

AF4
AD4

AE22

LVB1P/RLV7P/GREEN[9]
LVB1N/RLV7N/GREEN[8]

NC_60

AE4

AE23
AE25

LVB0N/RLV6N/RED[0]

LVB2P/RLV8P/GREEN[7]

AD24

NC_42
NC_38

NC_39

AE7

IC103-*1
CAT24C08WI-GT3-H-RECV(TV)

AC24
AD26

AD19
TCON15/SCAN_BLK1

NC_76
NC_32

AF6
TCON3/OE/GOE/GCLK2

NC_53

AD1

NC_66

AD13

AD25

RLV5N/RED[2]
NC_69

IC104-*1
AT24C1024BN-SH-T

AB26
AB25
AB24

NC_58

AE6
AF11

LVB0P/RLV6P/RED[1]

AF3
AF14

AD5

NC_40
AE9

AD14
AF15

V24
W24
Y26

LVACLKP/LLV6P/BLUE[3]

NC_78
NC_64

NC_63

LVBCLKN/LLV0N/GREEN[4]

AA26
AA25

AD23
RLV3P/RED[7]
RLV3N/RED[6]

NC_49

AF9

U24
V26
V25

W26
NC_48

AC26
LVBCLKP/LLV0P/GREEN[5]

AA24

LVB4N/LLV0N/GREEN[0]
NC_36
NC_67

AE11

AF1
AE3

LVA4N/LLV8N

AC25

NC_51

AF8
AD9

AF16

IC101-*4
LGE101DC-R [S7R DIVX/MS10]

AE1

W25
U26
U25

NC_63

LVB0P/RLV6P/RED[1]
NC_66

AE2

A0

ERROR_OUT

G19

S7R_DivX_MS10
S7R_RM

W26
NC_48

LVB4P/LLV0P/GREEN[1]

R113
4.7K

SC1/COMP1_DET

G20

S7MR
S7R_DivX

IC101-*2
LGE101C-R [S7R MS10]

NC_35

C107
0.1uF

GPIO7/PM1/PM_UART_TX

PCM_A11

MPIF_D0

S7R

NC_16

NC_60

IC104
M24M01-HRMN6TP

M20

NC_17

AD5

IC103
CAT24WC08W-T

FRC_RESET

MPIF_D3

AF4

EEPROM_1MBIT_ST

PCM_A10

NC_18

AD4

HDCP_EEPROM_CATALYST_OLD

GPIO6/PM0/INT0

MPIF_D2

AE4

Addr:10101--

L20

E7

PCM_A9

MPIF_D1

AE14

HDCP EEPROM

3D SG

ET_RXER

GPIO51/UART1_TX

PCM_A8

NC_19

AE13

GPIO50/UART1_RX

PCM_A7

PWM4/GPIO70

G22

M_RFModule_RESET

3D SG

I/O1

NC_32

G23

/RST-PHY

AD1

SDA

K22

PCM_5V_CTL

AD13

3D SG

M_REMOTE_TX

K20

F20

PCM_A6

K23

DSUB_DET

LVBCLKN/LLV0N/GREEN[4]

B5

MODEL_OPT_3
I/O3

AF3

VSS

PCM_A5

A5

22

SC_RE1

I/O4

AF14

GND

M_REMOTE_RX

L23

NC_20

AC26

SCL

22

PWM2

LVBCLKP/LLV0P/GREEN[5]

N22

SC_RE2

TO SCART1

SIDEAV_DET

GPIO42

DDCA_CK/UART0_RX

NC_21

NC_63

22

R139

NC_22

AD16

A2

GPIO41

PCM_A4

M22

R138

VSS_2

AD15

22

PWM1

AE16

N23

PWM0

AF2

A2

GPIO40

PCM_A3

DDCR_CK/GPIO72

I2C_SCL

VCC_2

AD2

PCM_A2

TS1_D1

AD3

GPIO39

NC_23

AE15

NC_2

22

R137

I2C_SDA

RGB_DDC_SDA

AD14

PCM_A1

M23

R136

RGB_DDC_SCL

AF15

GPIO38

UART_RX2/GPIO64

NC_25
NC_24

22

R135

S7_NEC_RXD

AF1

A1

R134

S7_NEC_TXD

AE3

GPIO37/UART3_TX

TS0_D4

AE1

AA19

I/O8

AF16

NC_1

AD17

NC_26

P21

K21
GPIO36/UART3_RX

PCM_A0

PCM_PF_RBZ

AB19

NC_27

S7R_MS10

AB21

PF_ALE

IC101-*1
LGE101C-R-1 [S7R BASIC]

22

AR103

/PF_WE

NC_28

S7R_BASIC

NC

AA18

R141
1K

NC_4

47

NC_2
NC_28

AB20

R140
1K

NC_3

NC_29

PCM_D6

AC17

/PF_OE
NC_1
48

5V_DET_HDMI_4

L21

AA9

/PF_CE0
/PF_CE1

NC_2

GPIO151/TCON8

5V_DET_HDMI_2

L22

PCM_RESET

C109
0.1uF

C108
0.1uF
OPT

AR104

EAN61508001
IC102-*3
TC58NVG0S3ETA0BBBH

5V_DET_HDMI_1

M21

PCM_D5

AA20

/PCM_CE
/PCM_IRQA

R133
10K

NC_1

GPIO149/TCON6

PCM_D4

PCM_IOWR_N

Y21

/PCM_IOWR

EAN61857001
IC102-*2
K9F1G08U0D-SCB0

PCM_D3

AA17

/PCM_WE
/PCM_IORD

R132
10K

NAND_FLASH_1G_HYNIX
EAN35669102
IC102-*1
H27U1G8F2BTR-BC

GPIO147/TCON4

PCM_REG_N

/PCM_OE

NAND_FLASH_1G_SS

PCM_D2

W22

/PCM_REG

NC_17

25

GPIO145/TCON2

PCM_A14

PWM0

NC_18

GPIO143/TCON0

PCM_D1

U21

PCM_A[4]

AR102

N21
PCM_D0

PCM_D7

PCM_A[0]
PCM_A[1]

+3.3V_Normal

NC_20

26

24

(MIPS
(MIPS
(MIPS
(8051
(8051

NC_21

27

23

4h3
4h4
4h5
4hb
4hc

AC19

PCM_D[6]

NC_22

33

17

:
:
:
:
:

C103
0.1uF

VSS_2

34

16

MIPS_no_EJ_NOR8
MIPS_EJ1_NOR8
MIPS_EJ2_NOR8
B51_Secure_no scramble
B51_Sesure_scramble

C102
10uF

VDD_2

35

15

22

AC18

PCM_D[5]

<T3 CHIP Config>


(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0)
PCM_A[0-14]

36

14

PCM_A[4]

NC_23

37

13

AB18

NC_24

38

12

PCM_A[5]

PCM_D[3]

NC_25

39

11

T22

PCM_D[4]

40

10

T21

I/O4

41

U22

PCM_D[1]

R145
2.2K

/PF_CE0

PCM_D[0]
PCM_D[2]

PCM_A[6]

I/O5

42

Boot from SPI flash : 1b0


Boot from NOR flash : 1b1

PCM_A[7]

I/O6

R144
2.2K

AR101
I/O7

R143
3.3K

43

R142
3.3K

RB

/PF_OE

44

NC_26

45

PCM_D[0-7]

<T3 CHIP Config(AUD_LRCH)>

R123
OPT1K
R125
OPT 1K

NC_6

IC101
PCM_A[0-7]

NC_27

46

R126
1K

1K

3.9K

NC_5

R109

R107

/F_RB

NC_4

NC_28

R124
1K

NC_3

48
NAND_FLASH_1G_NUMONYX
EAN60762401
47
2
1

R117
1K

NC_2

R115
1K

/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit

NC_29

R116
1K OPT
R118
1K OPT
R121
1K

NC_1

AB14

AB15
FRC_PWM0

AB14

FRC_PWM1

GP3_Saturn7M
FLASH/EEPROM/GPIO

Ver. 0.1
1

MODEL_OPT_1

MODEL_OPT_2

F7

NON_DVB_T2

MODEL_OPT_3

B6

HD

D18

Ready

default

MODEL_OPT_4
MODEL_OPT_5

MODEL_OPT_6

MODEL_OPT_6

F9

0.1uF
C4024

C4011

0.1uF

0.1uF

C4006

C4013

0.1uF

0.1uF

C299

0.1uF

0.1uF

C283

C292

0.1uF
C280

10uF

0.1uF

C276

C277

OPT

S7M-PLUS_DivX_MS10
IC101
[S7M+ DIVX/MS10]

OLED

LCD

Normal Power 3.3V

--> MODEL_OPT_5, MODEL_OPT_6


: Only 3D_SG GPIO OUTPUT CONTROL

NO_FRC
R227
1K

+3.3V_Normal

VDD33

H11
H12
VDD33_T/VDDP/U3_VD33_2:47mA

F1

F4

DDC_SCL_1

IM

A_RX1N

C1

CK-_HDMI2

D1

D0+_HDMI2

D2

D0-_HDMI2
D1+_HDMI2

E2
E3

D1-_HDMI2

F3

D2+_HDMI2

E1

D2-_HDMI2

D4

DDC_SDA_2

E4

DDC_SCL_2

D5

HPD2

V1

A_RX2P

SSIF/SIFP

A_RX2N

0.1uF
C4020

0.1uF

0.1uF
C4014

C4031

0.1uF

0.1uF

0.1uF

C4012

L215
BLM18PG121SN1D

+3.3V_Normal
L227
BLM18PG121SN1D

Y2
SSIF/SIFM

DDCDA_DA/GPIO24
DDCDA_CK/GPIO23

QP
QM

C4064
0.1uF

TP203

V3

Close to MSTAR

R4019
1K

TP204

R4020
10K

Y5
B_RXCP

IFAGC

B_RXCN

IF_AGC_MAIN

RF_TAGC

B_RX0P

Y4
TP205
U1

B_RX0N

TGPIO0/UPGAIN

B_RX1P

TGPIO1/DNGAIN

B_RX1N

TGPIO2/I2C_CLK

B_RX2P

AMP_SCL
AMP_SDA
22

FULL_NIM R291
FULL_NIM R292

U2

DEMOD_SCL

22

XTALIN

DDCDB_CK/GPIO25

FRC_LPLL:13mA
FRC_LPLL

L206
BLM18PG121SN1D

DEMOD_SDA

R3

C261

XTALOUT

HOTPLUGB/GPIO20

27pF

C262

FRC

M19
N18
N19
N20
P18
P19
P20

FRCVDDC

1uF

L7

AA4

DDC_SCL_4

AC3

HPD4

C_RX1N
C_RX2P

DM_P1

DDCDC_DA/GPIO28

A1
B2
C2
C3
B4
C4
E5
D6

CEC_REMOTE_S7

G6

R228

C204

0.047uF

K1

R229

DSUB_R+

33
68

C205

0.047uF

L3

R230

DSUB_G+

33

C206

0.047uF

K3

R231

C207

0.047uF

K2

R232

DSUB_B+

68
33

C208

0.047uF

J3

D_RXCP

I2S_IN_SD/GPIO176

D_RXCN

0.047uF

J2

1000pF

J1

0.1uF

C4017

0.1uF

C4008

0.1uF

NEC_SDA

F13

D_RX0P

F15

VDD33_DVI

D20

D_RX0N

I2S_OUT_BCK/GPIO181

D_RX1P

I2S_OUT_MCK/GPIO179

D_RX1N

I2S_OUT_SD/GPIO182

D_RX2P

I2S_OUT_SD1/GPIO183

D_RX2N

I2S_OUT_SD2/GPIO184

DDCDD_DA/GPIO30

I2S_OUT_SD3/GPIO185

DDCDD_CK/GPIO29

Normal 2.5V

AUD_SCK

E20

AUD_MASTER_CLK_0

D19

AUD_LRCH

F18

LED_DRIVER_D/L_SCL

E18

MODEL_OPT_4

D18

MODEL_OPT_5

I2S_OUT_WS/GPIO180

E19

Y15

+2.5V_Normal

C236

N1
LINE_IN_0R

HSYNC0

LINE_IN_1L

VSYNC0

LINE_IN_1R

RIN0P

LINE_IN_2L

RIN0M

LINE_IN_2R

GIN0P

LINE_IN_3L

GIN0M

LINE_IN_3R

BIN0P

LINE_IN_4L

BIN0M

LINE_IN_4R
LINE_IN_5L

P3

C237

P1

2.2uF

C238

SC1/COMP1_L_IN

2.2uF
2.2uF

P2

C239

P4

C4059

2.2uF
2.2uF

P5

C4060

AV_L_IN

2.2uF

R6

C242
C243
C244

SIDEAV_R_IN

2.2uF

U5

SIDEAV_L_IN

2.2uF

T6

AV_R_IN

2.2uF

V5

C245
C246

U6

AU33

COMP2_L_IN
COMP2_R_IN

L212
BLM18PG121SN1D

PC_L_IN

2.2uF

P8

AU25:10mA

2.2uF OPT
2.2uF OPT

VDD_RSDS

R246

SIDEAV_CVBS_IN

Delete CHB_CVBS_IN

33

C227

0.047uF

L4

R4016

AV_CVBS_IN

33

C4057 0.047uF

L5

R248

33

C229

0.047uF

L6

C203
1000pF
OPT

33

C230

0.047uF

M4

R250

AV_CVBS_IN2

R249

33

C231

0.047uF

M5

R251

33

C232

0.047uF

K7

M7

DTV/MNT_VOUT
68

C233

0.047uF

L205

R2

5.6uH

E21
ET_RXD0

CVBS3P
CVBS4P

E22
D21

CVBS5P

ET_RXD1

CVBS6P

F21
E23

ET_REFCLK
ET_TX_EN
ET_MDC
ET_MDIO
VCOM0

HEAD_PHONE

HEAD_PHONE

F22
D23
F23

0.1uF
C285

0.1uF

C4038

0.1uF

0.1uF

C4036

C4032

0.1uF

C4028

C4022

C4018

0.1uF

10uF

10uF

AVDD_DDR0

GND_47
GND_49

AVDD_DVI_1

GND_50

AVDD_DVI_2

GND_51

AVDD3P3_CVBS

GND_52
GND_53
GND_55

AVDD_AU33

GND_56
GND_57
GND_59
GND_60
GND_61

VDDP_1

GND_62

VDDP_2

GND_63
GND_64
GND_66

FRC_VD33_2_1

GND_67
GND_68
GND_69

FRC_AVDD_RSDS_1

GND_70

FRC_AVDD_RSDS_2

GND_71
GND_72
GND_73

FRC_AVDD

GND_74

FRC_AVDD_LPLL

GND_75
GND_76
GND_77

Y14

AVDD_MEMPLL

GND_82

FRC_AVDD_MEMPLL

W14

GND_83

D16

IR

22

10K

R4018
R4017

MIU1VDDC

OPT

10K

L226
BLM18SG700TN1D

+3.3V_Normal

FRC_RESET

C4066 10uF

L228
BLM18SG700TN1D

0.1uF

FRC

GND_89
GND_90
GND_91

G17
H17

GND_92

AVDD_DDR1_D_2

GND_93

AVDD_DDR1_D_3

GND_94

AVDD_DDR1_D_4

GND_95

AVDD_DDR1_C

MVREF

AVDD_DDR1_D_1

GND_96

AVDD_DDR_FRC

GND_98

AB11
AB12
AC11
AC12

FRC_AVDD_DDR_D_1

GND_99

FRC_AVDD_DDR_D_2

GND_100

FRC_AVDD_DDR_D_3

GND_101

FRC_AVDD_DDR_D_4

GND_102
GND_103

GND_106

C4063 10uF

FRC
R205

GND_88

AVDD_DDR0_D_4

GND_105

SOC_RESET

U3_RESET

AVDD_DDR0_D_3

+1.26V_VDDC

A4
Y17

GND_87

+1.26V_VDDC
FRCVDDC
FRC
L225
BLM18SG700TN1D

MVREF

GND_107

G15
MVREF

GND_109
GND_110

Y7

FRC

GND_108

GND_FU

NC_2

Y8

NC_1

H10
H18
H19
J10
J17
J18
J19
K9
K10
K11
K12
K13
K14
K15
K16
K17
K18
L9
L10
L11
L12
L13
L14
L15
L16
L17
M9
M10
M11
M12
M13
M14
M15
M16
M17
N10
N11
N12
N13
N14
N15
N16
N17
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
R18
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
U10
U11
U12
U13
U14
U15
U16
U17
V7
V8
V9
V10
V11
V12
V13
V14
V15
V16
V17
V18
W7
W8
W9
W10
W11
W12
W13
W16
W17
W18
Y13
Y18
AA13
AB13
AC13
D17
H23
AF13
J9

L223
U9 BLM18SG121TN1D

PGA_VCOM

FRC

C4056

100

K8

AVDD_DDR0_D_2

GND_104

OPT
R298

GND_86

F16
G16

AVDD_DDR_FRC

AVDD_DDR0_D_1

RSDS Power OPT

10K

RESET

G8

GND_85

D15

AA12

R4006

IRINT
TESTPIN

TP206

GND_78

GND_81

R19

F17

AVDD_DDR_FRC:55mA

MIU0VDDC
F8

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

GND_46

FRC_AVDD_DDR_C

ET_REF_CLK
ET_TX_EN
ET_MDC
ET_MDIO
ET_CRS

D22

ET_CRS

AVLINK

TP211

T20

E16

AVDD_DDR0

Close to MSTAR

AV_CVBS_IN2

GND_44

GND_97

ET_RXD1
ET_TXD1

ET_TXD1

N5

HP_ROUT

ET_RXD0
ET_TXD0

ET_TXD0

+1.5V_FRC_DDR

HP_LOUT

HEAD_PHONE

CVBS2P

CVBS_OUT1

H/P OUT

HEAD_PHONE

CM2012F5R6KT

CVBS1P

CVBS_OUT2
R252

CM2012F5R6KT
5.6uH
L203

CVBS0P

M6

U18

E17

R1

CVBS7P
TP210

OPT

OPT

OPT

0.1uF

N6

GND_43

H9

C4058

0.047uF

OPT

0.1uF

C226

GND_42

W19

E15

P6

HP_OUT_1R

N4

33

GND_41

AVDD_DDR0_C

OPT

C4061 10uF

0.047uF

R245

TU_CVBS
SC1_CVBS_IN

C225

PVDD_1

GND_80

VRP
HP_OUT_1L

33

C263
10uF

C241

BIN2M
SOGIN2

R244

GND_40

VDD33

AVDD_DDR0

1/16W
1%

VAG

C256
0.1uF

0.1uF

R7

BIN2P

C253
1uF

C249
4.7uF

C4042

VRM

OPT

C4009

P7

GIN2M

0.047uF

M3

GND_38

GND_79

1/16W
1%

C248

RIN2M
GIN2P

L202
BLM18SG121TN1D

R4014
1K

1000pF

L1

GND_37

T4
AUCOM

0.1uF
R4015
1K

C224

L2

GND_35

U19
U20

AVDD_DDR0

0.1uF
C240 FRC

0.047uF

M1

RIN2P

0.1uF

0.047uF
0.047uF

GND_34

GND_84

0.1uF

C223

0.047uF

M2

AVDD2P5_ADC_2

FRC_VD33_2_2

W20

AVDD_DDR1:55mA

C4010 FRC

68

N2

GND_33

V20

FRC_VDD33_DDR

0.1uF

R242

C221
C222

0.047uF

OPT

HSYNC2

C4062

R241

COMP2_Pb+

68
33

C220

N3

AVDD2P5_ADC_1

GND_65

AVDD_DDR0

C4003

R240

33

C219

0.047uF

GND_32

FRC_AVDD_MPLL

AVDD_DDR0:55mA

0.1uF

COMP2_Y+

68

C218

T5 C234 OPT 2.2uF


R5 C235
2.2uF

0.1uF

R238
R239

33

GND_30

VDDP_3

AVDD25_PGA:13mA

C4004 OPT

R237

GND_29

AVDD_DDR0

0.1uF

MICIN

H5

TP209

R4
MIC_DET_IN
MICCM

NON_EU

COMP2_Pr+

AVDD1P2

FRC_VDD33_DDR

+1.5V_DDR

BIN1M
SOGIN1

GND_26
GND_28

T9

R9

DDR3 1.5V

C4046

J5

LINE_OUT_3R

SCART1_Rout

W5

C297

1000pF

BIN1P

Y3

0.1uF

J6

LINE_OUT_2R

TP208

C290

R236

0.047uF

LINE_OUT_0R

GIN1M

V4

OPT

SC1_SOG_IN

68

C216
C217

R258

GND_25

AVDD33_T

FRC_LPLL

FRC

C215

GIN1P

TP207

0.1uF

SC1_B+/COMP1_Pb+

H4

SCART1_Lout

W4

C298

K6

LINE_OUT_3L

C291

0.047uF
0.047uF

LINE_OUT_2L

RIN1M

BLM18PG121SN1D

C214

RIN1P

W3

C281

68
33

GND_24

GND_58
VDD33

FRC_AVDD

10uF

R256
R257

U4
LINE_OUT_0L

10uF

J4

VSYNC1

BLM18PG121SN1D

0.047uF

HSYNC1

FRC

C213

GND_23

FRC_AVDD_RSDS_3

C247

V6

10uF

33

FRC_VDDC_7

AVDD_EAR33

L219
BLM18PG121SN1D

PC_R_IN

10uF

R255

SC1_G+/COMP1_Y+

GND_22

T7

T8

C282

K4

GND_21

FRC_VDDC_6

N9

U7

AVDD25_PGA

+2.5V_Normal

AU25

+2.5V_Normal

L209

0.047uF

FRC_VDDC_5

R8

C278

C212

GND_20

GND_54

SC1/COMP1_R_IN

FRC
L210

68

FRC_VDDC_4

AVDD_DMPLL

AVDD_DMPLL

AVDD2P5

AVDD2P5

AVDD2P5

HOTPLUGD/GPIO22

FRC

K5

GND_19

M8

N8

L211
BLM18PG121SN1D

C279

0.047uF

GND_18

FRC_VDDC_3

U8

P9
AVDD2P5/ADC2P5:162mA

AUD_LRCK

C272
4.7uF

C211

R254

SC1_R+/COMP1_Pr+

33

FRC_VDDC_2

GND_48

AUDIO OUT

R253

GND_17

W15

G4
H6

FRC_VDDC_1

L8

V19

SC1_FB

GND_16

AVDD_NODIE

NEC_SCL

LINE_IN_5R

SC1_ID

GND_15
FRC_VDDC_0

COMP2_DET

I2S_IN_WS/GPIO174

SOGIN0

10K

10K

R4023

R4026

SCART1_RGB/COMP1

68

C209
C210

R233

GND_14

GND_45

AUDIO IN

DSUB_VSYNC

GND_13

AVDD25_PGA

AVDD_DMPLL

F14
I2S_IN_BCK/GPIO175

G5

GND_12
A_DVDD

SIDE USB

LINE_IN_0L
R4024 22
R4025 22

SIDE_USB_DP

DDCDC_CK/GPIO27

CEC/GPIO5

DSUB_HSYNC

GND_11

PVDD_2
AVDD25_PGA

I2S_I/F

B1

AE17

GND_10

H7

AVDD_DMPLL/AVDD_NODIE:7.362mA
SIDE_USB_DM

DP_P1

A2
B3

OPT

AF17

C_RX2N

VDDC_10

GND_39
AVDD2P5
AVDD2P5

HOTPLUGC/GPIO21

A3

C4002

DP_P0

A7

0.1uF

AB4

DDC_SDA_4

DM_P0

GND_9

AVDD_AU25

C4026

AC1

D2-_HDMI4

B/T USB

AU25

C288
0.1uF

0.1uF

AC2

D2+_HDMI4

C287
10uF

C4027

D1-_HDMI4

SPDIF_OUT

B7

C_RX1P

VDDC_9

GND_36

0.1uF

AB2

C_RX0N

GND_8

AVDD25_REF

C295

AB3

SPDIF_OUT/GPIO178

C_RX0P

0.1uF

AA3

D0-_HDMI4
D1+_HDMI4

C_RXCN

100

GND_7

VDDC_8

GND_31

J7

C296

AB1

D0+_HDMI4

R296

VDDC_7

DVDD_NODIE

C4045

L217
BLM18PG121SN1D

L207
BLM18PG121SN1D

LED_DRIVER_D/L_SDA

G13

GND_6

J11

AVDD_DMPLL

0.1uF

CK-_HDMI4

SPDIF_IN/GPIO177

VDDC_6

GND_27

AVDD2P5

C289 10uF

AA1

G14
C_RXCP

GND_5

U3_DVDD_DDR

27pF

C294

AA2

GND_4

VDDC_5

Y12

J8
CK+_HDMI4

VDDC_4

FRC_VDDC_8

M18

FRC_VDD33_DDR:50mA
VDD33
FRC_VDD33_DDR
FRC
L222
BLM18PG121SN1D

VDD33_DVI:163mA
VDD33_DVI
+3.3V_Normal

X201
24MHz

GND_3

L19

L221
BLM18PG121SN1D

FRC_MPLL:4mA

OPT

TU_SDA

T1

GND_2

VDDC_3

B_DVDD

K19

MIU1VDDC

FRC

TU_SCL

T3
T2

DDCDB_DA/GPIO26

VDD33

C4065
0.022uF
16V

TU/DEMOD_I2C

TGPIO3/I2C_SDA

B_RX2N

C4015
0.1uF
OPT

Y1
U3

D3
CK+_HDMI2

FRC_AVDD

0.1uF

IP

A_RX1P

HOTPLUGA/GPIO19

E6

HPD1

+2.5V_Normal

AU33

V2

A_RX0N

GND_1

VDDC_2

H16

MIU0VDDC

C4040

F5

DDC_SDA_1

FRC_AVDD:60mA

0.1uF

H2

D2-_HDMI1

AU33:31mA

C4041

D2+_HDMI1

AVDD_MEMPLL:24mA

0.1uF

H1

J16

G18
VDDC_1

VDDC_11

VDD33

A_RX0P

J15

C4023

G1

D1-_HDMI1

TP202

J13

L18

0.1uF

H3

W1

OPT

J14

J12

C4016

D0-_HDMI1
D1+_HDMI1

VIFM

47

OPT

H15

C4025

0.1uF R4003

TU_SIF

OPT

0.1uF

G3

VIFP

A_RXCN

47

OPT

C286

D0+_HDMI1

A_RXCP

1M

G2

IF_N_MSTAR

C4001 10uF

0.1uF R4002

ANALOG SIF
Close to MSTAR

TP201

R287

F2

CK-_HDMI1

W2

0.1uF

C4007

C250

C258

IF_P_MSTAR

C293 10uF

100

0.1uF

H13
H14

C284 10uF

R289

C257

0.1uF

100

C4044

DTV_IF

Close to MSTAR
R288

0.1uF

PHM_OFF
R212
1K

1K
HD
R207

NON_DVB_T2
R209
1K

50/60Hz LVDS
R297
1K

R293 OPT 1K

1K
OPT
R215

OPT

LGE107DC-RP
+1.26V_VDDC

L204
BLM18PG121SN1D

CK+_HDMI1

HDMI

OPT

-->In case of GP2, This port was used for GIP/NON_GIP

C251

DSUB

OPT

DVB_T2

S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]

COMP2

C4005
0.1uF

MODEL_OPT_2
MODEL_OPT_3

3D_SG

CVBS In/OUT

FRC

VDDC : 2026mA

FHD

MODEL_OPT_5

L214
BLM18PG121SN1D

VDD33

--> This option is only applied in EU.


In case of NON_EU, default value set LOW.

10uF

PHM_OFF

PHM_ON

10uF

C5

+2.5V_Normal

LOW
LOW
HIGH
HIGH

C275

100/120Hz LVDS

: LOW
: HIGH
:HIGH
: LOW

C228

PHM_ON
R211
1K

FRC_H/W_OPT
R226
1K

1K

DVB_T2
R208
1K

50/60Hz LVDS

OPT_0 OPT_4
NO_FRC
U3_INTERNAL
U5_EXTERNALBOOT
reserved for FRC

+1.26V_VDDC

VDDC 1.26V

C4043

R216

3D_GPIO_2

E18

MODEL_OPT_0

100
OPT 100
OPT
0
3D_SG

FRC_HW_OPT

1000pF

R213

3D_GPIO_1

HIGH

NO FRC

OPT
C264

R204
R210

LOW

G19

MODEL_OPT_4

R203 RF_SW_OPT 100

RF_SWITCH_CTL

PIN NO.

C268
4.7uF

LNA2_CTL

PIN NAME
MODEL_OPT_0

MODEL_OPT_1

FHD
R206

1K

1K
IF_AGC_SEL

100/120Hz LVDS
R294
1K

OPT
R295

OPT
R214
OPT 100
R201
R202 BOOSTER_OPT
100

+1.26V_VDDC

VDD_RSDS:88mA
VDD_RSDS
OPT
L213
BLM18PG121SN1D

0.1uF

MODEL OPTION
MODEL OPTION

C4019

RSDS Power OPT

+3.3V_Normal

GP2R
MAIN2, HW OPT

20101023
2

EAN61829001

EAN61857101

FRC_DDR_1600_HYNIX

P7

FRC_DDR_1333_SS_NEW

R3

R3

B2

A12/BC

VDD_4
VDD_5
VDD_6

M7
A15

VDD_7
VDD_8

M2

Close to DDR Power Pin

BA0

N8

CS
ODT

N1
N9
R1
R9

VDD_3

A11

VDD_4

A12/BC

VDD_5

C1
C9
D2
E9
H2
H9

J9

M2
BA0

L1
L9
T7

N8
M3
J7

VDDQ_2

CK

VDDQ_3

CK

VDDQ_4

K7

CS

VDDQ_7

ODT

VDDQ_8

RAS
CAS

K1
J3
K3
L3

NC_1

T2
RESET

G8
J2
J8
M1

G3
C7

DQSU

P1
P9
T1
T9

VSS_3

E7

VSS_4

DML

VSS_5

DMU

VSS_6
DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4
DQL5

D8
E8
F9
G1
G9

AD4

C-TMRASB

F2
F8
H3
H8
G2
H7

FRC_DDR3_RASZ/DDR2_WEZ
FRC_DDR3_CASZ/DDR2_CKE

C-MCKB

C-TMODT

FRC_DDR3_RESETB/DDR2_A3

C-TMWEB
C-TMBA0

C-MBA0
22

FRC_DDR3_DQSL/DDR2_DQS0

C2P/LLV2P/BLUE[1]
C2M/LLV2N/BLUE[0]
C3P/LLV4P

AE9

C-TMDQSU

FRC_DDR3_DQSU/DDR2_DQS1

C3M/LLV4N

FRC_DDR3_DQSUB/DDR2_DQSB1

AF9

C-TMDQSUB
C-TMDQSL

C4P/LLV5P

C-MCASB
C-MWEB

22
R313

VCC1.5V_U3_DDR
R333
10K

C-MDQSL
C-MDQSLB

22
R314
C-TMDQSUB

C-MDML

C-TMDMU
22

AE5
AF12
AF5

C-TMDQL6

AE12

C-TMDQL7

C-MDQL7

C-TMDQL7

C-MDQL3

C-TMDQL3
C-TMDQL1
C-TMDML

C-MDML

C-MDMU
C-MDQL0

C-TMDQL0

C-MDQL1

C-MDQL2

C-TMDQL2

C-MDQL2

C-MDQL6

C-MDQL3

C-MDQL4

AF7

C-TMDQU1

AD11

C-TMDQU2

AD7
AD10

C-TMDQU4

C-MDQL0

C-TMDQL6

DCKM/TCON4

FRC_DDR3_DQL1/DDR2_DQ0

D0P/LLV6P

FRC_DDR3_DQL2/DDR2_DQ1

D0M/LLV6N

FRC_DDR3_DQL3/DDR2_DQ2

D1P/LLV7P

FRC_DDR3_DQL4/DDR2_DQ4

D1M/LLV7N

FRC_DDR3_DQL5/DDR2_NC

D2P/LLV8P

FRC_DDR3_DQL6/DDR2_DQ3

D2M/LLV8N
D3P/TCON3
D3M/TCON2

AE10

C-TMDQU0

C-TMDQU3

22
AR307

AE7

C-TMDQU5

AF10

C-TMDQU6

FRC_DDR3_DQU0/DDR2_DQ8

D4P/TCON1

FRC_DDR3_DQU1/DDR2_DQ14

C-TMDQU7

FRC_DDR3_DQU3/DDR2_DQ12
FRC_DDR3_DQU4/DDR2_DQ15
FRC_DDR3_DQU5/DDR2_DQ9

D7

VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6
DQU7

C3
C8
C2
A7
A2
B8
A3

C-MDQU0
C-MDQU1
C-MDQU2
C-MDQU3

C-MDQU7

VSSQ_7

DQU6

VSSQ_8

GPIO2/TCON7/LDE/GCLK4

FRC_SPI_CZ
FRC_GPIO1

J8

F7

M9

F2

P1

F8

P9

H3

T1

H8

T9

G2

VSSQ_9

C-TMDQU6

C-MDQU0

C-TMDQU0

V_SYNC

FRC_L/DIM
33
R332

FRC_GPIO8
FRC_DDR3_NC/DDR2_DQM0

22
AR309

R317
820

F2

T1

F8

T9

H3
H8

DQL6

G2
H7

B1
VSSQ_1
VSSQ_3
VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

Y19

C-TMDQU1

C-MDQU5

C-TMDQU5
C-TMDQU3

R317-*1
4.7K
S7M-PLUS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

C2

E2

A7

E8

A2

F9

B8

G1

A3

G9

VSSQ_8

NC_2
NC_4

DQSL

VSS_1
VSS_2
VSS_3

DML

VSS_4
VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

VSSQ_9

D1

C3

RXC4-

E2

C8

E8

C2
A7

F9
G1

A2

G9

B8
A3

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8
VSSQ_9

+3.3V_Normal

RXDCK+

AE19

RXDCK-

AD21

RXD0+

AE21

RXD0-

AF21

RXD1+

AD20

RXD1-

AE20

RXD2+

AF20

RXD2-

AF19

RXD3+

AD18

RXD4+

AF18

RXD4-

AB23
AC23
AC22

FRC_MODEL_OPT_0
FRC_MODEL_OPT_1
FRC_MODEL_OPT_2
2D/3D_CTL

(FRC_CONF0)
HIGH : I2C ADR = B8
LOW : I2C ADR = B4

(FRC_CONF1,FRC_PWM1, FRC_PWM0)
FRC_MODEL_OPT_1

3d5 : boot from internal SRAM


3d6 : boot from EEPROM
3d7 : boot form SPI flash

FRC_MODEL_OPT_2

RXD3-

AE18

<U3 CHIP Config>

FRC_MODEL_OPT_0

2D/3D_CTL

AA14
AC15

+3.3V_Normal

FRC_CONF0
FRC_CONF1
FRC_PWM1

AC16

FRC_PWM0

FRC_/SPI_CS
FRC_CONF0
R300
33
FRC_L/DIM

L/DIM_SCLK

FRC_CONF1

AC14

R348
33
FRC_L/DIM

FRC_SPI_SDO
L/DIM_MOSI

AA16
FRC_VSYNC_LIKE

FRC_SPI_CK

FRC_TESTPIN

FRC_SPI_DI

FRC_SPI_SCK

AA15

FRC_SPI_SDI
R326 22
R331 22

Y10
FRC_I2CS_DA

AA11

FRC_I2CS_CK
AB15
FRC_PWM0

AB14

R335
FRC_PWM0

FRC
FRC
22

I2C_SDA
I2C_SCL
FRC_SCL

OPT

FRC_PWM1
R334
OPT

22

FRC_SDA

+3.3V_Normal
+3.3V_Normal
S7M-PLUS_S_FLASH_2MBIT_WIN

R344
0

S7M-PLUS

3D_SYNC_RF
3D_SG

R329
10
FRC_/SPI_CS

FRC_SPI_SDO

R330
10

IC302
W25X20BVSNIG
CS

DO

$ 0.17

VCC

HOLD

S7M-PLUS
WP

GND

CLK

S7M-PLUS
R328
10

DIO

R327
10

FRC_SPI_SCK

S7M-PLUS

GP2R
FRC_DDR

C9
D2
E9
F1
H2
H9

J9
L1
L9
T7

B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
VSSQ_1

D7

D8

RXC4+

AF22

C1

DQL6

RXC3-

AE22

A8

VSS_12

RXC3+

AD22

R9

A9
DQSU

RXC2-

AF23

R1

NC_7

RXC2+

AF24

N9

J1
NC_1

RXC1-

AE24

N1

VDDQ_9

DQU7

C8

D8

C-TMDQU7

C-MDQU1

CS

DQL7

B9

VSSQ_2

DQU2

VDDQ_5

RXC1+

AF25

FRC_SPI1_DI

Y11

S7M-R

C-TMDQU4

FRC_SPI_DO

AE8

FRC_PWM1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

F7

VSS_12

DQU1

VDDQ_4

E3

P9

VSS_11

DQU0

VDDQ_3

DMU

P1

VSS_9

DQU7

C3

D1

D3

M9

VSS_10

D7

B9

CK

E7

M1

VSS_8

DQL5

VDDQ_2

DQSU

J8

VSS_7

DQL4

B7

J2

VSS_6

K8

A1
VDDQ_1

CK

C7

G8

VSS_5

K2

DQSL

E1

VSS_4

G7

BA1

NC_3

B3

VSS_3

D9

VDD_9

F3

VSS_2

DQL3

VDD_8
BA0

T7

A9

DQL2

VDD_7

RESET

G3

DQL1

VDD_6

T2

L9

NC_6

DQL0

VDD_5

WE

L1

VSS_1

E3

M1

VDD_4

RXC0-

AF26

Y16

C-TMDQU2

C-MDQU6

22

L3

J9

NC_2

DMU

D3

J2

VDD_3

A12

RXC0+

AE25

FRC_SPI1_CK

C-MDQU2

C-MDQU3

K3

AB16
C-TMDQL5

C-MDQU7

J3

J1

DML

A11

RXCCK-

AE26

GPIO3/TCON6/LCK/GCLK2

22

C-MDQU4

K1

H9

NC_4

E7

G8

C-TMDQL4

C-MDQL5

C-MDQU4
C-MDQU5
C-MDQU6

E1

VDD_2

L2

H2

NC_1

DQSU

VDD_1

A10/AP

RXCCK+

AE23

AB22
GPIO0/TCON15/HSYNC/VDD_ODD
GPIO1/TCON14/VSYNC/VDD_EVEN

FRC_DDR3_DQU6/DDR2_DQ10

R316

C-MDQL5
C-MDQL7

VDDQ_9

DQSU

B7

B3

FRC_DDR3_DQU2/DDR2_DQ13

FRC_DDR3_DQU7/DDR2_DQM1

AD8

VSSQ_6

DQU5

RXA4-

D4M/TCON0

22

C-MDQL4
C-MDQL6

AD12

C-TMDQL4
C-TMDQL5

C-MDMU

FRC_DDR3_DQL0/DDR2_DQ6

FRC_DDR3_DQL7/DDR2_DQ5

AD6

C-TMDQL3

R315

C-MDQL1

C-MDQSUB

AF11

C-TMDQL1

AD24

VSSQ_5

DQU4

A3

VSSQ_4

DQU3

B8

RXA4+

AD19
DCKP/TCON5

AE6

C-TMDQL2

AR306
C-MDQSU

FRC_DDR3_DMU/DDR2_DQ11

C-TMDQL0
C-TMDQSU

C-MDQSU

C-MRESETB

AF6

C-TMDMU

RXA3-

AD25

VDDQ_8

F1

C7

FRC_DDR3_DML/DDR2_DQ7

C-TMDQSLB

C-MDQSLB

AD26

VSSQ_3

DQU2

A2

VSSQ_2

DQU1

A7

RXA3+

AC24

DQU0

C2

VDDQ_7

DQSL

B2

A9

CKE

E9

DQL7

DQU7

RXA2+

C4M/LLV5N

AE11

C-TMDML

22
R312

C-MRASB

C0M/LLV0N/BLUE[4]

FRC_DDR3_DQSLB/DDR2_DQSB0

AD9

R311
C-MDQSL
C-MODT

CCKM/LLV3N

C1M/LLV1N/BLUE[2]

AF8

C-TMDQSLB

C-MWEB

C8

K9

DQSL

B1
VSSQ_1

C3

RXA2-

AB24

G3

H7

D7

RXA1-

AB25

T7

K7

D2

VDDQ_6

F3

A8

J7

C9

NC_3

VSS_12

DQL7

RXA0-

AB26

C1

VDDQ_5

RESET

DQL6

H7

RXA1+

AA24

AD23
CCKP/LLV3P
C0P/LLV0P/BLUE[5]

AE2

C-TMDQSL

C-MODT

DQL5

RXA0+

AA25

VSS_11

VDDQ_4

CAS

A7

FRC_DDR3_ODT/DDR2_BA1

C1P/LLV1P/BLUE[3]
C-TMCASB

C-MCASB

RXACK-

AA26

B4M/TCON8/BLUE[6]

FRC_DDR3_WEZ/DDR2_BA0

C-TMRESETB

AC25

AR308

VSSQ_1

VSSQ_9

E2

F7

DQL7

B1
D1

D3
E3

VSS_7

DQL6

B9

B7

DQSU

VSS_12

M9

AF4

C-TMCASB

22

DQSL

VSS_2

AD5

C-TMWEB

C-MDQSUB
F3
DQSL

B3M/TCON10/BLUE[8]

AR305

NC_3
NC_4

B3P/TCON11/BLUE[9]

22

C-MBA1
C-MBA2

K9

WE

A9
E1

C-TMCKE

C-MRASB

L2

VDDQ_6

VSS_1

C-TMODT

22

C-MCKE

VDDQ_5

FRC_DDR3_CKE/DDR2_RASZ

AE4

C-TMRASB

C-MCKE

CKE

NC_6

B3

22

C-MBA0

B2M/RLV8N/GREEN[2]

B4P/TCON9/BLUE[7]

C-TMCKB

C-MCKB

C-MCK

VDDQ_1

NC_2

C-TMCKB

R309

BA2

J1

AE13

22
R308

C-MA11

B2P/RLV8P/GREEN[3]
FRC_DDR3_MCLK/DDR2_MCLK

C-TMCK

C-MCK

C-MA10
C-MA12

B1M/RLV7N/GREEN[4]

FRC_DDR3_MCLKZ/DDR2_MCLKZ

AE14

C-TMCKE

R307

C-MA9

B1P/RLV7P/GREEN[5]

AD13

R310

VDDQ_9

F1

C-MA8

AD1

C-TMCK

22

M7

BA1
A1
A8

T3

C-TMRESETB

NC_5

VDD_8
VDD_9

N7

C-MA7

B0M/RLV6N/GREEN[6]

FRC_DDR3_BA1/DDR2_ODT

C-TMA7

C-MRESETB

C-MA6

C-TMBA2

FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA2/DDR2_A12

AF14

C-TMBA1

C-TMA5

C-MA7

C-MA5

C-TMA3

B0P/RLV6P/GREEN[7]

AF3

C-TMBA0

C-MA3

A13

VDD_6
VDD_7

R7

BCKM/TCON12/GREEN[0]

C-MA5

C-MA4

DQL4

G2

VSS_10

VDDQ_3

RAS

L8
ZQ

A6

BA2

A8

VDDQ_2

R323
1K

K8

A10/AP

L7

BCKP/TCON13/GREEN[1]

RXACK+

VSS_9

DQL3

H8

VSS_8

DQL2

F8

VSS_7

DQL1

H3
AC26

AR304

C-MA3

DQL0

F2

FRC_DDR3_A12/DDR2_A8

22

VSS_6

VDDQ_1

L1
L9

M3

A1

ODT

A5

R322
OPT1K

K2

VDD_2

A9

C-TMA11

C-TMA12

VSS_5

E3

RXB4-

Y24

VSS_4

DMU

RXB4+

A4M/RLV5N/GREEN[8]

N8

CS

A4

M2

FRC

G7

VDD_1

R3

A4P/RLV5P/GREEN[9]

FRC_DDR3_A11/DDR2_A4

DML

F7

R9

VDD_9

CK

H1
VREFDQ

A3

NC_5

BA1

CK

A2

M7

R1

VDD_8

R324
OPT 1K

D9

T8

FRC_DDR3_A10/DDR2_A11

RXB3-

Y25

N9

VDD_7

A1

NC_6

T3

N1

VDD_6

BA0

N7

VREFCA

A0

R318
FRC 1K

A8

R2

A3M/RLV4N/RED[0]

VDD_5

R320
FRC 1K
R321
1K

A7
B2

VCC1.5V_U3_DDR

A6

R8

FRC_DDR3_A9/DDR2_A9

RXB3+

Y26

VSS_2
VSS_3

RXB2-

W24

K8

VDD_4

R7

S7M-PLUS

ZQ
240
1%

P2

A3P/RLV4P/RED[1]

V24

VSS_1

DQSU

D3

A12/BC

L7

K2

VDD_3

R3

G7

VDD_2

A11

T8

D9

VDD_1

A10/AP

R319
OPT1K
R325
1K

A5

L8

P8

A2M/RLV2N/RED[4]

FRC_DDR3_A8/DDR2_A2

DQSU

E7

RXB2+

R2

S7M-R

R303

N2

FRC_DDR3_A7/DDR2_A5

B7

RXB1-

V25

J9

A9

RXB1+

V26

R8
B2

A9

T2

4.7K

A4

A2P/RLV2P/RED[5]

U24

ZQ

A8

WE

NC_6

C7

RXB0-

U25

L3

R350

A3

FRC_DDR3_A6/DDR2_A0

C-TMA1

C-MA2

150

VREFDQ

A1M/RLV1N/RED[6]

H9

DQSL

RXB0+

C-TMA12

C-MA11

AE16

A1P/RLV1P/RED[7]

FRC_DDR3_A5/DDR2_A10

K3

OPT

A2

H1

C-TMA10

C-MA1

C-MA1

AD15

C-TMA11

C-MA12

OPT
R306

C-MVREFDQ

P3

AD16

C-TMA10

AR303
C-MA10

A1

C-TMA9

22

C-MA0

AD2

A0M/RLV0N/RED[8]

FRC_DDR3_A4/DDR2_CASZ

J3

H2

R336
1K

C-TMBA1

AE15

FRC_DDR3_A3/DDR2_A1

DQSL

RXBCK-

U26

F1

L/DIM_EDGE_32/37

C-MBA1

C-TMA7
C-TMA8

A0P/RLV0P/RED[9]

K1

R337
1K

C-TMA4

AF2

ACKM/RLV3N/RED[2]

FRC_DDR3_A2/DDR2_A7

E9

P2

A7

L2

L/DIM_EDGE_42/47/55

C-TMA6

AF15

C-TMA6

FRC_DDR3_A1/DDR2_A6

D2

R340
LVDS_EXT_URSA5 1K
R338
OPT 1K

C-TMA8

C-MA4

P7

AD3

C-TMA5

C-MA6

FRC_DDR_1333_HYNIX

AD14

C-TMA4

C-MA8

IC301
H5TQ1G63DFR-H9C

AE3

C-TMA3

22
AR302

EAN61828901

AF1

F3

W25

C9

R339
1K

C-TMBA2

C-MBA2

A0

NC_2
NC_4

G3

K9

R341
1K

C-TMA2

CLose to Saturn7M IC

N3

NC_1
RESET

RXBCK+

P8

CKE

K7

C1

LVDS_S7M-PLUS

C-TMA1

ACKP/RLV3P/RED[3]

N2
L8

A6

J7

A8

OPT

C-TMA2
C-TMA0

AF16

FRC_DDR3_A0/DDR2_NC

N8

J1

T2

W26

AE1

C-TMA0

R9

P3

H1
VREFDQ

A5

M2

R342
1K

C-TMA9

P7

A4

NC_5

R1

OPT

1000pF

0.1uF
C314

AR301

N9

VDDQ_9

NC_3

C-MA9

A3

M8

N3

A2

M7

R349
S7M-PLUS 10K

R304

1K 1%
1%

R305

1K

C312

0.1uF

1000pF

C304

C302

R301

1K 1%
1%

R302

1K

IC101
LGE107DC-RP [S7M+ DIVX/MS10]

C-MA0

VREFCA

VDDQ_8

CAS

L3

VDDQ_7

RAS

K3

VDDQ_6

WE

C-MA2

C-MVREFCA

VDDQ_4

L2
J3

M8

VDDQ_3
VDDQ_5

K1

CLose to DDR3

VDDQ_2

CKE

C-MVREFCA

N1

A1
VDDQ_1

CK

K9

C-MVREFDQ

T3

K8

FRC_DDR_1333_NANYA_NEW

VREFCA

A1

BA2

CK

K7

S7M-PLUS_DivX_MS10

K2

M3

J7

VCC1.5V_U3_DDR

N7

VDD_9

BA2

VCC1.5V_U3_DDR

R7

G7

BA1

M3

M8
A0

A13

L7

D9

R343
1K

OPT

C325
0.1uF
16V

VDD_3

A13
C324
10uF
10V

VDD_2

A11

N7

VDD_1

A10/AP

T3

0.1uF

0.1uF

C323

0.1uF

C322

0.1uF

C321

0.1uF

C320

0.1uF

C319

0.1uF

C318

0.1uF

C317

0.1uF
C316

0.1uF
C315

0.1uF

C313

0.1uF

C311

0.1uF

C310

0.1uF

C309

0.1uF

C308

0.1uF

C307

0.1uF

C306

0.1uF

C305

T8

A9

L7

L301

R2

A8

R7

C303

L8
ZQ

A7

T8

10uF

R8

A6

R2

C301

P2

A5

R8

+1.5V_FRC_DDR

P8

VREFDQ

A4

P2

VCC1.5V_U3_DDR

N2

H1

A3

P8

DDR3 1.5V By CAP - Place these Caps near Memory

P3

A2

N2

VCC1.5V_U3_DDR

P7

VREFCA

A1

P3

IC301-*4
NT5CB64M16DP-CF

N3

M8

N3
A0

EAN61857201

IC301-*3
K4B1G1646G-BCH9

IC301-*2
H5TQ1G63DFR-PBC

FRC_SPI_SDI

20101023
3

B9
D1
D8
E2
E8
F9
G1
G9

ST_3.5V--> 3.375V --> 3.46V


20V-->3.51V --> 3.76V (3.59V)

L407-*1
CIS21J121

GND

GND

GND

3.5V

10

C418
0.1uF
50V

3.5V

3.5V

11

12

13

14

GND

15

16

GND/V-sync

GND

R450
0

PD_+12V
1%

R448
2.7K
C412
0.1uF
16V
PD_+12V

POWER_+24V

1%

R482
8.2K

PD_+12V
R480
100

RESET

1
GND

PD_+12V_PWR_DET_ON_SEMI

Power_DET
S7M DDR 1.5V
10K
R464

C461
10uF
10V

10
IC407
TPS54319TRE
9

PH_2

GND_2

PH_1

+3.3V_Normal
100

POWER_24_ERROR_OUT

C472
22uF
10V

C465

L416

C470
0.1uF
16V

C476
22uF
10V

0.01uF
50V

R1

R452
1/16W 330K 5%

LX_2

1/16W

ERROR_OUT

L424
CIC21J501NE

5%

3A

FB

1%

R460
27K

LX_1

POWER_ON/OFF2_2

EN

R456
10K

C459
10uF
25V

COMP
12K
R454

C469
22uF
16V

R1

C485
0.1uF
16V

C473
0.1uF
16V

OPT
C423
100pF
50V

2200pF
C464

C463
100pF
50V

C467
4700pF

R455
15K

R2

Vout=(1+R1/R2)*0.8

50V

R2

100

R420

C457
10uF
25V

NR8040T3R6N

SS/TR

OPT

R486
4.7K

POWER_20_ERROR_OUT
R437

13

GND_1

C468
0.1uF
16V

R606-*1
1K
PWM_PULL-DOWN_1K

11

THERMAL
17

C492
0.1uF
AGND
16V

L423
3.6uH

PH_3

AGND

R471 0
PWM_PULL-DOWN_3.9K
POWER_22_PWM_DIM
R606
3.9K
C416
OPT
0.1uF
16V

12

PWM_DIM

NR8040T3R6N
VIN

VIN_2

14

VIN_1

R484
0

16V

A_DIM

POWER_20_A_DIM
0
POWER_20_PWM_DIM R453
POWER_24_PWM_DIM
R472 0

PGND

R461
4.7K

L420

+1.5V_DDR

1934 mA
L421
3.6uH

R462
10K

POWER_22_A_DIM
R485
0

C462
0.1uF

BOOT

R427
10K
OPT

POWER_18_A_DIM
0
R451

IC405
AOZ1073AIL-3

0.1uF
16V

+3.5V_ST

PWRGD

Q405
2SC3052

+3.3V_Normal

+12V/+15V
C475

INV_CTL

OPT

R421
10K

COMP

RT/CLK

C
R418
POWER_24_INV_CTL
6.8K

+3.3V_Normal

1074 mA

POWER_ON/OFF1

OPT

R425
100

R457

R426
10K

EN

POWER_24_GND
R475
0

SLIM_32~52
P401
SMAW200-H24S2

+3.5V_ST

R419
1K

POWER_18_INV_CTL
R415
100

VIN_3

25

R476
0

L402-*1
CIS21J121

VCC

+3.3V_Normal

15

C407
0.1uF
16V
OPT

C404
0.1uF
16V

POWER_23_GND

C402
100uF
16V

NCP803SN293

R407
2.2K
OPT

PD_+12V

Err OUT

24

OPT

VSENSE

23

C474
0.1uF

100K
IC409

1%

P.DIM1

GND/P.DIM2

POWER_DET

PWR_DET_ON_SEMI

A.DIM

22

R402
100

RESET

1%

INV ON

20

R405
2.2K

C455
0.1uF
16V

EP[GND]

18

21

Q407
2SC3052

R435
22K

Q406
2SC3052

16

17
19

12V

POWER_+24V

R404

+24V

1:AK10

12V

C451
0.1uF
50V
1608
OPT

R429
47K
B

PANEL_CTL

12V
+12V/+15V
L402
MLB-201209-0120P-N2

OPT
R430
10K

C426
68uF
35V

3.5V

GND

C408
0.1uF
16V
OPT

R412

C406
0.1uF
16V

POWER_16_GND

C401
100uF
16V

GND

1%

24V
24V

L404
MLB-201209-0120P-N2

R440
5.6K

L407
MLB-201209-0120P-N2

3
1

+24V

R403
1.5K

2
4

PWR ON 1
24V
3
GND

+3.5V_ST

S
NORMAL_32
P404
FM20020-24

R431
22K

L404-*1
CIS21J121

R439
33K

NORMAL_EXPEPT_32
P403
FW20020-24S

2
Q401
2SC3052

C411
0.1uF
16V

PANEL_VCC
C443
10uF
25V

47K 1%

R401
10K

RL_ON

IC408
NCP803SN293
VCC

Q409
AO3407A

Q402

R407-*1
3K

PANEL_DISCHARGE_RES
PANEL_DISCHARGE_RES

New item

1/10W
1%
PD_+12V

C442
10uF
16V
OPT

C438
0.1uF
16V

RT1P141C-T112

R406
4.7K

+3.5V_ST
R488
100K
OPT
R463
10K

L412

R405-*1
3K

0.01uF
C409
C436
0.015uF
0.01uF
50V
25V

+3.5V_ST -> 3.375V

+3.5V_ST

12V -->3.58V --> 3.82V (3.68V)


18.5V-->3.5V --> 3.75V (3.59V)

0.015uF
+3.5V_ST

+12V/+15V

24V-->3.78V --> 3.92V (3.79V)

R447
1.21K

FROM LIPS & POWER B/D

PANEL_POWER

PD_+3.5V
5%

+12V/+15V

R449
56K
1/16W

1%
3A $ 0.145
Vout=0.827*(1+R1/R2)=1.521V

<MODULE PIN MAP>

INV_ON

A-DIM

INV_ON

20

VBR-A

NC

V_SYNC

TP5304

INV_ON

TP5303

SCAN_BLK2

INV_ON

+2.5V/+1.8V

SCAN_BLK1/OPC_OUT

TP5305

+3.3V_Normal
52/60:ERROR

Err_out

26/32HD:NC

TP5306

Err_out

OPC_OUT

IC402

PGND

23

C490
0.1uF
AGND
16V

Err_out INV_ON PWM_DIM


GND

GND

VOUT

1 Vd=550mV3

300 mA

GND

GND

VIN

NC

60:NC
26/32/52:GND
60:PWM

PWM_DIM

C432
0.1uF
16V

GND

<LED MODULE PIN MAP -> latest update 20100618>


32LE5300-TA
CMO10"LED

(PSU)
NC

32LE4500-TA
AUO 10"LED

INV
#11
#12
#13
#14

(PSU)

NC

NC

16

NC

18

INV_ON

INV_ON INV_ON

INV_ON

20

NC

err_out err_out
--> NC --> NC

PWM_DIM

24

err_out
--> NC PWM_DIM PWM_DIM

23

NC

NC

NC

NC

2A

LX_1

POWER_ON/OFF2_2

EN

FB

COMP
12K
R458

<-->
<-->
<-->
<-->
<-->

R1

C471
22uF
16V

C477
0.1uF
16V

OPT
C427
100pF
50V

2200pF
C466

Vout=0.8*(1+R1/R2)

MAIN
#24
#18
#20
#22

NC

22

C440
0.1uF
16V

<Module Inv to Main Pin Connection>

32LE5300-TA
LGD 10"LED

(PSU)

L422
3.6uH

LX_2

GND
C403
10uF
10V

PIN No LGD LPB/


OS LPB

R459
10K

C460
10uF
25V

C458
10uF
25V

NC

R473

24

PWM_DIM PWM_DIM

NR8040T3R6N
VIN

+2.5V_Normal

AZ2940D-2.5TRE1

26/32/52:PWM

22

MAX 1A

IC406
AOZ1072AI-3

1%

18

GND

R465
24K

GND

1%

GND

+12V/+15V

R466
51K

GND

16

+5V_Normal

OLP

TP5302

1%

GND

IPS-@
(PSU)

SHARP
(PSU)

AUO 10"Lamp

R467
10K

(PSU)

CMO10"Lamp

L417

LGD(PSU)
or LIPS

(PSU)

PIN No

R2

+5V_TUNER
IC410
AP1117EG-13

PWM_DIM

IN

NC

OUT

IN

ADJ/GND

err_out
--> NC

S7M core 1.26V volt

NC

C491
0.1uF
50V

IC411
AP1117EG-13

+5V_Normal

110
R417

330
R411

C414
0.1uF
16V

R424
1
5%
C422
0.1uF
50V

C415
10uF
10V

330
R409

110
R408

C417
0.1uF
16V

10K
R445

POWER_ON/OFF2_1

OUT

ADJ/GND

R422
1
5%

LGD edge led error-out use or not? checking is necessary...

C419
10uF
10V

C447
0.1uF
16V

+3.5V_ST

2200pF
C413

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

BOOT

0.01uF
50V
R432
1/16W 330K 5%

1/16W

5%

R1

50V
100pF
C439

OPT

C435
4.7uF
10V

4.7uF
OPT

C456
22uF
10V

C445

C453
22uF
10V

C488

SS

R443
FRC 10K

PH_1

IC403
10
SN1007054RTER
9

R442

GND_2

C448
3300pF
50V

R2

POWER_ON/OFF2_1

R2

4A
Vout=(1+R1/R2)*0.8

13

14

PWRGD

EN

VIN_3

GND_1

R436
7.5K
R423
10K

12K
R413

R1

C428
0.1uF
16V
OPT

+1.5V_FRC_DDR
Q408
AO3438
FRC

C444
0.1uF
16V

$ 0.165

Vout=0.8*(1+R1/R2)=1.29V

R441
75K
1/8W
1%

OPT

COMP

C424
0.1uF
16V

+1.5V_DDR

NR8040T3R6N

R434
120K

C420
22uF
16V

PH_2

22K 1% 24K 1%

OPT
C429
100pF
50V

11

R444

R410
10K
FB

1%

POWER_ON/OFF2_1

VIN_2
C431
0.1uF
16V

EN

C430
10uF
10V

L415
3.6uH

PH_3

THERMAL
17

RT/CLK

R414
51K

3A

1%

C410
10uF
25V

R416
1.5K

C405
10uF
25V

1%

C489
0.1uF
16V AGND

LX_1

16V

12

NR8040T3R6N
VIN

15

VIN_1

L406
3.6uH

LX_2

COMP

VSENSE

L413

PGND

2000 mA

AGND

L401

IC401
AOZ1073AIL-3

C421,C422 Close to LDO

+1.26V_VDDC
C441
0.1uF

EP[GND]

+12V/+15V

16

+5V_USB

+5V_USB

+1.5V_DDR_FRC
GP2R
POWER_LARGE

20101023
4

FLMD0

CRYSTAL_KDS
X1002-*1

15pF
X1002
32.768KHz

CRYSTAL_EPSON
R1034

NEW_SUB
R4035
4.7K

4.7M
CRYSTAL_KDS

P124/XT2/EXCLKS

RESET

P40

P41

P120/INTP0/EXLVI

42

41

40

39

38

37

MICOM_DEBUG
R1081
22

P60/SCL0

36

P140/PCL/INTP6

R1048

22

22

P61/SDA0

35

P00/TI000

R1049

22

34

P01/TI010/TO00

OPT
R1050
10K

33

P130

R1090

32

P20/ANI0

R1055

22

31

ANI1/P21

R1056

22

30

ANI2/P22

R1057

22

29

ANI3/P23

P62/EXSCL0

P63

P33/TI51/TO51/INTP4

P75

P74

+3.5V_ST
10K

P73/KR3

NEC_EEPROM_SCL

NEC_ISP_Tx

OPT
10K

OPT
R1084

NEC_ISP_Rx

OPT
R1073

10K
10K

NEC_EEPROM_SDA
R1020

CEC_REMOTE_NEC
R1065

OCD1A

22

POWER_ON/OFF2_1

OPT
R1005

10K

OCD1B

AMP_MUTE
R1066
AMP_RESET
(MODEL_OPT_0)

22

IC1002
uPD78F0514
NEC_MICOM

22

25

ANI7/P27

0.1uF

C1002

GND

R1008

SDA

NEC_EEPROM_SDA
22

EEPROM_NEC_16KBIT_ATMEL
EEPROM_NEC_16KBIT_STM

22

B/L_LED
R1071
10K

R1069

AMP_RESET

PWM_BUZZ/IIC_LED
R1009
10K

GP2
R1079
10K

TOUCH_KEY
R1075
10K

+3.5V_ST

MICOM MODEL OPTION

MODEL_OPT_0

PANEL_CTL

+3.5V_ST

C1009 1uF

TP1003

P12/SO10

SDA

P13/TXD6

KEY2
KEY1

+3.5V_ST

22

R1068

VSS

SCL

AVSS

AVREF

NEC_EEPROM_SCL
22

P14/RXD6

R1080

P15/TOH0

TP1002

WP

P10/SCK10/TXD0

22

P17/TI50/TO50

SCL

NC_3

SIDE_HP_MUTE

VCC

P30/INTP1

WC

OLP

R1041

P31/INTP2/OCD1A

R1015 2.7K

NC/E2

R1014 2.7K

R1001
47K
TP1001

NC/E1

NC_2

P11/SL10/RXD0

22

VCC

R1037

P16/TOH1/INTP5

NC_1
1

19-22_LAMP

24

13

IC1001
M24C16-WMN6T

23

12

OCD1B

22

IC1001-*1
AT24C16BN-SH-B

MODEL1_OPT_2

ANI6/P26

21

26
20

11
19

P70/KR0

22

PANEL_CTL
(MODEL_OPT_1)

CEC_ON/OFF
(MODEL_OPT_3)

10K

18

22

R1052

17

R1054

ANI5/P25

16

ANI4/P24

27

15

28

10

14

P32/INTP3/OCD1B

R1063

+3.5V_ST

SCART1_MUTE

POWER_ON/OFF1

P72/KR2

22

INV_CTL

EEPROM for Micom

RL_ON

OPT

P71/KR1

R1023

SOC_RESET

NC/E0

Q1001
2SC3052
E

22

R1019

NEC_SCL
NEC_SDA

R1072

EDID_WP
C
B

R1018

NEC CONFIGURATION

OPT
R1006

20K

1/16W
1%

FLMD0

MICOM_DEBUG
R1002 10K

+3.5V_ST

R1039

0.1uF

OCD1B

MICOM_DEBUG
R1013
22

11

R1047

10

C1003
0.1uF

OCD1A

TOP SIDE for reset.

1/16W
1%

P123/XT1

43

TP1601
C1010
0.1uF
TP1602

R1089
20K

FLMD0

44

12

NEC_ISP_Rx

MICOM_DEBUG
R1010
22

47K

P122/X2/EXCLK/OCD0B

45

13

NEC_ISP_Tx

MICOM_DEBUG
R1078
22

+3.5V_ST

C1006

MICOM_RESET

MICOM_DEBUG
R1076
22

R1046

P121/X1/OCD0A

NEW_SUB

22

REGC
46

+3.5V_ST

R1060

VSS
47

+3.5V_ST

12505WS-12A00

22

VDD
48

GND

for Debugger
P1001

NEW_SUB
22
R1043

+3.5V_ST

R1091 10K

MICOM_DEBUG_WAFER

+3.5V_ST

NEW_SUB
R4034
4.7K

MICOM_RESET

C1008

15pF
C1007

10K
R1030

S/T_SDA

S/T_SCL

32.768KHz

R1083

MODEL_OPT_1

10K
OPT

MODEL1_OPT_2
CEC_ON/OFF

S7_NEC_RXD

S7_NEC_TXD

POWER_ON/OFF2_2

NEC_ISP_Tx

LED_R/BUZZ

NEC_ISP_Rx

IR

POWER_DET

LED_B/LG_LOGO

OCD1A

B/L_LAMP
R1012
10K

PWM_LED
R1004
10K

TACT_KEY
R1011
10K

GP3
R1074
10K

MODEL_OPT_3

2010Y,GP2

2011Y,GP2R, 101125 Update


MODEL OPTION

MODEL OPTION
MODEL_OPT_0
PIN NAME

PIN NO.

HIGH

LOW
MODEL_OPT_0

B/L_LED

11

MODEL_OPT_2

30

PWM_BUZZ/IIC_LED

LOW

LOW

MODEL_OPT_3
LOW

B/L_LAMP
LOW

MODEL_OPT_1

MODEL_OPT_1 MODEL_OPT_2

LOW

PWM_LED

LOW

LOW

HIGH

31

GP2

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

LOW

LOW

LOW

TBD
IIC LED(09Y IIC Protocol) & No BUZZ

HIGH

LOW

TBD
S/T & IIC LED & No Buzz & LED Blink

GP3

MODEL_OPT_3

11
30
31

B/L_LED
PWM_BUZZ/IIC_LED
TOUCH_KEY
GPIO_LED

LOW

MODEL_OPT_2

LOW

LOW

LOW

LD350/450/550
PWM LED & No Buzz & No LED Blink

LOW

HIGH

LOW

19/22/26LE5300/5300
IIC LED & PWM IIC BUZZ

HIGH

HIGH

LOW

LOW

MODEL_OPT_2

HIGH

MODEL_OPT_1

HIGH

MODEL_OPT_1

TACT_KEY

PWM_BUZZ/IIC_LED :Using IIC for LED Breathing & PWM Buzz


PWM_LED : Using PWM Signal for LED Lighting

HIGH

Low

MODEL_OPT_3

HIGH

LV25/LV35/LV45/LW45/LV55/LK45/LK55
S/T & IIC LED & NO BUZZ & LED Blink

MODEL_OPT_0

PIN NO.

LOW
HIGH

PIN NAME

HIGH

TOUCH_KEY

LOW : LED
HIGH : LAMP

MODEL_OPT_3

MODEL_OPT_0

Description
LK330/LK430 for KR/US
10Y EYE-Q Sensor
KEY & PWM LED & No Buzz & No LED Blink
LK330/LK430/LK530
KEY & PWM LED & No Buzz & No LED Blink

HIGH

LOW

LOW

LD420
IIC LED(09Y IIC Protocol) & No BUZZ

HIGH

LOW

LOW

HIGH

LE7300
GPIO LED & NO BUZZ

B/L_LAMP
PWM_LED
TACT_KEY

32/37/42/47/55LE5300
IIC LED & PWM BUZZ

NON_GPIO_LED

PWM_BUZZ/IIC_LED : For model that use LED Lighting used IIC


PWM_LED : For model that use LED Lighting used PWM Signal

GP2R
MICOM Rev.4

20101125
5

CONTROL
IR & LED

+3.5V_ST

R2404
10K
1%

EYEQ/TOUCH_KEY
R2411
100

R2405
10K
1%

EYEQ/TOUCH_KEY

OLD_SUB

NEC_EEPROM_SCL

NEW_SUB

P2401
C2408
18pF
50V
OPT

L2401
BLM18PG121SN1D

R2401
100

12507WR-15L

5.6V
D2403
1

KEY1

C2401
0.1uF

R2412

C2402
0.1uF

EYEQ/TOUCH_KEY

NEC_EEPROM_SDA

D2402
5.6V
AMOTECH

KEY2

EYEQ/TOUCH_KEY
100

L2402
BLM18PG121SN1D

R2402
100

P2402

12507WR-12L

C2409
18pF
50V
OPT

5.6V
D2404
3

JP2407

JP2408

JP2409

JP2410

D2401
5.6V
AMOTECH

10

10

11

11

+3.5V_ST
+3.5V_ST
L2403
BLM18PG121SN1D
+3.5V_ST

R2425
47K
OPT

R2428
22
IR

Q2406
2SC3052
OPT

R2430
10K

+3.5V_ST

R2429
47K
OPT

B
E

OPT

R2431
47K

C2403
0.1uF
16V

C2404
1000pF
50V

R2413
LED_B/LG_LOGO

1.5K
OPT
C2410
0.1uF
16V

R2426
47K

B
Q2405
2SC3052
OPT

OPT

C2407
100pF
50V

+3.3V_Normal

D2405
5.6V

L2404
BLM18PG121SN1D
JP2411

R2427
0
R2414
C2405
0.1uF
16V

LED_R/BUZZ
C2406
1000pF
50V

1.5K

12
OPT
R2416
10K

12
13

13

14

15
16

S/T_SCL

NEW_SUB
C906
18pF
50V
OPT

D902
CDS3C05HDMI1
5.6V

S/T_SDA

C907
18pF
50V
OPT

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

NEW_SUB
D903
CDS3C05HDMI1
5.6V

GP2R
IR/CONTROL-L

20101023
6

USB_DIODES
EAN61849601

IC1450
AP2191DSG

L1451-*1
CIS21J121
NC
L1451
MLB-201209-0120P-N2

OUT_2

8
$0.077
7

GND

+5V_USB

IN_1

120-ohm

22uF
16V

FLG

C1453
0.1uF
+3.3V_Normal

EN

SIGN6409

R1455
4.7K
OPT

USB1_CTL

R1451

47

USB1_OCD

1
2

SIDE_USB_DM

1
2
3

C1452
10uF
10V

IN_2

C1451

JK1450

4
5

OUT_1

R1454
10K

USB DOWN STREAM

USB DOWN STREAM

3AU04S-345-ZC-H-LG

JK1450-*1

USB_JACK

R1459
2K
1/8W
1%

SIDE_USB_DP

USB_JACK_LV3400

3AU04S-305-ZC-(LG)

R1458
2K
1/8W
1%

D1451
RCLAMP0502BA
OPT

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

GP2R
USB_OCP_DIODE

20101023
7

HDMI EEPROM

A1

A2

5V_HDMI_1 +5V_Normal

ENKMC2838-T112
D821
HDMI_1_RENESAS

A0

SHIELD

R830
A1

3.3K

A0

VCC

$0.055

WP

A1

SCL

A2

WP

C802
0.1uF
16V

A2

C806

R884

R888

0.1uF

1.8K

VCC

EDID_WP

AT24C02BN-SH-T

HPD1
10K

1K
R804

18

Q802
2SC3052

R896
20
19

HDMI_1_ATMEL
IC801

IC801-*1
R1EX24002ASAS0A

2.7K

2.7K

SCL

R802

R876
VSS

DDC_SDA_1

SDA

GND

DDC_SCL_1

22

R875

17

10K

5V_DET_HDMI_1

R874

HDMI_1

5V_HDMI_1

22

SDA

16

DDC_SDA_1

DDC_SCL_1
15
R824

5V_HDMI_2 +5V_Normal

HDMI_CEC

13
12

9
8
7
6
5
4
3
2

HDMI_2_RENESAS

D0+_HDMI1

D1-

HDMI_2_ATMEL
IC802

IC802-*1
R1EX24002ASAS0A

D0-_HDMI1

D0_GND
D0+

CK+_HDMI1

D0-

A0

AT24C02BN-SH-T

VCC

A0

WP

A1

D1-_HDMI1

D1_GND

VCC

$0.055
2

C807

A2
D2-_HDMI1

SCL

A2

R889

2.7K

2.7K

WP

D1+_HDMI1

D2-

R885

0.1uF

A1

D1+

EDID_WP

JP810

SCL

DDC_SCL_2
R878

VSS
D2+

SDA

GND

D2+_HDMI1

22

R877

D2_GND

22

SDA

DDC_SDA_2

OPT
D802

ENKMC2838-T112
D822

CK+

10K

11
10

A1

A2

CK-_HDMI1

R873

HDMI_1

EAG59023302

14

JK802

HDMI_2

SIDE_HDMI
5V_HDMI_2

5V_HDMI_4 +5V_Normal

5V_DET_HDMI_2
5V_HDMI_4

1.8K

17

JP805
DDC_SDA_4

14

6
5
4
3
2

11
10
9
8

D0+_HDMI2

D1-_HDMI2

D1-

D1_GND

D1+

D1+_HDMI2

D2-_HDMI2

D2-

D2_GND

D2+

D2+_HDMI2

JK801

C
10K

EDID_WP
VCC

$0.055

WP

A1

SCL

A2

WP

C809

R887

R891

2.7K

2.7K

JP812

SCL

DDC_SCL_4
R881 22

0
HDMI_CEC

VSS

SDA

GND

SDA
DDC_SDA_4

CK-_HDMI4

12

D0_GND
D0+

0.1uF
A2

R841

13

OPT
D801

D0-_HDMI2

R882 22

CK+
CK+_HDMI4
D0D0-_HDMI4
D0_GND
D0+
D0+_HDMI4

+3.3V_Normal

D1D1-_HDMI4

68K

D1_GND
D1+
D1+_HDMI4

R854

For CEC

D2D2-_HDMI4
D2_GND

R855
0

R856
10K

OPT

R857
68K
OPT

D2+
D2+_HDMI4
S
B
D

CK+_HDMI2

D0-

A0

JK803

CK-_HDMI2
12

OPT
D811

13

CK+

JP806

HDMI_CEC
EAG62611201

HDMI_SIDE

HDMI_2

EAG59023302

R815

AT24C02BN-SH-T

VCC

DDC_SCL_4
15

14

A1

16
DDC_SCL_2

15

10K

HDMI_SIDE_ATMEL
IC804

IC804-*1
R1EX24002ASAS0A
A0

DDC_SDA_2
16

11
10

HPD4

C803
0.1uF
16V

R837

18

HDMI_SIDE_RENESAS

R862

1K
19

R871

20

3.3K

17

R801

1.8K

Q803
2SC3052

R897

E
C801
0.1uF
16V

R803

18

BODY_SHIELD
HPD2

D804

1K
19

ENKMC2838-T112
D824

R828
10K

D803
AVRL161A1R1NT

20

3.3K

Q801
2SC3052

R895

R835

C
SHIELD

A1

A2

5V_DET_HDMI_4

CEC_REMOTE_S7

Q806
BSS83

OPT
C805
0.1uF
16V
GND

GND

CEC_ON/OFF
68K

+3.5V_ST

D825

R892
R883
0

R893
10K

OPT

R853
68K

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

D826
AVRL161A1R1NT

S
B
D

HDMI_CEC
CEC_REMOTE_NEC

Q805
BSS83

OPT

C810
0.1uF
16V

GND

GND

GP2R
HDMI

20101023
8

RGB/SPDIF/PC/HP
New Item Development
EARPHONE BLOCK
HP_LOUT

HEAD_PHONE
C
Q1101
MMBT3904-(F)

E
B
B

MMBT3904-(F)
Q1104

JK3301
KJA-PH-0-0177

+3.3V_Normal
GND

HP_ROUT

HP_DET
C

C1119
10uF
16V

C1116
1000pF
50V
OPT

C
R1128
1K

Q1102
MMBT3904-(F)

E
B
B

MMBT3904-(F)
Q1103

+3.5V_ST

B
R1129
3.3K

C
E

SIDE_HP_MUTE

Q1106
2SC3052

RGB PC

PC AUDIO

+3.3V_Normal

5.15 Mstar Circuit Application

PEJ027-01
3

+5V_Normal
D1115
ENKMC2838-T112
A1

SPDIF OPTIC JACK

JK1102

C
A2

E_SPRING

T_SPRING

C1107
100pF
50V

VCC
R1110
10K
VINPUT

SPDIF_OUT
7B
6B

R1108
15K

B_TERMINAL2

C1131
PC_L_IN

T_TERMINAL2

D1102
AMOTECH
5.6V
OPT

C1108
100pF
50V

R_SPRING

002:S12

R1103
470K
R1111
10K

002:S12

002:T18

0.1uF
16V

C1121
100pF
50V

RGB_EEMPROM_ATMEL
IC1105

RGB_EEMPROM_RENESAS

A0
A0

WP

EDID_WP
SCL

RGB_DDC_SCL

SCL
GND

VSS

C1129
0.1uF
16V

R1142
10K

VCC

WP
A2

A2

VCC
A1

A1

R1140
2.2K

R1139
2.2K

AT24C02BN-SH-T

IC1105-*1
R1EX24002ASAS0A

R1107
15K
R1102
470K

JST1223-001
JK1103

GND
PC_R_IN
D1101
AMOTECH
5.6V
OPT

B_TERMINAL1

7A

Fiber Optic

6A

T_TERMINAL1

FIX_POLE

002:V7

DETECT

R1155
1K

Q1105
ISA1530AC1

R1125
1K

C1115
1000pF
50V
OPT

R1130
10K

C1118
10uF
16V

002:V7

SDA

RGB_DDC_SDA

SDA

C1127
18pF
50V

R1141
22

C1128
18pF
50V

R1143
22

DSUB_VSYNC

DSUB_HSYNC
C1122
68pF
50V
OPT

C1126
68pF
50V
OPT

D1109
30V

D1113

D1116

D1114

5.6V
OPT

5.6V
OPT

30V

DSUB_B+
R1133
75

D1110
30V

DSUB_G+
R1135
75

D1111
30V
+3.3V_Normal

R1146
10K
DSUB_DET
R1147
1K

DSUB_R+
R1137
75

D1112
30V

D1117
5.6V

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

RGB/SPDIF/HP

16

SHILED

DDC_GND

DDC_CLOCK

SYNC_GND

15

GP2R

V_SYNC

GND_1

10

BLUE

H_SYNC

NC

14
4

GREEN

BLUE_GND

13
8
3

GREEN_GND

RED

DDC_DATA

12
7
2

GND_2

11
6
1

SPG09-DB-010

JK1104

RED_GND

OPT

20101023
9

RS232C
10
5
9
4
8

R1123
100

JP1121

R1124
100

JP1122

+3.5V_ST

7
2

D1107
CDS3C30GTH
30V
OPT

D1108
CDS3C30GTH
30V
OPT

C1101 0.33uF

SPG09-DB-009
IC1101

C1+
C1102
0.1uF
C1103
0.1uF

V+

C1-

C2+
C1104
0.1uF

C2-

VC1105
0.1uF

DOUT2

16

15

14

13

12

11

10

JK1101

C1106
0.1uF

MAX3232CDR

VCC

GND

DOUT1

RIN1

ROUT1
S7_NEC_RXD
DIN1

DIN2
S7_NEC_TXD

RIN2

ROUT2

EAN41348201

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

GP2R
RS232C_9PIN

20101023
10

[51Pin LVDS Connector]


(For FHD 60/120Hz)
PANEL_VCC

[41Pin LVDS Connector]


(For FHD 120Hz)

L702
120-ohm
WAFER_FHD

P705

P704

P703

FF10001-30

FI-RE41S-HF-J-R1500

FI-RE51S-HF-J-R1500
WAFER_FHD

C709
1000pF
50V
OPT

C700
10uF
16V
OPT

HD

WAFER_FHD_120HZ

C710
0.1uF
16V
WAFER_FHD

[30Pin LVDS Connector]


(For HD 60Hz_Normal)

OPT
2

RXD4+

RXD3-

RXD3+

RXDCK-

RXDCK+

10

10

3
RXD44

0 R713
TP721

PWM_DIM

TP722

OPC_OUT

5
6

RXA3-

RXA3+

8
9

RXACK-

10

RXACK+

11

11

RXA4-

11

RXD2-

12

RXA4+

12

RXD2+

13

RXA3-

13

RXD1-

12

14

16

RXACK-

17

RXD1+
RXD0-

16

RXA3+

15

RXD0+

15

RXACK+

RXA1-

16

RXA1+

17

17

RXA2-

19

RXA2+

20

RXC3-

22

R712

RXC4+

21

RXA0+

RXC4-

20

RXA0-

19

19

LVDS_SEL
+3.3V_Normal

18

18

18

RXA2+

14

15

14

RXA2-

13

RXC3+

RXA1-

21

RXA1+

22

23

RXA0RXA0+

21

23

24

BIT_SEL

24
25

25
26

R711
10K
OPT

22
23

PANEL_VCC
24
RXCCKL701

25
RXCCK+

120-ohm
26

26

R709
10K
BIT_SEL_LOW

3.3K
OPT

20

HD

27

27

RXC2-

RXB4+

28

RXC2+

RXB3-

29

RXC1-

RXB3+

30

RXC1+

31

RXC0RXC0+

27

RXB4-

28
29
30
31
32

RXBCK-

32

33

RXBCK+

28
29

C701
10uF
16V
OPT

OPT
C702
1000pF
50V

HD
C703
0.1uF
16V

30
31

33
34

34
35

RXB2-

35

36

RXB2+

36

37

RXB1-

37

38

RXB1+

38

39

RXB0-

39

40

RXB0+

40
LVDS_SEL

41

+3.3V_Normal

42

42

43
44

41

SCAN_BLK2

SCAN_BLK1/OPC_OUT
R703
0
LVDS_PWM_44

R705
PWM_DIM

45
46

R710
10K
OPT

47
48

3.3K
OPT

R701

0
3D_SG

LED_DRIVER_D/L_SDA

49
50
51
52

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

R702

0
3D_SG

LED_DRIVER_D/L_SCL
100
2D/3D_CTL
LVDS_51PIN_GPIO
R706
R707
0
LVDS_51PIN_GND

GP2R
LVDS_LARGE

20101023
11

R1227

1K 1%
1K

1%

0.1uF
C1250

1000pF

C1249

R1228

R1224

1K 1%
1%
1K

C1248

1000pF

C1246

10uF

0.1uF

C1245

0.1uF

C1244

0.1uF

C1243

0.1uF

C1242

0.1uF

C1241

0.1uF

C1239

0.1uF

C1238

0.1uF

C1237

C1236

C1235
0.1uF

0.1uF

C1234
0.1uF

0.1uF

C1233

0.1uF

C1232

0.1uF

C1231

0.1uF

C1230

0.1uF

C1229

0.1uF

C1228

0.1uF

C1227

0.1uF

0.1uF

C1224

C1223

0.1uF

0.1uF

C1222

0.1uF

C1221

0.1uF

C1220

C1219

0.1uF

0.1uF

C1218

0.1uF
C1217

0.1uF
C1216

0.1uF

C1215

0.1uF

C1214

0.1uF

C1213

0.1uF

C1212

0.1uF

C1211

0.1uF

C1210

0.1uF

C1208

0.1uF

C1207

C1206

10uF

Close to DDR Power Pin

0.1uF

B-MVREFDQ
R1225

DDR3 1.5V By CAP - Place these Caps near Memory

B-MVREFCA
C1205

0.1uF

VCC_1.5V_DDR

C1247

DDR3 1.5V By CAP - Place these Caps near Memory

A-MVREFCA

1000pF

C1204

1%

R1205

1K

C1203

1000pF

0.1uF
C1202

A-MVREFDQ

Close to DDR Power Pin

CLose to Saturn7M IC

CLose to DDR3

VCC_1.5V_DDR

VCC_1.5V_DDR
VCC_1.5V_DDR

1K 1%

R1204

VCC_1.5V_DDR

1K 1%
1%

R1202

1K

C1201

R1201

VCC_1.5V_DDR

CLose to Saturn7M IC

CLose to DDR3

IC1201-*1
K4B1G1646G-BCH9

IC1202-*1
K4B1G1646G-BCH9

DDR_1333_SS_NEW

DDR_1333_SS_NEW
M8

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3

VREFCA

A0
A2

H1
VREFDQ

A3

R7
N7

+1.5V_DDR

T3

L8
ZQ

A6

B-TMA0
C1225
10uF
10V

R1213

A9

A12/BC

VDD_5

A-TMA11

A0
A1

VREFDQ

A3
A4

R1203

A5

L8
ZQ

240
1%

A7
A8

B2
D9
G7
K2
K8
N1
N9
R1
VCC_1.5V_DDR

A6

R9

VDD_1

A9

VDD_2

A10/AP

VDD_3

A11

VDD_4

A12/BC

VDD_5
VDD_6
VDD_7

D2
E9
H2
H9

L1
L9
T7

T8
R3
L7
R7
N7
T3

M2
BA0

VDDQ_1
VDDQ_2

CK

VDDQ_4

N8
M3

K9

VDDQ_6

CS

VDDQ_7

ODT

VDDQ_8

RAS
CAS

K1
J3
K3
L3

WE
NC_1

T2
RESET

G8
J2
J8

DQSL

G3
C7

M1
M9

DQSU

VSS_2

DQSU

VSS_3

E7
DML

P9
T1
T9

E3
DQL0

VSS_8

DQL1

VSS_9

DQL2

VSS_10

DQL3

VSS_11

DQL4
DQL5
DQL6

B9
D1
D8
E2
E8
F9
G1

VSSQ_1

F2
F8
H3
H8
G2
H7
D7

VSSQ_2

DQU0

VSSQ_3

DQU1

VSSQ_4

DQU2

VSSQ_5

DQU3

VSSQ_6

DQU4

VSSQ_7

DQU5

VSSQ_8

DQU6

VSSQ_9

G9

F7

DQL7

B1

A-TMA4

A-TMA10

A-TMA5

56

A-MA12

A-TMA6

AR1201

A-MA13

A-TMA7
A-TMRESETB

A-MBA0
A-MBA1
A-MBA2

A-MCK

A-TMA8

A-TMBA2

A-MBA2

A-TMA9

A-TMA13
A-TMA9

A-MA9
56

0.01uF
25V

A-MCKB

A-TMBA0
A-TMRASB
A-TMODT

A-MWEB

A-TMWEB

A-MCASB

56

R1231
10K

A-TMDQSLB

A-TMDQSUB

A-MDQSUB

DQU7

C3
C8
C2
A7
A2
B8
A3

A-MDQU2
A-MDQU3

A9
C10

B_DDR3_A4/DDR2_A2

A_DDR3_A5/DDR2_A10

B_DDR3_A5/DDR2_A10

A_DDR3_A6/DDR2_A4

B_DDR3_A6/DDR2_A4

A_DDR3_A7/DDR2_A3

B_DDR3_A7/DDR2_A3

A_DDR3_A8/DDR2_A6

B_DDR3_A8/DDR2_A6

A_DDR3_A9/DDR2_A12
A_DDR3_A10/DDR2_RASZ
A_DDR3_A11/DDR2_A11

B_DDR3_A9/DDR2_A12
B_DDR3_A10/DDR2_RASZ
B_DDR3_A11/DDR2_A11
B_DDR3_A12/DDR2_A0

A_DDR3_A13/DDR2_A7

B23

A_DDR3_A12/DDR2_A0

P26
B26
R24
B25
T26
D24
A26
C25

B_DDR3_A13/DDR2_A7

T25

B-TMA10

B-MA10

B-TMA2
B-TMA3

B-TMA6
B-TMA7
B-TMA8

B-TMRESETB
B-TMBA2
B-TMA13

B-MA13

B-TMA9

B21
A11
A23

P24
A_DDR3_BA0/DDR2_BA2
A_DDR3_BA1/DDR2_CASZ
A_DDR3_BA2/DDR2_A5

B_DDR3_BA0/DDR2_BA2
B_DDR3_BA1/DDR2_CASZ

C26
R26

B_DDR3_BA2/DDR2_A5

A12
C11
B12

D26
A_DDR3_MCLK/DDR2_MCLK
A_DDR3_MCLKZ/DDR2_MCLKZ
A_DDR3_CKE/DDR2_DQ5

B_DDR3_MCLK/DDR2_MCLK
B_DDR3_MCLKZ/DDR2_MCLKZ

D25
E24

B_DDR3_CKE/DDR2_DQ5

A-TMODT

A-TMWEB
A-TMRESETB

A-TMDQSL

A-MDQL3

A-TMDQL3

A-TMDQSLB

B-MA9
R1222

B-TMCK

B-MCK
22
R1223

B-TMA12
B-TMCKB

B-MCKB

A-TMDQU2
22

A-TMDQSU
A-TMDQSUB

A-TMCKE

A-TMDML

A-TMDQL7

A-MCKE

B-MCKB
B-MRASB

B-TMCASB
B-TMODT

B-MODT

B-TMBA2

B-TMWEB

B-MWEB VCC_1.5V_DDR

B-TMCKB

R1232
10K

R1219
B-TMDQSL

B-TMCKE

A-TMDMU
A-TMDQL0

22

A-TMDQL1

AR1205

A-TMDQL2

A-MDQL0

A-TMDQL0

A-TMDQL3

A-MDQL2

A-TMDQL2

A-TMDQL4

A-MDQL6

A-TMDQL6

A-TMDQL5

A-MDQL4

A-TMDQL4

A-TMDQL6

22

A-TMDQL7

C20
A20
B20
A21

N25
A_DDR3_ODT/DDR2_ODT
A_DDR3_RASZ/DDR2_WEZ
A_DDR3_CASZ/DDR2_BA1
A_DDR3_WEZ/DDR2_BA0

B_DDR3_ODT/DDR2_ODT
B_DDR3_RASZ/DDR2_WEZ
B_DDR3_CASZ/DDR2_BA1

M26
N24
N26

B_DDR3_WEZ/DDR2_BA0

C22

R25
A_DDR3_RESETB

B_DDR3_RESETB

B-TMODT

R1217
B-TMDQSU

B-MDQSU
22
R1218

B-TMCASB

B-TMDQSUB

B-MDQSUB
22

B-TMWEB
B-TMRESETB

C16
B16

J25
A_DDR3_DQSL/DDR2_DQS0
A_DDR3_DQSLB/DDR2_DQSB0

B_DDR3_DQSL/DDR2_DQS0

J24

B_DDR3_DQSLB/DDR2_DQSB0

B-TMDQL1

B-MDQL1
B-MDQL3

B-TMDML
B-TMDQSL

B-MDML

B-TMDQU2

B-MDQU2

B-TMDQSLB

22

A16
C15

H26
A_DDR3_DQSU/DDR2_DQSB1
A_DDR3_DQSUB/DDR2_DQS1

B_DDR3_DQSU/DDR2_DQSB1

H25

B_DDR3_DQSUB/DDR2_DQS1

B-TMDQSU
B-TMDQSUB

A14
B18

F26
A_DDR3_DML//DDR2_DQ13
A_DDR3_DMU/DDR2_DQ6

B_DDR3_DML/DDR2_DQ13

L24

B_DDR3_DMU/DDR2_DQ6

B-TMCKE

B-MCKE

B-TMDQL7

B-MDQL7

B-TMDQL5

B-MDQL5

B-TMDML
B-TMDMU

C18
B13
A19
C13
C19
A13

L25
A_DDR3_DQL0/DDR2_DQ3

B_DDR3_DQL0/DDR2_DQ3

A_DDR3_DQL1/DDR2_DQ7

B_DDR3_DQL1/DDR2_DQ7

A_DDR3_DQL2/DDR2_DQ1

B_DDR3_DQL2/DDR2_DQ1

A_DDR3_DQL3/DDR2_DQ10
A_DDR3_DQL4/DDR2_DQ4

B_DDR3_DQL3/DDR2_DQ10
B_DDR3_DQL4/DDR2_DQ4

C12

B_DDR3_DQL5/DDR2_DQ0

A_DDR3_DQL6/DDR2_CKE

B_DDR3_DQL6/DDR2_CKE

A_DDR3_DQL7/DDR2_DQ2

B19

A_DDR3_DQL5/DDR2_DQ0

F24
L26
F25
M25
E26

B_DDR3_DQL7/DDR2_DQ2

M24
E25

B-TMDQL0

A-TMDQU7

A-TMDQU0

A-MDQU3

A-TMDQU3

A-MDQU5

A-TMDQU5

A-TMDQU2

A-TMDMU

A-TMDQU3

A-MDMU
22

A-TMDQU1

A-TMDQU4

AR1207

A-TMDQU5
A-TMDQU6

A-MDQU6
A-MDQU0

A-TMDQU0

A-MDQU4

A-TMDQU6

A15
A17
B14
C17
B15
A18
C14
B17

G26
A_DDR3_DQU0/DDR2_DQ15
A_DDR3_DQU1/DDR2_DQ9
A_DDR3_DQU2/DDR2_DQ8
A_DDR3_DQU3/DDR2_DQ11
A_DDR3_DQU4/DDR2_DQM1

B_DDR3_DQU0/DDR2_DQ15
B_DDR3_DQU1/DDR2_DQ9
B_DDR3_DQU2/DDR2_DQ8
B_DDR3_DQU3/DDR2_DQ11
B_DDR3_DQU4/DDR2_DQM1

A_DDR3_DQU5/DDR2_DQ12

B_DDR3_DQU5/DDR2_DQ12

A_DDR3_DQU6/DDR2_DQM0

B_DDR3_DQU6/DDR2_DQM0

A_DDR3_DQU7/DDR2_DQ14

B_DDR3_DQU7/DDR2_DQ14

J26
G24
K25
H24
K26
G25
K24

B-TMDQL0

B-MDQL0

B-TMDQL1

B-TMDQL2

B-MDQL2

B-TMDQL2

B-TMDQL6

B-MDQL6

B-TMDQL3

B-TMDQL4

B-MDQL4

B-TMDQL4

22

B-TMDQL5
B-TMDQL6
B-TMDQL7

B-TMDQU7

B-MDQU7

B-TMDQU3

B-MDQU3

B-TMDQU5
B-TMDQU0

B-MDQU5

B-TMDMU

B-TMDQU5

B-MDQL3

B-MDQU1
B-MDQU2

B-MDQU5
B-MDQU6

DQU3
DQU4
DQU5
DQU6

VSSQ_8

N2

R8
R2

R7
N7
T3

E2

A2

F9

A3

G9

A6

N8
M3

T8
VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4
VDD_5
VDD_6
VDD_7
VDD_8

K1
J3
K3
L3

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

K8

T3

N1
N9

NC_2
NC_4

F3

IC1202-*3
K4B2G1646C

F7

N2
P2
R2
T8
R3
L7
R7
N7

P2
L8
ZQ

VDD_2
VDD_3

A12/BC

VDD_4
VDD_5
VDD_6

NC_5

VDD_7
VDD_8

BA0

J3
K3
L3

CK

VDDQ_2
VDDQ_3
VDDQ_4

CS

VDDQ_6

VDDQ_5
ODT

VDDQ_7

RAS

VDDQ_8

CAS

NC_2
NC_3
NC_4

F3
DQSL

A8

E9

K1

H2

J3

H9

K3
L3

D3

VSS_3

F2
F8
H3
H8
G2
H7

VSS_5
VSS_6

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

C8
C2
A7
A2

VDD_4
VDD_5
VDD_6
VDD_7
VDD_8

DQSL

R9

G1
G9

BA0

H7

K7

C9

K9

K2
K8
N1
N9
R1
R9

E9

VSS_2
VSS_3
VSS_4
VSS_5
VSS_6

C8
C2

A1

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4

CS

VDDQ_6

VDDQ_5
ODT

VDDQ_7

RAS

VDDQ_8

CAS

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

F1

K1
J3
K3
L3

A8
C1
C9
D2
E9
F1

A7
A2
B8
A3

A8

B2

A9

VDD_1

A10/AP

VDD_2

A11

VDD_3

A12

VDD_4
VDD_5
VDD_6
VDD_7
VDD_8

BA0

G7
K2
K8
N1
N9
R1
R9

VDD_9

A1
VDDQ_1

CK

VDDQ_2

CK

VDDQ_3
VDDQ_4
VDDQ_5

CS

VDDQ_6

ODT

VDDQ_7

RAS

VDDQ_8

CAS

A8
C1
C9
D2
E9

VDDQ_9

RESET

NC_2
NC_3
NC_4

F3
DQSL

F1
H2
H9
J1

NC_1

T2

G3

D9

BA1

L9
T7

L8
ZQ

A7

WE

L1

J9
L1
L9
T7

NC_7

C7

B3

B7

G8
J2
M1

VSSQ_2
VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8
VSSQ_9

VSS_3

M9

F7

P1

F2

P9

F8

T1

H3

VSS_4
VSS_5
VSS_6

E3

T9

H8
G2
H7

DQU1

VSS_2

DML
DMU

D3

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

B9

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1
G9

A3

G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
VSSQ_1

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

B8

E1

DQL6

D7

D1

B3

VSS_12

DQL7

B1

DQU0

VSS_1

E7

J8

DQL6
VSSQ_1

A9
DQSU
DQSU

E1

VSS_12

DQU7

C3

A6

L2

A9
VSS_1

DML

D7

A5

CKE

D2

J9

H1
VREFDQ

A4

DQSL

DQL7

D9

VDD_9

VDDQ_1

B9

VSSQ_9

D1
D8
E2
E8
F9
G1
G9

VDDQ_9

NC_2
NC_4

DQSL

H2
H9
J1

NC_1

F3
G3

G2

A3

J7

C1

H9

VREFCA

BA2

A8

H2

EAN61857201

A2

M2
N8

NC_7

DQSU

G7

BA1

NC_3

J9
L1
L9
T7

NC_6

C7

B3

B7

G8
J2

D3

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8
VSSQ_9

VSS_1
VSS_2

DML

VSS_4

VSS_3
DMU

J8
M1

F7

P1

F2

P9

F8

T1

H3

T9

H8
G2

VSS_5
VSS_6

E3

M9

DQL0

VSS_7

DQL1

VSS_8

DQL2

VSS_9

DQL3

VSS_10

DQL4

VSS_11

DQL5

B9

C3

D8

C8

E2

C2

E8

A7

F9

A2

G1

B8

G9

A3

G8
J2
J8
M1
M9
P1
P9

VSS_12

T1
T9

B1
VSSQ_1

D7

D1

B3
E1

DQL6
DQL7

B1
VSSQ_1

A9
DQSU
DQSU

E7

H7

DQU7

B8
A3

A12/BC

RESET

E1

VSS_12

D7

VDD_2
VDD_3

WE

L1

DQL6
DQL7

C3

F9

DQSL

VSS_4

E3
F7

B2
VDD_1

A10/AP
A11

T2

A9
VSS_1
VSS_2

DML
DMU

A8
A9

L9
T7

ZQ

A7

L2

F1

J9

L8

CKE

K9

D2

NC_6

DQSU
DQSU

E7

A6

H3
H8

A4

J7
K7

C9

H1

BA2

C1

F8

VREFDQ

A5

NC_5

DQSL
C7
B7

A2
A3

A13

N8

VREFCA

A1

M2

J1
NC_1

RESET

M8
A0

M7

R1
R9

VDDQ_9

WE
T2

G3

N7
T3

N1
N9

M3

CK

L2
K1

K2
K8

A1

CKE

K9

L7
R7

VDD_9

VDDQ_1

J7

R3

D9
G7

BA1
BA2

K7

R2
B2

VDD_1

A10/AP
A11
A13

R8
T8

A8
A9

N2
P8

A7

M2
M3

H1

A4

M7

N8

P7

VREFDQ

A5
A6

N3
P3

A2
A3

E8

A1

NC_5

J1
NC_1

E3

A1

E2

M8
A0

M7

R1

VDDQ_9

NC_3

DDR_DVB_T2_2G

P8

B-MCKE

N7

M3

CK

RESET

DDR_DVB_T2_2G

P7

A-TMDQU1

R7

K2

A1

DMU

P3

VSSQ_9

D8

NC_6

L7

G7

VDD_9

CK

T2

R3

D9

BA1

L2

R8
R2

B2

A9

CKE

F2

B-MDQU1

R1234

L8
ZQ

A8

BA0

N2
P8

A7

M2

G3

22
R1221

VSSQ_8

D1

N3

P2

A5

NC_5

IC1201-*3
K4B2G1646C

10K

VREFDQ

A4

G1

VSSQ_9

M8

VSSQ_7

DQU6

P7
H1

WE

VSSQ_8

VREFCA

VSSQ_6

DQU5

P3

C7

A0

VSSQ_5

DQU4

A3

VSSQ_4

DQU3

B8

VSSQ_3

DQU2

B9

VSSQ_2

DQU1

DDR_1333_NANYA_NEW

EAN61857201 VREFCA

A1

E8

VSSQ_7

DQU6

N3

T9

IC1202-*2
NT5CB64M16DP-CF
M8

A0

M7

D3

B-TMDQU7

T1

B1

DQU0

DQU7

G9

NC_6

L7

B-MDQU0

B-TMDQU6

A2

G1

DQSU

B-MDQU4

A7

VSSQ_9

P3

B-TMDQU0
B-TMDQU4

C2

F9

VSSQ_7

C8

E8

VSSQ_6

C3

E2

VSSQ_5

P9

VSSQ_1

D7

D8

VSSQ_4

P1

DQL6

DQSL

T3

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

DQU2

VSS_12

M9

DQL7

D1

VSSQ_3

VSS_11

DQL5

H8

VSS_10

DQL4

M1

VSS_9

DQL3

H3

B9

VSSQ_2

E7

22

10K

VSSQ_1

J8

VSS_8

DQL2

B1

DQU1

J2

VSS_7

DQL1

H7

DQU0

B7

R1210

R1233

D8

VSSQ_6

DQU7

B-MDQU7

D1

VSSQ_5

DQU5

A3

B9

VSSQ_4

DQU4

B8

DQL0

G2

DQL6

J7

VSSQ_3

DQU3

A2

F8

T9

BA2

VSSQ_2

DQU2

A7

F2

T1

G8

VSS_5
VSS_6

F7

VSS_12

B1

DQU1

C2

B-MDQU3

DQL5

K9

DQU0

C8

VSS_11

T9

VSSQ_1

C3

DQL4

K7

D7

R8

A-MCKE

T1

DQL7

B-MDQU0

VSS_10

P7

B-MDQU6

22

22

VSS_12

P9

DQL6

H7

DQL3

E1

VSS_4

E3

P9

B3

VSS_3
DMU

P1

VSS_9

AR1218

B-TMDQU1

A-MDQU1

P1

VSS_11

DQL5

M9

VSS_10

DQL4

G2

DQL2

VSS_2

DML

D3

M9

VSS_8

M1

VSS_9

DQL3

H8

B-MDQL5

J8

VSS_8

DQL2

H3

B-MDQL4

J2

VSS_7

DQL1

F8

DQL1

VSS_1

DQSU

M1

N3

B-TMDQU6

A-TMDQU4

A-TMDQU7

B-MDQL2

T7

A9
DQSU

E7

J8

VSS_7

R3

22

B-TMDQU2
B-TMDQU4

VSS_5

DQL0

F2

DQL0

T8

G8

VSS_4
VSS_6

F7

L9

NC_6

DQSL

DDR_1333_NANYA_NEW

E1

VSS_3

E3

B-MDQL0

L1

NC_4

F3

IC1201-*2
NT5CB64M16DP-CF

B3

B-MDMU

B-TMDQU1
B-TMDQU3

VSS_2

DMU

B-MDQU4

AR1217

VSS_1

DML

D3

B-MDMU

J9

NC_3

B7

J2

VSS_6

P8

A9
DQSU

E7

B-MDML

VSS_5

P2

DQSU

B-MDQL7

AR1216

T7

NC_6

DQSL

B7

B-MDQL6

22

L9

C7

B-MDQL1

AR1213

L1

DQSL

B-MDQSU

J1
NC_2

RESET

C7

G8

VSS_4

J9

NC_2

F3

B-MDQSUB

AR1212

H9

NC_1

T2

J1

NC_4

G3

A3

H2

WE

E1

VSS_3

H9

NC_3
B-MDQSL

B8

F1

H2

NC_1
RESET

B-MDQSLB

VSS_2

VDDQ_9

T2

B-MRESETB

A2

VDDQ_9

F1

WE

B-MDQSLB

B-TMRASB

AR1206
A-MDQU7

VDDQ_8

CAS

L3

VDDQ_7

RAS

E9

VDDQ_6

ODT

K3

B-MDQSL
22
R1220

VDDQ_5

J3

B-MWEB

D2

A7

E9

VDDQ_8

CAS

K3

B3

VSS_1

DML

DQU7

C2

C9

VDDQ_4

CS

C8

C1

VDDQ_3

C3

A8

VDDQ_2

CK

K1

B-MCASB

56
B-TMCK

G2

D2

VDDQ_7

RAS

J3

A9
DQSU

D7

CKE

B-MRASB

VCC_1.5V_DDR

A1

CK

K9

B-MODT

H8
H7

VDDQ_1

K7

B-MCASB

H3

R1

BA2

B-MCKE

F8

BA1

M3

B-MBA2

F2

R9

ODT

G3

DQL7

L2

B-TMBA0

A-TMDQL5

A-MDQL5

0.01uF
25V

B-MBA1

F7

C9

DQSL

E3

VDD_9

J7

B-TMBA1

AR1210
A-MDQL7

C1240

BA0

N8

T7

C1

VDDQ_6

L9

NC_6

DQSL

DMU

D3

N9

VDD_8

CS

L1

NC_4

E7

N1

VDD_7

M2

B-MBA0

B-MCK

56

A-TMDML

A-MDQU2

NC_5

K1

J9

NC_2

VDDQ_4
VDDQ_5

L3

NC_1

VDDQ_3

CKE

A8

VDDQ_2

CK

L2

H9

R9

A1

CK

J1

DQSU

B7

K8

VDD_6

K9

VDDQ_9

C7

K2

VDD_5

M7

B-MBA2

B-TMA10

B-TMA13

A13

B-MA13

CAS

R1

VDDQ_1

K7

H2

N9

BA1

DQSL

G7

VDD_4

B-MRESETB

B-TMA9
B-TMA11

VDD_3

A12/BC

T3

G3

D9

VDD_2

A11

N7

B-MA12

AR1219

A10/AP

R7

B-MA11

56

B-TMA4
B-TMA5

B-MA10

VDDQ_8

NC_3

B2
VDD_1

A9

L7

R1226
240
1%

A8

R3

B-MA9

L8

22

A-TMDQL1

A-MDQU5
A-MDQU7

B11

A_DDR3_A4/DDR2_A2

C24

B-MBA1

RAS

N1

VDD_9

BA0

J7

F1

VDDQ_7

RESET

B-MVREFDQ

ZQ

A7

T8

B-MA8

B-MA12

B-TMBA1

ODT

K8

BA2

E9

VDDQ_6

F3

A6

R2

B-MA7

B-MA4

B-TMA12

B-TMA1

H1
VREFDQ

A5

R8

CS

K2

VDD_8

D2

VDDQ_5

G7

VDD_7

M2

C9

VDDQ_4

D9

VDD_6
NC_5

C1

VDDQ_3

VDD_5

M7

A8

VDDQ_2

T2

A4

P2

B-MA6

B-TMA0

B-TMDQSLB

A-MDQL1

A-MDQU4
A-MDQU6

C23

B_DDR3_A3/DDR2_A1

P25

B-TMA4

VDDQ_1

VDD_4

A13

A1

CK

VDD_3

A12/BC

M3

CK

VDD_2

A11

N8

BA1

WE

A3

P8

B-MA5

B-TMDQL3

A-MDQL7
A-MDQU0

C9

A_DDR3_A3/DDR2_A1

A24

22

A-MDQL6

A-MDQU1

B22

B_DDR3_A2/DDR2_A9

B24

AR1209

A-MDQL2

A-MDQL5

A-TMCKB

A-TMCASB
A-TMDQSU

22
R1212

A-MDQL1
A-MDQL3

A-TMCK

A-TMRASB

A-MDQSU

A-MDQSUB

A-MDQL4

A-TMBA2

A-TMCKE

R1211

A-MDQSL

A-MDQL0

A10

B_DDR3_A1/DDR2_A8

A-TMDQSL
22
R1209

A-MRESETB

A-MDMU

A22

A_DDR3_A2/DDR2_A9

B_DDR3_A0/DDR2_A13

R1208
A-MDQSL

A-MDML

B10

A_DDR3_A1/DDR2_A8

A-TMCASB

A-MODT

A-MDQSU

C21

A25
A_DDR3_A0/DDR2_A13

B-TMRASB
A-TMBA1

A-MCASB

A-MDQSLB

A8

22
AR1220

A-TMCKB

A-MCKB A-MRASB

VCC_1.5V_DDR

B9

22
R1207

A-MCKE

A-MRASB

B8

A-TMCK

A-MCK

22
AR1202

A-MODT

A-TMA11
A-TMA13

R1206
C1209

A-TMA10
A-TMA12

A-MDML

VSS_12

P1

D3

DMU

VSS_6
VSS_7

B7

A-TMA3

A-MA10

A-MA11

A-MWEB

A-TMA2

A-TMBA1

22
F3

VSS_1

VSS_5

A-TMA12

A-MDQSLB

NC_4

VSS_4

A-TMA4

A-MBA1

A-MA10

NC_3

A9
E1

A-MA9

L2

DQSL

B3

A-TMA1

A-MA12

K7

CKE

VDDQ_5

NC_6

A-TMA0

A-MA4

A-MA8

B-MA7

K3
L3

A2

N2

B-MA4

56
AR1215

A-TMA7
56
AR1204

J7
CK

VDDQ_3

NC_2

A-MA7

A-MA6
A-MA7

B-TMA7

A-TMA5

A-MA5

A-MA5

B-MA3

B-MA5

A-TMA3

A-MA13

BA2

J1
J9

R2

A-MA4

M7

VDDQ_9

F1

R8

A-MA3

NC_5

VDD_8

A1

C9

P2

A-MA3

A-TMBA0

A-MBA0

A-MRESETB

BA1

C1

P8

A13

VDD_9

A8

N2

A-MA2

1%

H1

P3

B-MA3

B-TMA5

B-MVREFCA

A1

P3

B-MA2

VREFCA

A0

P7

B-MA1
B-MBA0

J3

M8

N3

B-MA0

B-TMA3

S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]

K1

DDR_1333_HYNIX

B-MA6

B-TMBA0

56
AR1203

A-MA0

R9

VDD_9

BA0

VDD_1

A10/AP

R1

VDD_8

L2

56
AR1214

A-TMA6

A-MA1

R1235
56

A-MVREFDQ

A2

P7

1%

VREFCA

R1236
56

A-MVREFCA

N3

B-TMA6

A-TMA8

A-MA6

K9

B-MA8

A-TMA1

A-MA8

M8

B-MA1

B-TMA8

A-MA1
DDR_1333_HYNIX

B-MA11

B-TMA1

A-MA11

N9

VDD_7

CKE

K7

T3

B2

A9

N1

VDD_6

J7

EAN61828901

IC1202
H5TQ1G63DFR-H9C

N7

K8

VDD_4

A8

R7

K2

VDD_3

B-MA2

56
R1237

IC1201
H5TQ1G63DFR-H9C

1%

A7

L7

G7

VDD_2

A11

L8
ZQ

A6

R3

D9

VDD_1

A10/AP

BA2

B-TMA11

A-TMA2

1%

56
AR1211

M3

56
R1238

56
AR1208

B-TMA2

N8

1%

A-MA2
EAN61828901

A-TMA0

1%
56
R1214

1%

1%

A-MA0

56
R1216

C1226
0.1uF
16V

A5

R8

B2

M2

B-MA0

A4

T8

A8

H1
VREFDQ

A3

R2

A7

NC_5

R1215

A2

N2
P2

A5

M7

L1201

A1

P8

A4

VREFCA

A0

P3

A13

L7

VCC_1.5V_DDR

M8

N3
P7

A1

DQU0

VSSQ_2

DQU1

VSSQ_3

DQU2

VSSQ_4

DQU3

VSSQ_5

DQU4

VSSQ_6

DQU5

VSSQ_7

DQU6

VSSQ_8

DQU7

B9
D1
D8
E2
E8
F9

VSSQ_9

G1
G9

GP2R
DDR_256

20101023
12

+3.3V_Normal

+3.3V_Normal

4.7K

+3.3V_Normal

R1404

S_FLASH_MAIN_MACRONIX

IC1401
MX25L8006EM2I-12G

R1403
10K

CS#
/SPI_CS

SPI_SDO
WP#
/FLASH_WP
GND

C
R1401

VCC

C1401
0.1uF

SO/SIO1

HOLD#

SCLK
SPI_SCK
R1405
SI/SIO0 33
SPI_SDI

Q1401
KRC103S

OPT 0
E

OPT

S_FLASH_MAIN_WINBOND

IC1401-*1
W25Q80BVSSIG
CS

DO[IO1]

%WP[IO2]

GND

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

VCC

HOLD[IO3]

CLK

DI[IO0]

GP2R
SFLASH_1MB

20101023
13

GP2R_LARGE_TUNER
+5V_TU

BOOSTER : CHINA OPT

RF_SWITCH_CTL
Pull-up cant be applied
because of MODEL_OPT_2

L3701 BOOSTER_OPT
BLM18PG121SN1D

BOOSTER_OPT
R3734

BOOSTER_OPT
R3743

close to TUNER

10K
Q3701

BOOSTER_OPT
ISA1530AC1
R3737
2.2K

OPT
R3762
0
CONTROL_ATTEN

B
C

CN_2INPUT_H_LG3911

TU3701
TDFR-C036D
1

BST_CNTL

+B

NC[RF_AGC]

AS

SCL

SDA

NC[IF_TP]

SIF

NC

10

10

VIDEO

11

11

GND

12

12

1.2V

13

13

3.3V

14

14

RESET

15

15

IF_AGC_CNTL

16

16

DIF_1

17

17

DIF_2

18

18
19

19

20

SHIELD

21
22
23
24
25
TUNER MULTI-OPTION

26

GP3_ATSC_1INPUT_H_SANYO

TU3702-*3
UDA55AL

27

TU3702-*1
TDVJ-H101F

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

ANT_PWR[OPT]
1
BST_CNTL
2
+B
3
NC[RF_AGC]
4
AS
5
SCL
6
SDA
7
NC(IF_TP)
8
SIF
9
NC
10
VIDEO
11
GND
12
1.2V
13
3.3V
14
RESET
15
IF_AGC_CNTL
16
DIF_1
17
DIF_2
18

19

28

NC_1

R3705

C3701
0.1uF
16V

BST_CNTL

R3707

+5V_TU

OPTION : RF AGC

RF_SW_OPT
C3703
100pF
50V

C3704
0.1uF
16V

C3728
0.1uF
16V
OPT

C
B

R3754
10K

TU_IIC_NON_ATSC_SANYO
FE_AGC_SPEED_CTL
IF_AGC_SEL

OPT

TU_IIC_NON_ATSC_SANYO

OPT

TU_IIC_ATSC_SANYO
R3740
1.2K

TU_I2C_NON_FILTER
C3713
33 R3736
18pF TU_I2C_NON_FILTER
50V
TU_I2C_NON_FILTER
C3742
C3711
20pF
18pF
50V
50V

NC_2
C3702
0.1uF

NC_3

TU_IIC_ATSC_SANYO
R3741
1.2K
TU_SCL

close to TUNER

C3743
20pF
50V
TU_I2C_FILTER

TU_SDA

R3751
220

R3752
220

TU_CVBS

TU_I2C_FILTER
E
R3749

+3.3V_TU

VIDEO
+1.2V/+1.8V_TU

GND
+B2[1.2V]
C3738
0.1uF
16V

FULL_NIM
C3705
100uF
16V

CN
C3739
10uF
6.3V

C3707
100pF
50V

C3708
0.1uF
16V
R3732
100

TU_I2C_FILTER
R3735-*1

R3733
100K
TUNER_RESET

B
C

Q3703
ISA1530AC1

TU_I2C_FILTER
R3736-*1

COIL

COIL
DEMOD_RESET

C3710
0.1uF
16V

close to the tuner pin, add,09029

0
R3750
1K
OPT

C3711-*1
C3713-*1
20pF
20pF
50V
50V
TU_I2C_FILTER TU_I2C_FILTER

+3.3V_TU

+B3[3.3V]

+3.3V_TU

This was being applied to the only china demod,


so this has to be deleted in both main and ISDB sheet.

RESET
NC_4
R3704

SDA

IF_AGC_MAIN

HALF_NIM

SCL

FULL_NIM
R3702
100

R3701

ERR

R3742
4.7K
FULL_NIM

R3744
4.7K
FULL_NIM

should be guarded by ground

FULL_NIM

HALF_NIM_1.2V_BCD
IC3703

DEMOD_SCL

100

DEMOD_SDA

close to IF line
C3712
22pF
50V
FULL_NIM

SYNC
HALF_NIM
R3760
0

INPUT

C3714
22pF
50V
FULL_NIM

IC3703-*1
AP1117EG-13

29

NC[RF_AGC]

1. should be guarded by ground


2. No via on both of them
3. Signal Width >= 12mils
Signal to Signal Width = 12mils
Ground Width >= 24mils

SDA
NC(IF_TP)

31

30

OUT

R3766
1
1/10W

D3

R3770

EN

10K

FULL_NIM_SEMTEK

D5

VIN
R3769

D6

FULL_NIM_BCD

VIDEO
GND

SHIELD

+3.3V

380mA

R3764
0
1/10W
FULL_NIM

R3748

ADJ

5.1K

VOUT

R1

NC

D7

NC_3

+1.2V/+1.8V_TU

FULL_NIM_SEMTEK

10K
VCTRL

+5V_Normal

GND

FULL_NIM_BCD

FULL_NIM_BCD

C3717
0.1uF
16V

D4

PG

R3747
9.1K
1005

FULL_NIM
C3730
10uF
10V

FULL_NIM
C3729
0.1uF
16V

R2

IC3701-*1
SC4215ISTRT
Vo=0.8*(1+R1/R2)

RESET

NC_1

IF_AGC_CNTL
DIF_1

FULL_NIM

DIF_2

R3724

FE_TS_SYNC

FE_TS_DATA[0-7]

EN

19
SHIELD

FULL_NIM_BCD
R3748-*1
10K

Close to the tuner


10K

C3741
10uF
10V
HALF_NIM

C3740
0.1uF
16V
HALF_NIM

IC3701
AP2132MP-2.5TRG1
[EP]
R3771

R3703
150
OPT

HALF_NIM

HALF_NIM_1.2V_DIODES

SIF

+1.2V

HALF_NIM
R3768
1.2K
R1

OUTPUT

Please, check multi Item! 10/12

AS
SCL

+1.2V/+1.8V_TU

ADJ/GND

IF_P_MSTAR
R3761 0
HALF_NIM

D1
D2

1
2

IN

MCL
D0

ADJ/GND

IF_N_MSTAR

VALID

R2
HALF_NIM
R3767
10

AZ1117BH-ADJTRE1

+3.3V_TU

NC_2
+B[+5V]

Q3705

+5V_TU

16V

C3737
100pF
50V

ISA1530AC1

R3753
4.7K

R3741-*1
1K

33 R3735
TU_I2C_NON_FILTER

SDAT

SIF

TU_SIF

+3.3V_TU
R3740-*1
1K

C3706
0.1uF
16V

SCLT

R3758
82
E

GPIO must be added.

Q3704
2SC3052
OPT

R3755
470

C3731
10uF
10V
OPT

NC_1

FE_BOOSTER_CTL
LNA2_CTL
The pull-up/down of LNA2_CTL
is depended on MODLE_OPT_1.
GPIO must be added for FE_BOOSTER_CTL

+5V_TU

+B1[+5V]
NC[RF_AGC]

BOOSTER_OPT

L3704

close to TUNER
RF_S/W_CNTL

BOOSTER_OPT
R3745
10K

FULL_NIM_BCD

C3709
0.01uF
25V
BOOSTER_OPT

FULL_NIM

ANT_PWR[OPT]

Q3702
2SC3052

DVB_1INPUT_H_LGIT

BOOSTER_OPT

THERMAL

TU3702
TDTJ-S001D

SHIELD

FULL_NIM

R3730

FE_TS_VAL_ERR

VIN

GP3_ATSC_1INPUT_H_LGIT

FULL_NIM

R3731

R3725

1
8
FULL_NIM_SEMTEK
2

ADJ

VO

FE_TS_CLK
NC_2

FULL_NIM_CHINA

GND

NC_3

FE_TS_DATA[0]

NTSC_2INPUT_H_LGIT

CN_2INPUT_H_ALTO

GP2R_AU_1INPUT_H_LGIT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

FULL_NIM

R3727

TU3702-*4
TDTJ-S101D

RF_S/W_CTL

TU3701-*4
TDFR-C236D

FE_TS_DATA[1]

BST_CTL
+B1[5V]

NC_1[RF_AGC]

NC_2

SCLT

SDAT

NC_3

SIF

NC_4

VIDEO

GND

10

+B2[1.2V]

11

+B3[3.3V]

12

RESET

13

IF/AGC

14

DIF_1[N]

15

DIF_2[P]

16
17

19
18

ANT_PWR

FULL_NIM

R3728

NC_1

FE_TS_DATA[2]

TU3701-*2
TDFR-B036F

+B1[5V]
RF_AGC

FULL_NIM

R3729

FE_TS_DATA[3]

1
2

SCL
3

FULL_NIM

R3726

FE_TS_DATA[4]

NC_2

5
6

SIF
NC_3

FULL_NIM

R3721

VIDEO

FE_TS_DATA[5]

8
9

GND
+B2[1.2V]

10

FULL_NIM

R3722

11

+B3[3.3V]

FE_TS_DATA[6]

12
13

RESET
IF_AGC

14

FULL_NIM_CHINA

R3723

DIF_1[N]

15

FE_TS_DATA[7]

16
17

DIF_2[P]
18

SHIELD
19

19

TU3702-*2
TDTR-T036F

Close to the CI Slot

20

SHIELD

21
22
23

R3706

3
4

MOPLL_AS

SDA

FULL_NIM_BR

24

25
26

FULL_NIM_BR

27
28
29
31

30

RF_S/W_CNTL

BST_CNTL

BST_CNTL
+B1[+5V]
NC[RF_AGC]
NC_1
SCLT

+B1[5V]
NC_1[RF_AGC]

NC_2

SCLT

SDAT

10

SDAT
NC_2
SIF
NC_3

NC_3
SIF

11

NC_4

12

VIDEO

13

GND

14

VIDEO
GND
+B2[1.2V]
+B3[3.3V]

+B2[1.2V]
+B3[3.3V]

15

RESET

16

NC_5

17

SCL

18

RESET
NC_4
SCL
SDA

+5V_TUNER

SDA
ERR

19

SYNC

20

VALID

21

MCL

22

ERR

+3.3V_Normal

SYNC

+5V_TU

VALID
MCL

D1

23

D2

24

D3

25

D4

26

D0
D1

200mA

27

D7

28
29
31

30

SHIELD

60mA

MLB-201209-0120P-N2

D2

Size change
L3703
MLB-201209-0120P-N2

D3

D5
D6

+3.3V_TU

Size change
L3702

D0

SHIELD

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

RF_S/W_CNTL

D4
D5
D6

C3719
22uF
10V

C3724
0.1uF
16V

C3722
22uF
16V

C3726
0.1uF
16V

D7

location movement,0929

GP2R
TUNER_L

C3723
22uF
10V

C3725
0.1uF
16V

C3715
C3727
22uF
0.1uF
10V
16V

Add,0929

20101023
14

+1.8V_AMP
+3.3V_Normal
IC404

IN

3 Vd=1.4V 1

R474
1

AP1117E18G-13
ADJ/GND

120 mA

2
C434
0.1uF
16V

OUT

C446
0.1uF
16V

C421
10uF
10V

+24V

SPK_L+
D501
1N4148W
100V
OPT

OPT
R535
3.3

C515
0.1uF
50V

BST1A

BLM18PG121SN1D

AD

CLK_I

100pF
50V

R508

AUD_SCK
AMP_SDA
AMP_SCL

PVDD1B_2

PVDD1B_1

OUT1B_2

OUT1B_1

PGND1B_2

PGND1B_1

BST1B

VDR1B

48

47

46

45

44

DGND_PLL

34

PVDD2A_1

33

PVDD2B_2

AGND_PLL

EAN60969603

10

LF

11

32
31

OUT2B_2

13

30

OUT2B_1

14

29

R528
4.7K

NRS6045T100MMGK

C538
C535
0.47uF
50V

R529

0.1uF
50V

4.7K

C539

R530

0.1uF
50V

4.7K

SPEAKER_R

PGND2B_2

C513
0.1uF
16V

R523
12

SPK_R-

28

+24V

PGND2B_1

27
BST2B

26
VDR2B

24

25
/FAULT

MONITOR2

23
MONITOR1

22
MONITOR0

21
SCL

20
SDA

19
BCK

18
WCK

17
SDATA

16

15

NTP-7100

DVDD

C505
0.1uF
16V

C526

C517
1uF
25V

C527

0.1uF
50V

0.1uF
50V

C528
10uF
35V

C524
22000pF
50V

100

R504

R522
12

NRS6045T100MMGK
L508
10.0uH

L509
10.0uH

C532
390pF
50V

D504
1N4148W
100V
OPT

PVDD2B_1

12

GND

R503

R525
12

C531
390pF
50V

AVDD_PLL

OPT
C503
10uF
10V

L507
NRS6045T100MMGK
R524
12

PVDD2A_2

3.3K

C502
0.1uF
16V

SPEAKER_L
C537
0.1uF
50V

43

PVDD1A_1

49

PVDD1A_2

OUT1A_1

51
50

OUT1A_2

35

OPT
C511
10uF
10V

AUD_LRCK

52

OUT2A_1

+1.8V_AMP

AUD_LRCH

53

36

R521
12

OUT2A_2

D503
1N4148W
100V
OPT

50V

PGND2A_1

37

C525
22000pF

PGND2A_2

38
IC501

DVDD_PLL
OPT
C501
10uF
10V

R520
12

4.7K

C534
0.47uF
50V

SPK_R+

C522
25V1uF

BST2A

VDD_IO

C433
10uF
10V OPT

C530
390pF
50V

D502
1N4148W
100V
OPT

39

L502
C504

VDR2A

40

NC

41

DGND_1

DGND_2

BLM18PG121SN1D

L501

10.0uH

R527

C520
1uF
25V

42
THERMAL
57

GND_IO
C508
1000pF
50V

PGND1A_1

C509
0.1uF

+1.8V_AMP

PGND1A_2

VDR1A
25V /RESET

54

EP_PAD
C512
1uF

+1.8V_AMP

NRS6045T100MMGK

C536
0.1uF
50V

SPK_L-

56

C506
1000pF
50V
AUD_MASTER_CLK

L506
10.0uH

C518
22000pF
50V

L504

TP502

AMP_RESET

C514
22000pF
50V

55

BLM18PG121SN1D

+3.3V_Normal

R526
12

C529
390pF
50V

OPT
C547
0.01uF
50V

C521
10uF
35V

C519
0.1uF
50V

R519
12

100

R505

33

R507

R513
0

100

R506

33

POWER_DET
C516
1000pF
50V

OPT

+3.5V_ST
C507
18pF
50V

C546
22pF
50V

C544
22pF
50V

C545
22pF
50V

OPT

C510
18pF
50V

OPT

OPT

R514

100

WAFER-ANGLE

R515
10K
C
B

Q501
2SC3052

R517

SPK_L+

AMP_MUTE
10K

SPK_L-

SPK_R+

SPK_R-

1
P501

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

GP2R
AMP_NTP

20101023
16

Rear AV
COMPONENT2

AV_CVBS_IN
REAR_AV
D1619
R1654
30V
75
REAR_AV

+3.3V_Normal

C1648
220pF
50V
+3.3V_Normal
OPT

C1643
47pF
50V
REAR_AV

R1612
10K

R1615
1K
COMP2_DET

JK1604
PPJ233-01
5C
4C

[RD]O-SPRING

3C

[RD]CONTACT

D1624
5.6V
OPT

OPT
AV_CVBS_DET

R1666
1K
REAR_AV

[RD]E-LUG
C1646
0.1uF
16V
REAR_AV

[GN]E-LUG
[GN]O-SPRING

L-MONO

4A

[YL]O-SPRING

5A

D1625
5.6V
REAR_AV

L1609
120-ohm
REAR_AV

R1671
470K
REAR_AV

C1663
330pF
50V
REAR_AV

R1689
12K

[YL]CONTACT

COMP2_Y+

D1612
30V

5A
[GN]CONTACT
4A

AV_R_IN

REAR_AV

[WH]C-LUG

3A

R1619
75

6A

REAR_AV
R1685
10K

4B

ETHERNET FOR DVB_T2

D1613
5.6V

R1660
10K
REAR_AV

TP1610

[BL]E-LUG-S

D1614

R1620
75

[BL]O-SPRING

[YL]E-LUG

TP1611
COMP2_Pb+

5B

TP1612

TP1614

REAR_AV
R1684
10K

[RD]O-SPRING_1

REAR_AV
D1626
5.6V

[WH]O-SPRING

REAR_AV
C1662
330pF
50V
REAR_AV

R1672
470K
REAR_AV

R1688
12K
REAR_AV

ET_TX_EN

TP1616

TP1618

ET_MDC
ET_MDIO
ET_CRS

TP1619

ET_RXER

TP1620

/RST-PHY

TP1613
COMP2_Pr+

D1615
30V

5C

AV_L_IN

REAR_AV

R1621
75

7C

ET_RXD1
ET_TXD1
ET_REF_CLK

TP1615

[RD]E-LUG-S
L1610
120-ohm

ET_RXD0
ET_TXD0

30V

7B

R1633
10K

5D
[RD]CONTACT

COMP2_L_IN
D1616
5.6V

4E
[RD]O-SPRING_2

R1625
470K

C1616
1000pF
50V
OPT

R1636
12K

TP1617

5E
[RD]E-LUG
R1632
10K

6E

COMP2_R_IN
PPJ234-01
JK1603
REAR_COMP2

D1617
5.6V

R1626
470K

C1617
1000pF
50V
OPT

R1634
12K

IC1601-*1
SN324

OUT1

14

OUT4

EU_OPT_AUK
INV_IN1

R1613
10K

R4223
0

C1607
0.1uF
16V

COMPONENT1

EU_OPT
L1606

EU_OPT
R4210
0

AV_DET
FIX-TER

22
21

10

SYNC_IN
[GN]G
[GN]C_DET

SYNC_GND2
18
17

RGB_IO
[RD]R

EU_OPT
R1628
75

D1610
30V
OPT

16
R_OUT

6
[WH]L_IN
5

15

D1604
30V

RGB_GND
14
13
D2B_OUT

[RD]MONO

12

EU_OPT
R1616
75

SC1_R+/COMP1_Pr+
R1608
75

EU_OPT
C1625
0.1uF
50V

G_OUT

EU_OPT
C1620
100uF
16V

Rf

D2B_IN

PPJ-230-01
10

EU_OPT
R1656
2.2K

CLOSE TO MSTAR

Rg

EU_OPT
R1639
180

EU_OPT
R1642
15K

C1664
0.01uF

+12V/+15V
SC1_FB

SCART1_Lout

R4219

EU_OPT
C1644
10uF
16V
R4218
22K

EU_OPT
R1664
33K

OPT
R1662
470K
EU_OPT
R1657
5.6K

100

C1642
0.1uF
50V
SCART1_Rout

R4216

EU_OPT
R1658
5.6K

100
C1665
0.01uF

EU_OPT

IN2+
EU_OPT
R1665
33K

R4217
22K

ID

SC1_B+/COMP1_Pb+
AUDIO_L_IN

D1606
30V

B_GND

OPT
EU_OPT
D1618 R1623
30V
15K

R1605
75

SC1_ID

C1655
33pF

INV_IN3

OUT3

14

13

12

11

10

OUT4

IN4-

IN4+

GND

IN3+

IN3-

OUT3

EU_OPT
EU_OPT

OPT
R1661
470K

C1645
10uF
16V
EU_OPT

EU_OPT
R1629
3.9K

IN2R1668
10K
OUT2

EU_OPT
R1655
2.2K

D1716

B_OUT

EU_OPT
R1667
10K IN1+

EU_OPT
C1654
33pF

DTV/MNT_R_OUT

IN1-

VCC

REC_8

R1604

OUT1

DTV/MNT_L_OUT

9
8

NON_INV_IN3

EU_OPT_BCD

75

G_GND

GND

IC1601
AS324MTR-E1
DTV/MNT_VOUT

Gain=1+Rf/Rg

EU_OPT
R1627
22

EU_OPT
R1641
47K
EU_OPT
C1621
47uF
16V

OPT
30V

SC1_G+/COMP1_Y+
D1605
30V

OUT2

R4221
0
EU_OPT

11

10

INV_IN2

+12V/+15V

R_GND

[RD]R_IN
4

JK1601
COMPONENT1

D1603
30V
OPT

SYNC_GND1

EU_OPT
Q1602
2SC3052
B

EU_OPT
R1635
390

SYNC_OUT

[BL]B

R4211
390

19

13

EU_OPT

20

EU_OPT
C1623
0.1uF
50V

EU_OPT
R1640
470

C1608
220pF
50V
OPT

D1602
30V
OPT

COM_GND

[GN]GND

11

EU_OPT
C1604
47pF
50V

NON_INV_IN4

SC1_CVBS_IN
EU_OPT
R1609
75

11

INV_IN4

IN CASE OF SMALL= 15V

SC1_SOG_IN EU_OPT
E
ISA1530AC1
Q1601

EU_OPT

12

NON_INV_IN2

R1614
1K

13

VCC

SC1/COMP1_DET
D1611
5.6V
OPT

NON_INV_IN1

+3.3V_Normal

5
AUDIO_GND
4
AUDIO_L_OUT

R1617
10K

3
AUDIO_R_IN
2
AUDIO_R_OUT
1

SC1/COMP1_L_IN
D1607
5.6V
NON_EU

R1606
470K

L1604
120-ohm

C1611
330pF
50V

PSC008-01
JK1602

R1618
10K

OPT
R1687
10K

SC1/COMP1_R_IN
D1609
5.6V
NON_EU

L1603
120-ohm
R1607
470K

C1612
330pF
50V

R1631
12K

OPT
R1675
2K

Full Scart/ Comp1

[SCART AUDIO MUTE]


+3.5V_ST
EU_OPT
L1601
BLM18PG121SN1D

EU_OPT
C1609
1000pF
50V

EU_OPT
C1618
4700pF

DTV/MNT_L_OUT
EU_OPT
Q1607
2SC3052

EU_OPT
R1648
2K

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

EU_OPT
L1602
BLM18PG121SN1D

EU_OPT
C1610
1000pF
50V

EU_OPT
C1619
4700pF

EU_OPT
Q1608
2SC3052

1
2

EU_OPT
C1636
0.1uF

OPT
Q1615
2SC3052
E

REC_8
B

SCART1_MUTE
3

DTV/MNT_R_OUT

R4207
51K
OPT

OPT
Q1613
E 2SC3052

OPT
Q1611
2SC3052

SC_RE2

DTV/MNT_R_OUT
D1601
5.6V
OPT

OPT
R1695
12K

OPT
R1676
560

EU_OPT
R1652
10K

EU_OPT
RT1P141C-T112
Q1610

C
B

OPT
R1677
10K
OPT
R1680
1K

SC_RE1

DTV/MNT_L_OUT
D1608
5.6V
OPT

+12V/+15V
IN CASE OF SMALL= 15V

[SCART PIN 8]

R1630
12K

OPT
R1678
680

OPT
R1681
1K

EU_OPT
R1650
2K

GP2R
REAR_JACK

20101023
17

SIDE CVBS PHONE JACK


(New Item Development)
SIDE_CVBS
L9903
BLM18PG121SN1D

JK9901
KJA-PH-1-0177

SIDEAV_CVBS_IN

M4

3
1

M1

M6

SIDE_CVBS
R9907
75

M3_DETECT

[YL]E-LUG

4A

M5_GND

5A

SIDE_CVBS
D9901
30V
ADUC30S03010L_AMODIODE

+3.3V_Normal

[YL]O-SPRING

3A

[WH]O-SPRING

3C

[RD]CONTACT

C9901
100pF
SIDE_CVBS

OPT
D9902
5.6V
ADMC5M03200L_AMODIODE

SIDE_CVBS
L9902
BLM18PG121SN1D

SIDE_AV_GENDER

4C

[RD]O-SPRING

5C

SIDE_CVBS
R9915
1K
SIDEAV_DET

[YL]CONTACT

4B

SIDE_CVBS
10K
R9911

C9907
100pF
OPT

[RD]E-LUG

SIDE_CVBS
R9914
SIDEAV_L_IN

SIDE_CVBS
R9906
470K

SIDE_CVBS
D9903
5.6V
ADMC5M03200L_AMODIODE

PPJ235-01
JK9903
SIDE_AV_3HOLE

SIDE_CVBS
L9901
BLM18PG121SN1D

SIDE_CVBS 10K
C9906
100pF
50V
SIDE_CVBS
R9913

SIDE_CVBS
R9917
12K

SIDEAV_R_IN
SIDE_CVBS
D9904
5.6V
ADMC5M03200L_AMODIODE

SIDE_CVBS
C9905
100pF
50V

SIDE_CVBS
R9905
470K

10K

SIDE_CVBS
R9916
12K

SIDE COMPONENT PHONE JACK


(New Item Developmen)
+3.3V_Normal

R9904
10K
SIDE_COMP

R9912
1K
COMP2_DET
SIDE_COMP

D9908
5.6V
OPT
JK9902
KJA-PH-1-0177
5

M5_GND

M4

M3_DETECT

M1

R9910
75
D9907
30V
SIDE_COMP

M6

COMP2_Y+
SIDE_COMP

D9905
30V
75
R9909
SIDE_COMP

SIDE_COMP

COMP2_Pb+

SIDE_COMP

75
R9908
D9906
30V
SIDE_COMP

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

COMP2_Pr+
SIDE_COMP

GP2R
SIDE_JACK

20101023
18

* Option name of this page : CI_SLOT


(because of Hong Kong)
CI Region
CI SLOT

+5V_CI_ON

CI TS INPUT

CI_DATA[0-7]

CI_DATA[0-7]

EAG41860102
CI_SLOT_JACK_LV3400
P1901
P1902
10067972-050LF
10067972-000LF

R1908

100

1
2
3

38

CI_TS_DATA[5]

CI_DATA[4]
CI_DATA[5]

CI_DATA[6]

CI_DATA[7]

40

CI_TS_DATA[6]
CI_TS_DATA[7]

41
10K

R1919

42
R1905

33

AR1906

FE_TS_DATA[2]

47

43

FE_TS_DATA[1]
FE_TS_DATA[0]

FE_TS_DATA[0-7]
AR1904

33

CI_MISTRT
CI_ADDR[10]

9
CI_ADDR[11]

CI_IORD

44

10

CI_IOWR

45

11

FE_TS_CLK

CI_MCLKI

CI_OE

CI_ADDR[9]

12

FE_TS_SYNC
FE_TS_VAL_ERR

CI_MIVAL_ERR

/PCM_CE

CI_ADDR[8]

46
CI_MDI[0]

47

13

CI_ADDR[13]

CI_MDI[1]

48

14

CI_ADDR[14]

CI_MDI[2]

49

15

50

CI_MDI[3]

R1910

CI_WE

R1920

16

51

0.1uF

C1905

100

17

/PCM_IRQA

R1916

52

18

53

19

CI_MDI[5]

54

20

CI_MDI[6]

55

21

CI_ADDR[12]

CI_MDI[7]

56

22

CI_ADDR[7]
CI_ADDR[6]

GND

OPT

CI_MDI[4]

R1906

10K

C1909
0.1uF

OPT

GND

57

23

58

24

47

59

25

60

26

CI_ADDR[3]

61

27

CI_ADDR[2]

62

28

CI_ADDR[1]

63

29

CI_ADDR[0]

64

30

65

31

CI_DATA[1]

66

32

CI_DATA[2]

67

REG

33

47

33

CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC

CI_TS_DATA[0]

33

CI_TS_DATA[1]
CI_TS_DATA[2]
CI_TS_DATA[3]

0
100

OPT

R1909

R1907

/CI_CD2

CI_DATA[0]
CI_ADDR[0-14]

34

68
AR1903

CI_ADDR[5]

G2
2

69

G1
1
CI_DET

+5V_Normal

IC1902

GND
1OE
GND

10K

20

+3.3V_CI
C1913
0.1uF
VCC
16V

TOSHIBA
1A1

R1904

PCM_A[0]

GND

19

2OE

0ITO742440D

C1904
0.1uF
16V

2Y4
CI_ADDR[7]
1A2
PCM_A[1]

CI_MISTRT
CI_MIVAL_ERR

2Y3
CI_ADDR[6]

18

17
TC74LCX244FT

R1901

CI HOST I/F

CI_ADDR[4]

AR1902

R1902

PCM_RST
/PCM_WAIT

CI_MCLKI
1A3
PCM_A[2]
2Y2
CI_ADDR[5]
1A4
PCM_A[3]
2Y1

CI DETECT

CI_ADDR[4]
GND

+3.3V_Normal

FE_TS_DATA[3]

CI_MDI[0]

CI_DATA[3]

36
37

33

FE_TS_DATA[4]

CI_MDI[3]

39

AR1901
CI_TS_DATA[4]

FE_TS_DATA[6]
FE_TS_DATA[5]

CI_MDI[5]
CI_MDI[4]

CI_MDI[1]

CI_SLOT_JACK

35

FE_TS_DATA[7]

CI_MDI[2]

CI_DATA[0-7]

C1903
0.1uF
16V

AR1905

R1921
10K

/CI_CD1

33

CI_MDI[7]
CI_MDI[6]

@netLa

C1906
10uF
10V
10K

R1903

+5V_Normal

+3.3V_CI

+3.3V_CI

16

15

14

13

12

10

11

1Y1
CI_ADDR[0]
2A4
PCM_A[7]
1Y2
CI_ADDR[1]
2A3
PCM_A[6]
1Y3
CI_ADDR[2]
2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]

+3.3V_CI

CI_SLOT_OR_GATE_NXP
IC1901
74LVC1G32GW

VCC

R1917

0.1uF
16V

C1908

/CI_CD1

OPT

C1902
0.1uF

CI_DATA[0]
GND

R1915

33

AR1907

PCM_D[0]

CI_DATA[1]
CI_DET

CI_DATA[0-7]

C1901
0.1uF

47
R1918

OPT

/PCM_CD
47

PCM_D[1]

CI_DATA[2]

PCM_D[2]

CI_DATA[3]

PCM_D[3]

CI_DATA[4]

33

AR1908

PCM_D[4]

CI_DATA[5]

PCM_D[5]

CI_DATA[6]

PCM_D[6]

CI_DATA[7]

PCM_D[7]

PCM_D[0-7]

GND

/CI_CD2

10K

L1901
BLM18PG121SN1D

CI POWER ENABLE CONTROL


PCM_D[0-7]
CI_DATA[0-7]

+5V_CI_ON
+5V_Normal

Q1902
RSR025P03
S

L1902
BLM18PG121SN1D

CI_ADDR[8]

33

AR1912
PCM_A[8]

R1914
22K

R1912
10K
OPT

C1911
4.7uF
16V

C1910

0.1uF
16V

0.1uF

C1907

CI_ADDR[9]

16V

R1923
10K
OPT

PCM_A[9]

CI_ADDR[10]
C1912
0.1uF
16V
OPT

PCM_A[10]

CI_ADDR[11]

PCM_A[11]

CI_ADDR[12]

33

AR1913

CI_ADDR[13]
R1922

PCM_A[12]
PCM_A[13]
PCM_A[14]

CI_ADDR[14]

/PCM_REG

REG

2.2K
R1913
10K
PCM_5V_CTL

C
Q1901
2SC3052

B
R1924
10K

CI_OE
CI_WE

AR1909
33

/PCM_OE
/PCM_WE
/PCM_IORD

CI_IOWR

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

CI_IORD

/PCM_IOWR

GP2R
PCMCI

20101023
20

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
6.5T_GAS

GAS1-*5
8.5T_GAS

12.5T_GAS
MDS61887708
GAS1-*4
12.5T_GAS

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS1

GAS1-*3

GAS1-*2
7.5T_GAS

GAS1-*1
5.5T_GAS

6.5T_GAS

MDS62110205

MDS62110204

GAS2-*2

GAS2-*1

9.5T_GAS

MDS62110209

MDS61887708

MDS61887710

GAS2-*5

GAS2-*4

GAS2-*3

8.5T_GAS

12.5T_GAS

9.5T_GAS

7.5T_GAS

MDS62110206

MDS62110206
GAS2

5.5T_GAS

MDS62110209

MDS61887708

MDS61887710

MDS62110205

MDS62110204

6.5T_GAS

GAS3-*5

GAS3-*4

GAS3-*3

GAS3-*2

GAS3-*1

MDS62110206

8.5T_GAS
MDS62110209
GAS4-*5

12.5T_GAS
MDS61887708
GAS4-*4

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205
GAS4-*2

GAS4-*1

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS5-*3

GAS5-*2

GAS5-*1

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS6-*3

GAS6-*2

GAS6-*1

GAS3

MDS62110204

GAS4-*3

6.5T_GAS
MDS62110206

8.5T_GAS
MDS62110209
GAS5-*5

12.5T_GAS
MDS61887708
GAS5-*4

GAS4

6.5T_GAS
MDS62110206
GAS5

8.5T_GAS

12.5T_GAS

MDS62110209

MDS61887708

GAS6-*5

GAS6-*4

6.5T_GAS
MDS62110206
GAS6

8.5T_GAS

12.5T_GAS

MDS62110209

MDS61887708

GAS7-*5

GAS7-*4

9.5T_GAS

7.5T_GAS

5.5T_GAS

MDS61887710

MDS62110205

MDS62110204

GAS7-*3

GAS7-*2

GAS7-*1

6.5T_GAS
MDS62110206
GAS7

SMD GASKET

8.5T_GAS
MDS62110209

GP2R

SMD_GAS

20101023

20

+3.3V_Normal

L/DIM_LED/DRIVER

+3.3V_Normal
P2100
12507WR-08L

R2100
2.2K

R2103
10K
FRC_L/DIM_REVERSE_SEL

LED_DRIVER_D/L

OPT

R2101
2.2K

LED_DRIVER_D/L

R2102
10K
1

L/DIM_SCLK

L/DIM_MOSI

LED_DRIVER_D/L
R4029
22

LED_DRIVER_D/L_SCL
R4028
22

LED_DRIVER_D/L_SDA
LED_DRIVER_D/L

8
9

V_SYNC
C2100
18pF
50V
OPT

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

C2101
18pF
50V
OPT

C2102
18pF
50V
OPT

C2103
18pF
50V
OPT

C2104
18pF
50V
OPT

GP2R
L/DIM_LED

20101023
21

TI solution RF-3D OPTION


+3.3V_Normal

+3.3V_Normal
P3401
12507WR-12L

L3401
120-ohm

3D_SG
1

3D_SG

3.3V

GND

RX

R3410

3D_SG
R3402
100

M_REMOTE_RX

TX

R3412
2.7K
3D_SG

3D_SG
R3409
100

DC

2.7K
3D_SG

3D_SG
R3408
100

RESET

R3411

2.7K
3D_SG

3D_SG
R3407
100

M_REMOTE_TX

M_RFModule_RESET

FREQ. GPOIO_0

DC_MREMOTE

GPOIO_1

GPOIO_2

10

11

12

DD

3D Off

59.94Hz

50Hz

RESERVED

RESERVED

3D_SG
R3401
100

60Hz

DD_MREMOTE
GND

GPIO_0

3D_SG
R3406
22

GPIO_1

3D_SG
R3404
22

GPIO_2

3D_SG
R3405
22

3D_SYNC

3D_SG
R3403
22

3D_GPIO_0

3D_GPIO_1

3D_GPIO_2

3D_SYNC_RF

RESERVED

RESERVED

13
.

ALL 3D-SG OPTION

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

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