Scribd Logo
Upload

Welcome to Scribd!

  • Address Decoding: Address A A A A A A A A A A A A A A A A

    Uploaded by

    P_lee
    12 views1 page
    This document describes an address decoding scheme for a microprocessor system with different memory-mapped regions. It shows the address bits used to select the read-only memory (ROM), random access memory (RAM), input device, and output device regions. The summary is: 1. The document presents an address map for a microprocessor system with ROM from $E000-$FFFF, RAM from $0000-$0FFF, an input device at $1000-$1001, and an output device at $1010. 2. It describes the address bits used to select each region: ROM uses A15 A14 A13=111, RAM uses A15 A14 A13 A12=0000, and the input

    Original Description:

    data

    Original Title

    L1bAddDec10

    Copyright

    © © All Rights Reserved

    Available Formats

    DOC, PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document
    This document describes an address decoding scheme for a microprocessor system with different memory-mapped regions. It shows the address bits used to select the read-only memory (ROM), random access memory (RAM), input device, and output device regions. The summary is: 1. The document presents an address map for a microprocessor system with ROM from $E000-$FFFF, RAM from $0000-$0FFF, an input device at $1000-$1001, and an output device at $1010. 2. It describes the address bits used to select each region: ROM uses A15 A14 A13=111, RAM uses A15 A14 A13 A12=0000, and the input

    Copyright:

    © All Rights Reserved
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    12 views1 page

    Address Decoding: Address A A A A A A A A A A A A A A A A

    Uploaded by

    P_lee
    This document describes an address decoding scheme for a microprocessor system with different memory-mapped regions. It shows the address bits used to select the read-only memory (ROM), random access memory (RAM), input device, and output device regions. The summary is: 1. The document presents an address map for a microprocessor system with ROM from $E000-$FFFF, RAM from $0000-$0FFF, an input device at $1000-$1001, and an output device at $1010. 2. It describes the address bits used to select each region: ROM uses A15 A14 A13=111, RAM uses A15 A14 A13 A12=0000, and the input

    Copyright:

    © All Rights Reserved
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    of 1

    ADDRESS DECODING

    4K
    8K
    32
    K
    64
    K

    Address

    A15 A14 A13 A12

    $0000
    $0001
    $0002
    $0003
    .......
    $000F
    ....
    $0FFF

    0
    0
    0
    0

    ....
    $1FFF
    $2000
    .....
    $3000
    ......
    $7FFF
    $8000
    .....
    $E000
    .....
    $FFFF

    0
    0
    0
    0
    0
    0
    0
    1
    1
    1

    0 0
    0 0
    0 0
    0 0
    ........
    0 0
    .......
    0 0
    0 0
    .......
    0 0
    0 1
    ........
    0 1
    .......
    1 1
    0 0
    .......
    1 1
    .......
    1 1

    A11 A10 A9 A8

    0
    0
    0
    0

    0
    0
    0
    0

    0
    1

    1
    0

    1
    0

    1
    0

    1
    0

    1
    0

    0 0
    0 0
    0 0
    0 0
    ........
    0 0
    ........
    1 1
    0 0
    ........
    1 1
    0 0
    ........
    0 0
    ........
    1 1
    0 0
    ........
    0 0
    ........
    1 1

    A7 A6 A5 A4
    0
    0
    0
    0

    0
    0
    0
    0

    1
    0

    1
    0

    1
    0

    1
    0

    1
    0

    1
    0

    0 0
    0 0
    0 0
    0 0
    ........
    0 0
    .........
    1 1
    0 0
    .........
    1 1
    0 0
    ........
    0 0
    .......
    1 1
    0 0
    .......
    0 0
    .......
    1 1

    A3 A2 A1 A0

    0
    0
    0
    0

    0
    0
    0
    0

    1
    0

    1
    0

    1
    0

    1
    0

    1
    0

    1
    0

    0 0
    0 0
    0 1
    0 1
    ...........
    1 1
    ..........
    1 1
    0 0
    ..........
    1 1
    0 0
    .......
    0 0
    .......
    1 1
    0 0
    .......
    0 0
    .......
    1 1

    0
    1
    0
    1
    1
    1
    0
    1
    0
    0
    1
    0
    0
    1

    Problem
    Design an address decoder for an MPU system with the following memory map,
    neglecting the data transfer control signals.
    ROM (8Kbytes)
    $E000 to $FFFF
    RAM (4Kbytes)
    $0000 to $0FFF
    INPUT Device (2bytes)
    $1000 to $1001
    OUTPUT Device (1byte)
    $1010
    Solution
    The Address bits A15 A14 A13 = 1 1 1 whenever the ROM is addressed. ($E.. or $F..)
    The Address bits A15 A14 A13 A12 = 0 0 0 0 whenever the RAM is addressed. ($0..)
    The Address bits A15 A14 A13 A12 = 0 0 0 1 for Input or Output devices ($1..)
    A4 = 0 for Input Device. (!A15 !A14 !A13 A12 !A11..!A1)
    A4 = 1 for Output Device. (!A15 !A14 !A13 A12 !A11.. !A5 A4 !A3.. !A0)
    Circuit (Motorola: Add E to each component to write)
    (Partial decoding to simplify:
    ROM = A15;
    RAM = !A15 !A12;
    input = !A15 A12 !A4
    output = !A15 A12 A4)

    You might also like