SLNO IEEE VLSI DESIGN & IMPLEMENTATION DOMAIN

MDV01
Design of Neural Networs !it" #$%er&oli' Tangent A'ti(ation
)un'tion
Neural
Networs
MDV0*
#ig" %erfor+an'e Low,Power Pulse,Triggere- )li%,)lo% Design
.ase- on a Signal )ee-,T"roug" S'"e+e
Low %ower
-esign
MDV0/
Anal$sis an- 'al'ulation of 0ltra,#ig" T"roug"%ut Low,Power Pa'et
1lassifi'ation
MDV02
Design3 Test an- e(aluation of )ra+e- Tra'e,.uffer s$ste+ for )PGA
Testing
MDV04
5elia&le an- ti+e &ase- Lig"t,!eig"t On,1"i% Stru'ture for
Measuring Ti+ing 0n'ertaint$ In-u'e- &$ Noise in Integrate- 1ir'uits
Testing &
De&ugging
MDV06
Design of Low 'ost an- AI &ase- a%%roa'" of On,1"i% Os'illos'o%e
to Measure 7itter3 Glit'" an- Sew of "ig" s%ee- signals
MDV08
Design of Gate-,Lat'" 0tili9ation Te'"ni:ue for 1lo',Tree Power
O%ti+i9ation s$ste+
MDV0;
On t"e Auto+ati' Generation of O%ti+i9e- Software,.ase- Self,Test
Progra+s for VLI! Pro'essors
MDV0<
Measure of Variation,Aware Varia&le Laten'$ Design for all
a%%li'ations
MDV10
In-e%t" %erfor+an'e +easure of On Dea-lo' Pro&le+ of On,1"i%
.uses Su%%orting Out,of,Or-er Transa'tions
S$ste+ On
1"i%
MDV11 I+%le+entation of Dela$ Test for Diagnosis of Power Swit'"es
MDV1* Design )low for )li%,)lo% Grou%ing in Data,Dri(en 1lo' Gating
MDV1/
En"an'e- Me+or$ 5elia&ilit$ Against Multi%le 1ell 0%sets 0sing
De'i+al Matri= 1o-e
Design
Anal$9ing
MDV12
5e'onfigura&le #ig",5esolution All,Digital Dut$,1$'le 1orre'tor
wit" auto 'orre't +o-ule
Os'illators
& 1ir'uits
MDV14
Software>#ar-ware Parallel Long,Perio- 5an-o+ Nu+&er
Generation )ra+ewor .ase- on t"e !ELL Met"o-
MDV16
Design of 1ell,.ase- Pro'ess 5esilient Multi%"ase 1lo'
Generation
MDV18
LASI1? Loo%,Aware Slee%$ Instru'tion 1a'"es .ase- on STT,5AM
Te'"nolog$
Me+or$
Ma%%ing
MDV1;
)PGA &ase- Pro'ess,5esilient Low,7itter All,Digital PLL (ia S+oot"
1o-e,7u+%ing
1lo'
s$nt"esi9ers
MDV1<
Low,1o+%le=it$ 5e'onfigura&le )ast )ilter .an for Multi,Stan-ar-
!ireless 5e'ei(ers
Signal
Pro'essing
MDV*0
0se of SSTA Tools for E(aluating .TI I+%a't on 1o+&inational
1ir'uits
Tool Design