Microprocessor Programming & Interfacing: Cs/Ece/Eee/Instr F241

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Microprocessor Programming &

Interfacing
CS/ECE/EEE/INSTR F241
KCS Murti

Motivation

A world of Processors
Fast growing
Millions of real world applications
Should understand past, present and
future
A foundation coarse for
Solutions development
New architectures
Research

Objective

Understand Microprocessor (P)


architecture in a generic way to design a
system around that

After this course..


One should be able to
Transform real world problem to a system
Processor selection
Hardware design
Interface design
Program
Test

Scope
Introduce the hardware components
Basic processor architecture in a
processor-neutral way
Detailed architecture of 8086
Programmers model
Assembly level programming (ASM 86)
Interfacing techniques
Test tools
Advances

Pre requisites
Digital electronics
Basic digital devices
Gates
Multiplexers
De-multiplexers
Flip flops
Counters

Basic computer architecture


Programming concepts

Course modules
Module Title

No of
classes

1
2
3
4

Digital design-Overview
Micro processors- architecture
80x86 architecture
Programmers model and assembly
programming.

4
8
4
9

5
6
7
8
9
10

Timing and hardware design


Interrupts
Device interfacing.
Direct memory access
Case studies, test tools
Advances

6
3
5
2
3
1

Instructors
Murti KCS
Practicals:
Ananth Saradhi
Avinash S Vaidya
Chetan kumar V,
M K Kaushik,
P Spandana,
Sai Phaneendra,
Subha Madha

Text books
Brey Barry B. & C R Sarma The Intel
Microproc,: Arch, Prog. & Interfacing
Pearson Edu., 8th Edition, 2008
The x86
Pearson

Microprocessors,

Lyla

Das,

Reference books
1. Douglas V Hall, Miroprocessors and
Interfacing TMH
2. Morris Mano, Digital Design ,PHI, EE edition
3. 8086_family_Users_Manual, Intel corporation.
4. The 8085 Microprocessor, Uday kumar,
Pearson

Practicals

Using 8086 kits


Coding
Debugging
Interfacing
Guided by individual instructors

Assignments
Mini projects involving
Problem Identification, Specification, and Use
Cases.
Hardware design
Programming

Study of advanced processors


Do yourself exercises

Evaluation

Evaluation
Component

Type

Duration

Weight

Test 1

Open book

50 Minutes 20%

Test 2

Open Book

50 Minutes 20%

Comprehensive Closed/Open 3 hours


Exam
Book

40%

Practical/Assign
ments

20%

Chamber consultation
Immediately after class.
Contact:
990-820-9225
Chandra.kavuri@gmail.com

All announcements on CMS

Have a nice time!

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