Register file construction

Creating read ports

Creating write port

Main Memory

Address

Processor

MEMORY
write

Data in

Data out

read

Memory

ROM (Read only memory)

RAM (Random Access Memory)

SRAM (cache memory)

DRAM (Main memory)

Typical sizes of SRAM are

(32 or 64 or 128 or 256) x (1 or 2 or 4 or 8 bits)

address
chip select
output enable

SRAM
32K x 8 bits

data out

write enable
data in

How many lines are there in address, data in and data out?

32K x 1 bit RAM using 4 8K x 1 RAMs

Data in
A12-A0

addr

00
01

A14-A13

CE
in

10
11

2-4
decoder

addr

CE
in
addr

CE
in

addr

CE
in

Data out

For each chip, the write enable line is set to 1 during a

write operation, and the output enable lines are set to 1
during a read operation.

32Kx 4 bit RAM using 32K x 1 bit RAMs

Data in

A14-A0

Addr

Addr
out

in

Addr

Addr

out
in

out
in

out
in

Data out

For each chip, the write enable line is set to 1 during a

write operation, and the output enable lines are set to 1
during a read operation.