Professional Documents
Culture Documents
General Description Features: 4/8-Bit Parallel-Input Latched Drivers
General Description Features: 4/8-Bit Parallel-Input Latched Drivers
General Description Features: 4/8-Bit Parallel-Input Latched Drivers
Micrel
MIC5800/5801
4/8-Bit Parallel-Input Latched Drivers
General Description
Features
The MIC5800/5801 latched drivers are high-voltage, highcurrent integrated circuits comprised of four or eight CMOS
data latches, a bipolar Darlington transistor driver for each
latch, and CMOS control circuitry for the common CLEAR,
STROBE, and OUTPUT ENABLE functions.
The bipolar/MOS combination provides an extremely lowpower latch with maximum interface flexibility. MIC5800
contains four latched drivers; MIC5801 contains eight latched
drivers.
Ordering Information
Part Number
MIC5800BN
MIC5800AJ
5962-8764002CA1
MIC5800BM
MIC5801BN
MIC5801AJ
5962-8764001WA2
MIC5801BV
MIC5801BWM
1
2
Temperature Range
Package
40C to + 85C
55C to +125C
55C to +125C
40C to + 85C
40C to +85C
55C to +125C
55C to +125C
40C to + 85C
40C to +85C
Functional Diagram
V DD
IN N
COMMON
OUT N
STROBE
CLEAR
GROUND
OUTPUT
ENABLE
COMMON MOS
CONTROL
8-11
MIC5800/5801
Micrel
Typical Input
V DD
IN
50V
15V
0.3V to VDD + 0.3V
500mA
2.1W
2.5W
1.0W
2.25W
2.8W
3.1W
40C to +85C
65C to +125C
Pin Configuration
CLEAR
14 OE
IN1
IN2
IN3
IN4
GND
13 VDD
LATCHES
STROBE 2
12 OUT1
11 OUT2
10 OUT3
9 OUT4
8 COM
MIC5800BN, AJ, BM
CLEAR
22 OE
STROBE
21 VDD
IN1
20 OUT1
19 OUT2
IN3
18 OUT3
IN4
IN5
IN6
15 OUT6
IN7
14 OUT7
IN8 10
13 OUT8
GND 11
LATCHES
IN2
OE
24 VDD
CLEAR
23 NC
STROBE
22 OUT1
IN1
21 OUT2
IN2
20 OUT3
IN3
19 OUT4
IN4
18 OUT5
IN5
17 OUT6
IN6
16 OUT7
IN7 10
15 OUT8
IN8 11
14 NC
GND 12
13 COM
MIC5801BWM
17 OUT4
16 OUT5
12 COM
MIC5801BN, AJ
8-12
MIC5800/5801
Micrel
VDD
28
27 26
NC
NC
STROBE
CLEAR
NC
25 OUT 1
IN 2
24 OUT 2
IN 3
23 OUT 3
IN 4
IN 5
LATCHES
IN 1
22 OUT 4
21 OUT 5
IN 6 10
20
OUT 6
IN 7 11
19
OUT 7
OUT 8
NC
NC
17 18
COMMON
IN 8
NC
13 14 15 16
GROUND
12
MIC5801BV
MIC5801BN,AJ,AJB
ALLOWABLE COLLECTOR CURRENT IN mA AT 50C
MIC5800BN,AJ,AJB,BM
450
400
1
2
350
300
4
250
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
200
150
100
10
20
30
40
50
60
70
80
90
100
450
400
350
3
4
300
5
6
250
7
8
200
NUMBER OF OUTPUTS
CONDUCTING
SIMULTANEOUSLY
150
100
10
20
30
40
50
60
70
8-13
1 or 2
80
90
100
MIC5800/5801
Micrel
Symbol
ICEX
Collector-Emitter
Test Conditions
VCE(SAT)
Saturation Voltage
Input Voltage
Min.
Typ.
Max. Units
VCE = 50 V, TA = +25C
50
VCE = 50 V, TA = +70C
100
IC = 100 mA
0.9
1.1
IC = 200 mA
1.1
1.3
1.3
1.6
1.0
VIN(0)
VIN(1)
Input Resistance
RIN
Supply Current
Clamp Diode
VDD = 12 V
10.5
VDD = 10 V
8.5
3.5
VDD = 12 V
50
200
VDD = 10 V
50
300
VDD = 5.0 V
50
600
1.0
2.0
(Each
0.9
1.7
Stage)
0.7
1.0
IDD(OFF)
(Total)
IR
IDD(ON)
Leakage Current
200
50
mA
100
VR = 50 V, TA = +25C
50
VR = 50 V, TA = +70C
100
VF
IF = 350 mA
1.7
2.0
V
Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic 1.
CLEAR
F
STROBE
OUTPUT
ENABLE
INN
D
OUT N
Timing Conditions
(Logic Levels are VDD and Ground)
A.
B.
C.
D.
E.
F.
G.
Minimum data active time before strobe enabled (data set-up time) ...................................................................... 50 ns
Minimum data active time after strobe disabled (data hold time) ............................................................................ 50 ns
Minimum strobe pulse width ................................................................................................................................. 125 ns
Typical time between strobe activation and output on to off transition .................................................................. 500 ns
Typical time between strobe activation and output off to on transition .................................................................. 500 ns
Minimum clear pulse width ................................................................................................................................... 300 ns
Minimum data pulse width .................................................................................................................................... 225 ns
8-14
MIC5800/5801
Micrel
Information present at an input is transferred to its latch when
the STROBE is high. A high CLEAR input will set all latches
to the output OFF condition regardless of the data or
STROBE input levels. A high OUTPUT ENABLE will set all
outputs to the off condition, regardless of any other input
conditions. When the OUTPUT ENABLE is low, the outputs
depend on the state of their respective latches.
Truth Table
Output
OUTN
INN
Strobe
Clear
Enable
t-1
OFF
ON
OFF
OFF
ON
ON
OFF
OFF
X = Irrelevant
t-1 = previous output state
t = present output state
Typical Application
Unipolar Stepper-Motor Drive
+30V
OUTPUT ENABLE
0.1F
STROBE
IN1
IN2
IN3
IN4
14
13
12
VDD
4
5
LATCHES
CLEAR
OUT1
OUT2
11
OUT3
10
STEPPER
MOTOR
OUT4
0.1F
+30V
MIC5800
STROBE
STROBE
IN 1
IN 1
IN 2
IN 2
IN 3
IN 3
IN 4
IN 4
OUT 1
OUT 1
OUT 2
OUT 2
OUT 3
OUT 3
OUT 4
OUT 4
8-15
MIC5800/5801
Micrel
+12V
+5V
0.1
22
+
22
STROBE
21
INPUT 1
20
INPUT 2
19
INPUT 3
18
INPUT 4
INPUT 5
INPUT 6
15
INPUT 7
14
INPUT 8
10
13
11
12
K1
K2
LATCHES
K3
K4
17
K5
16
K6
K7
K8
+5V
0.1
14
13
INPUT 1
12
INPUT 2
INPUT 3
INPUT 4
LATCHES
+24V
22 +
Note:
11
10
8-16