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THAMKHAO VN 6388 Do An Lap Trinh Pic16f877a Dieu Khien Toc Do Dong Co DC
THAMKHAO VN 6388 Do An Lap Trinh Pic16f877a Dieu Khien Toc Do Dong Co DC
TI
Lp trnh PIC16F877A
iu khin tc
ng c DC
n 2
MC LC
Chng I: KHI QUT TI............................................................................................3
I/ Tm tt ti:........................................................................................................................3
Nu l ch 2 th ta phi nhp them thi gian, sau nhn phm ENTER.............................5
CHNG II:..............................................................................................................................6
GII THIU V CC LINH KIN PHN T S DNG TRONG MCH...................6
I.Vi iu khin PIC16F877A....................................................................................................6
1. Khi qut v vi iu khin PIC16F877A............................................................................6
S chn.................................................................................................................................9
S nguyn l...........................................................................................................................9
2. T chc b nh:...................................................................................................................10
2.1. B nh chng trnh:.......................................................................................................11
2.2. B nh d liu:.................................................................................................................11
2.3. Stack..................................................................................................................................14
3. Khi qut v chc nng ca cc port trong vi iu khin PIC16F877A........................14
4. Cc vn v Timer...........................................................................................................16
4.1. Timer0...............................................................................................................................16
4.2.TIMER1.............................................................................................................................20
5. NGT (INTERRUPT):.......................................................................................................23
6. Phng php iu ch xung PWM:..................................................................................28
6.2. Nguyn l ca PWM:........................................................................................................29
Ud = Umax . (t0/T) hay Ud = Umax.D...........................................................................................30
6.3. Cch thit lp ch PWM cho PIC16F877A..............................................................30
II. Mch cu H ( H-Bridge Circuit )......................................................................................32
Hnh 18: Mch cu H...............................................................................................................32
Kho st hot ng ca mch cu H.........................................................................................32
Hnh19: Nguyn l hot ng ca mch cu H........................................................................33
III/LCD....................................................................................................................................34
VD: Kiu hin th (1 hng / 2 hng), chiu di d liu (8 bit / 4 bit), ..................................36
IV. i tng iu khin: ng c DC.................................................................................41
M hnh th 1............................................................................................................................42
M hnh th 2............................................................................................................................43
CHNG 3:.............................................................................................................................45
I/ THIT K MCH PHN CNG:...................................................................................45
II/ Gii thiu v chng trnh vit code v bin dch:.........................................................49
Return(bin);}...........................................................................................................................50
III/ Lu gii thut:.............................................................................................................51
CODE CHNG TRNH......................................................................................................55
n 2
n 2
2/ S nguyn l mch:
VCC
LCD1
R1
R2
R3
R4
5k
5k
5k
5k
FW(16)
RV(15)
STOP (14)
7
8
9
10
a4 11
a5 12
a6 13
a7 14
b0 4
b1 5
b2 6
RV1
1
2
3
0 (10)
CLEAR (11)
D0
D1
D2
D3
D4
D5
D6
D7
RS
RW
E
VSS
VDD
VEE
16_X_2_LCD
13
p0
p1
p2
p3
1K
set (12)
C1
+12V
+12V
30pF
VCC
2
3
4
5
6
7
8
9
10
R5
R9
10k
RESET
2k2
OSC1/CLKIN
OSC2/CLKOUT
RB0/INT
RB1
RB2
RB3/PGM
RB4
RB5
RB6/PGC
RB7/PGD
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/SS/C2OUT
RC0/T1OSO/T1CKI
RE0/AN5/RD
RC1/T1OSI/CCP2
RE1/AN6/WR
RC2/CCP1
RE2/AN7/CS
RC3/SCK/SCL
RC4/SDI/SDA
MCLR/Vpp/THV
RC5/SDO
RC6/TX/CK
RC7/RX/DT
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
C3
10uF
33
34
35
36
37
38
39
40
15
16
17
18
23
24
25
26
CLK
9
J3
CCP1
CCP2
5
7
10
12
6
11
CCP2
CCP1
5
4
3
2
1
CLK
SIL-100-05
19 b2
20 b0
21 b1
22
27 a4
28 a5
29 a6
30 a7
1
15
VS
OUT1
OUT2
OUT3
SENSA
SENSB GND
R1
R2
0.5
0.5
U1
IN1 VCC
IN2
IN3
IN4
ENA
ENB
OUT4
M1
CLK
M1
13
M2
M2
14
+88.8
L298
U2
+12V
D21N4007
p0
p1
p2
p3
D31N4007
13
14
CRYSTAL
D11N4007
X1
D41N4007
C2
U1
+5V
7805
PIC16F877A
J1
JACK
3
2
1
VI
VO
R26
1k
GND
C4
C5
100uF
100nF
30pF
C6
C7
100uF
100nF
D8
LED
J2
2
1
TERMINAL2
n 2
Nhp tc t bn phm cc phm t 0 n 9.Nu nhp sai ta nhn phm CLEAR con
tr trn LCD s xa ht cc s nhp, ta phi nhp li t u.Sau khi nhp xong,
nhn phm ENTER lu tc t, tc t c tnh theo n v vng/pht.
Nu l ch 2 th ta phi nhp them thi gian, sau nhn phm ENTER
Bc 3:
iu khin ng c ta nhn phm: quay thun (FORWARD), quay nghch
(REVERSE), dng (STOP).
Bc 4:
nhp li tc ta nhn phm CLEAR ri tin hnh t tc nh bc 2.
-Tc tc thi ca ng c s c cp nht mi 0,5s v s c so snh vi tc
t a ra tnh hiu iu khin, ng thi c mi 0,5s tc s hin th trn mn
hnh LCD.
4/ Khuyt im ca mch:
-Do khng p dng cc phng php iu khin (v d nh: PID, iu khin m,)
nn tc ng c cha c n nh.
-Mch cu H s dng IC L298 ch iu khin c ng c DC c cng sut nh.
-i vi khi hin th, do tnh cht ca mn hnh LCD nn b hn ch quan st gi tr
hin th khong cch xa.
n 2
CHNG II:
GII THIU V CC LINH KIN PHN T S DNG TRONG MCH
n 2
n 2
n 2
n 2
c/Nhn xt:
T s chn v s nguyn l trn, ta rt ra cc nhn xt ban u nh sau :
-
PIC16F877A c tt c 40 chn
5 port ca PIC16F877A
bao gm :
+ PORT B: 8 chn
+ PORT D: 8 chn
+ PORT C: 8 chn
+ PORT A: 6 chn
+ PORT E: 3 chn
2. T chc b nh:
Cu trc b nh ca vi iu khin
PIC16F877A bao gm b nh
chng trnh (Program memory) v
b nh d liu (Data Memory).
2.1. B nh chng trnh:
B nh chng trnh ca vi iu
khin PIC16F877A l b nh flash, dung lng b nh 8K word (1 word = 14 bit) v
c phn thnh nhiu trang (t page0 n page 3) . Nh vy b nh chng trnh c
10
n 2
Nu nh 2 bank b nh d liu ca 8051 phn chia ring bit : 128 byte u tin
thuc bank1 l vng Ram ni ch cha d liu, 128 byte cn li thuc bank 2 l
cng cc thanh ghi c chc nng c bit SFR m ngi dng khng c cha d
liu khc, cn 4 bank b nh d liu ca PIC16F877A c t chc theo cch
khc.
11
n 2
thanh ghi ny ta phi chuyn n bank0. Ngoi ra mt vi cc thanh ghi thng dng
khc ( s gii thiu sau) cng cha bank0
- Bank1 gm cc nh c a ch t 80h n FFh. Cc thanh ghi dng chung c a
ch t A0h n Efh. Cc thanh ghi TRISA, TRISB, TRISC, TRISD, TRISE cng c
cha bank1
- Tng t ta c th suy ra cc nhn xt cho bank2 v bank3 da trn s trn.
Cng quan st trn s , ta nhn thy thanh ghi STATUS, FSR c mt trn c 4
bank. Mt iu quan trng cn nhc li trong vic truy xut d liu ca PIC16F877A
l : phi khai bo ng bank cha thanh ghi .Nu thanh ghi no m 4 bank u cha
th khng cn phi chuyn bank.
12
n 2
2.2a/ Thanh ghi chc nng c bit SFR: (Special Function Register)
-
13
n 2
nh c bit khng cho php c hay ghi. Khi lnh CALL c thc hin hay khi mt
ngt xy ra lm chng trnh b r nhnh, gi tr ca b m chng trnh PC t ng
c vi iu khin ct vo trong stack. Khi mt trong cc lnh RETURN, RETLW hat
RETFIE c thc thi, gi tr PC s t ng c ly ra t trong stack, vi iu khin
s thc hin tip chng trnh theo ng qui trnh nh trc.
-
c khi no stack trn. Bn cnh tp lnh ca vi iu khin dng PIC cng khng
c lnh POP hay PUSH, cc thao tc vi b nh stack s hon ton c iu khin
bi CPU.
3. Khi qut v chc nng ca cc port trong vi iu khin PIC16F877A
a/ PORTA:
-PORTA (RPA) bao gm 6 I/O pin.y l cc chn hai chiu (bidirectional
pin), ngha l c th xut v nhp c.Chc nng I/O ny c iu khin bi thanh
ghi TRISA (a ch 85h). Mun xc lp chc nng ca mt chn trong PORTA l input,
ta set bit iu khin tng ng vi chn trong thanh ghi TRISA v ngc li,
mun xc lp chc nng ca mt chn trong PORTA l output, ta clear bit iu
khin tng ng vi chn trong thanh ghi TRISA. Thao tc ny hon ton tng t
SVTH: Trn Tng Bng
V Vn Chnh
14
n 2
TRISA (a ch 85h)
CMCON (a ch 9Ch)
CVRCON (a ch 9Dh)
ADCON1 (a ch 9Fh)
b/PORTB:
-
PORTB (RPB) gm 8 pin I/O. Thanh ghi iu khin xut nhp tng ng l
TRISB.
15
n 2
4. Cc vn v Timer
PIC16F877A c tt c 3 timer : timer0 (8 bit), timer1 (16 bit) v timer2 (8 bit).
4.1. Timer0
a/ L b nh thi hoc b m c nhng u im sau:
8 bit cho b nh thi hoc b m.
C kh nng c v vit.
C th dng ng bn trong hoc bn ngoi.
C th chn cnh xung ca xung ng h.
C th chn h s chia u vo (lp trnh bng phn mn).
Ngt trn.
SVTH: Trn Tng Bng
V Vn Chnh
16
n 2
b/ Hot ng ca Timer 0:
Timer 0 c th hot ng nh mt b nh thi hoc mt b m.Vic chn b
nh thi hoc b m c th c xc lp bng vic xo hoc t bt TOCS
ca thanh ghi OPTION_REG<5>.
Nu dng h s chia xung u vo th xo bit PSA ca thanh ghi
OPTION_REG<3>.
Trong ch b nh thi c la chn bi vic xo bit T0CS (OPTION
REG<5>), n s c tng gi tr sau mt chu k lnh nu khng chn h s
chia xung u vo.V gi tr ca n c vit ti thanh ghi TMR0.
Khi dng xung clock bn ngoi cho b nh thi Timer0 v khng dng h s
chia clock u vo Timer0 th phi p ng cc iu kin cn thit c th
hot ng l phi bo m xung clock bn ngoi c th ng b vi xung
clock bn trong (TOSC).
H s chia dng cho Timer 0 hoc b WDT. Cc h s nay khng c kh nng
c v kh nng vit. chn h s chia xung cho b tin nh ca Timer0
hoc cho b WDT ta tin hnh xo hoc t bt PSA ca thanh ghi
OPTION_REG<3>
Nhng bt PS2, PS1, PS0 ca thanh ghi OPTION_REG<2:0> dng xc lp
cc h s chia.
B tin nh c gi tr 1:2 chng hn, c ngha l : bnh thng khng s dng
b tin nh ca Timer0 (ng ngha vi tin nh t l 1:1) th c khi c tc
ng ca 1 xung clock th timer0 s tng thm mt n v. Nu s dng b tin
nh 1:4 th phi mt 4 xung clock th timer0 mi tng thm mt n v. V
hnh chung, gi tr ca timer0 (8 bit) lc ny khng cn l 255 na m l
255*4=1020.
c/ Ngt ca b Timer0
Ngt ca b Timer 0 c pht sinh ra khi thanh ghi TMR0 b trn tc t
FFh quay v 00h.Khi bt T0IF ca thanh ghi INTCON<2> s c t.
Bt ny phi c xa bng phn mm nu cho php ngt bit T0IE ca
17
n 2
Timer0
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256
WDT
1:1
1:2
1:4
1:8
1:16
1:32
1:64
1:128
18
n 2
-
19
n 2
20
n 2
21
n 2
4.3.Timer 2
a/ Timer2: l b nh thi 8 bit bao gm mt b tin nh (prescaler), mt b hu nh
Postscaler v mt thanh ghi chu k vit tt l PR2. Vic kt hp timer2 vi 2 b nh t
l cho php n hot ng nh mt b inh thi 16 bit. Module timer2 cung cp thi
gian hot ng cho ch iu bin xung PWM nu module CCP c chn.
22
n 2
1111=1:16
- bit 2 TMR2ON bit bt tt hot ng Timer 2
1= enable
0= disable
- bit 1- 0 T2CKPS1:T2CKPS0 chn h chia u vo
00 = 1:1
01 = 1:4
1x=1:16
5. NGT (INTERRUPT):
-
23
n 2
trnh c ct vo trong Stack, trong khi mt s thanh ghi quan trng s khng c
ct v c th b thay i gi tr trong qu trnh thc thi chng trnh ngt.iu ny nn
c x l bng chng trnh trnh hin tng trn xy ra.
-
24
n 2
ngt c th l cnh ln hay cnh xung v c iu khin bi bit INTEDG (thanh ghi
OPTION_ REG <6>). Khi c cnh tc ng thch hp xut hin ti pin RB0/INT, c
ngt INTF c set bt chp trng thi cc bit iu khin GIE v PEIE. Ngt ny c
SVTH: Trn Tng Bng
V Vn Chnh
25
n 2
kh nng nh thc vi iu khin t ch sleep nu bit cho php ngt c set trc
khi lnh SLEEP c thc thi.
-
Thanh ghi ny cho php iu khin chc nng pull-up ca cc pin trong PORTB, xc
lp cc tham s v xung tc ng, cnh tc ng ca ngt ngoi vi RB0 (External
Interrupt) v b m Timer0.
26
n 2
T1CKPS1:T1CKPS0
00
01
10
11
t l chia u vo
1:1
1:2
1:4
1:8
27
n 2
6.1. iu ch PWM l g?
Phng php iu ch rng xung PWM (Pulse Width Modulation) l phng php
iu chnh in p ra ti hay ni cch khc l phng php iu ch da trn s thay
i rng ca chui xung kch iu khin linh kin ng ngt (SCR hay
Transistor) dn n s thay i in p ra ti.
28
n 2
y l phng php c thc hin theo nguyn tc dng ngt ngun c ti mt cch
c chu k theo lut iu chnh thi gian ng ngt.Phn t thc hin nhim v ng ct
l cc van bn dn.S nguyn l iu khin ti dng PWM.
NGUON
Q1
Q1(B)
NPN
TAI
29
n 2
Thit lp thi gian ca 1 chu k ca xung iu ch cho PWM (period) bng cch
a gi tr thch hp vo thanh ghi PR2.
Thit lp rng xung cn iu ch (duty cycle) bng cch a gi tr vo
thanh ghi CCPRxL v cc bit CCP1CON<5:4>.
iu khin cc pin ca CCP l output bng cch clear cc bit tng ng trong
thanh ghi TRISC.
Thit lp gi tr b chia tn s prescaler ca Timer2 v cho php Timer2 hot
ng bng cch a gi tr thch hp vo thanh ghi T2CON.
Cho php CCP hot ng ch PWM.
-
30
n 2
Khi gia tr thanh ghi PR2 bang vi gia tr thanh ghi TMR2 th
qua trnh sau xay ra:
Thanh ghi TMR2 t ng c xa.
Pin ca khi CCP c set.
Gi tr thanh ghi CCPR1L (cha gi tr n nh rng xung iu ch duty
cycle) c a vo thanh ghi CCPRxH.
31
n 2
32
n 2
2/ Mch cu H L298D:
L298D l mt chip toch1 hp 2 mch trong gi 15 chn. L298D c in p danh
ngha cao (ln hn 50V) v dng in danh ngha ln hn 2A nn rt thch hp cho
cc ng dng cng sut nh nh cc ng c DC loi va v nh.
33
n 2
III/LCD
1/Chc nng v hnh dng LCD.
Ngy nay, thit b hin th LCD (Liquid Crystal Display) c s dng trong rt nhiu
cc ng dng ca vi iu khin.LCD c rt nhiu u im so vi cc dng hin th
SVTH: Trn Tng Bng
V Vn Chnh
34
n 2
Tn
Chc nng
VSS
VDD
Vee
RS
R/W
35
n 2
7-14
DB0DB7
* Ghi ch: ch c, ngha l MPU s c thng tin t LCD thng qua cc chn
DBx.
Cn khi ch ghi,ngha l MPU xut thng tin iu khin cho LCD thng qua
cc chn DBx.
Min:-0.3V , Max+7V
Cc chn ng vo (DBx, E, )
Min:-0.3V , Max:
Nhit hot ng
(Vcc+0.3V)
Min:-30C , Max:+75C
Nhit bo qun
Min:-55C , Max:+125C
4/ Tp lnh ca LCD:
Cc lnh ca LCD c th chia thnh 3 nhm nh sau:
Cc lnh v kiu hin th.
VD: Kiu hin th (1 hng / 2 hng), chiu di d liu (8 bit / 4 bit),
Ch nh a ch RAM ni.
Nhm lnh truyn d liu trong RAM ni.
36
n 2
Texe
Hot ng
(max)
Display
DB0
DBx = 0
Lnh Clear Display (x a hin th) s ghi mt khong trngblank (m hin k t 20H) vo tt c nh trong DDRAM, sau
tr b m a AC=0, tr li kiu hin th gc nu n b thay
i. Ngha l : Tt hin th, con tr di v g c tri (hng u
Return
home
1.52
ms
DBx = 0
Entry
mode set
37 us
DB0
DBx = 0
1 [I/D] [S]
vng CGRAM.
M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1
37 us
37
n 2
on/off
DB0
control
DBx = 0
1 [D]
[C] [B]
250kHz
M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1
37 us
DB0
shift
DBx = 0
1 [S/C] [R/L] *
37 us
DB0
DBx = 0
1 [DL] [N]
[F]
DL: Khi DL=1, LCD giao tip vi MPU bng giao thc 8 bit
(t bit DB7 n DB0).
Ngc li, giao thc giao tip l 4 bit (t bit DB7 n bit
DB0). Khi chn giao thc 4 bit, d liu c truyn/nhn
2 ln lin tip. vi 4 bit cao gi/nhn trc,
4 bit thp gi/nhn sau.
N: Thit lp s hng hin th. Khi N=0: hin th 1 hng, N=1:
hin th 2 hng.
SVTH: Trn Tng Bng
V Vn Chnh
38
n 2
th 2 hng
M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1
37 us
DB0
address
DBx = 0
1 [ACG][ACG][ACG][ACG]
[ACG][ACG]
Lnh ny ghi vo AC a ch ca CGRAM. K hiu [ACG] ch
1 bit ca chui d liu
6 bit. Ngay sau lnh ny l lnh c/ghi d liu t CGRAM ti
a ch c ch nh
Set
DDRAM
37 us
DB0
address
39
n 2
Read BF
and
0 us
DB0
address
(RS=0, R/W=1)
data to
DB0
CG or
DDRAM
DBx =
37 us
[Write data]
(RS=1, R/W=0)
Khi thit lp RS=1, R/W=0, d liu cn ghi c a vo
cc chn DBx t mch
ngoi s c LCD chuyn vo trong LCD ti a ch c
xc nh t lnh ghi a ch trc (lnh ghi a ch cng xc
nh lun vng RAM cn ghi)
Sau khi ghi, b m a ch AC t ng tng/gim 1 ty
theo thit lp Entry mode.
Lu l thi gian cp nht AC khng tnh vo thi gian thc
thi lnh.
Read
data from
DB0
CG
DBx =
[Read data]
(RS=1, R/W=1)
40
n 2
Cc thng s ca ng c nh sau:
+ in p DC cp cho ng c: 12VDC
+ Tc ti a 2000 vng/pht
+ S xung ca encoder 60xung/vng
+ in cm L=102mH
ng c c tt c 5 dy ra:
41
n 2
M hnh th 1
a khc
vch
B thu
pht quang
42
n 2
43
n 2
Hnh 27: th xung ca encoder c 2 vng vch lnh pha nhau 900
Hai xung a ra t 2 vng lch nhau 90 , nu vng ngoi nhanh pha hn vng
trong th chc chn ng c quay t tri sang phi v ngc li.
L vng trong cng dng pht hin im bt u ca ng c.C th vit
chng trnh cho vi iu khin nhn bit: nu c mt xung pht ra t vng trong cng
ny, tc l ng c quay ng mt vng.
Vi nhng c tnh trn, encoder dng rt ph bin trong vic xc nh v tr gc
ca ng c..
Mt loi encoder th 2 cng ph bin hin nay, l: absolute encoder.
M hnh a quang ca loi ny nh sau:
44
n 2
CHNG 3:
THIT K MCH PHN CNG
CODE CHNG TRNH V LU GII THUT
I/ THIT K MCH PHN CNG:
Mch c thit k gm c cc khi nh sau: khi ngun, khi bn phm, khi hin
th, khi mch cng sut, khi iu khin.
1/Khi ngun:
Mch ly ngun xoay chiu qua adapter AC/DC 220VAC/12VDC, v c n p nh
IC 7805.S nguyn l mch:
U2
+12V
+5V
7805
3
2
1
JACK
VI
VO
R26
1k
GND
C4
C5
100uF
100nF
J1
C6
C7
D8
100uF
100nF
LED
J2
2
1
TERMINAL2
45
n 2
R1
R2
R3
R4
10k
10k
10k
10k
PHIM 1
1
PHIM 2
2
PHIM 4
1
BUTTON
BUTTON
PHIM 12
2
SAVE
PHIM 13
2
CLEAR
J1
2
STOP
PHIM 14
2
2
RV
BUTTON
PHIM 15
2
BUTTON
PHIM 16
PHIM 11
2
PHIM 9
2
2
FW
BUTTON
PHIM 8
2
BUTTON
PHIM 7
PHIM 6
2
SIL-100-03
PHIM 10
2
BUTTON
PHIM 5
2
BUTTON
BUTTON
PHIM 3
2
1
2
3
2
ENTER
B4 1
B5 2
B6 3
B7 4
A0 5
A1 6
A2 7
A3 8
SIL-100-08
46
n 2
LCD1
15
16
7
8
9
10
11
12
13
14
D0
D1
D2
D3
D4
D5
D6
D7
RS
RW
E
4
5
6
1
2
3
48%
VSS
VDD
VEE
RV1
A
K
RT1602C
D4
D5
D6
D7
D0
D1
D2
10k
1
2
3
4
5
6
7
8
J5
SIL-100-08
R2
330
R3
330
R4
330
R5
330
R6
330
R7
330
R8
330
R9
330
D2
LED
D3
LED
D4
LED
D5
LED
D6
LED
D7
LED
D9
LED
D10
LED
+12V
+12V
VS
OUT1
OUT2
OUT3
SIL-100-05
R1
R2
0.5
0.5
OUT4
M1
14
GND
8
L298
1
2
Motor
2
1
M2
J2
M2
M1
J4
3
13
D2 1N4007
5
4
3
2
1
U1
IN1 VCC
IN2
IN3
IN4
ENA
ENB
Motor
M1
M2
+88.8
D3 1N4007
5
7
10
12
6
11
D4 1N4007
9
J3
D1 1N4007
J1
CLK
47
1
2
3
Encoder
n 2
R2
R3
R4
C1
C2
C3
C4
X1
20M
C2
R10
U1
13
14
SIL-100-08
J10
C1
C2
C3
C4
SIL-100-06
D1
R1
1N4148
10k
J9
33
6
5
4
3
2
1
2
3
4
5
6
7
3
2
1
8
9
10
SIL-100-03
33
OSC1/CLKIN
OSC2/CLKOUT
RB0/INT
RB1
RB2
RB3/PGM
RB4
RB5
RB6/PGC
RB7/PGD
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/SS/C2OUT
RC0/T1OSO/T1CKI
RE0/AN5/RD
RC1/T1OSI/CCP2
RE1/AN6/WR
RC2/CCP1
RE2/AN7/CS
RC3/SCK/SCL
RC4/SDI/SDA
MCLR/Vpp/THV
RC5/SDO
RC6/TX/CK
RC7/RX/DT
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
C3
10uF
V Vn Chnh
PIC16F877A
10k
J8
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
15
16
17
18
23
24
25
26
1
2
3
4
5
6
7
8
19
20
21
22
27
28
29
30
1
2
3
4
5
6
7
8
R1
R2
R3
R4
J3
SIL-100-08
5
4
3
2
1
J7
J6
SIL-100-05
SIL-100-08
E
RS
RW
D4
D5
D6
D7
SIL-100-08
48
n 2
Cc khai bo bin.
Cc hm con.
Cc hm phc v ngt theo sau bi 1 ch th tin x l cho bit dng ngt no.
49
n 2
// khai bo them nu c
//------khai bo bin------Int a,b;
Int16 x,y;
..
//----------cc chng trnh con------Void xu_ly_ADC ()
{
}
Int cai_dat_PWM ()
{.
Return(bin);}
//------hm ngt------#INT_TIMER1
Void xu_ly_ngt()
{
}
//-------chng trnh chnh-------Void main()
{
..}
III/ Lu gii thut:
Lu gii thut gm: lu chng trnh chnh, chng trnh qut phm, chng
trnh ngt ca timer1.
Chng trnh chnh l 1 vng lp v hn c nhng chng trnh con nh:
qut phm, check phm, chn ch , tnh PWM, nhp d liu tc , nhp
d liu thi gian, save vo epprom.
SVTH: Trn Tng Bng
V Vn Chnh
50
n 2
Chng trnh qut phm th hin gii thut nhn phm nhn v nhn bit gi
tr ca phm (phm nhn l phm no) .
Chng trnh ngt timer 1 c tc dng cp nht gi tr tc , tnh ton gi
tr PWM, v xut tnh hiu n khi hin th.
51
n 2
55
n 2
{delay_ms(200);
return (sttphim);}
output_b(0x70);// B6=0
a=0;
b=4;
checkphim(b);
if (a!=0)
{delay_ms(200);
return (sttphim);}}
//============chuong trinh check phim=============
int checkphim(b)
{
switch (b)
{
case 1:
if(!input(pin_a0))
{sttphim=1;
a=1;}
else if(!input(pin_a1))
{sttphim=2;
a=1;}
else if(!input(pin_a2))
{sttphim=3;
a=1;}
else if(!input(pin_a3))
{ sttphim=10;//thuan
a=1;}
else {}
break;
case 2:
if(!input(pin_a0))
{sttphim=4;
a=1;}
else if(!input(pin_a1))
{sttphim=5;
a=1;}
else if(!input(pin_a2))
{sttphim=6;
a=1;}
else if(!input(pin_a3))
{sttphim=11;//nghich
a=1;}
else {}
break;
SVTH: Trn Tng Bng
V Vn Chnh
56
n 2
case 3:
if(!input(pin_a0))
{sttphim=7;
a=1;}
else if(!input(pin_a1))
{sttphim=8;
a=1;}
else if(!input(pin_a2))
{sttphim=9;
a=1;}
else if(!input(pin_a3))
{sttphim=12;//stop
a=1;}
else {}
break;
case 4:
if(!input(pin_a0))
{sttphim=0;//0
a=1;}
else if(!input(pin_a1))
{sttphim=15;//save
a=1;}
else if(!input(pin_a2))
{sttphim=14;//clear
a=1;}
else if(!input(pin_a3))
{sttphim=13;//set
a=1;}
else {}
break;}
return (sttphim);
}
// chuong trinh nhan xung tu encoder
//ngat ngoai, nhan xung tu encoder
#int_ext
void RB0_isr()
{
s_xung++;//dem so xung o chan RB0
}
//ngat timer1, tinh toan pwm va hien thi
#int_timer1
void timer1_isr()
{
set_timer1(-62500);
if (t==5){
SVTH: Trn Tng Bng
V Vn Chnh
57
n 2
58
n 2
{d=1;}
else{}
set_timer0(-235);
}
else {
dem++;
set_timer0(-235);}
}
//chuong trinh chinh
void main()
{
i=0;
sttphim=0;
setpoint=0;tg=0;
duty=0;
c=0;
d=0;
ct=0;l=0;m=0;
e0=0;e1=0;e2=0;e3=0;e=0;k=0;
//================================================
============
//1:ngo vao;0: la ngo ra
set_tris_b(0b00001111);//4 chan RB4-RB7 xuat du lieu ra ban phim
set_tris_a(0b00001111);//4 chan RA0-RA3 nhan du lieu tu ban phim
set_tris_c(0b00000000);//2 chan RC0 va RC1 xuat PWM
set_tris_D(0b00000000);//port D la port xuat du lieu ra LCD
//================================================
============
setup_timer_1(T1_INTERNAL|T1_DIV_BY_8);
/* timer1 la bo dinh thoi su dung xung noi,bo chia 1:8 thay doi moi
1600ns
Dung timer1 de ngat moi 0.1s do vay ta dat gia tri cho timer1 la :
0.1s/1600ns=62500(D)=F424(H) =>gia tri nap la FFFF-F424=BDB*/
setup_timer_0(RTCC_INTERNAL|RTCC_DIV_256);
enable_interrupts(int_ext);//khoi dong ngat ngoai
ext_int_edge(H_TO_L); // xung tu cao xuong thap
enable_interrupts(global);// khoi dong bit ngat GIE
setup_timer_2(T2_DIV_BY_4,249,1);
/*timer2 dung dinh thoi cho bo PWM
mode: bo chia thoi gian (prescale) cua timer2 1:4
period: gia tri nap chi thanh ghi PR2
postscale : bo chi ra,chon 1:1 PWM khong dung
Thach anh 20MHz, PWM fre: 10000Hz, thay doi duty cycle(%) de
thay doi toc do*/
setup_ccp1(CCP_PWM);
setup_ccp2(CCP_PWM);
SVTH: Trn Tng Bng
V Vn Chnh
59
n 2
set_pwm1_duty(0);
set_pwm2_duty(0);
//================================================
===========
lcd_init()
lcd_send_byte(0,0x01);
lcd_gotoxy(1,1);
printf(lcd_putc,"CHUONG TRINH DK ");
lcd_gotoxy(1,2);
printf(lcd_putc," TD DONG CO DC ");
delay_ms(1000);
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
read_rom();
lcd_gotoxy(1,1);
printf(lcd_putc,"CHON CHE DO :_ ");
while (true)
{
while (c==0)
{
quetphim();
if (a!=0)
{
if (sttphim==1)
{ ct=1;
c=1;
lcd_gotoxy(1,1);
printf(lcd_putc,"CHON CHE DO :_%u",ct);}
if (sttphim==2)
{ ct=2;
c=1;
lcd_gotoxy(1,1);
printf(lcd_putc,"CHON CHE DO :_%u",ct);}
}
}
if (ct==1)
{lcd_gotoxy(1,1);
printf(lcd_putc,"TD_dat=_ v/p");
lcd_gotoxy(1,2);
printf(lcd_putc,"TD_luu=%lu v/p",e);}
else {
lcd_gotoxy(1,1);
printf(lcd_putc,"TD_dat=_ v/p");
lcd_gotoxy(1,2);
SVTH: Trn Tng Bng
V Vn Chnh
60
n 2
printf(lcd_putc,"TG_dat=_
While (c==1)
{
quetphim();
s");}
if (a!=0)
{
if (sttphim>=0 && sttphim<=9)//ban phim tu 0--->9
{
if (m==0)
{ghi_tocdo();}
if((ct==2)&&(m==1))
{ghi_thoigian();}
}
if (sttphim==14)
{clear();}
if ((sttphim==13)&&(i==0)&&(e==0))
{
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,1);
printf(lcd_putc,"Phai nhap TD_dat");
delay_ms(1000);
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,1);
printf(lcd_putc,"TD_dat=_");
}
if ((sttphim==15)&&(i!=0)) //luu vao eeprom
{
write_eeprom(0,e0);
delay_ms(100);
write_eeprom(1,e1);
delay_ms(100);
write_eeprom(2,e2);
delay_ms(100);
write_eeprom(3,e3);
delay_ms(100);
write_eeprom(4,i);
delay_ms(100);
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc," LUU THANH CONG ");
}
if ((sttphim==13)&&((i!=0)||(e!=0)))
SVTH: Trn Tng Bng
V Vn Chnh
61
n 2
{
if (ct==1)
{
c=2;
if (e!=0 && i==0)
luu=e;}
if ((ct==2)&&(l>=2))
{
c=2;}
m=1;
}}}
while (c==2)
{
quetphim();
if(a!=0)
{
if(sttphim==10)
{
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc," QUAY THUAN ");
if (ct==2)
{enable_interrupts(int_timer0);
set_timer1(-235);}
enable_interrupts(int_timer1);
enable_interrupts(global);
set_timer1(-62500);
set_pwm1_duty(duty);
d=1;
}
if (sttphim==11)
{
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc," QUAY NGHICH ");
if (ct==2)
{enable_interrupts(int_timer0);
set_timer1(-235);}
enable_interrupts(int_timer1);
enable_interrupts(global);
set_timer1(-62500);
set_pwm2_duty(duty);
d=2;
}
SVTH: Trn Tng Bng
V Vn Chnh
62
n 2
if (sttphim==12)//stop
{
disable_interrupts(int_timer0);
set_timer0(0);
disable_interrupts(int_timer1);
set_pwm1_duty(0);
set_pwm2_duty(0);
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc," STOP ");
duty=0;
d=0;
}
if (sttphim==14)
{
clear();
c=0;
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,1);
printf(lcd_putc,"CHON CHE DO :_ ");
}}}}}
void pwm()
{
if ((luu>s_vong)&& duty<250)
{error=luu-s_vong;
if (error>1000)
duty=duty+50;
else if (error>100)
duty=duty+20;
else if (error>30)
{duty=duty+5;}
else if (error>20)
duty=duty+1.5;
else if (error>10)
duty=duty+(0.05*error);
else {duty=duty+(0.025*error);}
}
if (luu<(s_vong-2)&& (duty>0))
{error=s_vong-luu;
if (error>=10)
SVTH: Trn Tng Bng
V Vn Chnh
63
n 2
duty=duty-(0.05*error);
else (duty=duty-(0.02*error));
}
if(luu==s_vong)
duty=duty;
if((duty>=250)&&(luu>s_vong))
{ lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,1);
printf(lcd_putc," TD_tt=MAX ");}
if (d==0)
{set_pwm1_duty(0);
set_pwm2_duty(0);}
else if (d==1)
{set_pwm1_duty(duty);
set_pwm2_duty(0);}
else
{set_pwm1_duty(0);
set_pwm2_duty(duty);}
}
//========chuong trinh con nhap toc do=======
void ghi_tocdo()
{
if(i>=0&&i<=3)
{
// giai thuat luu eeprom
if (i==0)
e0=sttphim;
else if (i==1)
e1=sttphim;
else if (i==2)
e2=sttphim;
else {e3=sttphim;}
//===============================
setpoint*=10;
setpoint+=sttphim;
i++;
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,1);
printf(lcd_putc,"TD_dat=%lu v/p",setpoint);
luu=setpoint;
}
else {
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
SVTH: Trn Tng Bng
V Vn Chnh
64
n 2
lcd_gotoxy(1,1);
printf(lcd_putc,"0<TD_dat<=9999");
delay_ms(1000);
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,1);
printf(lcd_putc,"TD_dat=%lu s",setpoint);
}}
//=========chuong trnh con nhap thoi gian=========
void ghi_thoigian()
{
if(l>=0&&l<=3)
{
tg*=10;
tg+=sttphim;
l++;
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc,"TG_dat=%lu s",tg);
tg1=tg/0.12;
}
else {
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc," 0<TG_dat<=999 ");
delay_ms(1000);
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
lcd_gotoxy(1,2);
printf(lcd_putc,"TG_dat=%lu s",tg);
}}
//============chuong trinh con clear=========
void clear()
{
setpoint=0;
tg=0;
i=0;l=0;m=0;
e0=0;e1=0;e2=0;e3=0;
lcd_gotoxy(1,1);
printf(lcd_putc,"
");
lcd_gotoxy(1,1);
printf(lcd_putc,"TD_dat=_");
lcd_gotoxy(1,2);
printf(lcd_putc,"
");
SVTH: Trn Tng Bng
V Vn Chnh
65
n 2
lcd_gotoxy(1,2);
printf(lcd_putc,"TG_dat=_");
}
//=======chuong trinh con luu toc do vao epprom======
void read_rom()
{
k=read_eeprom(4);
for (j=0;j<k;j++)
{
e=e*10;
e=e+read_eeprom(j);
}}
//==========THE END========
66
n 2
67