RISC

Processor
P R E PAR E D B Y:

G U I D E D B Y:

V I V E K K A L O L I YA ( 1 3 B E C 1 5 8 )
A L O K M I S T RY ( 1 3 B E C 1 6 1 )

P R O F.J I T E N D R A B H ATI A

Topics to be covered..
What is RISC?
RISC Characteristics
Advantages
CISC
Hybrid RISC-CISC
MISC
SIMD
VLIW

RISC Characteristics
A. Fixed length instruction
B. Few instruction
C. One machine-cycle per instruction
D. Pipelining
E. Large register set

Fixed length instruction

All the instructions of 32 bit in ARM
It is easy to fetch and decode.
Example :
ADD r0,r1,r2 (32-bit)
MUL r0,r1 (32-bit)

Few Instructions
All the ALU operations between Registers only.
Load and Store operation
Few addressing mode

Example for copying data :

ADD $S3,$Zero,$S5
(In MIPS)

Pipelining
Instruction fetch, Execution, Memory.
Most instruction complete in one cycle.

Hardwired control
Decoding instructions.

RISC Advantages
High Speed
Easy to develop and test (Short Design cycle)
Simple hardware
Simple Assembly instructions
Hardwire control

CISC
In early CPUs memory was slow and expensive
Intel 80x86 and Motorola 68K.
To make Compiler simpler.
Variable length instructions for different operation.
Less code size

CISC (CONT.)
Micro programmed control
Instruction Forms address of a location in the memory
That location has predefined bit pattern which then
generates control signals
Memory translates the instruction
Then it activates various CPU parts for execution

CISC (CONT.)
Advantages
Code size will be small compare to RISC
Simple compiler to convert from higher level
language to Assembly.
Easy to add more instructions in future
Disadvantages
20% of instructions are used
Different instructions would take different time

Hybrid RISC-CISC
Most of the processors today are based on Hybrid
RISC-CISC Architecture
A Decoder to convert CISC instruction to
RISC(Simple Hardware)
Performing it into RISC Core (Low power
consumption)

MISC
Minimal Instruction Set Computer
Stack based instruction set
Only 32 Instructions
Example:
SUB: Subtract the top value on the stack from the value
below it.

SIMD
Single Instruction Multiple Data.
An instruction performs operation on more than one data
simultaneously.

VLIW
In Digital Signal Processors.
More than one ALU used.
Parallel Processing

Embedded Processors
CISC

RISC

68000 series

Sparc

X86 family

AMD 29000

PDP-11

MIPS

VAX

SuperH

IBM 370

PowerPC
Arm

RISC Simulation In VHDL

THANK YOU