TRNG H CNG NGH THNG TIN V TRUYN THNG

KHOA CNG NGH IN T V TRUYN THNG

BI GING MN

THIT K VI MCH LP TRNH C

BIN SON :

NGUYN TH DNG

Thi Nguyn, thng 8 nm 2012

MC LC
Chng 1: KIN THC C S ........................................................................ 4
1.1. Cc khi nim chung ............................................................................... 4
1.1.1. Transistor.......................................................................................... 4
1.1.2. Vi mch s tch hp .......................................................................... 4
1.1.3. Cng logic ........................................................................................ 5
1.1.4. Phn t nh....................................................................................... 8
1.1.5. Mch logic t hp........................................................................... 10
1.1.6. Mch logic tun t .......................................................................... 11
1.2. Cc phng php th hin thit k......................................................... 12
1.2.1. M t bng s ............................................................................ 12
1.2.2. M t bng HDL............................................................................. 14
1.2. Yu cu vi mt thit k mch logic s ................................................ 16
1.3. Cc cng ngh thit k mch logic s ................................................... 17
1.4. Kin trc ca cc IC kh trnh .............................................................. 20
1.4.2. Kin trc PAL ................................................................................ 23
1.4.3. Kin trc PLA ................................................................................ 23
1.4.4. Kin trc ca GAL......................................................................... 24
1.4.5. Kin trc ca FPGA....................................................................... 26
Chng 2: GII PHP PHN CNG FPGA CA XILINX CHO THIT K
VI MCH S .................................................................................................. 29
2.1. Mt s gii php cho thit k mch logic s ......................................... 29
2.1.1. Khi nim FPGA............................................................................ 29
2.1.2. ng dng ca FPGA trong x l tn hiu s .................................. 32
2.1.3. Cng ngh ti cu trc FPGA ....................................................... 33
2.2. Kin trc ca FPGA ............................................................................. 34
2.2.1. Kin trc chung FPGA .................................................................. 34
2.2.2. So snh gia cu trc nh v cu trc ln: ................................... 37
2.2.3. So snh gia SDRAM Programming v Anti-fuse programming:38
2.3.1. Khi logic kh trnh...................................................................... 40
2.3.3. H thng kt ni kh trnh............................................................. 60
2.3.4. Cc phn t khc ca FPGA ........................................................... 62
2.4. Cc khi giao tip c trn mch Xilinx Spartan 3E Starter Kitboard FPGA. 72
2.4.1. Cc thnh phn chnh ca Xilinx Spartan 3E Starter Kitboard ......... 72
2.4.2. Mch np JTAG/PLATFORM FLASH XCF04 .............................. 73
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2.4.3. Khi ngun Power Supply .............................................................. 73

2.4.4. Khi giao tip Keypad .................................................................... 73
2.4.5. Khi 8x2 Led-Diod......................................................................... 73
2.4.6. Khi Switch .................................................................................... 74
2.4.7. Khi giao tip 4x7-seg Digits ......................................................... 74
2.4.8. Khi giao tip RS232...................................................................... 74
2.4.9. Khi giao tip USB RS232 .......................................................... 74
2.4.10. Khi giao tip PS/2....................................................................... 75
2.4.11. Khi giao tip VGA...................................................................... 75
2.4.12. Khi giao tip LCD1602A............................................................ 75
2.4.13. Khi giao tip ADC/DAC............................................................. 75
2.4.14. Khi giao tip Ethernet ................................................................. 76
Chng 3: GII PHP PHN MM CHO THIT K VI MCH S ........... 77
3.1. Gii thiu cc phn mm h tr thit k ................................................ 77
3.1.1. Hng Xilinx .................................................................................... 77
3.1.2. ISE.................................................................................................. 77
3.1.3. EDK ............................................................................................... 78
3.1.4. System Generator 9.2...................................................................... 78
3.2. Quy trnh thit k FPGA tng qut ........................................................ 78
3.2.1. M t thit k.................................................................................. 80
3.2.2. Tng hp thit k............................................................................ 81
3.2.3. Hin thc ha thit k ..................................................................... 87
3.2.4. Cu hnh FPGA .............................................................................. 93
3.3. Phn mm thit k ISE ca Xilinx ......................................................... 93
3.3.1. Gii thiu mi trng lp trnh ....................................................... 93
Chng 4: MT S BI TON THIT K MCH S TRN FPGA
SPARTAN-3E STARTER KIT BOARD ......................................................... 96
4.1. iu khin LED vi Switch v Push button.......................................... 96
4.1.1. S khi chc nng ..................................................................... 96
4.1.2. Nguyn l hot ng....................................................................... 98
4.1.3. Phn tch xy dng bi ton............................................................ 98
4.1.4. Hin thc ha thit k ................................................................... 105
4.2. Picoblaze_pwm_control ...................................................................... 115
4.2.1. S nguyn l ............................................................................ 115
4.2.2. Nguyn l hot ng..................................................................... 115
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4.2.3. Phn tch thit k .......................................................................... 115

4.2.4. Hin thc ha thit k ................................................................... 116
4.3. Chuyn i ADC ................................................................................. 122
4.3.1. S nguyn l ........................................................................... 122
4.3.2. Nguyn l hot ng..................................................................... 123
4.3.3.Phn tch thit k bi ton.............................................................. 123
4.4. iu khin LCD .................................................................................. 129
4.4.1. S khi chc nng ................................................................... 129
4.4.2. Vi iu khin PicoBlaze................................................................ 129
4.4.3. Nguyn l hot ng..................................................................... 132
4.4.4. Phn tch xy dng bi ton.......................................................... 132
4.4.5. Hin thc ha thit k ................................................................... 133
TI LIU THAM KHO ............................................................................. 139

Chng 1
KIN THC C S

1.1. Cc khi nim chung

1.1.1. Transistor
Transistor l mt linh kin bn dn thng c s dng nh mt thit
b khuch i hoc mt kha in t. Transistor l phn t c bn ca mi vi
mch s tch hp, t cc cng logic n gin AND, OR, NOT... n cc loi
phc tp nh cc mch iu khin ngoi vi, vi iu khin, vi x l... Transistor
l khi n v c bn xy dng nn cu trc mch my tnh in t v tt c
cc thit b in t hin i khc. Do p ng nhanh v chnh xc nn cc
transistor c s dng trong nhiu ng dng tng t v s, nh khuch i,
ng ct, iu chnh in p, iu khin tn hiu, v to dao ng. Transistor
cng thng c kt hp thnh mch tch hp (IC).

Hnh 1.1. Transistor

Transistor c lm t vt liu bn dn (semiconductor), l vt liu va
c kh nng dn in va c kh nng lm vic nh nhng vt liu cch in,
kh nng ny thay i ty theo kch thch t bn ngoi nh nhit , nh sng,
trng in t, dng in. Cht bn dn dng cu to transistor thng l
Germany (Ge) hoc Silicon (Si) c pha tp mt lng nh Photpho (P) hoc
Boron (B) vi mc ch tng mt electron (kiu N) t do hoc tng mt
l trng (kiu P) tng ng trong tinh th bn dn.
1.1.2. Vi mch s tch hp
Cn c gi l IC - Intergrated Circuits, chip, l cu trc mch in
c thu nh bng cch tch hp ch yu t cc transitor vi mt cao, ngoi
ra cn c th c cc linh kin in th ng khc trn mt khi bn dn mng.
Cc vi mch tch hp u c mt s lng tn hiu u vo v u ra
thc hin mt chc nng c th no .

a)
Hnh 1.2.

b)

a) M hnh Vi mch s tch hp b) Vi mch tch hp thc t

Vi mch tch hp ra i t nhng nm 1960 v c ng dng rng ri

trong thc t, v ang to ra cuc cch mng trong lnh vc in t. V d v
vi mch tch hp nh cc IC a dng (general purposes IC) h 7400, 4000, cc
dng vi x l 80x86 dng trong my vi tnh, chp x l dng cho in thoi di
ng, my nh k thut s, cc vi iu khin dng trong cc thit b dn dng, ti
vi, my git, l vi sng... Cc vi mch ny c mt tch hp t hng vi chc
n hng trm triu, v hin nay n hng t transistor trong mt ming bn
dn c kch thc xp x kch thc ng xu. Mt tch hp c nh ngha
l tng s nhng phn t tch cc (transistor hoc cng logic) cha trn mt n
v din tch ca khi tinh th bn dn. Theo mt tch hp chia ra cc loi vi
mch sau:
- Vi mch c nh SSI (Small scale integration), c hng chc transistor
trong mt vi mch.
- Vi mch c va MSI (Medium scale integration), c hng trm
transistor trong mt vi mch.
- Vi mch c ln LSI (Large scale integration), c hng ngn n hng
chc ngn transistor trong mt vi mch.
- Vi mch cc ln VLSI (Very large scale integration), c hng vn, hng
triu, hng chc triu transistor v ln hn trong mt vi mch, ti thi im hin
nay xut hin nhng vi mch c tch hp n hng t transitor.
- Vi mch siu ln ULSI (Ultra large scale intergration), vi mch c
tch hp vi mc hng triu transistor tr ln.
1.1.3. Cng logic
Cng logic hay logic gate l cu trc mch in (s khi hnh ) c
lp rp t cc linh kin in t thc hin chc nng ca cc hm logic c bn
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y = f(x n, x n-1,..., x1, x0). Trong cc tn hiu vo xn-1, x n-2,..., x1, x0 ca mch
tng ng vi cc bin logic x n-1, x n-2,..., x1, x0 ca hm . Tn hiu ra y ca mch
tng ng vi hm logic y. Vi cc cng c bn thng gi tr n < 4.

Hnh 1.3. M hnh cng logic c bn

Gi tr ca cc tn hiu vo v ra ch c hai mc l mc thp (Low - L) v
mc cao (High - H) tng ng vi vi hai gi tr 0 v 1 ca cc bin logic v
hm logic.
1.1.3.1. Mt s cng logic c bn:
* Cng logic AND
Cng AND l cng logic thc hin chc nng ca php ton nhn logic
vi 2 ng vo v 1 ng ra vi k hiu nh hnh v:

Hnh 1.4. Cng logic AND

Phng trnh logic m t cng logic AND:

Hnh 1.5. Bng chn l cng logic AND

Ng ra ch bng mc 1 khi c 2 ng vo bng 1, ng ra bng 0 khi mt
trong hai ng vo bng 0.
Cng AND c th c nhiu hn 2 u vo. Trn mt chip c th c nhiu
cng AND.
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* Cng logic OR
Cng OR l cng logic thc hin chc nng ca php ton cng logic vi
2 ng vo v 1 ng ra vi k hiu nh hnh v:

Hnh 1.6. Cng logic OR

Phng trnh logic m t cng logic OR:

Hnh 1.7. Bng chn l cng logic OR

Ng ra ch bng mc 0 khi c 2 ng vo bng 0, ng ra bng 1 khi mt
trong hai ng vo bng 1.
* Cng logic NOT
Cn gi l cng o (Inverter), c hnh v nh sau:

Hnh 1.8. Cng logic NOT

Bng chn l ca cng logic NOT:

Hnh 1.9. Bng chn l ca cng logic NOT

* Mt s cng logic thng gp khc nh NAND, NOR, EX-OR, EX-NOR...
1.1.3.2. Tham s thi gian ca cng logic:
Cc mch logic u c biu din bng cc h hm logic v do c th
pht biu l: Mi mch logic u c th xy dng t cc cng logic c bn. i
vi cc cng logic c bn th c hai tham s thi gian c bn:

Hnh 1.10. Tham s thi gian ca cng NOT

Thi gian tr lan truyn Tpd (Propagation delay) l thi gian ti thiu k
t thi im bt u xy ra s thay i t u vo X cho ti khi s thay i ny
to ra thay i xc nh ti u ra Y, hay ni mt cch khc cho ti khi u ra Y
n nh gi tr.
Tcd (Contamination delay) l khong thi gian k t thi im xut hin
s thay i ca u vo X cho ti khi u ra Y bt u xy ra s mt n nh.
Sau giai on mt n nh hay cn gi l giai on chuyn tip tn hiu ti u
ra s thit lp trng thi xc nh vng bn.
Nh vy Tpd > Tcd v khi nhc n tr ca cng th l ch ti gi tr Tpd.
1.1.4. Phn t nh
1.1.4.1. D-Latch v D-Flip Flop
Latch v Flip Flop l cc phn t nh quan trng trong thit k VLSI, s
cu to chi tit v m t c trnh by k trong mn hc K thut s.
phn ny ch nhc li nhng tnh cht c bn nht ca cc Flip Flop v b xung
thm cc tham s thi gian thc ca cc phn t ny.

Bng 1.1. D-Flip Flop v D-Latch

D-Latch l phn t nh lm vic theo mc xung, c th khi tn hiu Clock
bng 1 th gi tr Q u ra bng gi tr u vo, khi tn hiu Clock = 0 th gi tr
u ra khng i. Ni mt cch khc D-latch lm vic nh mt ca ng m
gia tn hiu Q v D tng ng vi mc in p ca xung Clock.
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D- Flip Flop l phn t nh lm vic theo sn xung, c hai dng sn l

sn ln (rising edge) khi xung thay i t 0->1 v sn xung (falling edge)
khi xung thay i t 1->0. Khi khng c yu cu g c bit th Flip Flop lm
vic vi sn xung ln thng c s dng. Khc vi D-Latch gi tr u ra
ca Flip Flop ch thay vo thi im sn xung. Vi cch lm vic nh vy gi
tr u ra s khng thay i trong sut thi gian mt chu k xung nhp d cho tn
hiu u vo thay i. D- Flip-Flop rt hay c dng trong mch c nh v vy
i khi ni n phn t nh thng ngm hiu l D- Flip Flop.

Hnh 1.11. th thi gian ca D-Flip Flop v D Latch

i vi D-Flip Flop v D-Latch nh th c hai tham s thi gian ht sc
quan trng l Tsetup, v Thold. y l tham s thi gian i vi d liu u vo
cng Din m bo vic truyn d liu sang cng ra Qout l chnh xc, c th
i vi Flip Flop.
Tsetup: L khong thi gian cn thit cn gi n nh u vo trc sn
tch cc ca xung nhp Clock
Thold: L khong thi gian ti thiu cn gi n nh d liu u vo sau
sn tch cc ca xung nhp Clock.

Hnh 1.12. Tham s thi gian ca D-Flip Flop