Ee101 Basics 1

EE101: Basics
KCL, KVL, power, Thevenins theorem
M. B. Patil
mbpatil@ee.iitb.ac.in
Department of Electrical Engineering
Indian Institute of Technology Bombay
M. B. Patil, IIT Bombay
Kirchhoffs laws
v3
A
i2
R2
v2
i3
V0
R1
v1
R3
i6
v6
v4
v4
i1
C
i4
i5
v5
I0
Kirchhoffs laws
v3
A
i2
R2
v2
v1
R3
i6
V0
R1
* Kirchhoffs
current law (KCL):
P
ik = 0 at each node.
i3
v6
v4
v4
i1
C
i4
i5
v5
I0
Kirchhoffs laws
v3
A
i2
R2
v2
i3
i1
* Kirchhoffs
current law (KCL):
P
e.g., at node B, i3 + i6 + i4 = 0.
V0
R1
v1
R3
i6
v6
v4
v4
C
i4
i5
v5
I0
Kirchhoffs laws
v3
A
i2
R2
v2
i3
R3
i6
v6
v4
v4
V0
C
i4
i5
v5
I0
R1
v1
i1
* Kirchhoffs
current law (KCL):
P
e.g., at node B, i3 + i6 + i4 = 0.
(We have followed the convention that current leaving a node is positive.)
Kirchhoffs laws
v3
A
i2
R2
v2
i3
R3
i6
v6
v4
v4
V0
C
i4
i5
v5
I0
R1
v1
i1
* Kirchhoffs
current law (KCL):
P
e.g., at node B, i3 + i6 + i4 = 0.
* Kirchhoffs
voltage law (KVL):
P
vk = 0 for each loop.
Kirchhoffs laws
v3
A
i2
R2
v2
i3
R3
i6
v6
v4
v4
V0
C
i4
i5
v5
I0
R1
v1
i1
* Kirchhoffs
current law (KCL):
P
e.g., at node B, i3 + i6 + i4 = 0.
* Kirchhoffs
voltage law (KVL):
P
e.g., v3 + v6 v1 v2 = 0.
Kirchhoffs laws
v3
A
i2
R2
v2
i3
R3
i6
v6
v4
v4
V0
C
i4
i5
v5
I0
R1
v1
i1
* Kirchhoffs
current law (KCL):
P
e.g., at node B, i3 + i6 + i4 = 0.
* Kirchhoffs
voltage law (KVL):
P
e.g., v3 + v6 v1 v2 = 0.
(We have followed the convention that voltage drop across a branch is positive.)
Circuit elements
Element
Symbol
Equation
Resistor
v =Ri
i
v
Inductor
i
v =L
di
dt
i =C
dv
dt
Capacitor
i
v
Diode
to be discussed
i
C
BJT
to be discussed
B
E
Sources
Element
Independent
Voltage source
Current source
Dependent
VCVS
VCCS
CCVS
CCCS
Symbol
v
i
v
i
v
i
v
i
v
i
v
i
Equation
v (t) = vs (t)
i(t) = is (t)
v (t) = vc (t)
i(t) = g vc (t)
v (t) = r ic (t)
i(t) = ic (t)
* , : dimensionless, r : , g : 1 or f (mho)
* The subscript c denotes the controlling voltage or current.
Instantaneous power absorbed by an element
i2
i1
V1
V2
V3
VN
iN
i3
P(t) = V1 (t) i1 (t) + V2 (t) i2 (t) + + VN (t) iN (t) ,

where V1 , V2 , etc. are node voltages (measured
with respect to a reference node).
i2
i1
V1
V2
i3
V3
VN

iN
* two-terminal element:
P = V1 i1 + V2 i2
v
V1
i1
i2
V2
= V1 i1 + V2 (i1 )
= [V1 V2 ] i1 = v i1
i2
i1
V1
V2
i3
V3
VN

iN
* two-terminal element:
P = V1 i1 + V2 i2
v
V1
i2
i1
V2
= V1 i1 + V2 (i1 )
= [V1 V2 ] i1 = v i1
* three-terminal element:
VC
VB
= VB iB + VC iC VE (iB + iC )
= (VB VE ) iB + (VC VE ) iC
iB
VE
P = VB iB + VC iC + VE (iE )
iC
iE
= VBE iB + VCE iE
Instantaneous power
* A resistor can only absorb power (from the circuit) since v and i have the same
sign, making P > 0. The energy absorbed by a resistor goes in heating the
resistor and the rest of the world.
Instantaneous power
* Often, a heat sink is provided to dissipate the thermal energy effectively so
that the device temperature does not become too high.
Instantaneous power
* A source (e.g., a DC voltage source) can absorb or deliver power since the signs
of v and i are independent. For example, when a battery is charged, it absorbs
energy which gets stored within.
Instantaneous power
* A source (e.g., a DC voltage source) can absorb or deliver power since the signs
of v and i are independent. For example, when a battery is charged, it absorbs
energy which gets stored within.
* A capacitor can absorb or deliver power. When it is absorbing power, its charge
builds up. Similarly, an inductor can store energy (in the form of magnetic flux).
Resistors in series
v1
A
v2
v3
v
B
R1
R2
R3
Resistors in series
v1
A
v2
v3
v
B
R1
R2
R3
v1 = i R1 , v2 = i R2 , v3 = i R3 , v = v1 + v2 + v3 = i (R1 + R2 + R3 )
Resistors in series
v1
A
v2
v3
v
B
R1
R2
R3
* The equivalent resistance is Req = R1 + R2 + R3 .
Resistors in series
v1
A
v2
v3
v
B
R1
R2
R3
* The equivalent resistance is Req = R1 + R2 + R3 .
* The voltage drop across Rk is v
Rk
.
Req
Resistors in parallel
v
i1
A
R1
v
B
i2
R2
i3
R3
v
i1
A
R1
v
B
i2
R2
i3
R3
i1 = G1 v , i2 = G2 v , i3 = G3 v , where G1 = 1/R1 , etc.

i = i1 + i2 + i3 = (G1 + G2 + G3 ) v .
v
i1
A
R1
v
B
i2
R2
i3
R3

i = i1 + i2 + i3 = (G1 + G2 + G3 ) v .
* The equivalent conductance is Geq = G1 + G2 + G3 , and the equivalent
resistance is Req = 1/Geq .
v
i1
A
R1
v
B
i2
R2
i3
R3

i = i1 + i2 + i3 = (G1 + G2 + G3 ) v .
* The current through Rk is i
Gk
.
Geq
v
i1
A
R1
v
B
i2
R2
i3
R3

i = i1 + i2 + i3 = (G1 + G2 + G3 ) v .
Gk
.
Geq
* If N = 2, we have
R2
R1
R1 R2
Req =
, i1 = i
, i2 = i
.
R1 + R2
R1 + R2
R1 + R2
v
i1
A
R1
v
B
i2
R2
i3
R3

i = i1 + i2 + i3 = (G1 + G2 + G3 ) v .
Gk
.
Geq
* If N = 2, we have
R2
R1
R1 R2
Req =
, i1 = i
, i2 = i
.
R1 + R2
R1 + R2
R1 + R2
* If Rk = 0, all of the current will go through Rk .
Example
i1
2
4
6V
(a)
i2
3
5
3
2.5
2.5
Example
i1
2
4
6V
(a)
i2
3
5
3
2.5
2.5
Example
i1
6V
(a)
i1
2
4
4 i2
i2
3
5
3
2.5
6V
2.5
(b)
1
3
Example
i1
6V
(a)
i1
2
4
4 i2
i2
3
5
3
2.5
6V
2.5
(b)
1
3
Example
i1
6V
4 i2
i2
5
3
i1
4
6V
(a)
(c)
i1
2
4
i2
6
3
2.5
6V
2.5
(b)
1
3
Example
i1
6V
4 i2
i2
5
3
i1
4
6V
(a)
(c)
i1
2
4
i2
6
3
2.5
6V
2.5
(b)
1
3
Example
i1
6V
4 i2
i2
5
(b)
i1
6V
6V
2.5
2.5
i1
4
(a)
(c)
i1
2
4
i2
6V
3
(d)
1
3
Example
i1
6V
4 i2
i2
5
6V
2.5
2.5
i1
6V
1
3
(b)
i1
4
(a)
(c)
i1
2
4
i2
6V
3
(d)
i1 =
6V
= 1A.
4+2
Example
i1
6V
6V
2.5
2.5
i1
6V
1
3
(b)
i1
4 i2
i2
(a)
(c)
i1
2
4
i2
6V
3
(d)
i1 =
6V
= 1A.
4+2
2
6
= A.
i2 = i1
6+3
3
Example
i1
6V
4 i2
i2
5
6V
2.5
2.5
i1
6V
i2
6V
i1 =
6V
= 1A.
4+2
2
6
= A.
i2 = i1
6+3
3
(d)
Home work:
* Verify that KCL and KVL are satisfied for each node/loop.
1
3
(b)
i1
4
(a)
(c)
i1
2
4
Example
i1
6V
4 i2
i2
5
6V
2.5
2.5
i1
6V
1
3
(b)
i1
4
(a)
(c)
i1
2
4
i2
6V
i1 =
6V
= 1A.
4+2
2
6
= A.
i2 = i1
6+3
3
(d)
Home work:
* Verify that KCL and KVL are satisfied for each node/loop.
* Verify that the total power absorbed by the resistors is equal to the power
supplied by the source.
Nodal analysis
V1
R1
R2
I0
V2
v3
R3
k v3
0
R4
V3
Nodal analysis
* Take some node as the reference node and denote

the node voltages of the remaining nodes by V1 , V2 ,
etc.
V1
R1
R2
I0
V2
v3
R3
k v3
0
R4
V3
Nodal analysis

etc.
V1
R1
R2
I0
* Write KCL at each node in terms of the node

voltages. Follow a fixed convention, e.g., current
leaving a node is positive.
V2
v3
R3
k v3
0
R4
V3
Nodal analysis

etc.
V1
R1
R2
I0

V2
v3
R3
k v3
0
R4
V3
1
(V1 V2 ) I0 k (V2 V3 ) = 0 ,
R1
1
1
1
(V2 V1 ) +
(V2 V3 ) +
(V2 ) = 0 ,
R1
R3
R2
1
1
k (V2 V3 ) +
(V3 V2 ) +
(V3 ) = 0 .
R3
R4
Nodal analysis

etc.
V1
R1
R2
I0

V2
v3
R3
k v3
0
R4
V3
1
(V1 V2 ) I0 k (V2 V3 ) = 0 ,
R1
1
1
1
(V2 V1 ) +
(V2 V3 ) +
(V2 ) = 0 ,
R1
R3
R2
1
1
k (V2 V3 ) +
(V3 V2 ) +
(V3 ) = 0 .
R3
R4
* Solve for the node voltages branch voltages and
currents.
Nodal analysis

etc.
V1
R1
R2
I0

V2
v3
R3
k v3
0
R4
V3
1
(V1 V2 ) I0 k (V2 V3 ) = 0 ,
R1
1
1
1
(V2 V1 ) +
(V2 V3 ) +
(V2 ) = 0 ,
R1
R3
R2
1
1
k (V2 V3 ) +
(V3 V2 ) +
(V3 ) = 0 .
R3
R4
* Solve for the node voltages branch voltages and
currents.
* Remark: Nodal analysis needs to be modified if there
are voltage sources.
Mesh analysis
R1
R2
R3
Vs
i1
i2
is
r1 is
Mesh analysis
R1
R2
R3
Vs
i1
r1 is
i2
is
* Write KVL for each loop in terms of the mesh currents i1 and i2 . Use a fixed
convention, e.g., voltage drop is positive. (Note that is = i1 i2 .)
Mesh analysis
R1
R2
R3
Vs
i1
r1 is
i2
is
Vs + i1 R1 + (i1 i2 ) R3 = 0 ,
R2 i2 + r1 (i1 i2 ) + (i2 i1 ) R3 = 0 .
Mesh analysis
R1
R2
R3
Vs
i1
r1 is
i2
is
Vs + i1 R1 + (i1 i2 ) R3 = 0 ,
R2 i2 + r1 (i1 i2 ) + (i2 i1 ) R3 = 0 .
* Solve for i1 and i2 compute other quantities of interest (branch currents and
branch voltages).
Linearity and superposition
* A circuit containing independent sources, dependent sources, and resistors is

linear, i.e., the system of equations describing the circuit is linear.

* The dependent sources are assumed to be linear, e.g., if we have a CCVS with
v = a ic2 + b, the resulting system will be no longer linear.

* For a linear system, we can apply the principle of superposition.

* In the context of circuits, superposition enables us to consider the independent
sources one at a time, compute the desired quantity of interest in each case, and
get the net result by adding the individual contributions.

* In the context of circuits, superposition enables us to consider the independent
sources one at a time, compute the desired quantity of interest in each case, and
get the net result by adding the individual contributions.
* Caution: Superposition cannot be applied to dependent sources.
Superposition
* Superposition refers to superposition of response due to independent sources.
Superposition

* We can consider one independent source at a time, deactivate all other
independent sources.
Superposition

* Deactivating a current source is = 0, i.e., replace the current source with an
open circuit.
Superposition

* Deactivating a current source is = 0, i.e., replace the current source with an
open circuit.
* Deactivating a voltage source vs = 0, i.e., replace the voltage source with a
short circuit.
Example
2
i1
18 V
4
3A
Example
Case 1: Keep Vs , deactivate Is .

2
i1
2
4
i1
18 V
18 V
4
3A
Example

2
i1
2
4
i1
18 V
18 V
4
3A
(1)
i1 = 3 A
Example

2
i1
18 V
(1)
i1 = 3 A
i1
18 V
4
3A
Case 2: Keep Is , deactivate Vs .

2
i1
4
3A
Example

2
i1
18 V
(1)
i1 = 3 A
i1
18 V
4
3A

2
i1
4
3A
(2)
i1 = 3 A
2
= 1A
2+4
Example

2
i1
18 V
(1)
i1 = 3 A
i1
18 V
4
3A

2
(1) (2)
inet
1 = i1 + i1 = 3 + 1 = 4 A
i1
4
3A
(2)
i1 = 3 A
2
= 1A
2+4
Example
12 V
1
6A
2i
Example
12 V
12 V
3
2i
1
6A
2i
Example
12 V
12 V
2i
6A
2i
KVL: 12 + 3 i + 2 i + i = 0
i = 2 A , v(1) = 6 V .
Example
12 V
12 V
i = 2 A , v(1) = 6 V .
3
2i
1
6A
2i
KVL: 12 + 3 i + 2 i + i = 0
1
6A
2i
Example
12 V
12 V
KVL: 12 + 3 i + 2 i + i = 0
i = 2 A , v(1) = 6 V .
3
2i
1
6A
2i
1
6A
2i
KVL: i + (6 + i) 3 + 2 i = 0
i = 3 A , v(2) = (3 + 6) 3 = 9 V .
Example
12 V
12 V
KVL: 12 + 3 i + 2 i + i = 0
i = 2 A , v(1) = 6 V .
3
2i
1
6A
2i
vnet = v(1) + v(2) = 6 + 9 = 15 V
1
6A
2i
KVL: i + (6 + i) 3 + 2 i = 0
i = 3 A , v(2) = (3 + 6) 3 = 9 V .
Superposition: Why does it work?
V1
R1
Vs
0
R3
R2
V2
B
Is
V1
R1
Vs
R3
R2
V2
B
Is
KCL at nodes A and B:

1
1
1
(V1 Vs ) +
V1 +
(V1 V2 ) = 0 ,
R1
R2
R3
1
(V2 V1 ) = 0 .
Is +
R3
V1
R1
V2
B
R3
R2
Vs
Is

1
1
1
(V1 Vs ) +
V1 +
(V1 V2 ) = 0 ,
R1
R2
R3
1
(V2 V1 ) = 0 .
Is +
R3
Writing in a matrix form, we get (using G1 = 1/R1 , etc.),

G1 + G2 + G3
G3
G3
G3

V1
V2

=
G1 Vs
Is
V1
R1
V2
B
R3
R2
Vs
Is

1
1
1
(V1 Vs ) +
V1 +
(V1 V2 ) = 0 ,
R1
R2
R3
1
(V2 V1 ) = 0 .
Is +
R3
Writing in a matrix form, we get (using G1 = 1/R1 , etc.),

G1 + G2 + G3
G3

i.e.,
V1
V2

=
G3
G3
G1 Vs
Is

V1
V2
V1
V2

=

=A
G1 Vs
Is
1
G1 Vs
Is

.
V1
A
R1
R3
R2
Vs
V2
B
Is
V1
V2

=A
G1 Vs
Is
m11
m21
m12
m22

G1 Vs
Is

.
V1
A
R1
V2
B
R3
R2
Vs
Is
V1
V2

=A
G1 Vs
Is
m11
m21
m12
m22

0
Is
G1 Vs
Is

.
We are now in a position to see why superposition works.

V1
V2

=
m11 G1
m21 G1
m12
m22

Vs
0

m11 G1
+
m21 G1
m12
m22
"
(1)
V1
(1)
V2
# "
+
(2)
V1
(2)
V2
#
.
V1
A
R1
V2
B
R3
R2
Vs
Is
V1
V2

=A
G1 Vs
Is
m11
m21
m12
m22

0
Is
G1 Vs
Is

.

V1
V2

=
m11 G1
m21 G1
m12
m22

Vs
0

m11 G1
+
m21 G1
m12
m22
"
The first vector is the response due to Vs alone (and Is deactivated).

The second vector is the response due to Is alone (and Vs deactivated).
(1)
V1
(1)
V2
# "
+
(2)
V1
(2)
V2
#
.
V1
A
R1
V2
B
R3
R2
Vs
Is
V1
V2

=A
G1 Vs
Is
m11
m21
m12
m22

0
Is
G1 Vs
Is

.

V1
V2

=
m11 G1
m21 G1
m12
m22

Vs
0

m11 G1
+
m21 G1
m12
m22
"
(1)
V1
(1)
# "
+
V2
The first vector is the response due to Vs alone (and Is deactivated).

The second vector is the response due to Is alone (and Vs deactivated).
All other currents and voltages are linearly related to V1 and V2
Any voltage (node voltage or branch voltage) or current can also be computed using
superposition.
(2)
V1
(2)
V2
#
.
Thevenins theorem
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
Thevenins theorem
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
VTh
B
Thevenins theorem
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
VTh
B
* VTh is simply VAB when nothing is connected on the other side, i.e., VTh = Voc .
Thevenins theorem
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
VTh
B
* VTh is simply VAB when nothing is connected on the other side, i.e., VTh = Voc .
* RTh can be found by different methods.
Thevenins theorem: RTh

Method 1:
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
VTh
B
* Deactivate all independent sources.

Method 1:
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
VTh
B
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)

Method 1:
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
VTh
B
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)

* RTh can often be found by inspection.

Method 1:
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A Is
VTh
Vs
B
B
B
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)

* RTh may be found by connecting a test source.

Method 1:
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A Is
VTh
Vs
B
B
B
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
A
Vs
Is
B


Method 1:
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A Is
VTh
Vs
B
B
B
RTh
Circuit
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
A
A
Vs
Is
B

Method 2:
A
Voc
* Find Voc .
Method 2:
A
Voc
* Find Voc .
* Find Isc .
Isc
Method 2:
A
Voc
* Find Voc .
* Find Isc .
Voc
* RTh =
.
Isc
Isc
Method 2:
A
Voc
* Find Voc .
* Find Isc .
Voc
* RTh =
.
Isc
* Note: Sources are not deactivated.
Isc
Thevenins theorem: example
9V
2
R3
R1
3
RL
R2
B
9V
RTh
2
R3
R1
3
RL
R2
VTh
RL
B
B
9V
RTh
2
R3
R1
3
RL
R2
VTh
RL
B
B
VTh :
2
A
9V
Voc
B
9V
RTh
2
R3
R1
3
RL
R2
VTh
RL
B
B
VTh :
2
A
9V
Voc
Voc = 9 V
= 9V
3
6+3
1
= 3V
3
9V
RTh
2
R3
R1
3
RL
R2
VTh
RL
B
B
VTh :
2
A
9V
Voc
Voc = 9 V
= 9V
3
6+3
1
= 3V
3
RTh :
2
A
3
B
9V
RTh
2
R3
R1
3
RL
R2
VTh
RL
B
B
VTh :
2
A
9V
RTh :
Voc
Voc = 9 V
= 9V
3
6+3
1
= 3V
3
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2
=3
12
+2 = 4
1+2
9V
RTh
2
R3
R1
3
RL
R2
VTh
RL
3V
RL
B
B
VTh :
2
A
9V
RTh :
Voc
Voc = 9 V
= 9V
3
6+3
1
= 3V
3
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2
=3
12
+2 = 4
1+2
Maximum power transfer
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
RL
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
RL
* Power transferred to load is,

PL = iL2 RL .
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
RL

PL = iL2 RL .
* For a given black box, what is the
value of RL for which PL is
maximum?
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
RL

PL = iL2 RL .
maximum?
* Replace the black box with its
Thevenin equivalent.

A
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
RL
RTh

PL = iL2 RL .
maximum?

iL
VTh
RL

A
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
RL
RTh

PL = iL2 RL .
maximum?

iL
VTh
RL
* iL =
B
VTh
,
RTh + RL
2
PL = VTh
RL
.
(RTh + RL )2

A
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)
RL
RTh

PL = iL2 RL .
maximum?

iL
VTh
RL
* iL =
B
VTh
,
RTh + RL
2
PL = VTh
* For
RL
.
(RTh + RL )2
dPL
= 0 , we need
dRL
(RTh + RL )2 RL 2 (RTh + RL )
= 0,
(RTh + RL )4
i.e., RTh + RL = 2 RL RL = RTh .

A
Circuit
iL
(resistors,
voltage sources,
current sources,
CCVS, CCCS,
VCVS, VCCS)

PL = iL2 RL .
RL

maximum?
RTh

iL
VTh
RL
* iL =
B
PL
VTh
,
RTh + RL
2
PL = VTh
Pmax
L
* For
RL
.
(RTh + RL )2
dPL
= 0 , we need
dRL
(RTh + RL )2 RL 2 (RTh + RL )
= 0,
(RTh + RL )4
i.e., RTh + RL = 2 RL RL = RTh .
RL
RL = RTh
Maximum power transfer: example

Find RL for which PL is maximum.
3
2
A
R1
R3
6
12 V
R2
RL
2A
B

3
2
A
R1
R3
6
12 V
RL
R2
2A
B
RTh :
R1
R3
6
R2
B

3
2
A
R1
R3
6
12 V
RL
R2
2A
B
RTh :
R1
R3
6
R2
B
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2
=3
12
+2 = 4
1+2

3
2
A
R1
6
12 V
2
R3
6
R2
B
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2
=3
6
12 V
2A
R1
2
R3
RL
R2
RTh :
Voc :
R1
R3
12
+2 = 4
1+2
R2
2A
B

3
2
A
R1
6
12 V
Voc :
2
A
R1
R3
R3
6
RL
R2
12 V
2A
R2
2A
B
RTh :
R1
R3
3
A
R1
R3
2
A
R1
R3
R2
B
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2

Use superposition to find Voc :

3
2
12
=3
+2 = 4
1+2
12 V
R2
R2
B
2A
B

3
2
A
R1
6
12 V
Voc :
2
A
R1
R3
R3
6
RL
R2
12 V
2A
R2
2A
B
RTh :
R1
R3
3
A
R1
R3
2
A
R1
R3
R2
B
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2


3
2
12
=3
+2 = 4
1+2
12 V
6
Voc = 12 = 8 V
9
(1)
R2
R2
B
2A
B

3
2
A
R1
6
12 V
Voc :
2
A
R1
R3
R3
6
RL
R2
12 V
2A
R2
2A
B
RTh :
R1
R3
3
A
R1
R3
2
A
R1
R3
R2
B
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2


3
2
12
=3
+2 = 4
1+2
12 V
6
Voc = 12 = 8 V
9
(1)
R2
R2
B
2A
B
(2)
Voc = 4 2 A = 8 V

3
2
A
R1
6
12 V
Voc :
2
A
R1
R3
R3
6
RL
R2
12 V
2A
R2
2A
B
RTh :
R1
R3
3
A
R1
R3
2
A
R1
R3
R2
B
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2


3
2
12
=3
+2 = 4
1+2
12 V
R2
R2
B
6
(2)
Voc = 12 = 8 V
Voc = 4 2 A = 8 V
9
(1)
(2)
Voc = Voc + Voc = 8 + 8 = 16 V
(1)
2A
B

3
2
A
R1
6
12 V
Voc :
2
A
R1
R3
R3
6
RL
R2
12 V
2A
R2
2A
B
RTh :
R1
R3
3
A
R1
R3
2
A
R1
R3
R2
B
RTh = (R1 k R2 ) + R3 = (3 k 6) + 2

12
=3
+2 = 4
1+2
RTh
VTh
RL
12 V
R2
R2
B
6
(2)
Voc = 12 = 8 V
Voc = 4 2 A = 8 V
9
(1)
(2)
Voc = Voc + Voc = 8 + 8 = 16 V
(1)
PL is maximum when RL = RTh = 4
iL

3
2
iL = VTh /(2 RTh ) = 2 A

2
Pmax
L = 2 4 = 16 W .
2A
B
6A
2
48 V
12
12
6A
48 V
12
12
2
RTh :
4
12
12
6A
48 V
12
12
2
RTh :
4
12
3
4
C
12
6A
48 V
12
12
2
RTh :
4
12
12
3
4
C
RTh = 7
6A
Voc :
48 V
12
2
RTh :
4
12
12
3
4
C
4
48 V
12
12
Voc
RTh = 7
6A
C i
12
6A
Voc :
48 V
12
2
6A
RTh :
4
48 V
12
12
Voc
C i
12
Note: i = 0 (since there is no return path).

VAB = VA VB
= (VA VC ) + (VC VB )
12
12
3
4
C
= VAC + VCB
= 24 V + 36 V = 60 V
RTh = 7
6A
Voc :
48 V
12
2
6A
RTh :
4
48 V
12
12
Voc
C i
12

VAB = VA VB
= (VA VC ) + (VC VB )
12
12
= VAC + VCB
= 24 V + 36 V = 60 V
3
4
C
RTh = 7
VTh = 60 V
RTh = 7
6A
Voc :
48 V
12
2
6A
RTh :
4
48 V
12
12
Voc
C i
12

VAB = VA VB
= (VA VC ) + (VC VB )
12
12
= VAC + VCB
= 24 V + 36 V = 60 V
A
3
4
C
RTh = 7
VTh = 60 V
RTh = 7
7
60 V
Graphical method for finding VTh and RTh

SEQUEL file: ee101 thevenin 1.sqproj
6A
2
48 V
12
12

6A
48 V
12
12
Connect a voltage source between A and B.

Plot i versus v.
A
4
6A
2
48 V
12
Voc = intercept on the v-axis.

Isc = intercept on the i-axis.
12

4
10
6A
48 V
i (Amp)
12
12
8
6
4
2
0
Plot i versus v.
A
4
6A
2
48 V
12

12
20
40
v (Volt)
60

4
10
6A
48 V
i (Amp)
12
12
8
6
4
2
0
Plot i versus v.
A
4
6A
2
48 V
12

12
60
Voc = 60 V, Isc = 8.5714 A
20
40
v (Volt)
RTh = Vsc /Isc = 7

4
10
6A
48 V
i (Amp)
12
12
8
6
4
2
0
Plot i versus v.
A
4
6A
48 V
60
Voc = 60 V, Isc = 8.5714 A
20
40
v (Volt)
RTh = Vsc /Isc = 7

A
12

12
VTh = 60 V
RTh = 7
7
60 V
Norton equivalent circuit
RTh
A
VTh
B
RTh
A
VTh
IN
B
RN
B
RTh
A
VTh
IN
B
* Consider the open circuit case.
RN
B
RTh
A
VTh
IN
RN

Thevenin circuit: VAB = VTh .
RTh
A
VTh
IN
RN

Norton circuit: VAB = IN RN .
RTh
A
VTh
IN
RN

VTh = IN RN .
RTh
RTh
A
VTh
IN

VTh = IN RN .
* Consider the short circuit case.
VTh
RN
RN
Isc
B
IN
Isc
B
RTh
RTh
A
VTh
IN
VTh
RN

VTh = IN RN .
Thevenin circuit: Isc = VTh /RTh .
RN
Isc
B
IN
Isc
B
RTh
RTh
A
VTh
IN
VTh
RN

VTh = IN RN .
Norton circuit: Isc = IN .
RN
Isc
B
IN
Isc
B
RTh
RTh
A
VTh
IN
VTh
RN

VTh = IN RN .
Norton circuit: Isc = IN .
RTh = RN .
RN
Isc
B
IN
Isc
B
Example
5
20 V
i
10
1A
Example
i
10
20 V
B
1A
Example
i
10
20 V
B
1A
RN = 5
IN =
20 V
= 4A
5
Example
1A
B
A
4A
5
10
B
RN = 5
IN =
10
20 V
1A
20 V
= 4A
5
Example
1A
IN =
10
20 V
B
A
4A
5
10
B
RN = 5
1A
20 V
= 4A
5
3A
5
10
Example
1A
IN =
10
20 V
RN = 5
3A
20 V
= 4A
5
10
B
A
4A
1A
i = 3A
= 1A
10
B
5
5 + 10
Example
1A
IN =
10
20 V
RN = 5
3A
20 V
= 4A
5
10
B
A
4A
1A
i = 3A
= 1A
10
B
Home work:
* Find i by superposition and compare.
5
5 + 10
Example
1A
IN =
10
20 V
RN = 5
3A
20 V
= 4A
5
10
B
A
4A
1A
i = 3A
5
5 + 10
= 1A
5
10
B
Home work:
* Find i by superposition and compare.
* Compute the power absorbed by each element and verify that
Pi = 0 .

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EE101: Basics

KCL, KVL, power, Thevenins theorem

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

Instantaneous power absorbed by an element

M. B. Patil, IIT Bombay

P(t) = V1 (t) i1 (t) + V2 (t) i2 (t) + + VN (t) iN (t) ,

Instantaneous power absorbed by an element

P(t) = V1 (t) i1 (t) + V2 (t) i2 (t) + + VN (t) iN (t) ,

where V1 , V2 , etc. are node voltages (measured

M. B. Patil, IIT Bombay

Instantaneous power absorbed by an element

P(t) = V1 (t) i1 (t) + V2 (t) i2 (t) + + VN (t) iN (t) ,

where V1 , V2 , etc. are node voltages (measured

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

i1 = G1 v , i2 = G2 v , i3 = G3 v , where G1 = 1/R1 , etc.

M. B. Patil, IIT Bombay

i1 = G1 v , i2 = G2 v , i3 = G3 v , where G1 = 1/R1 , etc.

M. B. Patil, IIT Bombay

i1 = G1 v , i2 = G2 v , i3 = G3 v , where G1 = 1/R1 , etc.

M. B. Patil, IIT Bombay

i1 = G1 v , i2 = G2 v , i3 = G3 v , where G1 = 1/R1 , etc.

M. B. Patil, IIT Bombay

i1 = G1 v , i2 = G2 v , i3 = G3 v , where G1 = 1/R1 , etc.

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay

* Take some node as the reference node and denote

M. B. Patil, IIT Bombay

* Take some node as the reference node and denote

* Write KCL at each node in terms of the node

M. B. Patil, IIT Bombay

* Take some node as the reference node and denote

* Write KCL at each node in terms of the node

M. B. Patil, IIT Bombay

* Take some node as the reference node and denote

* Write KCL at each node in terms of the node

M. B. Patil, IIT Bombay

* Take some node as the reference node and denote

* Write KCL at each node in terms of the node

M. B. Patil, IIT Bombay

M. B. Patil, IIT Bombay