Chapter-1

INTRODUCTION
This project titled Microcontroller based Bidirectional Visitor Counter is designed
and presented in order to count the visitors of auditorium, Hall, offices, malls, sports venue
etc. The system counts both the entering and exiting visitor of the auditorium or hall or
other place, where it is placed. Depending upon the interrupt from the sensors, the system
identifies the entry and exit of the visitor. On the successful implementation of the system,
it displays the number of visitor present in the auditorium or hall.
Here we use the term Bi-Directional, it means we use sensor for both entering and
exit and count the total person in the area where we placed it. It means it counts when the
person enter in the room and decrease the count when the person exit the room. This logic
is implemented with the source code with the help of Hi-Tech Compiler.
This system can be economically implemented in all the places where the visitors
have to be counted and controlled. Since counting the visitors helps to maximize the
efficiency and effectiveness of employee, floor area and sales potential of an organization,
etc. A primary method for counting the visitors involves hiring human auditors to stand
and manually tally the number of visitors who pass by a certain location. But humanbased data collection comes at great expense.
Two IR transmitter-receiver pairs are used at the passage: one pair comprising IR
transmitter IR TX1 and receiver phototransistor T1 is installed at the entry point of the
passage, while the other pair comprising IR transmitter TX2 and phototransistor T2 is
installed at the exit of the passage. The IR signals from the IR LEDs or LASER should
continuously fall on the respective phototransistors, so proper orientation of the
transmitters and phototransistors is necessary.
For bidirectional visitor counter we use the PIC16F73 microcontroller IC which is the
heart of this project. This project uses the basic electronics components such as resistors,
capacitors, voltage regulator, bridge rectifier, led, quard Op-Amp, LCD (16*2) etc.
Here we use the concept of light sensors and count the person of entering. But we
extended our logic and use the L293D for motor control for gate open and close and
modem to send data to a particular number.
1

Chapter-2

METHODOLOGY
Methodology adopted for the project consists of the following activities:
ACTIVITY 1: SURVEY
SURVEY is also called as feasibility analysis or the initial business study. It
begins with a request from the user for a new system. It involves the following:
Identify the responsible user for the system.
Identify deficiencies in the current system.
Establish goals and objective for the new system.
Determine feasibility for the new system.
Prepare a project charter that will be used to guide the remainder of the project.
ACTIVITY 2: SYSTEM ANALYSIS
The objective of system analysis activity is to develop structured system
specification for the proposed system. The structured system specification should describe
what the proposed system will do, independent of the technology which will be used to
implement these requirements. This activity includes making list of the components
needed in the project. Thus, this step also includes the designing of circuits according to
need. For example, for an opamp in inverting mode with a required gain of 100, values of
resistances should be chosen accordingly.
ACTIVIYT 3: COMPONENT SEARCH
The objective of this activity is to search the components present in the
component list and other apparatus, which will be required during the project. Once the
components are arranged the apparatus required for PCB manufacturing is arranged.
ACTIVITY 4: PRELIMIRY DESIGN
The primary objective of this step is to transform the functional specification of
the user requirement into the physical specification. The physical specification of the
2

system defines the appearance of the system for the user. This step also includes the
testing of the given i.e. designed circuit on breadboard.
ACTIVITY 5: IMPLEMENTATION
This activity involves PCB manufacturing and component mounting on that PCB.
Thus this involves soldering; integration of various components. The output of this
activity is the complete integrated system.
ACTIVITY 6: QUALITY ASSURANCE
The objective of this activity is to check whether the desirable output is produced
for given set of inputs. Thus this test aims at ensuring that the functional requirements of
the user are being met. Thus the output of this system is the accepted system. The new
system will be acceptable only if it produces satisfactory result on test data.
ACTIVITY 7: PROCEDURE DESCRIPTION
The objective of this activity is to produce a manual, which may be used as a
guide for using or operating the system. In fact, there may be several manuals catering to
the needs of different types of person. A manual should describe the manual procedures as
well as the interface with the automated portion of the system.

Chapter-3

COMPONENTS DESCRIPTION
3.1 LCD
DMC series is the name given to the dot matrix character LCD display modules
that have been developed by OPTREX CORPORATION. The modules consist of high
contrast and large viewing angle TN and STN type LC (liquid crystal) panels. Each
module contains a CMOS controller and all necessary drivers which have low power
consumption. The controller is equipped with an internal character generator ROM, RAM
and RAM for display data. All display functions are controllable by instructions making
interfacing practical. Both display data RAM and character generator RAM can be read
making it possible to use any part not used for display as general data RAM. The products
of this series therefore have wide application possibilities in the field of terminal display
or display for measuring devices.
It is an electronically modulated optical device made up of any number of
segments filled with liquid crystals and arrayed in front of a light source (backlight) or
reflector to produce images in color or monochrome. The most flexible ones use an array
of small pixels.
Each pixel of an LCD typically consists of a layer of molecules aligned between
two transparent electrodes, and two polarizing filters, the axes of transmission of which
are (in most of the cases) perpendicular to each other. With no actual liquid crystal
between the polarizing filters, light passing through the first filter would be blocked by
the second (crossed) polarizer.
The surfaces of the electrodes that are in contact with the liquid crystal material
are treated so as to align the liquid crystal molecules in a particular direction. This
treatment typically consists of a thin polymer layer that is unidirectional rubbed using, for
example, a cloth. The direction of the liquid crystal alignment is then defined by the
direction of rubbing. Electrodes are made of a transparent conductor called Indium Tin
Oxide (ITO). The Liquid Crystal Display is intrinsically a passive device, it is a simple
4

light valve. The managing and control of the data to be displayed is performed by one or
more circuits commonly denoted as LCD drivers.
Before applying an electric field, the orientation of the liquid crystal molecules
is determined by the alignment at the surfaces of electrodes. In a twisted nematic device
(still the most common liquid crystal device), the surface alignment directions at the two
electrodes are perpendicular to each other, and so the molecules arrange themselves in a
helical structure, or twist. This reduces the rotation of the polarization of the incident
light, and the device appears grey. If the applied voltage is large enough, the liquid crystal
molecules in the center of the layer are almost completely untwisted and the polarization
of the incident light is not rotated as it passes through the liquid crystal layer. This light
will then be mainly polarized perpendicular to the second filter, and thus be blocked and
the pixel will appear black. By controlling the voltage applied across the liquid crystal
layer in each pixel, light can be allowed to pass through in varying amounts thus
constituting different levels of gray.

Fig. 3.1 Liquid Crystal Diode

5

3.1.1 Pin Assignment

Table 3.1 Pin Assignment of LCD

3.2 L293D IC:L293D is a dual H-bridge motor driver integrated circuit (IC). Motor drivers act as
current amplifiers since they take a low-current control signal and provide a highercurrent signal. This higher current signal is used to drive the motors.
L293D contains two inbuilt H-bridge driver circuits. In its common mode of
operation, two DC motors can be driven simultaneously, both in forward and reverse
direction. The motor operations of two motors can be controlled by input logic at pins 2 &
7 and 10 & 15. Input logic 00 or 11 will stop the corresponding motor. Logic 01 and 10
will rotate it in clockwise and anticlockwise directions, respectively.
6

Enable pins 1 and 9 (corresponding to the two motors) must be high for motors to
start operating. When an enable input is high, the associated driver gets enabled. As a
result, the outputs become active and work in phase with their inputs. Similarly, when the
enable input is low, that driver is disabled, and their outputs are off and in the highimpedance state.

Fig. 3.2 - L293D IC pin layout

3.2.1 Pin Description
Table 3.2 - Pin Description of L293D

3.3 DC motor
While controlling the speed of a DC motor with a single transistor has many
advantages it also has one main disadvantage, the direction of rotation is always the same,
its a "Uni-directional" circuit. In many applications we need to operate the motor in both
directions forward and back. One very good way of achieving this is to connect the motor
into a Transistor H-bridge circuit arrangement and this type of circuit will give us "Bi
directional" DC motor control as shown below.

Fig. 3.3 - Bi-directional H-bridge Circuit

The H-bridge circuit above, is so named because the basic configuration of the
four switches, either electro-mechanical relays or transistors resembles that of the letter
"H" with the motor positioned on the centre bar. The Transistor or MOSFET H-bridge is
probably one of the most commonly used type of bi-directional DC motor control circuits
which uses "complementary transistor pairs" both NPN and PNP in each branch with the
transistors being switched together in pairs to control the motor. Control input A operates
the motor in one direction ie, Forward rotation and input B operates the motor in the other
direction ie, Reverse rotation. Then by switching the transistors "ON" or "OFF" in their
"diagonal pairs" results in directional control of the motor.
For example, when transistor TR1 is "ON" and transistor TR2 is "OFF", point A is
connected to the supply voltage (+Vcc) and if transistor TR3 is "OFF" and
transistor TR4 is "ON" point B is connected to 0 volts (GND). Then the motor will rotate
in one direction corresponding to motor terminal A being positive and motor
terminal B being negative. If the switching states are reversed so that TR1 is
"OFF", TR2 is "ON",TR3 is "ON" and TR4 is "OFF", the motor current will now flow in
the opposite direction causing the motor to rotate in the opposite direction.

Then, by applying opposite logic levels "1" or "0" to the inputs A and B the motors
rotational direction can be controlled as follows.
Table 3.3 - H-bridge Truth Table

It is important that no other combination of inputs are allowed as this may cause
the power supply to be shorted out, ie both transistors, TR1 and TR2 switched "ON" at
the same time, (fuse = bang!).
As with uni-directional DC motor control as seen above, the rotational speed of
the motor can also be controlled using Pulse Width Modulation or PWM. Then by
combining H-bridge switching with PWM control, both the direction and the speed of the
motor can be accurately controlled. Commercial off the shelf decoder IC's such as the
SN754410 Quad Half H-Bridge IC or the L298N which has 2 H-Bridges are available
with all the necessary control and safety logic built in are specially designed for H-bridge
bi-directional motor control circuits.
This type of circuit uses a bipolar Transistor (A Darlington transistor may also be
used were a higher current rating is required) to control the motor from a single power
supply. By varying the amount of base current flowing into the transistor the speed of the
motor can be controlled for example, if the transistor is turned on "half way", then only
half of the supply voltage goes to the motor. If the transistor is turned "fully ON"
(saturated), then all of the supply voltage goes to the motor and it rotates faster. Then for
this linear type of control, power is delivered constantly to the motor as shown below.

10

Fig. 3.4 - Unipolar Transistor Switch

The simple switching circuit on the left, shows the connections for a Unidirectional(one direction only) motor control circuit. A continuous logic "1" or logic "0"
is applied to the input of the circuit to turn the motor "ON" (saturation) or "OFF" (cut-off)
respectively, with the flywheel diode connected across the motor terminals to protect the
switching transistor or MOSFET from any back emf generated by the motor when the
transistor turns the supply "OFF".

3.4 LM324 IC
LM324 is a 14pin IC consisting of four independent operational amplifiers (op-amps)
compensated in a single package. Op-amps are high gain electronic voltage amplifier with
differential input and, usually, a single-ended output. The output voltage is many
timeshigher than the voltage difference between input terminals of an op-amp.
These op-amps are operated by a single power supply LM324 and need for a dual supply
is eliminated. They can be used as amplifiers, comparators, oscillators, rectifiers etc. The
conventional op-amp applications can be more easily implemented with LM324.
This circuit demonstrates the principle of operation of opamp (operational amplifier) as
comparator. A comparator is a device which compares two voltages or currents and
switches its output to indicate which is larger. A standard op-amp operating without
negative feedback is used as a comparator. When the non-inverting input (V+) is at a
11

higher voltage than the inverting input (V-), the high gain of the op-amp causes it to
output the most positive voltage it can. When the non-inverting input (V+) drops below
the inverting input (V-), the op-amp outputs the most negative voltage it can. Since the
output voltage is limited by the supply voltage.

Inputs

Output

->+

Negative

+>-

Floating

Fig. 3.5 - Pin layout of LM324 IC

Table 3.5 - Pin Description of LM324 IC

12

3.5 LM317 IC
The LM317T is a adjustable 3 terminal positive voltage regulator capable of
supplying in excess of 1.5 amps over an output range of 1.25 to 37 volts. The device also
has built in current limiting and thermal shutdown which makes it essentially blow-out
proof.
Output voltage is set by two resistors R1 and R2 connected as shown below. The
voltage across R1 is a constant 1.25 volts and the adjustment terminal current is less than
100uA. The output voltage can be closely approximated from Vout=1.25 * (1+(R2/R1))
which ignores the adjustment terminal current ``but will be close if the current through R1
and R2 is many times greater. A minimum load of about 10mA is required, so the value
for R1 can be selected to drop 1.25 volts at 10mA or 120 ohms. Something less than 120
ohms can be used to insure the minimum current is greater than 10mA. The example
below shows a LM317 used as 13.6 volt regulator. The 988 ohm resistor for R2 can be
obtained with a standard 910 and 75 ohm in series.
When power is shut off to the regulator the output voltage should fall faster than
the input. In case it doesn't, a diode can be connected across the input/output terminals to
protect the regulator from possible reverse voltages. A 1uF tantalum or 25uF electrolytic
capacitor across the output improves transient response and a small 0.1uF tantalum
13

capacitor is recommended across the input if the regulator is located an appreciable

distance from the power supply filter. The power transformer should be large enough so
that the regulator input voltage remains 3 volts above the output at full load, or 16.6 volts
for a 13.6 volt output.

Fig 3.6:- Pin Layout of LM317

Table 3.6 - Specifications of LM317

3.5.2 Cross Reference LM317 vs 7805 Voltage Regulators

For a regulated 5V supply, is there any reason to use a LM317 circuit rather than the 7805
regulator?
If it's for digital, consider a switching power supply; they're far more efficient.
If it's for linear, you really need a linear supply.

14

The 7805 and LM317 ICs have been around for a long time, and they still work.
However, they have a minimum Vdrop of about 1.7V across them, which means they
consume power and generate heat. "Low dropout voltage" it means that the difference
between the input and output voltage is lower than the typical 1.7V. Those regulators use
a more efficient scheme to pass current through than traditional linear regulators.

3.6 Regulator IC(7805):The 7805 voltage regulators employ built-in current limiting, thermal shutdown,
and safe-operating area protection which make them virtually immune to damage from
output overloads. 7805 is a three-terminal positive voltage regulator.
With adequate heat sinking, it can deliver in excess of 0.5A output current. Typical
applications would include local (on-card) regulators which can eliminate the noise and
degraded performance associated with single-point regulation.
7805 regulator comes from the 78xx family of self-contained fixed linear voltage
regulator integrated circuits. The 78xx family is a very popular choice for many electronic
circuits which require a regulated power supply, due to their ease of use and relative
cheapness. When specifying individual ICs within this family, the xx is replaced with a
two-digit number, which indicates the output voltage the particular device is designed to
provide (for example, the 7805 voltage regulator has a 5 volt output, while the 7812
produces 12 volts). The 78xx lines are positive voltage regulators, meaning that they are
designed to produce a voltage that is positive relative to a common ground. There is a
related line of 79xx devices which are complementary negative voltage regulators. 78xx
and 79xx ICs can be used in combination to provide both positive and negative supply
voltages in the same circuit, if necessary.
7805 ICs have three terminals and are most commonly found in the TO220 form
factor, although smaller surface-mount and larger TO3 packages are also available from
some manufacturers. These devices typically support an input voltage which can be
anywhere from a couple of volts over the intended output voltage, up to a maximum of 35
or 40 volts, and can typically provide up to around 1 or 1.5 amps of current (though
smaller or larger packages may have a lower or higher current rating).

15

The 7805 series has several key advantages over many other voltage regulator circuits
which have resulted in its popularity:
7805 series ICs do not require any additional components to provide a constant,
regulated source of power, making them easy to use, as well as economical, and also
efficient uses of circuit board real estate. By contrast, most other voltage regulators
require several additional components to set the output voltage level, or to assist in the
regulation process. Some other designs (such as a switching power supply) can require
not only a large number of components but also substantial engineering expertise to
implement correctly as well.
7805 series ICs have built-in protection against a circuit drawing too much power.
They also have protection against overheating and short-circuits, making them quite
robust in most applications. In some cases, the current-limiting features of the 7805
devices can provide protection not only for the 7805 itself, but also for other parts of the
circuit it is used in, preventing other components from being damaged as well.

Fig 3.7:- Pin layout and mounting overview of 7805 IC

3.7 Preset
A preset is a three legged electronic component which can be made to offer varying
resistance in a circuit. The resistance is varied by adjusting the rotary control over it. The
adjustment can be done by using a small screw driver or a similar tool. The resistance
does not vary linearly but rather varies in exponential or logarithmic manner. Such
variable resistors are commonly used for adjusting sensitivity along with a sensor.

16

Fig. 3.8 - Preset

The variable resistance is obtained across the single terminal at front and one of the two
other terminals. The two legs at back offer fixed resistance which is divided by the front
leg. So whenever only the back terminals are used, a preset acts as a fixed resistor. Presets
are specified by their fixed value resistance.

3.8 PIC16F73 Microcontroller

3.8.1 Introduction
3.8.1.1 Peripheral Features

Timer0: 8-bit timer/counter with 8-bit prescaler.

Timer1: 16-bit timer/counter with prescaler, can be incremented during SLEEP via

external crystal/clock.
Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler.
Two Capture, Compare, PWM modules.
Capture is 16-bit, max. resolution is 12.5 ns.
Compare is 16-bit, max. resolution is 200 ns.
PWM max. resolution is 10-bit.
8-bit, up to 8-channel Analog-to-Digital converter.
Synchronous Serial Port (SSP) with SPI(Master mode) and I2C(Slave).
Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI).
Parallel Slave Port (PSP), 8-bits wide with external RD, WR and CS controls

(40/44-pin only).
Brown-out detection circuitry for Brown-out Reset (BOR).

17

Fig. 3.9 - Pin layout of PIC16F73

Table 3.7 - PIC16F73 Features

18

Fig. 3.10 - PIC16F73 Architecture

Table 3.8 PIC16F73 Pinout Deccription

19

20

3.8.2 MEMORY ORGANIZATION

There are two memory blocks in each of these PICmicro MCUs. The Program
Memory and Data Memory have separate buses so that concurrent access can occur and is
detailed in this section.
21

 Program Memory Organization

o The PIC16F7X devices have a 13-bit program counter capable of addressing an 8K word
x 14-bit program memory space. The PIC16F77/76 devices have 8K words of FLASH
program memory and the PIC16F73/74 devices have 4K words. The program memory
maps for PIC16F7X devices are shown in Figure 2-1. Accessing a location above the
physically implemented address will cause a wraparound. The RESET Vector is at 0000h
and the Interrupt Vector is at 0004h.
Data Memory Organization
o The Data Memory is partitioned into multiple banks, which contain the General Purpose
Registers and the Special Function Registers. Bits RP1 (STATUS<6>) and RP0
(STATUS<5>) are the bank select bits: Each bank extends up to 7Fh (128 bytes). The
lower locations of each bank are reserved for the Special Function Registers. Above the
Special Function Registers are General Purpose Registers, implemented as static RAM.
All implemented banks contain Special Function Registers. Some frequently used Special
Function Registers from one bank may be mirrored in another bank for code reduction
and quicker access.

Fig. 3.11 -

Program Memory Map

and Stacks for

PIC16F73

3.8.3 Special

function registers

3.8.3.1 STATUS

Register

The STATUS

register contains the

arithmetic status

of the ALU, the

RESET status

and the bank select bits

for data memory.

The STATUS register

can be the

destination for any

instruction, as

with any other register.

If the STATUS

register is the

destination for

an instruction that

affects the Z, DC, or C bits, then the write to these three bits is disabled. These bits are set
or cleared according to the device logic. Furthermore, the TO and PD bits are not
22

writable, therefore, the result of an instruction with the STATUS register as destination
may be different than intended.
For example, CLRF STATUS will clear the upper three bits and set the Z bit. This leaves
the STATUS register as 000u u1uu (where u = unchanged). It is recommended, therefore,
that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS
register, because these instructions do not affect the Z, C, or DC bits from the STATUS
register.
3.8.3.2 OPTION_REG Register
The OPTION_REG register is a readable and writable register, which contains
various control bits to configure the TMR0 prescaler/WDT postscaler (single assignable
register known also as the prescaler), the External INT Interrupt, TMR0 and the weak
pull-ups on PORTB.
3.8.3.3 INTCON Register
The INTCON register is a readable and writable register, which contains various
enable and flag bits for the TMR0 register overflow, RB Port change and External
RB0/INT pin interrupts.
3.8.3.4 PIE1 Register
The PIE1 register contains the individual enable bits for the peripheral interrupts.

bit 7 PSPIE(1): Parallel Slave Port Read/Write Interrupt Enable bit

1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
bit 6 ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
23

bit 5 RCIE: USART Receive Interrupt Enable bit

1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
bit 4 TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
bit 3 SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
bit 2 CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
bit 1 TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
bit 0 TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as 0
- n = Value at POR reset 1 = Bit is set 0 = Bit is cleared x = Bit is unknown

3.8.3.5 PIR1 Register

24

The PIR1 register contains the individual flag bits for the peripheral interrupts. Interrupt
flag bits are set when an interrupt condition occurs, regardless of the state of its
corresponding enable bit

bit 7 PSPIF(1): Parallel Slave Port Read/Write Interrupt Flag bit

1 = A read or a write operation has taken place (must be cleared in software)
0 = No read or write has occurred
bit 6 ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion is completed (must be cleared in software)
0 = The A/D conversion is not complete
bit 5 RCIF: USART Receive Interrupt Flag bit
1 = The USART receive buffer is full
0 = The USART receive buffer is empty
bit 4 TXIF: USART Transmit Interrupt Flag bit
1 = The USART transmit buffer is empty
0 = The USART transmit buffer is full
bit 3 SSPIF: Synchronous Serial Port (SSP) Interrupt Flag
1 = The SSP interrupt condition has occurred, and must be cleared in software
before returning from the Interrupt Service Routine.
bit 2 CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
25

1 = A TMR1 register capture occurred (must be cleared in software)

0 = No TMR1 register capture occurred
PWM mode:
Unused in this mode
bit 1 TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
bit 0 TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Note 1: PSPIF is reserved on 28-pin devices; always maintain this bit clear.

3.8.3.6 PCON Register

The Power Control (PCON) register contains flag bits to allow differentiation between a
Power-on Reset (POR), a Brown-out Reset (BOR), a Watchdog Reset (WDT) and an
external MCLR Reset. BOR is unknown on POR. It must be set by the user and checked
on subsequent RESETS to see if BOR is clear, indicating a brown-out has occurred. The
BOR status bit is not predictable if the brown-out circuit is disabled (by clearing the
BODEN bit in the configuration word).

bit 7-2 Unimplemented: Read as '0'

bit 1 POR: Power-on Reset Status bit

26

1 = No Power-on Reset occurred

0 = A Power-on Reset occurred (must be set in software after a Power-on Reset
occurs)
bit 0 BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset
occurs)

3.8.3.7 PCL and PCLATH

The program counter (PC) is 13 bits wide. The low byte comes from the PCL
register, which is a readable and writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the PCLATH register. On any RESET, the
upper bits of the PC will be cleared.

3.8.4 READING PROGRAM MEMORY

The FLASH Program Memory is readable during normal operation over the entire
VDD range. It is indirectly addressed through Special Function Registers (SFR). Up to
14-bit numbers can be stored in memory for use as calibration parameters, serial numbers,
packed 7-bit ASCII, etc. Executing a program memory location containing data that forms
an invalid instruction results in a NOP.
There are five SFRs used to read the program and memory. These registers are:
PMCON1
PMDATA
PMDATH
PMADR
PMADRH
27

The program memory allows word reads. Program memory access allows for checksum
calculation and reading calibration tables. When interfacing to the program memory
block, the PMDATH:PMDATA registers form a two-byte word, which holds the 14-bit
data for reads. The PMADRH:PMADR registers form a two-byte word, which holds the
13-bit address of the FLASH location being accessed. These devices can have up to 8K
words of program FLASH, with an address range from 0h to 3FFFh. The unused upper
bits in both the PMDATH and PMADRH registers are not implemented and read as 0s.
3.8.4.1 PMADR
The address registers can address up to a maximum of 8K words of program
FLASH. When selecting a program address value, the MSByte of the address is written to
the PMADRH register and the LSByte is written to the PMADR register. The upper
MSbits of PMADRH must always be clear.
3.8.4.2 PMCON1 Register
PMCON1 is the control register for memory accesses. The control bit RD initiates
read operations. This bit cannot be cleared, only set, in software. It is cleared in hardware
at the completion of the read operation.

3.8.5 Reading the FLASH Program Memory

A program memory location may be read by writing two bytes of the address to
the PMADR and PMADRH registers and then setting control bit RD (PMCON1<0>).
Once the read control bit is set, the microcontroller will use the next two instruction
cycles to read the data. The data is available in the PMDATA and PMDATH registers after
the second NOP instruction. Therefore, it can be read as two bytes in the following
instructions. The PMDATA and PMDATH registers will hold this value until the next read
operation.
3.8.5.1 Operation During Code Protect
FLASH program memory has its own code protect mechanism. External Read and
Write operations by programmers are disabled if this mechanism is enabled. The
28

microcontroller can read and execute instructions out of the internal FLASH program
memory, regardless of the state of the code protect configuration bits.

3.8.6 I/O PORTS

Some pins for these I/O ports are multiplexed with an alternate function for the
peripheral features on the device. In general, when a peripheral is enabled, that pin may
not be used as a general purpose I/O pin.
3.8.6.1 PORTA and the TRISA Register:PORTA is a 6-bit wide, bi-directional port. The corresponding data direction
register is TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA pin an
input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a
TRISA bit (= 0) will make the corresponding PORTA pin an output (i.e., put the
contents of the output latch on the selected pin). Reading the PORTA register reads the
status of the pins, whereas writing to it will write to the port latch. All write operations are
read-modify-write operations. Therefore, a write to a port implies that the port pins are
read, the value is modified and then written to the port data latch.
Pin RA4 is multiplexed with the Timer0 module clock input to become the
RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and an open drain
output. All other PORTA pins have TTL input levels and full CMOS output drivers. Other
PORTA pins are multiplexed with analog inputs and analog VREF input. The operation of
each pin is selected by clearing/setting the control bits in the ADCON1 register (A/D
Control Register1). On a Power-on Reset, these pins are configured as analog inputs and
read as '0'.
The TRISA register controls the direction of the RA pins, even when they are
being used as analog inputs. The user must ensure the bits in the TRISA register are
maintained set, when using them as analog inputs.
Table 3.9 - Port A functions

29

Table 3.10 - Summery of registers associated with port A

3.8.6.2 PORTB and the TRISB Register

PORTB is an 8-bit wide, bi-directional port. The corresponding data direction
register is TRISB. Setting a TRISB bit (= 1) will make the corresponding PORTB pin an
input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a
TRISB bit (= 0) will make the corresponding PORTB pin an output (i.e., put the
contents of the output latch on the selected pin). Each of the PORTB pins has a weak
internal pull-up. A single control bit can turn on all the pull-ups. This is performed by
clearing bit RBPU (OPTION_REG<7>). The weak pull-up is automatically turned off
when the port pin is configured as an output. The pull-ups are disabled on a Power-on
Reset.
This interrupt can wake the device from SLEEP. The user, in the Interrupt Service
Routine, can clear the interrupt in the following manner:
(a) Any read or write of PORTB. This will end the mismatch condition.
(b) Clear flag bit RBIF.
30

A mismatch condition will continue to set flag bit RBIF. Reading PORTB will end
the mismatch condition and allow flag bit RBIF to be cleared. The interrupt-on-change
feature is recommended for wake-up on key depression operation and operations where
PORTB is only used for the interrupt-on-change feature. Polling of PORTB is not
recommended while using the interrupt-on-change feature.
This interrupt on mismatch feature, together with software configurable pull-ups
on these four pins, allow easy interface to a keypad and make it possible for wake-up on
key depression. RB0/INT is an external interrupt input pin and is configured using the
INTEDG bit (OPTION_REG<6>). Four of the PORTB pins (RB7:RB4) have an
interrupt- on-change feature. Only pins configured as inputs can cause this interrupt to
occur (i.e., any RB7:RB4 pin configured as an output is excluded from the interrupt- onchange comparison). The input pins (of RB7:RB4) are compared with the old value
latched on the last read of PORTB. The mismatch outputs of RB7:RB4 are ORed
together to generate the RB Port Change Interrupt with flag bit RBIF (INTCON<0>).

Table 3.11 - Summery of Registers associated with Port B

Table 3.12 - Port B functions

31

3.8.6.3 PORTC and the TRISC Register

PORTC is an 8-bit wide, bi-directional port. The corresponding data direction
register is TRISC. Setting a TRISC bit (= 1) will make the corresponding PORTC pin an
input (i.e., put the corresponding output driver in a Hi-Impedance mode). Clearing a
TRISC bit (= 0) will make the corresponding PORTC pin an output (i.e., put the
contents of the output latch on the selected pin). PORTC is multiplexed with several
peripheral functions. PORTC pins have Schmitt Trigger input buffers.
When enabling peripheral functions, care should be taken in defining TRIS bits
for each PORTC pin. Some peripherals override the TRIS bit to make a pin an output,
while other peripherals override the TRIS bit to make a pin an input. Since the TRIS bit
override is in effect while the peripheral is enabled, read-modify-write instructions (BSF,
BCF, XORWF) with TRISC as destination should be avoided.

Table 3.13 - Port C Functions

32

Table 3.14 - Summary of Registers associate with port C

3.8.7 TIMERS
3.8.7.1 TIMER0 MODULE
The Timer0 module timer/counter has the following features:
8-bit timer/counter
Readable and writable
8-bit software programmable prescaler
Internal or external clock select
Interrupt on overflow from FFh to 00h
Edge select for external clock

33

Timer0 operation is controlled through the OPTION_REG register In Timer mode,

the Timer0 module will increment every instruction cycle (without prescaler). If the
TMR0 register is written, the increment is inhibited for the following two instruction
cycles. The user can work around this by writing an adjusted value to the TMR0 register.
Counter mode is selected by setting bit T0CS (OPTION_REG<5>). In Counter mode,
Timer0 will increment, either on every rising or falling edge of pin RA4/T0CKI. The
incrementing edge is determined by the Timer0 Source Edge Select bit T0SE
(OPTION_REG<4>). The prescaler is mutually exclusively shared between the Timer0
module and the Watchdog Timer.
The TMR0 interrupt is generated when the TMR0 register overflows from FFh to 00h.
This overflow sets bit TMR0IF (INTCON<2>). The interrupt can be masked by clearing
bit TMR0IE (INTCON<5>). The TMR0 interrupt cannot awaken the processor from
SLEEP, since the timer is shut-off during SLEEP.
Prescaler
There is only one prescaler available on the microcontroller; it is shared
exclusively between the Timer0 module and the Watchdog Timer. The usage of the
prescaler is also mutually exclusive: that is, a prescaler assignment for the Timer0 module
means that there is no prescaler for the Watchdog Timer, and vice versa. This prescaler is
not readable or writable

3.8.7.2 TIMER1 MODULE

The Timer1 module is a 16-bit timer/counter consisting of two 8-bit registers
(TMR1H and TMR1L), which are readable and writable. The TMR1 Register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh and rolls over to 0000h. The TMR1
Interrupt, if enabled, is generated on overflow, which is latched in interrupt flag bit
TMR1IF (PIR1<0>). This interrupt can be enabled/disabled by setting/clearing TMR1
interrupt enable bit TMR1IE (PIE1<0>).
Timer1 can operate in one of two modes:
As a timer
As a counter

34

The operating mode is determined by the clock select bit, TMR1CS (T1CON<1>). In
Timer mode, Timer1 increments every instruction cycle. In Counter mode, it increments
on every rising edge of the external clock input. Timer1 can be enabled/disabled by
setting/clearing control bit TMR1ON (T1CON<0>). Timer1 also has an internal RESET
input. This RESET can be generated by either of the two CCP modules as the special
event trigger When the Timer1 oscillator is enabled (T1OSCEN is set), the
RC1/T1OSI/CCP2 and RC0/T1OSO/T1CKI pins become inputs. That is, the
TRISC<1:0> value is ignored and these pins read as 0.

Fig. 3.12 - T1CON: Timer 1 register

Timer1 Operation in Timer Mode
Timer mode is selected by clearing the TMR1CS (T1CON<1>) bit. In this mode,
the input clock to the timer is FOSC/4. The synchronize control bit T1SYNC
(T1CON<2>) has no effect, since the internal clock is always in sync.
Timer1 Counter Operation
Timer1 may operate in Asynchronous or Synchronous mode, depending on the
setting of the TMR1CS bit. When Timer1 is being incremented via an external source,
increments occur on a rising edge. After Timer1 is enabled in Counter mode, the module
must first have a falling edge before the counter begins to increment.
3.8.7.3 TIMER2 MODULE
Timer2 is an 8-bit timer with a prescaler and a postscaler. It can be used as the
PWM time-base for the PWM mode of the CCP module(s). The TMR2 register is
readable and writable, and is cleared on any device RESET.
The input clock (FOSC/4) has a prescale option of 1:1, 1:4 or 1:16, selected by control
bits T2CKPS1:T2CKPS0 (T2CON<1:0>). The Timer2 module has an 8-bit period
register, PR2. Timer2 increments from 00h until it matches PR2 and then resets to 00h on
the next increment cycle. PR2 is a readable and writable register. The PR2 register is
35

initialized to FFh upon RESET. The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive) to generate a TMR2 interrupt
(latched in flag bit TMR2IF, (PIR1<1>)). Timer2 can be shut-off by clearing control bit
TMR2ON (T2CON<2>) to minimize power consumption.

3.8.8 SPECIAL FEATURES OF THE CPU

These devices have a host of features intended to maximize system reliability,
minimize cost through elimination of external components, provide power saving
operating modes and offer code protection. These are:
Oscillator Selection
RESET
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
Interrupts
Watchdog Timer (WDT)
SLEEP
Code Protection
ID Locations
In-Circuit Serial Programming

These devices have a Watchdog Timer, which can be enabled or disabled, using a
configuration bit. It runs off its own RC oscillator for added reliability. There are two
timers that offer necessary delays on power-up. One is the Oscillator Start-up Timer
(OST), intended to keep the chip in RESET until the crystal oscillator is stable. The other
is the Power-up Timer (PWRT), which provides a fixed delay of 72 ms (nominal) on
36

power-up only. It is designed to keep the part in RESET while the power supply
stabilizes, and is enabled or disabled, using a configuration bit. With these two timers onchip, most applications need no external RESET circuitry. SLEEP mode is designed to
offer a very low current power-down mode. The user can wake-up from SLEEP through
external RESET, Watchdog Timer Wake-up, or through an interrupt. Several oscillator
options are also made available to allow the part to fit the application. The RC oscillator
option saves system cost while the LP crystal option saves power. Configuration bits are
used to select the desired oscillator mode.

3.8.8.1 Oscillator Configurations

OSCILLATOR TYPES
The PIC16F7X can be operated in four different oscillator modes. The user can program
two configuration bits (FOSC1 and FOSC0) to select one of these four modes:
LP Low Power Crystal
XT Crystal/Resonator
HS High Speed Crystal/Resonator
RC Resistor/Capacitor

3.8.8.2 RESET
The PIC16F7X differentiates between various kinds of
RESET:
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset (during normal operation)
WDT Wake-up (during SLEEP)
37

 Brown-out Reset (BOR)

Some registers are not affected in any RESET condition. Their status is unknown on POR
and unchanged in any other RESET. Most other registers are reset to a RESET state on
Power-on Reset (POR), on the MCLR and WDT Reset, on MCLR Reset during SLEEP,
and Brown-out Reset (BOR). They are not affected by a WDT Wake-up, which is viewed
as the resumption of normal operation. The TO and PD bits are set or cleared differently
in different RESET situations

Power-on Reset (POR)

o A Power-on Reset pulse is generated on-chip when VDD rise is detected (in the range
of 1.2V - 1.7V). To take advantage of the POR, tie the MCLR pin to VDDWhen the
device starts normal operation (exits the RESET condition), device operating
parameters (voltage, frequency, temperature,...) must be met to ensure operation. If
these conditions are not met, the device must be held in RESET until the operating
conditions are met.

Brown-out Reset (BOR)

o The configuration bit, BODEN, can enable or disable the Brown-out Reset circuit. If
VDD falls below VBOR (parameter D005, about 4V) for longer than TBOR
(parameter #35, about 100 S), the brown-out situation will reset the device. If VDD
falls below VBOR for less than TBOR, a RESET may not occur. Once the brown-out
occurs, the device will remain in Brown-out Reset until VDD rises above VBOR. The
Power-up Timer then keeps the device in RESET for TPWRT (parameter #33, about 72
mS). If VDD should fall below VBOR during TPWRT, the Brown-out Reset process
will restart when VDD rises above VBOR, with the Power-up Timer Reset. The
Power-up Timer is always enabled when the Brown-out Reset circuit is enabled,
regardless of the state of the PWRT configuration bit.

Power Control/Status Register (PCON)

38

o The Power Control/Status Register, PCON, has two bits to indicate the type of RESET
that last occurred. Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is unknown on a
Power-on Reset. It must then be set by the user and checked on subsequent RESETS to
see if bit BOR cleared, indicating a Brown-out Reset occurred. When the Brown-out
Reset is disabled, the state of the BOR bit is unpredictable. Bit1 is POR (Power-on
Reset Status bit). It is cleared on a Power-on Reset and unaffected otherwise. The user
must set this bit following a Power-on Reset.

Interrupts
o The PIC16F7X family has up to 12 sources of interrupt. The interrupt control register
(INTCON) records individual interrupt requests in flag bits. It also has individual and
global interrupt enable bits. A global interrupt enable bit, GIE (INTCON<7>) enables
(if set) all unmasked interrupts, or disables (if cleared) all interrupts. When bit GIE is
enabled and an interrupts flag bit and mask bit are set, the interrupt will vector
immediately. Individual interrupts can be disabled through their corresponding enable
bits in various registers. Individual interrupt bits are set, regardless of the status of the
GIE bit. The GIE bit is cleared on RESET.
o The return from interrupt instruction, RETFIE, exits the interrupt routine, as well as
sets the GIE bit, which re-enables interrupts. The RB0/INT pin interrupt, the RB port
change interrupt and the TMR0 overflow interrupt flags are contained in the INTCON
register. The peripheral interrupt flags are contained in the Special Function Registers,
PIR1 and PIR2. The corresponding interrupt enable bits are contained in Special
o Function Registers, PIE1 and PIE2, and the peripheral interrupt enable bit is contained
in Special Function Register, INTCON. When an interrupt is responded to, the GIE bit
is cleared to disable any further interrupt, the return address is pushed onto the stack
and the PC is loaded with 0004h. Once in the Interrupt Service Routine, the source(s)
of the interrupt can be determined by polling the interrupt flag bits. The interrupt flag
bit(s) must be cleared in software before re-enabling interrupts to avoid recursive
interrupts.
o For external interrupt events, such as the INT pin or PORTB change interrupt, the
interrupt latency will be three or four instruction cycles. The exact latency depends
when the interrupt event occurs, relative to the current Q cycle. The latency is the same

39

for one or two-cycle instructions. Individual interrupt flag bits are set, regardless of the
status of their corresponding mask bit, PEIE bit, or the GIE bit.

Watchdog Timer (WDT)

o The Watchdog Timer is a free running on-chip RC oscillator, which does not require
any external components. This RC oscillator is separate from the RC oscillator of the
OSC1/CLKIN pin. That means that the WDT will run, even if the clock on the
OSC1/CLKIN and OSC2/ CLKOUT pins of the device has been stopped, for example,
by execution of a SLEEP instruction. During normal operation, a WDT time-out
generates a device RESET (Watchdog Timer Reset). If the device is in SLEEP mode, a
WDT time-out causes the device to wake-up and continue with normal operation
(Watchdog Timer Wake-up). The TO bit in the STATUS register will be cleared upon a
Watchdog Timer time-out. The WDT can be permanently disabled by clearing
configuration bit, WDTE

Power-down Mode (SLEEP)

o Power-down mode is entered by executing a SLEEP instruction. If enabled, the
Watchdog Timer will be cleared but keeps running, the PD bit (STATUS<3>) is
cleared, the TO (STATUS<4>) bit is set, and the oscillator driver is turned off. The I/O
ports maintain the status they had before the SLEEP instruction was executed (driving
high, low, or hi-impedance). For lowest current consumption in this mode, place all
I/O pins at either VDD or VSS, ensure no external circuitry is drawing current from
the I/O pin, power-down the A/D and disable external clocks. Pull all I/O pins that are
hi-impedance inputs, high or low externally, to avoid switching currents caused by
floating inputs. The T0CKI input should also be at VDD or VSS for lowest current
consumption. The contribution from on-chip pull-ups on PORTB should also be
considered. The MCLR pin must be at a logic high level (VIHMC).

3.8.9 INSTRUCTION SET SUMMARY

40

The PIC16 instruction set is highly orthogonal and is comprised of three basic categories:
Byte-oriented operations
Bit-oriented operations
Literal and control operations
Each PIC16 instruction is a 14-bit word divided into an opcode, which specifies
the instruction type and one or more operands, which further specify the operation of the
instruction. For byte-oriented instructions, f represents a file register designator and d
represents a destination designator. The file register designator specifies which file
register is to be used by the instruction. The destination designator specifies where the
result of the operation is to be placed. If d is zero, the result is placed in the W register.
If d is one, the result is placed in the file register specified in the instruction.
For bit-oriented instructions, b represents a bit field designator, which selects
the bit affected by the operation, while f represents the address of the file in which the
bit is located.
For literal and control operations, k represents an eight- or eleven-bit constant
or literal value One instruction cycle consists of four oscillator periods; for an oscillator
frequency of 4 MHz, this gives a normal instruction execution time of 1 s. All
instructions are executed within a single instruction cycle, unless a conditional test is true,
or the program counter is changed as a result of an instruction. When this occurs, the
execution takes two instruction cycles, with the second cycle executed as a NOP.

MOVF Move f
Syntax: [ label ] MOVF f,d
Operands: 0 f 127 d [0,1]
Operation: (f) (destination)
Status Affected: Z
Description: The contents of register f are moved to a destination dependant upon
the status of d. If d = 0, destination is W register. If d = 1, the destination is file register f
itself. d = 1 is useful to test a file register, since status flag Z is affected.

41

 NOP No Operation
Syntax: [ label ] NOP
Operands: None
Operation: No operation
Status Affected: None
Description: No operation.

CALL Call Subroutine

Syntax: [ label ] CALL k
Operands: 0 k 2047
Operation: (PC)+ 1 TOS, k PC<10:0>, (PCLATH<4:3>) PC<12:11>
Status Affected: None
Description: Call Subroutine. First, return address (PC+1) is pushed onto the
stack. The eleven-bit immediate address is loaded into PC bits <10:0>. The upper bits of
the PC are loaded from PCLATH. CALL is a two-cycle instruction.

GOTO Unconditional Branch

Syntax: [ label ] GOTO k
Operands: 0 k 2047
Operation: k PC<10:0>
PCLATH<4:3> PC<12:11>
Status Affected: None
Description: GOTO is an unconditional branch. The eleven-bit immediate value is
loaded into PC bits <10:0>. The upper bits of PC are loaded from PCLATH<4:3>. GOTO
is a two cycle instruction.
SLEEP
Syntax: [ label ] SLEEP
Operands: None
Operation: 00h WDT,
0 WDT prescaler,
1 TO,
0 PD
Status Affected: TO, PD

42

Description: The power-down status bit, PD is cleared. Time-out status bit, TO is

set. Watchdog Timer and its prescaler are cleared. The processor is put into SLEEP mode
with the oscillator stopped.

RETURN Return from Subroutine

Syntax: [ label ] RETURN
Operands: None
Operation: TOS PC
Status Affected: None
Description: Return from subroutine. The stack is POPed and the top of the stack
(TOS) is loaded into the program counter. This is a two-cycle instruction.

XORWF Exclusive OR W with f

Syntax: [ label ] XORWF f,d
Operands: 0 f 127 d [0,1]
Operation: (W) .XOR. (f) (destination)
Status Affected: Z
Description: Exclusive OR the contents of the W register with register 'f'. If 'd' is
0, the result is stored in the W register. If 'd' is 1, the result is stored back in register 'f'.

XORLW Exclusive OR Literal with W

Syntax: [ label ] XORLW k
Operands: 0 k 255
Operation: (W) .XOR. k (W)
Status Affected: Z
Description: The contents of the W register are XORed with the eight-bit literal
'k'. The result is placed in the W register.

SUBLW Subtract W from Literal

43

Syntax: [ label ] SUBLW k

Operands: 0 k 255
Operation: k - (W) (W)
Status Affected: C, DC, Z
Description: The W register is subtracted (2s complement method) from the
eight-bit literal 'k'. The result is placed in the W register..

MOVWF Move W to f
Syntax: [ label ] MOVWF f
Operands: 0 f 127
Operation: (W) (f)
Status Affected: None
Description: Move data from W register to register 'f'.

INCF Increment f
Syntax: [ label ] INCF f,d
Operands: 0 f 127 d [0,1]
Operation: (f) + 1 (destination)
Status Affected: Z
Description: The contents of register f are incremented. If d is 0, the result is
placed in the W register. If d is 1, the result is placed back in register f.

INCFSZ Increment f, Skip if 0

Syntax: [ label ] INCFSZ f,d
Operands: 0 f 127 d [0,1]
Operation: (f) + 1 (destination), skip if result = 0
Status Affected: None
Description: The contents of register f are incremented. If d is 0, the result is
placed in the W register. If d is 1, the result is placed back in register f. If the result is
1, the next instruction is executed. If the result is 0, a NOP is executed instead, making it
a 2TCY instruction.

3.8.10 DEVELOPMENT SUPPORT

44

The PICmicro microcontrollers are supported with a full range of hardware and
software development tools:
Integrated Development Environment
- MPLAB IDE Software
Assemblers/Compilers/Linkers
- MPASMTM Assembler
- MPLAB C17 and MPLAB C18 C Compilers
- MPLINKTM Object Linker/
MPLIBTM Object Librarian
Simulators
- MPLAB SIM Software Simulator
Emulators
- MPLAB ICE 2000 In-Circuit Emulator
- ICEPIC In-Circuit Emulator
In-Circuit Debugger
- MPLAB ICD
Device Programmers
- PRO MATE II Universal Device Programmer
- PICSTART Plus Entry-Level Development Programmer
Low Cost Demonstration Boards
- PICDEMTM 1 Demonstration Board
- PICDEM 2 Demonstration Board
- PICDEM 3 Demonstration Board
- PICDEM 17 Demonstration Board
- KEELOQ Demonstration Board

3.9 Power Supply

There are many types of power supply. Most are designed to convert high voltage AC
mains electricity to a suitable low voltage supply for electronics circuits and other
devices. A power supply can by broken down into a series of blocks, each of which
performs a particular function.
For example a 5V regulated supply:

Transformer - steps down high voltage AC mains to low voltage AC.

45

Rectifier - converts AC to DC, but the DC output is varying.

Smoothing - smooth the DC from varying greatly to a small ripple.
Regulator - eliminates ripple by setting DC output to a fixed voltage.

Fig. 3.13 - Block Diagram of power supply System

Each of the blocks is described in more detail below:
TRANSFORMER:
Transformers convert AC electricity from one voltage to another with little loss of
power. Transformers work only with AC and this is one of the reasons why mains
electricity is AC. Step-up transformers increase voltage, step-down transformers reduce
voltage. Most power supplies use a step-down transformer to reduce the dangerously high
mains voltage (230V in UK) to a safer low voltage.
The input coil is called the primary and the output coil is called the secondary.
There is no electrical connection between the two coils, instead they are linked by an
alternating magnetic field created in the soft-iron core of the transformer. The two lines in
the middle of the circuit symbol represent the core.
Transformers waste very little power so the power out is (almost) equal to the power in.
Note that as voltage is stepped down current is stepped up.
The ratio of the number of turns on each coil, called the turns ratio, determines the ratio
of the voltages. A step-down transformer has a large number of turns on its primary
(input) coil which is connected to the high voltage mains supply, and a small number of
turns on its secondary (output) coil to give a low output voltage.
Turns ratio = Vp / Vs = Np /Ns
Power output = power input
Vs x Is = Vp x Ip
Vp = primary input voltage
Np= No of turns on primary coil
Ip = primary (input) current
Vs= Secondary output voltage
Ns= No of turns on secondary coil
Is = secondary (output) current
46

RECTIFIER

Fig. 3.14 - Bridge Rectifier

A bridge rectifier can be made using four individual diodes, but it is also available
in special packages containing the four diodes required. It is called a full-wave rectifier
because it uses all the AC wave (both positive and negative sections). 1.4V is used up in
the bridge rectifier because each diode uses 0.7V when conducting and there are always
two diodes conducting, as shown in the diagram below.
Bridge rectifiers are rated by the maximum current they can pass and the
maximum reverse voltage they can withstand (this must be at least three times the supply

RMS voltage so the rectifier can withstand the peak voltages). Please see the Diodes
page for more details, including pictures of bridge rectifiers.
Alternate pairs of diodes conduct, changing over the connections so the alternating
directions of AC are converted to the one direction of DC.

Fig. 3.15- Output Waveform of rectifier

SMOOTHING:

47

Fig. 3.16 - Output Waveform of capacitor

Smoothing is performed by a large value electrolytic capacitor connected across

the DC supply to act as a reservoir, supplying current to the output when the varying DC
voltage from the rectifier is falling. The diagram shows the unsmoothed varying DC
(dotted line) and the smoothed DC (solid line). The capacitor charges quickly near the
peak of the varying DC, and then discharges as it supplies current to the output.
Note that smoothing significantly increases the average DC voltage to almost the
peak value (1.4 RMS value). For example 6V RMS AC is rectified to full wave DC of
about 4.6V RMS (1.4V is lost in the bridge rectifier), with smoothing this increases to
almost the peak value giving 1.4 4.6 = 6.4V smooth DC.

Smoothing is not perfect due to the capacitor voltage falling a little as it

discharges, giving a small ripple voltage. For many circuits a ripple which is 10% of the
supply voltage is satisfactory and the equation below gives the required value for the
smoothing capacitor. A larger capacitor will give less ripple. The capacitor value must be
doubled when smoothing half-wave DC.
Voltage regulator ICs are available with fixed (typically 5, 12 and 15V) or variable
output voltages. They are also rated by the maximum current they can pass. Negative
voltage regulators are available, mainly for use in dual supplies. Most regulators include
some automatic protection from excessive current ('overload protection') and overheating
('thermal protection').
Many of the fixed voltage regulator ICs have 3 leads and look like power
transistors, such as the 7805 +5V 1A regulator shown on the right. They include a hole for
attaching a heat sink if necessary.
REGULATOR :(MC78XX/LM78XX/MC78XXA)
48

FEATURES
Output Current up to 1A
Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V
Thermal Overload Protection
Short Circuit Protection
Output Transistor Safe Operating Area Protection

3.10 GSM MODEM:3.10.1 Introduction

This document describes the hardware interface of the SIMCOM SIM300 module
that connects to the specific application and the air interface. As SIM300 can be
integrated with a wide range of applications, all functional components of SIM300 are
described in great detail.
This document can help you quickly understand SIM300 interface specifications,
electrical and mechanical details. With the help of this document and other SIM300
application notes, user guide, you can use SIM300 module to design and set-up mobile
applications quickly.
3.10.2Product concept
Designed for global market, SIM300 is a Tri-band GSM/GPRS engine that works
on frequencies EGSM 900 MHz, DCS 1800 MHz and PCS1900 MHz. SIM300 provides
GPRS multi-slot class 10/ class 8 (optional) capability and support the GPRS coding
schemes CS-1, CS-2, CS-3 and CS-4.
With a tiny configuration of 40mm x 33mm x 2.85 mm , SIM300 can fit almost all
the space requirement in your application, such as Smart phone, PDA phone and other
mobile device.
The physical interface to the mobile application is made through a 60 pins board-toboard connector, which provides all hardware interfaces between the module and
customers boards except the RF antenna interface.
The keypad and SPI LCD interface will give you the flexibility to develop
customized applications.
Two serial ports can help you easily develop your applications.

49

 Two audio channels include two microphones inputs and two speaker outputs.
This can be easily configured by AT command.
SIM300 provide RF antenna interface with two alternatives: antenna connector
and antenna pad. The antenna connector is MURATA MM9329-2700. And customers
antenna can be soldered to the antenna pad. The SIM300 is designed with power saving
technique, the current consumption to as low as 2.5mA in SLEEP mode.
The SIM300 is integrated with the TCP/IP protocolExtended TCP/IP AT
commands are developed for customers to use the TCP/IP protocol easily, which is very
useful for those data transfer applications.
3.10.3 Power supply
The power supply of SIM300 is from a single voltage source of VBAT=
3.4V...4.5V. In some case, the ripple in a transmit burst may cause voltage drops when
current consumption rises to typical peaks of 2A, So the power supply must be able to
provide sufficient current up to 2A.
For the VBAT input, a local bypass capacitor is recommended. A capacitor (about
100F, low ESR) is recommended. Multi-layer ceramic chip (MLCC) capacitors can
provide the best combination of low ESR and small size but may not be cost effective. A
lower cost choice may be a 100 F tantalum capacitor (low ESR) with a small (1 F to
10F) ceramic in parallel, which is illustrated as following figure. And the capacitors
should put as closer as possible to the SIM300 VBAT pins. The following figure is the
recommended circuit.
3.10.4 SIM card interface
SIM card application
You can use AT Command to get information in SIM card.The SIM interface supports the
functionality of the GSM Phase 1 specification and also supports the functionality of the
new GSM Phase 2+ specification for FAST 64 kbps SIM (intended for use with a SIM
application Tool-kit).
Both 1.8V and 3.0V SIM Cards are supported. The SIM interface is powered from an
internal regulator in the module having nominal voltage 2.8V. All pins reset as outputs
driving low. Logic levels are as described in table
50

Figure 3.17SIM interface reference circuit with 6 pins SIM card

The 22 resistors showed in the following figure should be added in series on the
IO line between the module and the SIM card for matching the impedance. The pull up
resistor (about 10K) must be added on the SIM_I/O line. Note that the SIM peripheral
circuit close to the SIM card socket.
The SIM_PRESENCE pin is used for detecting the SIM card removal. You can
use the AT command AT+CSDT to set the SIMCARD configure. If you dont use the
SIM card detection function, you can let the SIM_PRESENCE pin NC or connect to the
GND. The reference circuit about 6 pins SIM card illustrate in figure.
3.10.5 AT Command syntax
The "AT" or "at" prefix must be set at the beginning of each Command line. To terminate
a Command line enter <CR>.

Commands are usually followed by a response that

51

includes.<CR><LF><response><CR><LF> Throughout this document, only the

responses are presented, <CR><LF> are omitted intentionally.
Table :- Types of AT commands and responses
Test Command

AT+<x>=?

Read Command

AT+<x>?

Write Command

AT+<x>=<>

Execution Command

AT+<x>

The mobile equipment returns the list

of parameters and value ranges set with
the corresponding Write Command or
by internal processes.
This command returns the currently set
value of the parameter or parameters.
This command sets the user-definable
parameter values.
The execution command reads nonvariable parameters affected by
internal processes in the GSM engine

1) Test commands - used to check whether a command is supported or not by the

MODEM.
SYNTAX:
For example:

AT<command name>=?
ATD=?

2) Read command - used to get mobile phone or MODEM settings for an operation.
SYNTAX:
AT<command name>?
For example:
AT+CBC?
3) Set commands - used to modify mobile phone or MODEM settings for an operation.
SYNTAX:
AT<command name>=value1, value2, , valueN Some
values in set commands can be optional.
For example:
AT+CSCA=+9876543210, 120
4) Execution commands - used to carry out an operation.
SYNTAX:
AT<command name>=parameter1, parameter2, ,
parameter The read commands are not available to get value of last parameter assigned
in execution commands because parameters of execution commands are not stored.
For example:
AT+CMSS=1,+ 9876543210, 120

Testing:
Command

Description

52

AT

Checking communication between the

module and computer.

Data card Control:

Command

Description

ATI

Identification

ATS

Select an S-register

ATZ

Recall stored profile

AT&F

Restore factory settings

AT&V

View active configuration

AT&W

Store parameters in given profile

AT&Y

Select Set as power up option

AT+CLCK

Facility lock command

AT+COLP

Connected line identification presentation

AT+GCAP

Request complete capabilities list

AT+GMI

Request manufacturer identification

AT+GMM

Request model identification

AT+GMR

Request revision identification

AT+GSN

Request product serial number

identification (IMEI)

SMS Text mode:

Command

Description

AT+CSMS

Select message service

AT+CPMS

Preferred message storage

AT+CMGF

Message format
53

AT+CSCA

Service centre address

AT+CSMP

Set text mode parameters

AT+CSDH

Show text mode parameters

AT+CSCB

Select cell broadcast message types

AT+CSAS

Save settings

AT+CRES

Restore settings

AT+CNMI

New message indications to TE

AT+CMGL

List messages

AT+CMGR

Read message

AT+CMGS

Send message

AT+CMSS

Send message from storage

AT+CMGW

Write message to memory

AT+CMGD

Delete message

Chapter 4

PCB FABRICATION

The use of miniaturization and sub miniaturization in electronic equipment design

has been responsible for the introduction of a new technique in inters component wiring
and assembly that is popularly known as printed circuit.
The printed circuit boards (PCBs) consist of an insulating substrate material with
metallic circuitry photo chemically formed upon that substrate. Thus PCB provides
sufficient mechanical support and necessary electrical connections for an electronic
circuit.

54

There are a number of different processes, which are used to manufacture a PCB,
which is ready for component assembly, from a copper clad base material. These
processes are as follows
Preprocessing: - This consists of initial preparation of a copper clad laminate
ready for subsequent processing. Next is to drill tooling holes. Passing a board
through rollers performs cleaning operation.
Photolithography: - This process for PCBs involves the exposure of a photo resist
material to light through a mask. This is used for defining copper track and land
patterns.
Etching: - The etching process is performed by exposing the surface of the board
to an etchant solution which dissolves away the exposed copper areas .The
different solutions used are: FeCl, CuCl, etc.
Drilling: - Drilling is used to create the component lead holes and through holes in
a PCB .The drilling can be done before or after the track areas have been defined.
Solder Masking: - It is the process of applying organic coatings selectively to
those areas where no solder wettings is needed .The solder mask is applied by
screen-printing.
Metal Plating: - The plating is done to ensure protection of the copper tracks and
establish connection between different layers of multiplayer boards. PCBs are
stacked before being taken for final assembly of components .The PCB should
retain its solder ability.
Bare-Board Testing: - Each board needs to ensure that the required connections
exist, that there are no short circuits and holes are properly placed .The testing
usually consists of visual inspection and continuity testing

4.1 Types of PCBs: There are four major types of PCBs: 55

1) Single sided PCB: - In this, copper tracks are on one side of the board, and are the
simplest form of PCB. These are simplest to manufacture thus have low
production cost.
2) Double sided PCB:- In this, copper tracks are provided on both sides of the
substrate. To achieve the connections between the boards, hole plating is done,
which increase the manufacturing complexity.
3) Multilayered PCB: - In this, two or more pieces of dielectric substrate material
with circuitry formed upon them are stacked up and bonded together. Electrically
connections are established from one side to the other and to the layer circuitry
by drilled holes, which are subsequently plated through copper.
4) Flexible PCB: - Flexible circuit is basically a highly flexible variant of the
conventional rigid printed circuit board theme.

Chapter 5

CIRCUIT DESCRIPTION
5.1 Block Diagram

Fig5.1:- Block Diagram of Bi-directional visitor counter

56

Fig5.2:-Sensor arrangement at the way

5.2 Basic Principle:When somebody enters into the room then the counter is incremented by one. The
total number of persons inside the room is displayed on LCD .The microcontroller does
the above job, it receives the signals from the sensors, and these signals operated under
the control of software which is stored in ROM.
Microcontroller PIC16F73 continuously monitors the sensor, when any object or
person passes through the sensor then the light rays falling on the sensor are obstructed,
this obstruction is sensed by the Microcontroller. When sensor is obstructed, then the
Microcontroller will increment the counter by 1 in the display.

57

Fig5.3:- Sensor Unit

Fig5.4: - Power Section Unit

58

Fig5.5: - Microcontroller and LCD unit

5.3 Sensors :-

The block shows the sensor arrangement at the entrance cum exit passage. Here a
pair of IR transmitter-receiver is used as sensor. Photo transistors are used as IR receiver,
since it has sensitivity to receive IR rays.
5.3.1 IR Transmitter (IR LED) :-

59

Infrared (IR) radiation is electromagnetic radiation of a wavelength longer than that

of visible light, but shorter than that of microwaves. The name means "below red" (from
the Latin infra ,"below"), red being the color of visible light with the longest wavelength.
Infrared radiation has wavelengths between about 750nmand 1mm, spanning five orders
of magnitude. A longer wavelength means it has a lower frequency than red, hence
"below". Objects generally emit infrared radiation across a spectrum of wavelengths, but
only a specific region of the spectrum is of interest because sensors are usually designed
only to collect radiation within a specific bandwidth.

Fig5.6: - Infrared LED

Remote controls and IrDA devices use infrared light emitting diosed(LEDs) to
emit infrared radiation which is focused by a plastic lens into a narrow beam. The
receiver uses a silicon photo diode to convert the infrared radiation to an electric current.
It responds only to the rapidly puling signal created by the transmitter, and filters out
slowly changing infrared radiation from ambient light. IR does not penetrate walls and so
does not interfere with other devices in adjoining rooms.
An IR LED, also known as IR transmitter, is a special purpose LED that transmits
infrared rays in the range of 760 nm wavelength. Such LEDs are usually made of gallium
arsenide or aluminum gallium arsenide. They, along with IR receivers, are commonly
used as sensors.
The appearance is same as a common LED. Since the human eye cannot see the
infrared radiations, it is not possible for a person to identify whether the IR LED is
working or not, unlike a common LED. To overcome this problem, the camera on a cell
phone can be used. The camera can show us the IR rays being emanated from the IR LED
in a circuit.

60

5.3.2 Phototransistor:There is a wide selection of photosensitive devices that are available to the
electronic designer. Whilst photo-diodes fulfil many requirements, phototransistors or
photo transistors are also available, and are more suitable in some applications. Providing
high levels of gain and standard devices are low cost, these phototransistors can be used
in many applications.
The idea of the photo transistor has been known for many years. William
Shockley first proposed the idea in 1951, not long after the ordinary transistor had been
discovered. It was then only two years before the photo transistor was demonstrated.
Since then phototransistors have been used in a variety of applications, and their
development has continued ever since.
Phototransistor structure
Although ordinary transistors exhibit the photosensitive effects if they are exposed
to light, the structure of the phototransistor is specifically optimised for photo
applications. The photo transistor has much larger base and collector areas than would be
used for a normal transistor. These devices were generally made using diffusion or ion
implantation.
Homojunction planar phototransistor structure
Early photo transistors used germanium or silicon throughout the device giving a homojunction structure. The more modern phototransistors use type III-V materials such as
gallium arsenide and the like. Heterostructures that use different materials either side of
the p-n junction are also popular because they provide high conversion efficiency. These
are generally fabricated using epitaxial growth of materials that have matching lattice
structures. These photo transistors generally use a mesa structure. Sometimes a Schottky
(metal semiconductor) junction can be used for the collector within a phototransistor,
although this practice is less common these days because other structures offer better
levels of performance.
Phototransistor operation
Photo transistors are operated in their active regime, although the base connection
is left open circuit or disconnected because it is not required. The base of the photo
transistor would only be used to bias the transistor so that additional collector current was
flowing and this would mask any current flowing as a result of the photo-action. For
operation the bias conditions are quite simple. The collector of an n-p-n transistor is made
positive with respect to the emitter or negative for a p-n-p transistor.

61

The light enters the base region of the phototransistor where it causes hole
electron pairs to be generated. This mainly occurs in the reverse biased base-collector
junction. The hole-electron pairs move under the influence of the electric field and
provide the base current, causing electrons to be injected into the emitter.
Phototransistor symbol

Fig5.7: - Symbol of Phototransistor

Phototransistor circuit operation
Operation in the "linear" or active mode provides a response that is very broadly
proportional to the light stimulus. In reality the phototransistor does not give a
particularly linear output to the input stimulus and it is for this reason that this mode of
operation is more correctly termed the active mode.
The operation of the phototransistor circuit in the switch mode is more widely
used in view of the non-linear response of the phototransistor to light. When there is little
or no light, virtually no current will flow in the transistor, and it can be said to be in the
"off" state. However as the level of light increases, current starts to flow. Eventually a
point is reached where the phototransistor becomes saturated and the level of current
cannot increase. In this situation the phototransistor is said to be saturated. The switch
mode, therefore has two levels: - "on" and "off" as in a digital or logic system. This type
of phototransistor mode is useful for detecting objects, sending data or reading encoders,
etc.
With most circuits not using the base connection (even if it is available), the only
way to change the mode of operation of the circuit is to change the value of the load
resistor. This is set by estimating the maximum current anticipated from the light levels
encountered.
Using this assumption, the following equations can be used:
Active mode: VCC > RL x Ic
Switch mode: VCC < RL x Ic
Where
RL = load resistor (i.e. Rc or Re in the diagrams above).
IC =maximum anticipated current . VCC = supply voltage.

62

Fig5.8:- Phototransistor

Chapter 6

APPLICATIONS, ADVANTAGE AND FUTURE SCOPE

6.1 Applications and Advantage: It can be used in various rooms like seminar hall, where the capacity of room is
limited and should not be exceeded. Project will display the actual number of
persons inside the room.
Can be used in conference room, study rooms in colleges
It can be used for the automatic open and close the door.
Application of this project is that we are sending data of entering persons to a
mobile no through a modem unit, this data can be interface with the PC through
DB9 connector pin.
6.2 Future Scope: We can use this project to turn on and turn off light of a room when a person
enters or when there is no one.
63

By using this circuit and proper power supply we can implement various
applications Such as fans, tube lights, etc.

Chapter 7

CONCLUSION
Bi-Directional visitor counter is a very useful device where in a building or in a
room, seminar room persons counting are needed.
So that by using this project we can reduce the human effort in counting the
number of persons entering and number of persons staying in an enclosed area. The cost
of implementing is reasonable and all the components required are readily available in the
market and the circuit is easy to build.
Human may commit errors in counting the number of persons. But by using this
circuit these errors can be rectified. The power consumption of this circuit is also very
less.

64

APPENDIX-A

SOURCE CODE OF PROJECT

int i;
void Display(int i)
{
unsigned int temp,x;
temp = i/10;
x = i%10;
x = x+48;
Lcd_Chr(2, 10, x);
temp = temp+48;
Lcd_Chr(2, 9, temp);
}
void gsm_sms(int n)
{
int x,y;
x=n%10;
y=n/10;
x=x+48;
y=y+48;
Usart_Write('A');
Usart_Write('T');
Usart_Write('+');
Usart_Write('C');
Usart_Write('M');
65

Usart_Write('G');
Usart_Write('S');
Usart_Write('=');
Usart_Write('"');
Usart_Write('9');
Usart_Write('8');
Usart_Write('8');
Usart_Write('7');
Usart_Write('1');
Usart_Write('0');
Usart_Write('3');
Usart_Write('0');
Usart_Write('7');
Usart_Write('3');
Usart_Write('"');
Usart_Write(34);
Usart_Write(0x0D);
Usart_Write(0);
Delay_ms(1000);
Usart_Write('N');
Usart_Write('o');
Usart_Write('.');
Usart_Write(' ');
Usart_Write('o');
Usart_Write('f');
Usart_Write(' ');
Usart_Write('P');
Usart_Write('e');
Usart_Write('r');
Usart_Write('s');
Usart_Write('o');
Usart_Write('n');
Usart_Write('s');
Usart_Write(' ');
66

Usart_Write('E');
Usart_Write('n');
Usart_Write('t');
Usart_Write('e');
Usart_Write('r');
Usart_Write('e');
Usart_Write('d');
Usart_Write(' ');
Usart_Write('=');
Usart_Write(' ');
Usart_Write(y);
Usart_Write(x);
Usart_Write(0x1A);
Usart_Write(0);
delay_ms(1000);
}
void CLOSE()
{
PORTC.F3= 1;
PORTC.F4= 0;
Delay_ms(1000);
PORTC.F3= 0;
}
void OPEN()
{
PORTC.F3= 0;
PORTC.F4= 1;
Delay_ms(1000);
PORTC.F4= 0;
}
void main()
67

{
int a,b,c;
Lcd_Init(&PORTB);

// Initialize LCD

Lcd_Cmd(Lcd_CLEAR);
Lcd_Cmd(Lcd_CURSOR_OFF);
Usart_Init(9600);
delay_ms(500);
Lcd_Out(1, 1, " Bidirectional ");
Lcd_Out(2, 1, "Visitor Counter ");
delay_ms(30000);
Lcd_Cmd(Lcd_CLEAR);
// PORTA = 0x00;
i=0;
Lcd_Out(1, 1, "No. of. Persons ");
Lcd_Out(2, 1, "Entered

");

b=0;
c=0;
while(1)
{
a=i;
b=a/5;
if (a%5==0 && b!=c)
{
c=b;
gsm_sms(i) ;
}
if (PORTA.F0)
{
Lcd_Out(2, 9,"<<");
OPEN();
68

while(PORTA.F1==0)
{
}
CLOSE();
i++;
Delay_ms(700);
}
if (PORTA.F1)
{
Lcd_Out(2, 9, ">>");
OPEN();
while(PORTA.F0==0)
{
}
CLOSE();
if(i>0)
{
i--;
}
Delay_ms(700);
}
Display(i);
}
}

69

REFERENCES

www.betaengineers.net
www.kitsnspares.com
www.scribd.com/doc/47054137/Some-Innovative-Ideas
www.datasheets4u.com
www.electronics-tutorials.ws/io/io_7.html
www.engineersgarage.com
http://datasheetreference.com

70